Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  Copyright (C) 2011-2015 John Crispin <blogic@phrozen.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/property.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <lantiq_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define XBAR_ALWAYS_LAST	0x430
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define XBAR_FPI_BURST_EN	BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define XBAR_AHB_BURST_EN	BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define RCU_VR9_BE_AHB1S	0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int ltq_fpi_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	struct device *dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	struct device_node *np = dev->of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	struct regmap *rcu_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	void __iomem *xbar_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	u32 rcu_ahb_endianness_reg_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	xbar_membase = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	if (IS_ERR(xbar_membase))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		return PTR_ERR(xbar_membase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	/* RCU configuration is optional */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	rcu_regmap = syscon_regmap_lookup_by_phandle(np, "lantiq,rcu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	if (IS_ERR(rcu_regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		return PTR_ERR(rcu_regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	ret = device_property_read_u32(dev, "lantiq,offset-endianness",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 				       &rcu_ahb_endianness_reg_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		dev_err(&pdev->dev, "Failed to get RCU reg offset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	ret = regmap_update_bits(rcu_regmap, rcu_ahb_endianness_reg_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 				 RCU_VR9_BE_AHB1S, RCU_VR9_BE_AHB1S);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		dev_warn(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 			 "Failed to configure RCU AHB endianness\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	/* disable fpi burst */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	ltq_w32_mask(XBAR_FPI_BURST_EN, 0, xbar_membase + XBAR_ALWAYS_LAST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	return of_platform_populate(dev->of_node, NULL, NULL, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const struct of_device_id ltq_fpi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	{ .compatible = "lantiq,xrx200-fpi" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MODULE_DEVICE_TABLE(of, ltq_fpi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct platform_driver ltq_fpi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	.probe = ltq_fpi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 		.name = "fpi-xway",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 		.of_match_table = ltq_fpi_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) module_platform_driver(ltq_fpi_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MODULE_DESCRIPTION("Lantiq FPI bus driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MODULE_LICENSE("GPL");