Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright 2014-2016 Freescale Semiconductor Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright NXP 2016
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/sys_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/fsl/mc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <soc/fsl/dpaa2-io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include "qbman-portal.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include "dpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "dpio-cmd.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) MODULE_LICENSE("Dual BSD/GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) MODULE_AUTHOR("Freescale Semiconductor, Inc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) MODULE_DESCRIPTION("DPIO Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) struct dpio_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	struct dpaa2_io *io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static cpumask_var_t cpus_unused_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) static const struct soc_device_attribute ls1088a_soc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	{.family = "QorIQ LS1088A"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static const struct soc_device_attribute ls2080a_soc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	{.family = "QorIQ LS2080A"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static const struct soc_device_attribute ls2088a_soc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	{.family = "QorIQ LS2088A"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static const struct soc_device_attribute lx2160a_soc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	{.family = "QorIQ LX2160A"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	{ /* sentinel */ }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static int dpaa2_dpio_get_cluster_sdest(struct fsl_mc_device *dpio_dev, int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	int cluster_base, cluster_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (soc_device_match(ls1088a_soc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		cluster_base = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		cluster_size = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	} else if (soc_device_match(ls2080a_soc) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		   soc_device_match(ls2088a_soc) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		   soc_device_match(lx2160a_soc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		cluster_base = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		cluster_size = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		dev_err(&dpio_dev->dev, "unknown SoC version\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	return cluster_base + cpu / cluster_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) static irqreturn_t dpio_irq_handler(int irq_num, void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct device *dev = (struct device *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	struct dpio_priv *priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	return dpaa2_io_irq(priv->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) static void unregister_dpio_irq_handlers(struct fsl_mc_device *dpio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct fsl_mc_device_irq *irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	irq = dpio_dev->irqs[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	/* clear the affinity hint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	irq_set_affinity_hint(irq->msi_desc->irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static int register_dpio_irq_handlers(struct fsl_mc_device *dpio_dev, int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	struct fsl_mc_device_irq *irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	irq = dpio_dev->irqs[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	error = devm_request_irq(&dpio_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				 irq->msi_desc->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				 dpio_irq_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				 dev_name(&dpio_dev->dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				 &dpio_dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	if (error < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		dev_err(&dpio_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 			"devm_request_irq() failed: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 			error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* set the affinity hint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	if (irq_set_affinity_hint(irq->msi_desc->irq, cpumask_of(cpu)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		dev_err(&dpio_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			"irq_set_affinity failed irq %d cpu %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			irq->msi_desc->irq, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int dpaa2_dpio_probe(struct fsl_mc_device *dpio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct dpio_attr dpio_attrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	struct dpaa2_io_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct dpio_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	int err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct device *dev = &dpio_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int possible_next_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	int sdest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		goto err_priv_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	dev_set_drvdata(dev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	err = fsl_mc_portal_allocate(dpio_dev, 0, &dpio_dev->mc_io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		dev_dbg(dev, "MC portal allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		err = -EPROBE_DEFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		goto err_priv_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 			&dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		dev_err(dev, "dpio_open() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		goto err_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	err = dpio_reset(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		dev_err(dev, "dpio_reset() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		goto err_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	err = dpio_get_attributes(dpio_dev->mc_io, 0, dpio_dev->mc_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 				  &dpio_attrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		dev_err(dev, "dpio_get_attributes() failed %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		goto err_get_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	desc.qman_version = dpio_attrs.qbman_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	err = dpio_enable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		dev_err(dev, "dpio_enable() failed %d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		goto err_get_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	/* initialize DPIO descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	desc.receives_notifications = dpio_attrs.num_priorities ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	desc.has_8prio = dpio_attrs.num_priorities == 8 ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	desc.dpio_id = dpio_dev->obj_desc.id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	/* get the cpu to use for the affinity hint */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	possible_next_cpu = cpumask_first(cpus_unused_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (possible_next_cpu >= nr_cpu_ids) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		dev_err(dev, "probe failed. Number of DPIOs exceeds NR_CPUS.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		err = -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		goto err_allocate_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	desc.cpu = possible_next_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	cpumask_clear_cpu(possible_next_cpu, cpus_unused_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	sdest = dpaa2_dpio_get_cluster_sdest(dpio_dev, desc.cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (sdest >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		err = dpio_set_stashing_destination(dpio_dev->mc_io, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 						    dpio_dev->mc_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 						    sdest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 			dev_err(dev, "dpio_set_stashing_destination failed for cpu%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				desc.cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	if (dpio_dev->obj_desc.region_count < 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		/* No support for DDR backed portals, use classic mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		 * Set the CENA regs to be the cache inhibited area of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		 * portal to avoid coherency issues if a user migrates to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		 * another core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		desc.regs_cena = devm_memremap(dev, dpio_dev->regions[1].start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 					resource_size(&dpio_dev->regions[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 					MEMREMAP_WC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		desc.regs_cena = devm_memremap(dev, dpio_dev->regions[2].start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 					resource_size(&dpio_dev->regions[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 					MEMREMAP_WB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	if (IS_ERR(desc.regs_cena)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		dev_err(dev, "devm_memremap failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		err = PTR_ERR(desc.regs_cena);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		goto err_allocate_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	desc.regs_cinh = devm_ioremap(dev, dpio_dev->regions[1].start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 				      resource_size(&dpio_dev->regions[1]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	if (!desc.regs_cinh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		dev_err(dev, "devm_ioremap failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		goto err_allocate_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	err = fsl_mc_allocate_irqs(dpio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		dev_err(dev, "fsl_mc_allocate_irqs failed. err=%d\n", err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		goto err_allocate_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	priv->io = dpaa2_io_create(&desc, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (!priv->io) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		dev_err(dev, "dpaa2_io_create failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		goto err_dpaa2_io_create;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	err = register_dpio_irq_handlers(dpio_dev, desc.cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		goto err_register_dpio_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	dev_info(dev, "probed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	dev_dbg(dev, "   receives_notifications = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 		desc.receives_notifications);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) err_dpaa2_io_create:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	unregister_dpio_irq_handlers(dpio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) err_register_dpio_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	fsl_mc_free_irqs(dpio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) err_allocate_irqs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) err_get_attr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) err_reset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) err_open:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	fsl_mc_portal_free(dpio_dev->mc_io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) err_priv_alloc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* Tear down interrupts for a given DPIO object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) static void dpio_teardown_irqs(struct fsl_mc_device *dpio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	unregister_dpio_irq_handlers(dpio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	fsl_mc_free_irqs(dpio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) static int dpaa2_dpio_remove(struct fsl_mc_device *dpio_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	struct dpio_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	int err = 0, cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	dev = &dpio_dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	priv = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	cpu = dpaa2_io_get_cpu(priv->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	dpaa2_io_down(priv->io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	dpio_teardown_irqs(dpio_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	cpumask_set_cpu(cpu, cpus_unused_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			&dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		dev_err(dev, "dpio_open() failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		goto err_open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	fsl_mc_portal_free(dpio_dev->mc_io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) err_open:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	fsl_mc_portal_free(dpio_dev->mc_io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) static const struct fsl_mc_device_id dpaa2_dpio_match_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		.vendor = FSL_MC_VENDOR_FREESCALE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		.obj_type = "dpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	{ .vendor = 0x0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static struct fsl_mc_driver dpaa2_dpio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		.name		= KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		.owner		= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	.probe		= dpaa2_dpio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	.remove		= dpaa2_dpio_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.match_id_table = dpaa2_dpio_match_id_table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static int dpio_driver_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	if (!zalloc_cpumask_var(&cpus_unused_mask, GFP_KERNEL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	cpumask_copy(cpus_unused_mask, cpu_online_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	return fsl_mc_driver_register(&dpaa2_dpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static void dpio_driver_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	free_cpumask_var(cpus_unused_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	fsl_mc_driver_unregister(&dpaa2_dpio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) module_init(dpio_driver_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) module_exit(dpio_driver_exit);