^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2015 Atmel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Boris Brezillon <boris.brezillon@free-electrons.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef __AT91_SOC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define __AT91_SOC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/sys_soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct at91_soc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u32 cidr_match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u32 exid_match;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) const char *family;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AT91_SOC(__cidr, __exid, __name, __family) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .cidr_match = (__cidr), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .exid_match = (__exid), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .name = (__name), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .family = (__family), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct soc_device * __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) at91_soc_init(const struct at91_soc *socs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define AT91RM9200_CIDR_MATCH 0x09290780
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define AT91SAM9260_CIDR_MATCH 0x019803a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define AT91SAM9261_CIDR_MATCH 0x019703a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define AT91SAM9263_CIDR_MATCH 0x019607a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define AT91SAM9G20_CIDR_MATCH 0x019905a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define AT91SAM9G45_CIDR_MATCH 0x019b05a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define AT91SAM9X5_CIDR_MATCH 0x019a05a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define AT91SAM9N12_CIDR_MATCH 0x019a07a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SAM9X60_CIDR_MATCH 0x019b35a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define AT91SAM9M11_EXID_MATCH 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define AT91SAM9M10_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define AT91SAM9G46_EXID_MATCH 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define AT91SAM9G45_EXID_MATCH 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define AT91SAM9G15_EXID_MATCH 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define AT91SAM9G35_EXID_MATCH 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define AT91SAM9X35_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define AT91SAM9G25_EXID_MATCH 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define AT91SAM9X25_EXID_MATCH 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define AT91SAM9CN12_EXID_MATCH 0x00000005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define AT91SAM9N12_EXID_MATCH 0x00000006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define AT91SAM9CN11_EXID_MATCH 0x00000009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define SAM9X60_EXID_MATCH 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define AT91SAM9XE128_CIDR_MATCH 0x329973a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define SAMA5D2_CIDR_MATCH 0x0a5c08c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define SAMA5D21CU_EXID_MATCH 0x0000005a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define SAMA5D225C_D1M_EXID_MATCH 0x00000053
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SAMA5D22CU_EXID_MATCH 0x00000059
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SAMA5D22CN_EXID_MATCH 0x00000069
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define SAMA5D23CU_EXID_MATCH 0x00000058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define SAMA5D24CX_EXID_MATCH 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define SAMA5D24CU_EXID_MATCH 0x00000014
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define SAMA5D26CU_EXID_MATCH 0x00000012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define SAMA5D27C_D1G_EXID_MATCH 0x00000033
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define SAMA5D27C_D5M_EXID_MATCH 0x00000032
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define SAMA5D27C_LD1G_EXID_MATCH 0x00000061
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define SAMA5D27C_LD2G_EXID_MATCH 0x00000062
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define SAMA5D27CU_EXID_MATCH 0x00000011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define SAMA5D27CN_EXID_MATCH 0x00000021
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define SAMA5D28C_D1G_EXID_MATCH 0x00000013
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define SAMA5D28C_LD1G_EXID_MATCH 0x00000071
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define SAMA5D28C_LD2G_EXID_MATCH 0x00000072
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define SAMA5D28CU_EXID_MATCH 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SAMA5D28CN_EXID_MATCH 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define SAMA5D3_CIDR_MATCH 0x0a5c07c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define SAMA5D31_EXID_MATCH 0x00444300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define SAMA5D33_EXID_MATCH 0x00414300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define SAMA5D34_EXID_MATCH 0x00414301
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define SAMA5D35_EXID_MATCH 0x00584300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define SAMA5D36_EXID_MATCH 0x00004301
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define SAMA5D4_CIDR_MATCH 0x0a5c07c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define SAMA5D41_EXID_MATCH 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define SAMA5D42_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define SAMA5D43_EXID_MATCH 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define SAMA5D44_EXID_MATCH 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define SAME70Q21_CIDR_MATCH 0x21020e00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define SAME70Q21_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define SAME70Q20_CIDR_MATCH 0x21020c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define SAME70Q20_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define SAME70Q19_CIDR_MATCH 0x210d0a00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define SAME70Q19_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define SAMS70Q21_CIDR_MATCH 0x21120e00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define SAMS70Q21_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define SAMS70Q20_CIDR_MATCH 0x21120c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define SAMS70Q20_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define SAMS70Q19_CIDR_MATCH 0x211d0a00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define SAMS70Q19_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define SAMV71Q21_CIDR_MATCH 0x21220e00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define SAMV71Q21_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define SAMV71Q20_CIDR_MATCH 0x21220c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define SAMV71Q20_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define SAMV71Q19_CIDR_MATCH 0x212d0a00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define SAMV71Q19_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define SAMV70Q20_CIDR_MATCH 0x21320c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define SAMV70Q20_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define SAMV70Q19_CIDR_MATCH 0x213d0a00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define SAMV70Q19_EXID_MATCH 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #endif /* __AT91_SOC_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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