^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2011-2017, The Linux Foundation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _DRIVERS_SLIMBUS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _DRIVERS_SLIMBUS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slimbus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* Standard values per SLIMbus spec needed by controllers and devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define SLIM_CL_PER_SUPERFRAME 6144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SLIM_CL_PER_SUPERFRAME_DIV8 (SLIM_CL_PER_SUPERFRAME >> 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* SLIMbus message types. Related to interpretation of message code. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define SLIM_MSG_MT_CORE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SLIM_MSG_MT_DEST_REFERRED_USER 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SLIM_MSG_MT_SRC_REFERRED_USER 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * SLIM Broadcast header format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * BYTE 0: MT[7:5] RL[4:0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * BYTE 1: RSVD[7] MC[6:0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * BYTE 2: RSVD[7:6] DT[5:4] PI[3:0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SLIM_MSG_MT_MASK GENMASK(2, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SLIM_MSG_MT_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SLIM_MSG_RL_MASK GENMASK(4, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SLIM_MSG_RL_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define SLIM_MSG_MC_MASK GENMASK(6, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SLIM_MSG_MC_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define SLIM_MSG_DT_MASK GENMASK(1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define SLIM_MSG_DT_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define SLIM_HEADER_GET_MT(b) ((b >> SLIM_MSG_MT_SHIFT) & SLIM_MSG_MT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SLIM_HEADER_GET_RL(b) ((b >> SLIM_MSG_RL_SHIFT) & SLIM_MSG_RL_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SLIM_HEADER_GET_MC(b) ((b >> SLIM_MSG_MC_SHIFT) & SLIM_MSG_MC_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SLIM_HEADER_GET_DT(b) ((b >> SLIM_MSG_DT_SHIFT) & SLIM_MSG_DT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* Device management messages used by this framework */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define SLIM_MSG_MC_REPORT_PRESENT 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SLIM_MSG_MC_ASSIGN_LOGICAL_ADDRESS 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define SLIM_MSG_MC_REPORT_ABSENT 0xF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Data channel management messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define SLIM_MSG_MC_CONNECT_SOURCE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define SLIM_MSG_MC_CONNECT_SINK 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define SLIM_MSG_MC_DISCONNECT_PORT 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define SLIM_MSG_MC_CHANGE_CONTENT 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /* Clock pause Reconfiguration messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define SLIM_MSG_MC_BEGIN_RECONFIGURATION 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define SLIM_MSG_MC_NEXT_PAUSE_CLOCK 0x4A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define SLIM_MSG_MC_NEXT_DEFINE_CHANNEL 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define SLIM_MSG_MC_NEXT_DEFINE_CONTENT 0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define SLIM_MSG_MC_NEXT_ACTIVATE_CHANNEL 0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define SLIM_MSG_MC_NEXT_DEACTIVATE_CHANNEL 0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define SLIM_MSG_MC_NEXT_REMOVE_CHANNEL 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define SLIM_MSG_MC_RECONFIGURE_NOW 0x5F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Clock pause values per SLIMbus spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define SLIM_CLK_FAST 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define SLIM_CLK_CONST_PHASE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define SLIM_CLK_UNSPECIFIED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Destination type Values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define SLIM_MSG_DEST_LOGICALADDR 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SLIM_MSG_DEST_ENUMADDR 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SLIM_MSG_DEST_BROADCAST 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /* Standard values per SLIMbus spec needed by controllers and devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define SLIM_MAX_CLK_GEAR 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define SLIM_MIN_CLK_GEAR 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define SLIM_SLOT_LEN_BITS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Indicate that the frequency of the flow and the bus frequency are locked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define SLIM_CHANNEL_CONTENT_FL BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* Standard values per SLIMbus spec needed by controllers and devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define SLIM_CL_PER_SUPERFRAME 6144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define SLIM_SLOTS_PER_SUPERFRAME (SLIM_CL_PER_SUPERFRAME >> 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define SLIM_SL_PER_SUPERFRAME (SLIM_CL_PER_SUPERFRAME >> 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* Manager's logical address is set to 0xFF per spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SLIM_LA_MANAGER 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define SLIM_MAX_TIDS 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * struct slim_framer - Represents SLIMbus framer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * Every controller may have multiple framers. There is 1 active framer device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * responsible for clocking the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * Manager is responsible for framer hand-over.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * @dev: Driver model representation of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * @e_addr: Enumeration address of the framer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * @rootfreq: Root Frequency at which the framer can run. This is maximum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * frequency ('clock gear 10') at which the bus can operate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @superfreq: Superframes per root frequency. Every frame is 6144 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct slim_framer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct device dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct slim_eaddr e_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int rootfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int superfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define to_slim_framer(d) container_of(d, struct slim_framer, dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * struct slim_msg_txn - Message to be sent by the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * This structure has packet header,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * payload and buffer to be filled (if any)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * @rl: Header field. remaining length.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * @mt: Header field. Message type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * @mc: Header field. LSB is message code for type mt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @dt: Header field. Destination type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * @ec: Element code. Used for elemental access APIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * @tid: Transaction ID. Used for messages expecting response.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * (relevant for message-codes involving read operation)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @la: Logical address of the device this message is going to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * (Not used when destination type is broadcast.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * @msg: Elemental access message to be read/written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @comp: completion if read/write is synchronous, used internally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * for tid based transactions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) struct slim_msg_txn {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) u8 rl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) u8 mt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 mc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u8 dt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u16 ec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u8 tid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) u8 la;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) struct slim_val_inf *msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct completion *comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* Frequently used message transaction structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define DEFINE_SLIM_LDEST_TXN(name, mc, rl, la, msg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct slim_msg_txn name = { rl, 0, mc, SLIM_MSG_DEST_LOGICALADDR, 0,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 0, la, msg, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define DEFINE_SLIM_BCAST_TXN(name, mc, rl, la, msg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct slim_msg_txn name = { rl, 0, mc, SLIM_MSG_DEST_BROADCAST, 0,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 0, la, msg, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define DEFINE_SLIM_EDEST_TXN(name, mc, rl, la, msg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct slim_msg_txn name = { rl, 0, mc, SLIM_MSG_DEST_ENUMADDR, 0,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 0, la, msg, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * enum slim_clk_state: SLIMbus controller's clock state used internally for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * maintaining current clock state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * @SLIM_CLK_ACTIVE: SLIMbus clock is active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * @SLIM_CLK_ENTERING_PAUSE: SLIMbus clock pause sequence is being sent on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * bus. If this succeeds, state changes to SLIM_CLK_PAUSED. If the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * transition fails, state changes back to SLIM_CLK_ACTIVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * @SLIM_CLK_PAUSED: SLIMbus controller clock has paused.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) enum slim_clk_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) SLIM_CLK_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) SLIM_CLK_ENTERING_PAUSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) SLIM_CLK_PAUSED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * struct slim_sched: Framework uses this structure internally for scheduling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * @clk_state: Controller's clock state from enum slim_clk_state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * @pause_comp: Signals completion of clock pause sequence. This is useful when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * client tries to call SLIMbus transaction when controller is entering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * clock pause.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * @m_reconf: This mutex is held until current reconfiguration (data channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * scheduling, message bandwidth reservation) is done. Message APIs can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * use the bus concurrently when this mutex is held since elemental access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * messages can be sent on the bus when reconfiguration is in progress.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct slim_sched {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) enum slim_clk_state clk_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct completion pause_comp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct mutex m_reconf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * enum slim_port_direction: SLIMbus port direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * @SLIM_PORT_SINK: SLIMbus port is a sink
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * @SLIM_PORT_SOURCE: SLIMbus port is a source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) enum slim_port_direction {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) SLIM_PORT_SINK = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) SLIM_PORT_SOURCE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * enum slim_port_state: SLIMbus Port/Endpoint state machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * according to SLIMbus Spec 2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * @SLIM_PORT_DISCONNECTED: SLIMbus port is disconnected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * entered from Unconfigure/configured state after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * DISCONNECT_PORT or REMOVE_CHANNEL core command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * @SLIM_PORT_UNCONFIGURED: SLIMbus port is in unconfigured state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * entered from disconnect state after CONNECT_SOURCE/SINK core command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * @SLIM_PORT_CONFIGURED: SLIMbus port is in configured state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * entered from unconfigured state after DEFINE_CHANNEL, DEFINE_CONTENT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * and ACTIVATE_CHANNEL core commands. Ready for data transmission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) enum slim_port_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) SLIM_PORT_DISCONNECTED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) SLIM_PORT_UNCONFIGURED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) SLIM_PORT_CONFIGURED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * enum slim_channel_state: SLIMbus channel state machine used by core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * @SLIM_CH_STATE_DISCONNECTED: SLIMbus channel is disconnected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * @SLIM_CH_STATE_ALLOCATED: SLIMbus channel is allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * @SLIM_CH_STATE_ASSOCIATED: SLIMbus channel is associated with port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * @SLIM_CH_STATE_DEFINED: SLIMbus channel parameters are defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @SLIM_CH_STATE_CONTENT_DEFINED: SLIMbus channel content is defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * @SLIM_CH_STATE_ACTIVE: SLIMbus channel is active and ready for data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * @SLIM_CH_STATE_REMOVED: SLIMbus channel is inactive and removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) enum slim_channel_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) SLIM_CH_STATE_DISCONNECTED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) SLIM_CH_STATE_ALLOCATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) SLIM_CH_STATE_ASSOCIATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) SLIM_CH_STATE_DEFINED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) SLIM_CH_STATE_CONTENT_DEFINED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) SLIM_CH_STATE_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) SLIM_CH_STATE_REMOVED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * enum slim_ch_data_fmt: SLIMbus channel data Type identifiers according to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * Table 60 of SLIMbus Spec 1.01.01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * @SLIM_CH_DATA_FMT_NOT_DEFINED: Undefined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * @SLIM_CH_DATA_FMT_LPCM_AUDIO: LPCM audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * @SLIM_CH_DATA_FMT_IEC61937_COMP_AUDIO: IEC61937 Compressed audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * @SLIM_CH_DATA_FMT_PACKED_PDM_AUDIO: Packed PDM audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) enum slim_ch_data_fmt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) SLIM_CH_DATA_FMT_NOT_DEFINED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) SLIM_CH_DATA_FMT_LPCM_AUDIO = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) SLIM_CH_DATA_FMT_IEC61937_COMP_AUDIO = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) SLIM_CH_DATA_FMT_PACKED_PDM_AUDIO = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * enum slim_ch_aux_fmt: SLIMbus channel Aux Field format IDs according to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * Table 63 of SLIMbus Spec 2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * @SLIM_CH_AUX_FMT_NOT_APPLICABLE: Undefined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * @SLIM_CH_AUX_FMT_ZCUV_TUNNEL_IEC60958: ZCUV for tunneling IEC60958
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * @SLIM_CH_AUX_FMT_USER_DEFINED: User defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) enum slim_ch_aux_bit_fmt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) SLIM_CH_AUX_FMT_NOT_APPLICABLE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) SLIM_CH_AUX_FMT_ZCUV_TUNNEL_IEC60958 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) SLIM_CH_AUX_FMT_USER_DEFINED = 0xF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * struct slim_channel - SLIMbus channel, used for state machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * @id: ID of channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * @prrate: Presense rate of channel from Table 66 of SLIMbus 2.0 Specs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * @seg_dist: segment distribution code from Table 20 of SLIMbus 2.0 Specs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * @data_fmt: Data format of channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * @aux_fmt: Aux format for this channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * @state: channel state machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct slim_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int prrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) int seg_dist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) enum slim_ch_data_fmt data_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) enum slim_ch_aux_bit_fmt aux_fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) enum slim_channel_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * struct slim_port - SLIMbus port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * @id: Port id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * @direction: Port direction, Source or Sink.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * @state: state machine of port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * @ch: channel associated with this port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct slim_port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) enum slim_port_direction direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) enum slim_port_state state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct slim_channel ch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * enum slim_transport_protocol: SLIMbus Transport protocol list from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * Table 47 of SLIMbus 2.0 specs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * @SLIM_PROTO_ISO: Isochronous Protocol, no flow control as data rate match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * channel rate flow control embedded in the data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * @SLIM_PROTO_PUSH: Pushed Protocol, includes flow control, Used to carry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * data whose rate is equal to, or lower than the channel rate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * @SLIM_PROTO_PULL: Pulled Protocol, similar usage as pushed protocol
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * but pull is a unicast.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * @SLIM_PROTO_LOCKED: Locked Protocol
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * @SLIM_PROTO_ASYNC_SMPLX: Asynchronous Protocol-Simplex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * @SLIM_PROTO_ASYNC_HALF_DUP: Asynchronous Protocol-Half-duplex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * @SLIM_PROTO_EXT_SMPLX: Extended Asynchronous Protocol-Simplex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * @SLIM_PROTO_EXT_HALF_DUP: Extended Asynchronous Protocol-Half-duplex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) enum slim_transport_protocol {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) SLIM_PROTO_ISO = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) SLIM_PROTO_PUSH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) SLIM_PROTO_PULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) SLIM_PROTO_LOCKED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) SLIM_PROTO_ASYNC_SMPLX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) SLIM_PROTO_ASYNC_HALF_DUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) SLIM_PROTO_EXT_SMPLX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) SLIM_PROTO_EXT_HALF_DUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * struct slim_stream_runtime - SLIMbus stream runtime instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * @name: Name of the stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * @dev: SLIM Device instance associated with this stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) * @direction: direction of stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) * @prot: Transport protocol used in this stream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * @rate: Data rate of samples *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * @bps: bits per sample
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) * @ratem: rate multipler which is super frame rate/data rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * @num_ports: number of ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * @ports: pointer to instance of ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * @node: list head for stream associated with slim device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct slim_stream_runtime {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) struct slim_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) int direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) enum slim_transport_protocol prot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) unsigned int rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) unsigned int bps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) unsigned int ratem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) int num_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct slim_port *ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct list_head node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * struct slim_controller - Controls every instance of SLIMbus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * (similar to 'master' on SPI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * @dev: Device interface to this driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * @id: Board-specific number identifier for this controller/bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * @name: Name for this controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * @min_cg: Minimum clock gear supported by this controller (default value: 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * @max_cg: Maximum clock gear supported by this controller (default value: 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * @clkgear: Current clock gear in which this bus is running
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * @laddr_ida: logical address id allocator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * @a_framer: Active framer which is clocking the bus managed by this controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) * @lock: Mutex protecting controller data structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * @devices: Slim device list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * @tid_idr: tid id allocator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * @txn_lock: Lock to protect table of transactions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * @sched: scheduler structure used by the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * @xfer_msg: Transfer a message on this controller (this can be a broadcast
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * control/status message like data channel setup, or a unicast message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * like value element read/write.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * @set_laddr: Setup logical address at laddr for the slave with elemental
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * address e_addr. Drivers implementing controller will be expected to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * send unicast message to this device with its logical address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * @get_laddr: It is possible that controller needs to set fixed logical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * address table and get_laddr can be used in that case so that controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * can do this assignment. Use case is when the master is on the remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * processor side, who is resposible for allocating laddr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * @wakeup: This function pointer implements controller-specific procedure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * to wake it up from clock-pause. Framework will call this to bring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * the controller out of clock pause.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * @enable_stream: This function pointer implements controller-specific procedure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * to enable a stream.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * @disable_stream: This function pointer implements controller-specific procedure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * to disable stream.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * 'Manager device' is responsible for device management, bandwidth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * allocation, channel setup, and port associations per channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * Device management means Logical address assignment/removal based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) * enumeration (report-present, report-absent) of a device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * Bandwidth allocation is done dynamically by the manager based on active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * channels on the bus, message-bandwidth requests made by SLIMbus devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) * Based on current bandwidth usage, manager chooses a frequency to run
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * the bus at (in steps of 'clock-gear', 1 through 10, each clock gear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * representing twice the frequency than the previous gear).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * Manager is also responsible for entering (and exiting) low-power-mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * (known as 'clock pause').
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * Manager can do handover of framer if there are multiple framers on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * bus and a certain usecase warrants using certain framer to avoid keeping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * previous framer being powered-on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * Controller here performs duties of the manager device, and 'interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * device'. Interface device is responsible for monitoring the bus and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * reporting information such as loss-of-synchronization, data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * slot-collision.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct slim_controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) char name[SLIMBUS_NAME_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) int min_cg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) int max_cg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) int clkgear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct ida laddr_ida;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) struct slim_framer *a_framer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct list_head devices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct idr tid_idr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) spinlock_t txn_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct slim_sched sched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) int (*xfer_msg)(struct slim_controller *ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) struct slim_msg_txn *tx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) int (*set_laddr)(struct slim_controller *ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct slim_eaddr *ea, u8 laddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) int (*get_laddr)(struct slim_controller *ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct slim_eaddr *ea, u8 *laddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) int (*enable_stream)(struct slim_stream_runtime *rt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) int (*disable_stream)(struct slim_stream_runtime *rt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) int (*wakeup)(struct slim_controller *ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) int slim_device_report_present(struct slim_controller *ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct slim_eaddr *e_addr, u8 *laddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) void slim_report_absent(struct slim_device *sbdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int slim_register_controller(struct slim_controller *ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int slim_unregister_controller(struct slim_controller *ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) void slim_msg_response(struct slim_controller *ctrl, u8 *reply, u8 tid, u8 l);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) int slim_do_transfer(struct slim_controller *ctrl, struct slim_msg_txn *txn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) int slim_ctrl_clk_pause(struct slim_controller *ctrl, bool wakeup, u8 restart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) int slim_alloc_txn_tid(struct slim_controller *ctrl, struct slim_msg_txn *txn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) void slim_free_txn_tid(struct slim_controller *ctrl, struct slim_msg_txn *txn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static inline bool slim_tid_txn(u8 mt, u8 mc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return (mt == SLIM_MSG_MT_CORE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) (mc == SLIM_MSG_MC_REQUEST_INFORMATION ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) mc == SLIM_MSG_MC_REQUEST_CLEAR_INFORMATION ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) mc == SLIM_MSG_MC_REQUEST_VALUE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) mc == SLIM_MSG_MC_REQUEST_CHANGE_VALUE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static inline bool slim_ec_txn(u8 mt, u8 mc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) return (mt == SLIM_MSG_MT_CORE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) ((mc >= SLIM_MSG_MC_REQUEST_INFORMATION &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) mc <= SLIM_MSG_MC_REPORT_INFORMATION) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) (mc >= SLIM_MSG_MC_REQUEST_VALUE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) mc <= SLIM_MSG_MC_CHANGE_VALUE)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #endif /* _LINUX_SLIMBUS_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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