Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * IRQ domain support for SH INTC subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) 2012  Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define pr_fmt(fmt) "intc: " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sh_intc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "internals.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * intc_irq_domain_evt_xlate() - Generic xlate for vectored IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * This takes care of exception vector to hwirq translation through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * by way of evt2irq() translation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * Note: For platforms that use a flat vector space without INTEVT this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * basically just mimics irq_domain_xlate_onecell() by way of a nopped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * out evt2irq() implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int intc_evt_xlate(struct irq_domain *d, struct device_node *ctrlr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 			  const u32 *intspec, unsigned int intsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			  unsigned long *out_hwirq, unsigned int *out_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	if (WARN_ON(intsize < 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	*out_hwirq = evt2irq(intspec[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	*out_type = IRQ_TYPE_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static const struct irq_domain_ops intc_evt_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	.xlate		= intc_evt_xlate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) void __init intc_irq_domain_init(struct intc_desc_int *d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 				 struct intc_hw_desc *hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	unsigned int irq_base, irq_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	 * Quick linear revmap check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	irq_base = evt2irq(hw->vectors[0].vect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	irq_end = evt2irq(hw->vectors[hw->nr_vectors - 1].vect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	 * Linear domains have a hard-wired assertion that IRQs start at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	 * 0 in order to make some performance optimizations. Lamely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	 * restrict the linear case to these conditions here, taking the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	 * tree penalty for linear cases with non-zero hwirq bases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	if (irq_base == 0 && irq_end == (irq_base + hw->nr_vectors - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		d->domain = irq_domain_add_linear(NULL, hw->nr_vectors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 						  &intc_evt_ops, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		d->domain = irq_domain_add_tree(NULL, &intc_evt_ops, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	BUG_ON(!d->domain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }