Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * UFS Host driver for Synopsys Designware Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Authors: Joao Pinto <jpinto@synopsys.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include "ufshcd.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include "unipro.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include "ufshcd-dwc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include "ufshci-dwc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) int ufshcd_dwc_dme_set_attrs(struct ufs_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 				const struct ufshcd_dme_attr_val *v, int n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	int attr_node = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	for (attr_node = 0; attr_node < n; attr_node++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 		ret = ufshcd_dme_set_attr(hba, v[attr_node].attr_sel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 			ATTR_SET_NOR, v[attr_node].mib_val, v[attr_node].peer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) EXPORT_SYMBOL(ufshcd_dwc_dme_set_attrs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * ufshcd_dwc_program_clk_div()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * This function programs the clk divider value. This value is needed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * provide 1 microsecond tick to unipro layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * @hba: Private Structure pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * @divider_val: clock divider value to be programmed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) static void ufshcd_dwc_program_clk_div(struct ufs_hba *hba, u32 divider_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	ufshcd_writel(hba, divider_val, DWC_UFS_REG_HCLKDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  * ufshcd_dwc_link_is_up()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * Check if link is up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * @hba: private structure pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * Returns 0 on success, non-zero value on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static int ufshcd_dwc_link_is_up(struct ufs_hba *hba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int dme_result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	ufshcd_dme_get(hba, UIC_ARG_MIB(VS_POWERSTATE), &dme_result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (dme_result == UFSHCD_LINK_IS_UP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		ufshcd_set_link_active(hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * ufshcd_dwc_connection_setup()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * This function configures both the local side (host) and the peer side
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  * (device) unipro attributes to establish the connection to application/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  * cport.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  * This function is not required if the hardware is properly configured to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  * have this connection setup on reset. But invoking this function does no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  * harm and should be fine even working with any ufs device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * @hba: pointer to drivers private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  * Returns 0 on success non-zero value on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) static int ufshcd_dwc_connection_setup(struct ufs_hba *hba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	static const struct ufshcd_dme_attr_val setup_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		{ UIC_ARG_MIB(T_CONNECTIONSTATE), 0, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		{ UIC_ARG_MIB(N_DEVICEID), 0, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		{ UIC_ARG_MIB(N_DEVICEID_VALID), 0, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		{ UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		{ UIC_ARG_MIB(T_PEERCPORTID), 0, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		{ UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		{ UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		{ UIC_ARG_MIB(T_CPORTMODE), 1, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		{ UIC_ARG_MIB(T_CONNECTIONSTATE), 1, DME_LOCAL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		{ UIC_ARG_MIB(T_CONNECTIONSTATE), 0, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		{ UIC_ARG_MIB(N_DEVICEID), 1, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		{ UIC_ARG_MIB(N_DEVICEID_VALID), 1, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		{ UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		{ UIC_ARG_MIB(T_PEERCPORTID), 0, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		{ UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		{ UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		{ UIC_ARG_MIB(T_CPORTMODE), 1, DME_PEER },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		{ UIC_ARG_MIB(T_CONNECTIONSTATE), 1, DME_PEER }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	return ufshcd_dwc_dme_set_attrs(hba, setup_attrs, ARRAY_SIZE(setup_attrs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  * ufshcd_dwc_link_startup_notify()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  * UFS Host DWC specific link startup sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  * @hba: private structure pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * @status: Callback notify status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  * Returns 0 on success, non-zero value on failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 					enum ufs_notify_change_status status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	if (status == PRE_CHANGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		ufshcd_dwc_program_clk_div(hba, DWC_UFS_REG_HCLKDIV_DIV_125);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		if (hba->vops->phy_initialization) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			err = hba->vops->phy_initialization(hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 				dev_err(hba->dev, "Phy setup failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 									err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	} else { /* POST_CHANGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		err = ufshcd_dwc_link_is_up(hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			dev_err(hba->dev, "Link is not up\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		err = ufshcd_dwc_connection_setup(hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			dev_err(hba->dev, "Connection setup failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 									err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) EXPORT_SYMBOL(ufshcd_dwc_link_startup_notify);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) MODULE_AUTHOR("Joao Pinto <Joao.Pinto@synopsys.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) MODULE_DESCRIPTION("UFS Host driver for Synopsys Designware Core");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MODULE_LICENSE("Dual BSD/GPL");