^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2019 Google LLC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include "ufshcd.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include "ufshcd-crypto.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #undef CREATE_TRACE_POINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <trace/hooks/ufshcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /* Blk-crypto modes supported by UFS crypto */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static const struct ufs_crypto_alg_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) enum ufs_crypto_alg ufs_alg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) enum ufs_crypto_key_size ufs_key_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) } ufs_crypto_algs[BLK_ENCRYPTION_MODE_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) [BLK_ENCRYPTION_MODE_AES_256_XTS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .ufs_alg = UFS_CRYPTO_ALG_AES_XTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .ufs_key_size = UFS_CRYPTO_KEY_SIZE_256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static int ufshcd_program_key(struct ufs_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) const union ufs_crypto_cfg_entry *cfg, int slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u32 slot_offset = hba->crypto_cfg_register + slot * sizeof(*cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ufshcd_hold(hba, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) if (hba->vops && hba->vops->program_key) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) err = hba->vops->program_key(hba, cfg, slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* Ensure that CFGE is cleared before programming the key */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ufshcd_writel(hba, 0, slot_offset + 16 * sizeof(cfg->reg_val[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[i]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) slot_offset + i * sizeof(cfg->reg_val[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* Write dword 17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[17]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) slot_offset + 17 * sizeof(cfg->reg_val[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Dword 16 must be written last */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[16]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) slot_offset + 16 * sizeof(cfg->reg_val[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ufshcd_release(hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static int ufshcd_crypto_keyslot_program(struct blk_keyslot_manager *ksm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) const struct blk_crypto_key *key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned int slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct ufs_hba *hba = container_of(ksm, struct ufs_hba, ksm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) const union ufs_crypto_cap_entry *ccap_array = hba->crypto_cap_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) const struct ufs_crypto_alg_entry *alg =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) &ufs_crypto_algs[key->crypto_cfg.crypto_mode];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u8 data_unit_mask = key->crypto_cfg.data_unit_size / 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int cap_idx = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) union ufs_crypto_cfg_entry cfg = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) BUILD_BUG_ON(UFS_CRYPTO_KEY_SIZE_INVALID != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) for (i = 0; i < hba->crypto_capabilities.num_crypto_cap; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (ccap_array[i].algorithm_id == alg->ufs_alg &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ccap_array[i].key_size == alg->ufs_key_size &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) (ccap_array[i].sdus_mask & data_unit_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) cap_idx = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (WARN_ON(cap_idx < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) cfg.data_unit_size = data_unit_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) cfg.crypto_cap_idx = cap_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) cfg.config_enable = UFS_CRYPTO_CONFIGURATION_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (ccap_array[cap_idx].algorithm_id == UFS_CRYPTO_ALG_AES_XTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* In XTS mode, the blk_crypto_key's size is already doubled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) memcpy(cfg.crypto_key, key->raw, key->size/2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) memcpy(cfg.crypto_key + UFS_CRYPTO_KEY_MAX_SIZE/2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) key->raw + key->size/2, key->size/2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) memcpy(cfg.crypto_key, key->raw, key->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) err = ufshcd_program_key(hba, &cfg, slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) memzero_explicit(&cfg, sizeof(cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int ufshcd_clear_keyslot(struct ufs_hba *hba, int slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * Clear the crypto cfg on the device. Clearing CFGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * might not be sufficient, so just clear the entire cfg.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) union ufs_crypto_cfg_entry cfg = {};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return ufshcd_program_key(hba, &cfg, slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int ufshcd_crypto_keyslot_evict(struct blk_keyslot_manager *ksm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) const struct blk_crypto_key *key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned int slot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct ufs_hba *hba = container_of(ksm, struct ufs_hba, ksm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return ufshcd_clear_keyslot(hba, slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) bool ufshcd_crypto_enable(struct ufs_hba *hba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (!(hba->caps & UFSHCD_CAP_CRYPTO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Reset might clear all keys, so reprogram all the keys. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (hba->ksm.num_slots) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int err = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) trace_android_rvh_ufs_reprogram_all_keys(hba, &err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (err == -EOPNOTSUPP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) blk_ksm_reprogram_all_keys(&hba->ksm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (hba->quirks & UFSHCD_QUIRK_BROKEN_CRYPTO_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const struct blk_ksm_ll_ops ufshcd_ksm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .keyslot_program = ufshcd_crypto_keyslot_program,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .keyslot_evict = ufshcd_crypto_keyslot_evict,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static enum blk_crypto_mode_num
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ufshcd_find_blk_crypto_mode(union ufs_crypto_cap_entry cap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) for (i = 0; i < ARRAY_SIZE(ufs_crypto_algs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) BUILD_BUG_ON(UFS_CRYPTO_KEY_SIZE_INVALID != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (ufs_crypto_algs[i].ufs_alg == cap.algorithm_id &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ufs_crypto_algs[i].ufs_key_size == cap.key_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return BLK_ENCRYPTION_MODE_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * ufshcd_hba_init_crypto_capabilities - Read crypto capabilities, init crypto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * fields in hba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * @hba: Per adapter instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * Return: 0 if crypto was initialized or is not supported, else a -errno value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int ufshcd_hba_init_crypto_capabilities(struct ufs_hba *hba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int cap_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) enum blk_crypto_mode_num blk_mode_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (hba->quirks & UFSHCD_QUIRK_CUSTOM_KEYSLOT_MANAGER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * Don't use crypto if either the hardware doesn't advertise the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * standard crypto capability bit *or* if the vendor specific driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * hasn't advertised that crypto is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (!(hba->capabilities & MASK_CRYPTO_SUPPORT) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) !(hba->caps & UFSHCD_CAP_CRYPTO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) hba->crypto_capabilities.reg_val =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) cpu_to_le32(ufshcd_readl(hba, REG_UFS_CCAP));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) hba->crypto_cfg_register =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) (u32)hba->crypto_capabilities.config_array_ptr * 0x100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) hba->crypto_cap_array =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) devm_kcalloc(hba->dev, hba->crypto_capabilities.num_crypto_cap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) sizeof(hba->crypto_cap_array[0]), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (!hba->crypto_cap_array) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /* The actual number of configurations supported is (CFGC+1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) err = devm_blk_ksm_init(hba->dev, &hba->ksm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) hba->crypto_capabilities.config_count + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) goto out_free_caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) hba->ksm.ksm_ll_ops = ufshcd_ksm_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* UFS only supports 8 bytes for any DUN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) hba->ksm.max_dun_bytes_supported = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) hba->ksm.features = BLK_CRYPTO_FEATURE_STANDARD_KEYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) hba->ksm.dev = hba->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * Cache all the UFS crypto capabilities and advertise the supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * crypto modes and data unit sizes to the block layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) for (cap_idx = 0; cap_idx < hba->crypto_capabilities.num_crypto_cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) cap_idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) hba->crypto_cap_array[cap_idx].reg_val =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) cpu_to_le32(ufshcd_readl(hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) REG_UFS_CRYPTOCAP +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) cap_idx * sizeof(__le32)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) blk_mode_num = ufshcd_find_blk_crypto_mode(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) hba->crypto_cap_array[cap_idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (blk_mode_num != BLK_ENCRYPTION_MODE_INVALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) hba->ksm.crypto_modes_supported[blk_mode_num] |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) hba->crypto_cap_array[cap_idx].sdus_mask * 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) out_free_caps:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) devm_kfree(hba->dev, hba->crypto_cap_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* Indicate that init failed by clearing UFSHCD_CAP_CRYPTO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) hba->caps &= ~UFSHCD_CAP_CRYPTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * ufshcd_init_crypto - Initialize crypto hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * @hba: Per adapter instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) void ufshcd_init_crypto(struct ufs_hba *hba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) int slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (!(hba->caps & UFSHCD_CAP_CRYPTO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* Clear all keyslots */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) for (slot = 0; slot < hba->ksm.num_slots; slot++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) hba->ksm.ksm_ll_ops.keyslot_evict(&hba->ksm, NULL, slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) void ufshcd_crypto_setup_rq_keyslot_manager(struct ufs_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct request_queue *q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (hba->caps & UFSHCD_CAP_CRYPTO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) blk_ksm_register(&hba->ksm, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }