Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Copyright 2014 Cisco Systems, Inc.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * This program is free software; you may redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include "wq_enet_desc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include "cq_enet_desc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include "vnic_resource.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include "vnic_dev.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include "vnic_wq.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include "vnic_cq.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include "vnic_intr.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include "vnic_stats.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include "snic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) snic_get_vnic_config(struct snic *snic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct vnic_snic_config *c = &snic->config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define GET_CONFIG(m) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		ret = svnic_dev_spec(snic->vdev, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 				     offsetof(struct vnic_snic_config, m), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 				     sizeof(c->m), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 				     &c->m); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		if (ret) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 			SNIC_HOST_ERR(snic->shost, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 				      "Error getting %s, %d\n", #m, ret); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 			return ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		} \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	GET_CONFIG(wq_enet_desc_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	GET_CONFIG(maxdatafieldsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	GET_CONFIG(intr_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	GET_CONFIG(intr_timer_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	GET_CONFIG(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	GET_CONFIG(io_throttle_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	GET_CONFIG(port_down_timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	GET_CONFIG(port_down_io_retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	GET_CONFIG(luns_per_tgt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	GET_CONFIG(xpt_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	GET_CONFIG(hid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	c->wq_enet_desc_count = min_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 				      VNIC_SNIC_WQ_DESCS_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 				      max_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 					    VNIC_SNIC_WQ_DESCS_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 					    c->wq_enet_desc_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	c->wq_enet_desc_count = ALIGN(c->wq_enet_desc_count, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	c->maxdatafieldsize = min_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 				    VNIC_SNIC_MAXDATAFIELDSIZE_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 				    max_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 					  VNIC_SNIC_MAXDATAFIELDSIZE_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 					  c->maxdatafieldsize));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	c->io_throttle_count = min_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 				     VNIC_SNIC_IO_THROTTLE_COUNT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 				     max_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 					   VNIC_SNIC_IO_THROTTLE_COUNT_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 					   c->io_throttle_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	c->port_down_timeout = min_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 				     VNIC_SNIC_PORT_DOWN_TIMEOUT_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				     c->port_down_timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	c->port_down_io_retries = min_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 				     VNIC_SNIC_PORT_DOWN_IO_RETRIES_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 				     c->port_down_io_retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	c->luns_per_tgt = min_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 				VNIC_SNIC_LUNS_PER_TARGET_MAX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 				max_t(u32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				      VNIC_SNIC_LUNS_PER_TARGET_MIN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				      c->luns_per_tgt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	c->intr_timer = min_t(u32, VNIC_INTR_TIMER_MAX, c->intr_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	SNIC_INFO("vNIC resources wq %d\n", c->wq_enet_desc_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	SNIC_INFO("vNIC mtu %d intr timer %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		  c->maxdatafieldsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		  c->intr_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	SNIC_INFO("vNIC flags 0x%x luns per tgt %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		  c->flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		  c->luns_per_tgt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	SNIC_INFO("vNIC io throttle count %d\n", c->io_throttle_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	SNIC_INFO("vNIC port down timeout %d port down io retries %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		  c->port_down_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		  c->port_down_io_retries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	SNIC_INFO("vNIC back end type = %d\n", c->xpt_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	SNIC_INFO("vNIC hid = %d\n", c->hid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) snic_get_res_counts(struct snic *snic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	snic->wq_count = svnic_dev_get_res_count(snic->vdev, RES_TYPE_WQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	SNIC_BUG_ON(snic->wq_count == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	snic->cq_count = svnic_dev_get_res_count(snic->vdev, RES_TYPE_CQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	SNIC_BUG_ON(snic->cq_count == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	snic->intr_count = svnic_dev_get_res_count(snic->vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 						  RES_TYPE_INTR_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	SNIC_BUG_ON(snic->intr_count == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) snic_free_vnic_res(struct snic *snic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	for (i = 0; i < snic->wq_count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		svnic_wq_free(&snic->wq[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	for (i = 0; i < snic->cq_count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		svnic_cq_free(&snic->cq[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	for (i = 0; i < snic->intr_count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		svnic_intr_free(&snic->intr[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) snic_alloc_vnic_res(struct snic *snic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	enum vnic_dev_intr_mode intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	unsigned int mask_on_assertion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	unsigned int intr_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	unsigned int err_intr_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	unsigned int err_intr_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	intr_mode = svnic_dev_get_intr_mode(snic->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	SNIC_INFO("vNIC interrupt mode: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		  ((intr_mode == VNIC_DEV_INTR_MODE_INTX) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		   "Legacy PCI INTx" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		   ((intr_mode == VNIC_DEV_INTR_MODE_MSI) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		    "MSI" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		    ((intr_mode == VNIC_DEV_INTR_MODE_MSIX) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		     "MSI-X" : "Unknown"))));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	/* only MSI-X is supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	SNIC_BUG_ON(intr_mode != VNIC_DEV_INTR_MODE_MSIX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	SNIC_INFO("wq %d cq %d intr %d\n", snic->wq_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		  snic->cq_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		  snic->intr_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	/* Allocate WQs used for SCSI IOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	for (i = 0; i < snic->wq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		ret = svnic_wq_alloc(snic->vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 				     &snic->wq[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 				     i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 				     snic->config.wq_enet_desc_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 				     sizeof(struct wq_enet_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			goto error_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	/* CQ for each WQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	for (i = 0; i < snic->wq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		ret = svnic_cq_alloc(snic->vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 				     &snic->cq[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 				     i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 				     snic->config.wq_enet_desc_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 				     sizeof(struct cq_enet_wq_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			goto error_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	SNIC_BUG_ON(snic->cq_count != 2 * snic->wq_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	/* CQ for FW TO host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	for (i = snic->wq_count; i < snic->cq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		ret = svnic_cq_alloc(snic->vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 				     &snic->cq[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 				     i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 				     (snic->config.wq_enet_desc_count * 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 				     sizeof(struct snic_fw_req));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			goto error_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	for (i = 0; i < snic->intr_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		ret = svnic_intr_alloc(snic->vdev, &snic->intr[i], i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			goto error_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	 * Init WQ Resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	 * WQ[0 to n] points to CQ[0 to n-1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	 * firmware to host comm points to CQ[n to m+1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	err_intr_enable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	err_intr_offset = snic->err_intr_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	for (i = 0; i < snic->wq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		svnic_wq_init(&snic->wq[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 			      i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 			      err_intr_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			      err_intr_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	for (i = 0; i < snic->cq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		intr_offset = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		svnic_cq_init(&snic->cq[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			      0 /* flow_control_enable */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			      1 /* color_enable */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			      0 /* cq_head */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			      0 /* cq_tail */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			      1 /* cq_tail_color */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			      1 /* interrupt_enable */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			      1 /* cq_entry_enable */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			      0 /* cq_message_enable */,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			      intr_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			      0 /* cq_message_addr */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	 * Init INTR resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	 * Assumption : snic is always in MSI-X mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	SNIC_BUG_ON(intr_mode != VNIC_DEV_INTR_MODE_MSIX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	mask_on_assertion = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	for (i = 0; i < snic->intr_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		svnic_intr_init(&snic->intr[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 				snic->config.intr_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 				snic->config.intr_timer_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 				mask_on_assertion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	/* init the stats memory by making the first call here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	ret = svnic_dev_stats_dump(snic->vdev, &snic->stats);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		SNIC_HOST_ERR(snic->shost,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			      "svnic_dev_stats_dump failed - x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 			      ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		goto error_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	/* Clear LIF stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	svnic_dev_stats_clear(snic->vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) error_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	snic_free_vnic_res(snic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) snic_log_q_error(struct snic *snic)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	u32 err_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	for (i = 0; i < snic->wq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		err_status = ioread32(&snic->wq[i].ctrl->error_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		if (err_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			SNIC_HOST_ERR(snic->shost,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 				      "WQ[%d] error status %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 				      i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 				      err_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) } /* end of snic_log_q_error */