Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    3)  *    driver for Microsemi PQI-based storage controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    4)  *    Copyright (c) 2019-2020 Microchip Technology Inc. and its subsidiaries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    5)  *    Copyright (c) 2016-2018 Microsemi Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    6)  *    Copyright (c) 2016 PMC-Sierra, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    8)  *    Questions/Comments/Bugfixes to storagedev@microchip.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   12) #include <linux/io-64-nonatomic-lo-hi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   14) #if !defined(_SMARTPQI_H)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   15) #define _SMARTPQI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   17) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   18) #include <linux/bsg-lib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   20) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   22) #define PQI_DEVICE_SIGNATURE	"PQI DREG"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   24) /* This structure is defined by the PQI specification. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   25) struct pqi_device_registers {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   26) 	__le64	signature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   27) 	u8	function_and_status_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   28) 	u8	reserved[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   29) 	u8	max_admin_iq_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   30) 	u8	max_admin_oq_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   31) 	u8	admin_iq_element_length;	/* in 16-byte units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   32) 	u8	admin_oq_element_length;	/* in 16-byte units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   33) 	__le16	max_reset_timeout;		/* in 100-millisecond units */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   34) 	u8	reserved1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   35) 	__le32	legacy_intx_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   36) 	__le32	legacy_intx_mask_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   37) 	__le32	legacy_intx_mask_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   38) 	u8	reserved2[28];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   39) 	__le32	device_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   40) 	u8	reserved3[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   41) 	__le64	admin_iq_pi_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   42) 	__le64	admin_oq_ci_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   43) 	__le64	admin_iq_element_array_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   44) 	__le64	admin_oq_element_array_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   45) 	__le64	admin_iq_ci_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   46) 	__le64	admin_oq_pi_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   47) 	u8	admin_iq_num_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   48) 	u8	admin_oq_num_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   49) 	__le16	admin_queue_int_msg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   50) 	u8	reserved4[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   51) 	__le32	device_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   52) 	u8	reserved5[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   53) 	__le64	error_details;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   54) 	__le32	device_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   55) 	__le32	power_action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   56) 	u8	reserved6[104];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   60)  * controller registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   61)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   62)  * These are defined by the Microsemi implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   63)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   64)  * Some registers (those named sis_*) are only used when in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   65)  * legacy SIS mode before we transition the controller into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   66)  * PQI mode.  There are a number of other SIS mode registers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   67)  * but we don't use them, so only the SIS registers that we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   68)  * care about are defined here.  The offsets mentioned in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   69)  * comments are the offsets from the PCIe BAR 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   70)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   71) struct pqi_ctrl_registers {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   72) 	u8	reserved[0x20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   73) 	__le32	sis_host_to_ctrl_doorbell;		/* 20h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   74) 	u8	reserved1[0x34 - (0x20 + sizeof(__le32))];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   75) 	__le32	sis_interrupt_mask;			/* 34h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   76) 	u8	reserved2[0x9c - (0x34 + sizeof(__le32))];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   77) 	__le32	sis_ctrl_to_host_doorbell;		/* 9Ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   78) 	u8	reserved3[0xa0 - (0x9c + sizeof(__le32))];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   79) 	__le32	sis_ctrl_to_host_doorbell_clear;	/* A0h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   80) 	u8	reserved4[0xb0 - (0xa0 + sizeof(__le32))];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   81) 	__le32	sis_driver_scratch;			/* B0h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   82) 	u8	reserved5[0xbc - (0xb0 + sizeof(__le32))];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   83) 	__le32	sis_firmware_status;			/* BCh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   84) 	u8	reserved6[0x1000 - (0xbc + sizeof(__le32))];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   85) 	__le32	sis_mailbox[8];				/* 1000h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   86) 	u8	reserved7[0x4000 - (0x1000 + (sizeof(__le32) * 8))];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   87) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   88) 	 * The PQI spec states that the PQI registers should be at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   89) 	 * offset 0 from the PCIe BAR 0.  However, we can't map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   90) 	 * them at offset 0 because that would break compatibility
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   91) 	 * with the SIS registers.  So we map them at offset 4000h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   92) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   93) 	struct pqi_device_registers pqi_registers;	/* 4000h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   96) #if ((HZ) < 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   97) #define PQI_HZ  1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   98) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   99) #define PQI_HZ  (HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  100) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  102) #define PQI_DEVICE_REGISTERS_OFFSET	0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  104) enum pqi_io_path {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  105) 	RAID_PATH = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  106) 	AIO_PATH = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  109) enum pqi_irq_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  110) 	IRQ_MODE_NONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  111) 	IRQ_MODE_INTX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  112) 	IRQ_MODE_MSIX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  115) struct pqi_sg_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  116) 	__le64	address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  117) 	__le32	length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  118) 	__le32	flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  121) /* manifest constants for the flags field of pqi_sg_descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  122) #define CISS_SG_LAST	0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  123) #define CISS_SG_CHAIN	0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  125) struct pqi_iu_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  126) 	u8	iu_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  127) 	u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  128) 	__le16	iu_length;	/* in bytes - does not include the length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  129) 				/* of this header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  130) 	__le16	response_queue_id;	/* specifies the OQ where the */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  131) 					/*   response IU is to be delivered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  132) 	u8	work_area[2];	/* reserved for driver use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  135) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  136)  * According to the PQI spec, the IU header is only the first 4 bytes of our
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  137)  * pqi_iu_header structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  138)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  139) #define PQI_REQUEST_HEADER_LENGTH	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  141) struct pqi_general_admin_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  142) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  143) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  144) 	u8	function_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  145) 	union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  146) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  147) 			u8	reserved[33];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  148) 			__le32	buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  149) 			struct pqi_sg_descriptor sg_descriptor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  150) 		} report_device_capability;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  152) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  153) 			u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  154) 			__le16	queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  155) 			u8	reserved1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  156) 			__le64	element_array_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  157) 			__le64	ci_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  158) 			__le16	num_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  159) 			__le16	element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  160) 			u8	queue_protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  161) 			u8	reserved2[23];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  162) 			__le32	vendor_specific;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  163) 		} create_operational_iq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  165) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  166) 			u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  167) 			__le16	queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  168) 			u8	reserved1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  169) 			__le64	element_array_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  170) 			__le64	pi_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  171) 			__le16	num_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  172) 			__le16	element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  173) 			u8	queue_protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  174) 			u8	reserved2[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  175) 			__le16	int_msg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  176) 			__le16	coalescing_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  177) 			__le32	min_coalescing_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  178) 			__le32	max_coalescing_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  179) 			u8	reserved3[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  180) 			__le32	vendor_specific;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  181) 		} create_operational_oq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  183) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  184) 			u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  185) 			__le16	queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  186) 			u8	reserved1[50];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  187) 		} delete_operational_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  189) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  190) 			u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  191) 			__le16	queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  192) 			u8	reserved1[46];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  193) 			__le32	vendor_specific;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  194) 		} change_operational_iq_properties;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  196) 	} data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  199) struct pqi_general_admin_response {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  200) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  201) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  202) 	u8	function_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  203) 	u8	status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  204) 	union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  205) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  206) 			u8	status_descriptor[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  207) 			__le64	iq_pi_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  208) 			u8	reserved[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  209) 		} create_operational_iq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  211) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  212) 			u8	status_descriptor[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  213) 			__le64	oq_ci_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  214) 			u8	reserved[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  215) 		} create_operational_oq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  216) 	} data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  219) struct pqi_iu_layer_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  220) 	u8	inbound_spanning_supported : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  221) 	u8	reserved : 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  222) 	u8	reserved1[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  223) 	__le16	max_inbound_iu_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  224) 	u8	outbound_spanning_supported : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  225) 	u8	reserved2 : 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  226) 	u8	reserved3[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  227) 	__le16	max_outbound_iu_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  230) struct pqi_device_capability {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  231) 	__le16	data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  232) 	u8	reserved[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  233) 	u8	iq_arbitration_priority_support_bitmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  234) 	u8	maximum_aw_a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  235) 	u8	maximum_aw_b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  236) 	u8	maximum_aw_c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  237) 	u8	max_arbitration_burst : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  238) 	u8	reserved1 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  239) 	u8	iqa : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  240) 	u8	reserved2[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  241) 	u8	iq_freeze : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  242) 	u8	reserved3 : 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  243) 	__le16	max_inbound_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  244) 	__le16	max_elements_per_iq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  245) 	u8	reserved4[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  246) 	__le16	max_iq_element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  247) 	__le16	min_iq_element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  248) 	u8	reserved5[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  249) 	__le16	max_outbound_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  250) 	__le16	max_elements_per_oq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  251) 	__le16	intr_coalescing_time_granularity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  252) 	__le16	max_oq_element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  253) 	__le16	min_oq_element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  254) 	u8	reserved6[24];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  255) 	struct pqi_iu_layer_descriptor iu_layer_descriptors[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  256) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  258) #define PQI_MAX_EMBEDDED_SG_DESCRIPTORS		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  260) struct pqi_raid_path_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  261) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  262) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  263) 	__le16	nexus_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  264) 	__le32	buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  265) 	u8	lun_number[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  266) 	__le16	protocol_specific;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  267) 	u8	data_direction : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  268) 	u8	partial : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  269) 	u8	reserved1 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  270) 	u8	fence : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  271) 	__le16	error_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  272) 	u8	reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  273) 	u8	task_attribute : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  274) 	u8	command_priority : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  275) 	u8	reserved3 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  276) 	u8	reserved4 : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  277) 	u8	additional_cdb_bytes_usage : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  278) 	u8	reserved5 : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  279) 	u8	cdb[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  280) 	u8	reserved6[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  281) 	__le32	timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  282) 	struct pqi_sg_descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  283) 		sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  286) struct pqi_aio_path_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  287) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  288) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  289) 	u8	reserved1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  290) 	__le32	nexus_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  291) 	__le32	buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  292) 	u8	data_direction : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  293) 	u8	partial : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  294) 	u8	memory_type : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  295) 	u8	fence : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  296) 	u8	encryption_enable : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  297) 	u8	reserved2 : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  298) 	u8	task_attribute : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  299) 	u8	command_priority : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  300) 	u8	reserved3 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  301) 	__le16	data_encryption_key_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  302) 	__le32	encrypt_tweak_lower;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  303) 	__le32	encrypt_tweak_upper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  304) 	u8	cdb[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  305) 	__le16	error_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  306) 	u8	num_sg_descriptors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  307) 	u8	cdb_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  308) 	u8	lun_number[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  309) 	u8	reserved4[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  310) 	struct pqi_sg_descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  311) 		sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  312) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  314) struct pqi_io_response {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  315) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  316) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  317) 	__le16	error_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  318) 	u8	reserved2[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  321) struct pqi_general_management_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  322) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  323) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  324) 	union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  325) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  326) 			u8	reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  327) 			__le32	buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  328) 			struct pqi_sg_descriptor sg_descriptors[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  329) 		} report_event_configuration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  331) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  332) 			__le16	global_event_oq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  333) 			__le32	buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  334) 			struct pqi_sg_descriptor sg_descriptors[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  335) 		} set_event_configuration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  336) 	} data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  337) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  339) struct pqi_event_descriptor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  340) 	u8	event_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  341) 	u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  342) 	__le16	oq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  343) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  345) struct pqi_event_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  346) 	u8	reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  347) 	u8	num_event_descriptors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  348) 	u8	reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  349) 	struct pqi_event_descriptor descriptors[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  352) #define PQI_MAX_EVENT_DESCRIPTORS	255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  354) #define PQI_EVENT_OFA_MEMORY_ALLOCATION	0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  355) #define PQI_EVENT_OFA_QUIESCE		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  356) #define PQI_EVENT_OFA_CANCELLED		0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  358) struct pqi_event_response {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  359) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  360) 	u8	event_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  361) 	u8	reserved2 : 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  362) 	u8	request_acknowledge : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  363) 	__le16	event_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  364) 	__le32	additional_event_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  365) 	union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  366) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  367) 			__le32	bytes_requested;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  368) 			u8	reserved[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  369) 		} ofa_memory_allocation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  370) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  371) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  372) 			__le16	reason;		/* reason for cancellation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  373) 			u8	reserved[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  374) 		} ofa_cancelled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  375) 	} data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  376) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  378) struct pqi_event_acknowledge_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  379) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  380) 	u8	event_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  381) 	u8	reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  382) 	__le16	event_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  383) 	__le32	additional_event_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  386) struct pqi_task_management_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  387) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  388) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  389) 	__le16	nexus_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  390) 	u8	reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  391) 	__le16  timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  392) 	u8	lun_number[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  393) 	__le16	protocol_specific;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  394) 	__le16	outbound_queue_id_to_manage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  395) 	__le16	request_id_to_manage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  396) 	u8	task_management_function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  397) 	u8	reserved2 : 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  398) 	u8	fence : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  399) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  401) #define SOP_TASK_MANAGEMENT_LUN_RESET	0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  403) struct pqi_task_management_response {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  404) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  405) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  406) 	__le16	nexus_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  407) 	u8	additional_response_info[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  408) 	u8	response_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  409) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  411) struct pqi_vendor_general_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  412) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  413) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  414) 	__le16	function_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  415) 	union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  416) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  417) 			__le16	first_section;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  418) 			__le16	last_section;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  419) 			u8	reserved[48];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  420) 		} config_table_update;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  422) 		struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  423) 			__le64	buffer_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  424) 			__le32	buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  425) 			u8	reserved[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  426) 		} ofa_memory_allocation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  427) 	} data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  428) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  429) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  430) struct pqi_vendor_general_response {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  431) 	struct pqi_iu_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  432) 	__le16	request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  433) 	__le16	function_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  434) 	__le16	status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  435) 	u8	reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  436) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  438) #define PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  439) #define PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  440) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  441) #define PQI_OFA_VERSION			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  442) #define PQI_OFA_SIGNATURE		"OFA_QRM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  443) #define PQI_OFA_MAX_SG_DESCRIPTORS	64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  444) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  445) #define PQI_OFA_MEMORY_DESCRIPTOR_LENGTH \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  446) 	(offsetof(struct pqi_ofa_memory, sg_descriptor) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  447) 	(PQI_OFA_MAX_SG_DESCRIPTORS * sizeof(struct pqi_sg_descriptor)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  448) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  449) struct pqi_ofa_memory {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  450) 	__le64	signature;	/* "OFA_QRM" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  451) 	__le16	version;	/* version of this struct (1 = 1st version) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  452) 	u8	reserved[62];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  453) 	__le32	bytes_allocated;	/* total allocated memory in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  454) 	__le16	num_memory_descriptors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  455) 	u8	reserved1[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  456) 	struct pqi_sg_descriptor sg_descriptor[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  459) struct pqi_aio_error_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  460) 	u8	status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  461) 	u8	service_response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  462) 	u8	data_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  463) 	u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  464) 	__le32	residual_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  465) 	__le16	data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  466) 	__le16	reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  467) 	u8	data[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  468) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  469) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  470) struct pqi_raid_error_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  471) 	u8	data_in_result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  472) 	u8	data_out_result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  473) 	u8	reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  474) 	u8	status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  475) 	__le16	status_qualifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  476) 	__le16	sense_data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  477) 	__le16	response_data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  478) 	__le32	data_in_transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  479) 	__le32	data_out_transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  480) 	u8	data[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  481) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  482) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  483) #define PQI_REQUEST_IU_TASK_MANAGEMENT			0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  484) #define PQI_REQUEST_IU_RAID_PATH_IO			0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  485) #define PQI_REQUEST_IU_AIO_PATH_IO			0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  486) #define PQI_REQUEST_IU_GENERAL_ADMIN			0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  487) #define PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG	0x72
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  488) #define PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG		0x73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  489) #define PQI_REQUEST_IU_VENDOR_GENERAL			0x75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  490) #define PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT		0xf6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  491) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  492) #define PQI_RESPONSE_IU_GENERAL_MANAGEMENT		0x81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  493) #define PQI_RESPONSE_IU_TASK_MANAGEMENT			0x93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  494) #define PQI_RESPONSE_IU_GENERAL_ADMIN			0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  495) #define PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS		0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  496) #define PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS		0xf1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  497) #define PQI_RESPONSE_IU_RAID_PATH_IO_ERROR		0xf2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  498) #define PQI_RESPONSE_IU_AIO_PATH_IO_ERROR		0xf3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  499) #define PQI_RESPONSE_IU_AIO_PATH_DISABLED		0xf4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  500) #define PQI_RESPONSE_IU_VENDOR_EVENT			0xf5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  501) #define PQI_RESPONSE_IU_VENDOR_GENERAL			0xf7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  502) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  503) #define PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY	0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  504) #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ			0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  505) #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ			0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  506) #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_IQ			0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  507) #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_OQ			0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  508) #define PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY		0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  510) #define PQI_GENERAL_ADMIN_STATUS_SUCCESS	0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  511) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  512) #define PQI_IQ_PROPERTY_IS_AIO_QUEUE	0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  513) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  514) #define PQI_GENERAL_ADMIN_IU_LENGTH		0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  515) #define PQI_PROTOCOL_SOP			0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  516) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  517) #define PQI_DATA_IN_OUT_GOOD					0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  518) #define PQI_DATA_IN_OUT_UNDERFLOW				0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  519) #define PQI_DATA_IN_OUT_BUFFER_ERROR				0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  520) #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW				0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  521) #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA		0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  522) #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE			0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  523) #define PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR			0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  524) #define PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT			0x61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  525) #define PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED		0x62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  526) #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED	0x63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  527) #define PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED			0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  528) #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST		0x65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  529) #define PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION			0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  530) #define PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED			0x67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  531) #define PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ		0x6F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  532) #define PQI_DATA_IN_OUT_ERROR					0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  533) #define PQI_DATA_IN_OUT_PROTOCOL_ERROR				0xf1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  534) #define PQI_DATA_IN_OUT_HARDWARE_ERROR				0xf2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  535) #define PQI_DATA_IN_OUT_UNSOLICITED_ABORT			0xf3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  536) #define PQI_DATA_IN_OUT_ABORTED					0xf4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  537) #define PQI_DATA_IN_OUT_TIMEOUT					0xf5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  538) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  539) #define CISS_CMD_STATUS_SUCCESS			0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  540) #define CISS_CMD_STATUS_TARGET_STATUS		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  541) #define CISS_CMD_STATUS_DATA_UNDERRUN		0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  542) #define CISS_CMD_STATUS_DATA_OVERRUN		0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  543) #define CISS_CMD_STATUS_INVALID			0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  544) #define CISS_CMD_STATUS_PROTOCOL_ERROR		0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  545) #define CISS_CMD_STATUS_HARDWARE_ERROR		0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  546) #define CISS_CMD_STATUS_CONNECTION_LOST		0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  547) #define CISS_CMD_STATUS_ABORTED			0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  548) #define CISS_CMD_STATUS_ABORT_FAILED		0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  549) #define CISS_CMD_STATUS_UNSOLICITED_ABORT	0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  550) #define CISS_CMD_STATUS_TIMEOUT			0xb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  551) #define CISS_CMD_STATUS_UNABORTABLE		0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  552) #define CISS_CMD_STATUS_TMF			0xd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  553) #define CISS_CMD_STATUS_AIO_DISABLED		0xe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  554) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  555) #define PQI_CMD_STATUS_ABORTED	CISS_CMD_STATUS_ABORTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  556) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  557) #define PQI_NUM_EVENT_QUEUE_ELEMENTS	32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  558) #define PQI_EVENT_OQ_ELEMENT_LENGTH	sizeof(struct pqi_event_response)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  559) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  560) #define PQI_EVENT_TYPE_HOTPLUG			0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  561) #define PQI_EVENT_TYPE_HARDWARE			0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  562) #define PQI_EVENT_TYPE_PHYSICAL_DEVICE		0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  563) #define PQI_EVENT_TYPE_LOGICAL_DEVICE		0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  564) #define PQI_EVENT_TYPE_OFA			0xfb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  565) #define PQI_EVENT_TYPE_AIO_STATE_CHANGE		0xfd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  566) #define PQI_EVENT_TYPE_AIO_CONFIG_CHANGE	0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  568) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  569) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  570) #define PQI_ERROR_BUFFER_ELEMENT_LENGTH		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  571) 	sizeof(struct pqi_raid_error_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  572) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  573) /* these values are based on our implementation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  574) #define PQI_ADMIN_IQ_NUM_ELEMENTS		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  575) #define PQI_ADMIN_OQ_NUM_ELEMENTS		20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  576) #define PQI_ADMIN_IQ_ELEMENT_LENGTH		64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  577) #define PQI_ADMIN_OQ_ELEMENT_LENGTH		64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  578) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  579) #define PQI_OPERATIONAL_IQ_ELEMENT_LENGTH	128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  580) #define PQI_OPERATIONAL_OQ_ELEMENT_LENGTH	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  581) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  582) #define PQI_MIN_MSIX_VECTORS		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  583) #define PQI_MAX_MSIX_VECTORS		64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  584) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  585) /* these values are defined by the PQI spec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  586) #define PQI_MAX_NUM_ELEMENTS_ADMIN_QUEUE	255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  587) #define PQI_MAX_NUM_ELEMENTS_OPERATIONAL_QUEUE	65535
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  588) #define PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT	64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  589) #define PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  590) #define PQI_ADMIN_INDEX_ALIGNMENT		64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  591) #define PQI_OPERATIONAL_INDEX_ALIGNMENT		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  592) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  593) #define PQI_MIN_OPERATIONAL_QUEUE_ID		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  594) #define PQI_MAX_OPERATIONAL_QUEUE_ID		65535
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  595) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  596) #define PQI_AIO_SERV_RESPONSE_COMPLETE		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  597) #define PQI_AIO_SERV_RESPONSE_FAILURE		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  598) #define PQI_AIO_SERV_RESPONSE_TMF_COMPLETE	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  599) #define PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  600) #define PQI_AIO_SERV_RESPONSE_TMF_REJECTED	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  601) #define PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  602) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  603) #define PQI_AIO_STATUS_IO_ERROR			0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  604) #define PQI_AIO_STATUS_IO_ABORTED		0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  605) #define PQI_AIO_STATUS_NO_PATH_TO_DEVICE	0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  606) #define PQI_AIO_STATUS_INVALID_DEVICE		0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  607) #define PQI_AIO_STATUS_AIO_PATH_DISABLED	0xe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  608) #define PQI_AIO_STATUS_UNDERRUN			0x51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  609) #define PQI_AIO_STATUS_OVERRUN			0x75
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  610) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  611) typedef u32 pqi_index_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  612) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  613) /* SOP data direction flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  614) #define SOP_NO_DIRECTION_FLAG	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  615) #define SOP_WRITE_FLAG		1	/* host writes data to Data-Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  616) 					/* buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  617) #define SOP_READ_FLAG		2	/* host receives data from Data-In */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  618) 					/* buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  619) #define SOP_BIDIRECTIONAL	3	/* data is transferred from the */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  620) 					/* Data-Out buffer and data is */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  621) 					/* transferred to the Data-In buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  622) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  623) #define SOP_TASK_ATTRIBUTE_SIMPLE		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  624) #define SOP_TASK_ATTRIBUTE_HEAD_OF_QUEUE	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  625) #define SOP_TASK_ATTRIBUTE_ORDERED		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  626) #define SOP_TASK_ATTRIBUTE_ACA			4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  627) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  628) #define SOP_TMF_COMPLETE		0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  629) #define SOP_TMF_REJECTED		0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  630) #define SOP_TMF_FUNCTION_SUCCEEDED	0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  631) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  632) /* additional CDB bytes usage field codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  633) #define SOP_ADDITIONAL_CDB_BYTES_0	0	/* 16-byte CDB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  634) #define SOP_ADDITIONAL_CDB_BYTES_4	1	/* 20-byte CDB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  635) #define SOP_ADDITIONAL_CDB_BYTES_8	2	/* 24-byte CDB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  636) #define SOP_ADDITIONAL_CDB_BYTES_12	3	/* 28-byte CDB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  637) #define SOP_ADDITIONAL_CDB_BYTES_16	4	/* 32-byte CDB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  638) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  639) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  640)  * The purpose of this structure is to obtain proper alignment of objects in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  641)  * an admin queue pair.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  642)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  643) struct pqi_admin_queues_aligned {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  644) 	__aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  645) 		u8	iq_element_array[PQI_ADMIN_IQ_ELEMENT_LENGTH]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  646) 					[PQI_ADMIN_IQ_NUM_ELEMENTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  647) 	__aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  648) 		u8	oq_element_array[PQI_ADMIN_OQ_ELEMENT_LENGTH]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  649) 					[PQI_ADMIN_OQ_NUM_ELEMENTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  650) 	__aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t iq_ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  651) 	__aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t oq_pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  653) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  654) struct pqi_admin_queues {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  655) 	void		*iq_element_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  656) 	void		*oq_element_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  657) 	pqi_index_t	*iq_ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  658) 	pqi_index_t __iomem *oq_pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  659) 	dma_addr_t	iq_element_array_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  660) 	dma_addr_t	oq_element_array_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  661) 	dma_addr_t	iq_ci_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  662) 	dma_addr_t	oq_pi_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  663) 	__le32 __iomem	*iq_pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  664) 	pqi_index_t	iq_pi_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  665) 	__le32 __iomem	*oq_ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  666) 	pqi_index_t	oq_ci_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  667) 	struct task_struct *task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  668) 	u16		int_msg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  670) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  671) struct pqi_queue_group {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  672) 	struct pqi_ctrl_info *ctrl_info;	/* backpointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  673) 	u16		iq_id[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  674) 	u16		oq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  675) 	u16		int_msg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  676) 	void		*iq_element_array[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  677) 	void		*oq_element_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  678) 	dma_addr_t	iq_element_array_bus_addr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  679) 	dma_addr_t	oq_element_array_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  680) 	__le32 __iomem	*iq_pi[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  681) 	pqi_index_t	iq_pi_copy[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  682) 	pqi_index_t __iomem	*iq_ci[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  683) 	pqi_index_t __iomem	*oq_pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  684) 	dma_addr_t	iq_ci_bus_addr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  685) 	dma_addr_t	oq_pi_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  686) 	__le32 __iomem	*oq_ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  687) 	pqi_index_t	oq_ci_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  688) 	spinlock_t	submit_lock[2];	/* protect submission queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  689) 	struct list_head request_list[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  691) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  692) struct pqi_event_queue {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  693) 	u16		oq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  694) 	u16		int_msg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  695) 	void		*oq_element_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  696) 	pqi_index_t __iomem	*oq_pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  697) 	dma_addr_t	oq_element_array_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  698) 	dma_addr_t	oq_pi_bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  699) 	__le32 __iomem	*oq_ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  700) 	pqi_index_t	oq_ci_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  701) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  702) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  703) #define PQI_DEFAULT_QUEUE_GROUP		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  704) #define PQI_MAX_QUEUE_GROUPS		PQI_MAX_MSIX_VECTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  705) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  706) struct pqi_encryption_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  707) 	u16	data_encryption_key_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  708) 	u32	encrypt_tweak_lower;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  709) 	u32	encrypt_tweak_upper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  710) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  711) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  712) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  713) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  714) #define PQI_CONFIG_TABLE_SIGNATURE	"CFGTABLE"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  715) #define PQI_CONFIG_TABLE_MAX_LENGTH	((u16)~0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  716) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  717) /* configuration table section IDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  718) #define PQI_CONFIG_TABLE_ALL_SECTIONS			(-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  719) #define PQI_CONFIG_TABLE_SECTION_GENERAL_INFO		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  720) #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  721) #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_ERRATA	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  722) #define PQI_CONFIG_TABLE_SECTION_DEBUG			3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  723) #define PQI_CONFIG_TABLE_SECTION_HEARTBEAT		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  724) #define PQI_CONFIG_TABLE_SECTION_SOFT_RESET		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  725) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  726) struct pqi_config_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  727) 	u8	signature[8];		/* "CFGTABLE" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  728) 	__le32	first_section_offset;	/* offset in bytes from the base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  729) 					/* address of this table to the */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  730) 					/* first section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  731) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  732) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  733) struct pqi_config_table_section_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  734) 	__le16	section_id;		/* as defined by the */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  735) 					/* PQI_CONFIG_TABLE_SECTION_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  736) 					/* manifest constants above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  737) 	__le16	next_section_offset;	/* offset in bytes from base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  738) 					/* address of the table of the */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  739) 					/* next section or 0 if last entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  740) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  741) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  742) struct pqi_config_table_general_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  743) 	struct pqi_config_table_section_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  744) 	__le32	section_length;		/* size of this section in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  745) 					/* including the section header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  746) 	__le32	max_outstanding_requests;	/* max. outstanding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  747) 						/* commands supported by */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  748) 						/* the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  749) 	__le32	max_sg_size;		/* max. transfer size of a single */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  750) 					/* command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  751) 	__le32	max_sg_per_request;	/* max. number of scatter-gather */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  752) 					/* entries supported in a single */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  753) 					/* command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  754) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  755) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  756) struct pqi_config_table_firmware_features {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  757) 	struct pqi_config_table_section_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  758) 	__le16	num_elements;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  759) 	u8	features_supported[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  760) /*	u8	features_requested_by_host[]; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  761) /*	u8	features_enabled[]; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  763) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  764) #define PQI_FIRMWARE_FEATURE_OFA			0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  765) #define PQI_FIRMWARE_FEATURE_SMP			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  766) #define PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE	11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  767) #define PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  768) #define PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  769) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  770) struct pqi_config_table_debug {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  771) 	struct pqi_config_table_section_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  772) 	__le32	scratchpad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  773) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  774) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  775) struct pqi_config_table_heartbeat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  776) 	struct pqi_config_table_section_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  777) 	__le32	heartbeat_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  778) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  779) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  780) struct pqi_config_table_soft_reset {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  781) 	struct pqi_config_table_section_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  782) 	u8 soft_reset_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  783) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  784) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  785) #define PQI_SOFT_RESET_INITIATE		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  786) #define PQI_SOFT_RESET_ABORT		0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  787) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  788) enum pqi_soft_reset_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  789) 	RESET_INITIATE_FIRMWARE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  790) 	RESET_INITIATE_DRIVER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  791) 	RESET_ABORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  792) 	RESET_NORESPONSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  793) 	RESET_TIMEDOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  794) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  795) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  796) union pqi_reset_register {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  797) 	struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  798) 		u32	reset_type : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  799) 		u32	reserved : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  800) 		u32	reset_action : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  801) 		u32	hold_in_pd1 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  802) 		u32	reserved2 : 23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  803) 	} bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  804) 	u32	all_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  805) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  806) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  807) #define PQI_RESET_ACTION_RESET		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  808) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  809) #define PQI_RESET_TYPE_NO_RESET		0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  810) #define PQI_RESET_TYPE_SOFT_RESET	0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  811) #define PQI_RESET_TYPE_FIRM_RESET	0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  812) #define PQI_RESET_TYPE_HARD_RESET	0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  813) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  814) #define PQI_RESET_ACTION_COMPLETED	0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  815) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  816) #define PQI_RESET_POLL_INTERVAL_MSECS	100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  817) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  818) #define PQI_MAX_OUTSTANDING_REQUESTS		((u32)~0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  819) #define PQI_MAX_OUTSTANDING_REQUESTS_KDUMP	32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  820) #define PQI_MAX_TRANSFER_SIZE			(1024U * 1024U)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  821) #define PQI_MAX_TRANSFER_SIZE_KDUMP		(512 * 1024U)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  822) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  823) #define RAID_MAP_MAX_ENTRIES		1024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  824) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  825) #define PQI_PHYSICAL_DEVICE_BUS		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  826) #define PQI_RAID_VOLUME_BUS		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  827) #define PQI_HBA_BUS			2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  828) #define PQI_EXTERNAL_RAID_VOLUME_BUS	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  829) #define PQI_MAX_BUS			PQI_EXTERNAL_RAID_VOLUME_BUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  830) #define PQI_VSEP_CISS_BTL		379
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  831) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  832) struct report_lun_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  833) 	__be32	list_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  834) 	u8	flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  835) 	u8	reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  836) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  837) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  838) /* for flags field of struct report_lun_header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  839) #define CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID	(1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  840) #define CISS_REPORT_LOG_FLAG_QUEUE_DEPTH	(1 << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  841) #define CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX	(1 << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  842) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  843) #define CISS_REPORT_PHYS_FLAG_OTHER		(1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  844) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  845) struct report_log_lun_extended_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  846) 	u8	lunid[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  847) 	u8	volume_id[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  848) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  849) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  850) struct report_log_lun_extended {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  851) 	struct report_lun_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  852) 	struct report_log_lun_extended_entry lun_entries[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  853) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  854) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  855) struct report_phys_lun_extended_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  856) 	u8	lunid[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  857) 	__be64	wwid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  858) 	u8	device_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  859) 	u8	device_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  860) 	u8	lun_count;	/* number of LUNs in a multi-LUN device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  861) 	u8	redundant_paths;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  862) 	u32	aio_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  863) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  864) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  865) /* for device_flags field of struct report_phys_lun_extended_entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  866) #define CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED	0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  867) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  868) struct report_phys_lun_extended {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  869) 	struct report_lun_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  870) 	struct report_phys_lun_extended_entry lun_entries[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  871) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  872) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  873) struct raid_map_disk_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  874) 	u32	aio_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  875) 	u8	xor_mult[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  876) 	u8	reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  877) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  878) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  879) /* for flags field of RAID map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  880) #define RAID_MAP_ENCRYPTION_ENABLED	0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  881) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  882) struct raid_map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  883) 	__le32	structure_size;		/* size of entire structure in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  884) 	__le32	volume_blk_size;	/* bytes / block in the volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  885) 	__le64	volume_blk_cnt;		/* logical blocks on the volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  886) 	u8	phys_blk_shift;		/* shift factor to convert between */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  887) 					/* units of logical blocks and */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  888) 					/* physical disk blocks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  889) 	u8	parity_rotation_shift;	/* shift factor to convert between */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  890) 					/* units of logical stripes and */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  891) 					/* physical stripes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  892) 	__le16	strip_size;		/* blocks used on each disk / stripe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  893) 	__le64	disk_starting_blk;	/* first disk block used in volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  894) 	__le64	disk_blk_cnt;		/* disk blocks used by volume / disk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  895) 	__le16	data_disks_per_row;	/* data disk entries / row in the map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  896) 	__le16	metadata_disks_per_row;	/* mirror/parity disk entries / row */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  897) 					/* in the map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  898) 	__le16	row_cnt;		/* rows in each layout map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  899) 	__le16	layout_map_count;	/* layout maps (1 map per */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  900) 					/* mirror parity group) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  901) 	__le16	flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  902) 	__le16	data_encryption_key_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  903) 	u8	reserved[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  904) 	struct raid_map_disk_data disk_data[RAID_MAP_MAX_ENTRIES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  905) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  906) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  907) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  908) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  909) #define RAID_CTLR_LUNID		"\0\0\0\0\0\0\0\0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  910) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  911) struct pqi_scsi_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  912) 	int	devtype;		/* as reported by INQUIRY commmand */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  913) 	u8	device_type;		/* as reported by */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  914) 					/* BMIC_IDENTIFY_PHYSICAL_DEVICE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  915) 					/* only valid for devtype = TYPE_DISK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  916) 	int	bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  917) 	int	target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  918) 	int	lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  919) 	u8	scsi3addr[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  920) 	__be64	wwid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  921) 	u8	volume_id[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  922) 	u8	is_physical_device : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  923) 	u8	is_external_raid_device : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  924) 	u8	is_expander_smp_device : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  925) 	u8	target_lun_valid : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  926) 	u8	device_gone : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  927) 	u8	new_device : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  928) 	u8	keep_device : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  929) 	u8	volume_offline : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  930) 	u8	rescan : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  931) 	bool	aio_enabled;		/* only valid for physical disks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  932) 	bool	in_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  933) 	bool	in_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  934) 	bool	device_offline;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  935) 	u8	vendor[8];		/* bytes 8-15 of inquiry data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  936) 	u8	model[16];		/* bytes 16-31 of inquiry data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  937) 	u64	sas_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  938) 	u8	raid_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  939) 	u16	queue_depth;		/* max. queue_depth for this device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  940) 	u16	advertised_queue_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  941) 	u32	aio_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  942) 	u8	volume_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  943) 	u8	active_path_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  944) 	u8	path_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  945) 	u8	bay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  946) 	u8	box_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  947) 	u8	phys_box_on_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  948) 	u8	phy_connected_dev_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  949) 	u8	box[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  950) 	u16	phys_connector[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  951) 	bool	raid_bypass_configured;	/* RAID bypass configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  952) 	bool	raid_bypass_enabled;	/* RAID bypass enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  953) 	int	offload_to_mirror;	/* Send next RAID bypass request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  954) 					/* to mirror drive. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  955) 	struct raid_map *raid_map;	/* RAID bypass map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  956) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  957) 	struct pqi_sas_port *sas_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  958) 	struct scsi_device *sdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  959) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  960) 	struct list_head scsi_device_list_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  961) 	struct list_head new_device_list_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  962) 	struct list_head add_list_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  963) 	struct list_head delete_list_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  964) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  965) 	atomic_t scsi_cmds_outstanding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  966) 	atomic_t raid_bypass_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  967) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  968) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  969) /* VPD inquiry pages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  970) #define CISS_VPD_LV_DEVICE_GEOMETRY	0xc1	/* vendor-specific page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  971) #define CISS_VPD_LV_BYPASS_STATUS	0xc2	/* vendor-specific page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  972) #define CISS_VPD_LV_STATUS		0xc3	/* vendor-specific page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  973) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  974) #define VPD_PAGE	(1 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  975) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  976) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  977) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  978) /* structure for CISS_VPD_LV_STATUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  979) struct ciss_vpd_logical_volume_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  980) 	u8	peripheral_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  981) 	u8	page_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  982) 	u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  983) 	u8	page_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  984) 	u8	volume_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  985) 	u8	reserved2[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  986) 	__be32	flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  987) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  988) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  989) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  990) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  991) /* constants for volume_status field of ciss_vpd_logical_volume_status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  992) #define CISS_LV_OK					0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  993) #define CISS_LV_FAILED					1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  994) #define CISS_LV_NOT_CONFIGURED				2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  995) #define CISS_LV_DEGRADED				3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  996) #define CISS_LV_READY_FOR_RECOVERY			4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  997) #define CISS_LV_UNDERGOING_RECOVERY			5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  998) #define CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  999) #define CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) #define CISS_LV_HARDWARE_OVERHEATING			8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) #define CISS_LV_HARDWARE_HAS_OVERHEATED			9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) #define CISS_LV_UNDERGOING_EXPANSION			10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) #define CISS_LV_NOT_AVAILABLE				11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) #define CISS_LV_QUEUED_FOR_EXPANSION			12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) #define CISS_LV_DISABLED_SCSI_ID_CONFLICT		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) #define CISS_LV_EJECTED					14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) #define CISS_LV_UNDERGOING_ERASE			15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) /* state 16 not used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) #define CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD	17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) #define CISS_LV_UNDERGOING_RPI				18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) #define CISS_LV_PENDING_RPI				19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) #define CISS_LV_ENCRYPTED_NO_KEY			20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) /* state 21 not used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) #define CISS_LV_UNDERGOING_ENCRYPTION			22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) #define CISS_LV_UNDERGOING_ENCRYPTION_REKEYING		23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) #define CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER	24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) #define CISS_LV_PENDING_ENCRYPTION			25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) #define CISS_LV_PENDING_ENCRYPTION_REKEYING		26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) #define CISS_LV_NOT_SUPPORTED				27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) #define CISS_LV_STATUS_UNAVAILABLE			255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) /* constants for flags field of ciss_vpd_logical_volume_status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) #define CISS_LV_FLAGS_NO_HOST_IO	0x1	/* volume not available for */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) 						/* host I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) /* for SAS hosts and SAS expanders */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) struct pqi_sas_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) 	struct device *parent_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) 	struct list_head port_list_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) struct pqi_sas_port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) 	struct list_head port_list_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) 	u64	sas_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) 	struct pqi_scsi_dev *device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) 	struct sas_port *port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) 	int	next_phy_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) 	struct list_head phy_list_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 	struct pqi_sas_node *parent_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) 	struct sas_rphy *rphy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) struct pqi_sas_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) 	struct list_head phy_list_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) 	struct sas_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) 	struct pqi_sas_port *parent_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) 	bool	added_to_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) struct pqi_io_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) 	atomic_t	refcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) 	u16		index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) 	void (*io_complete_callback)(struct pqi_io_request *io_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) 		void *context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) 	void		*context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) 	u8		raid_bypass : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) 	int		status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) 	struct pqi_queue_group *queue_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) 	struct scsi_cmnd *scmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) 	void		*error_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) 	struct pqi_sg_descriptor *sg_chain_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) 	dma_addr_t	sg_chain_buffer_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) 	void		*iu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) 	struct list_head request_list_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) #define PQI_NUM_SUPPORTED_EVENTS	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) struct pqi_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) 	bool	pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) 	u8	event_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) 	__le16	event_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) 	__le32	additional_event_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) 	__le32	ofa_bytes_requested;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) 	__le16	ofa_cancel_reason;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) #define PQI_RESERVED_IO_SLOTS_LUN_RESET			1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) #define PQI_RESERVED_IO_SLOTS_EVENT_ACK			PQI_NUM_SUPPORTED_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) #define PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) #define PQI_RESERVED_IO_SLOTS				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) 	(PQI_RESERVED_IO_SLOTS_LUN_RESET + PQI_RESERVED_IO_SLOTS_EVENT_ACK + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) 	PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) struct pqi_ctrl_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) 	unsigned int	ctrl_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) 	struct pci_dev	*pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) 	char		firmware_version[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) 	char		serial_number[17];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) 	char		model[17];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) 	char		vendor[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) 	void __iomem	*iomem_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) 	struct pqi_ctrl_registers __iomem *registers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) 	struct pqi_device_registers __iomem *pqi_registers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) 	u32		max_sg_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) 	u32		config_table_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) 	u32		config_table_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) 	u16		max_inbound_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) 	u16		max_elements_per_iq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) 	u16		max_iq_element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) 	u16		max_outbound_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) 	u16		max_elements_per_oq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) 	u16		max_oq_element_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) 	u32		max_transfer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) 	u32		max_outstanding_requests;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) 	u32		max_io_slots;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) 	unsigned int	scsi_ml_can_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) 	unsigned short	sg_tablesize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) 	unsigned int	max_sectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) 	u32		error_buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) 	void		*error_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 	dma_addr_t	error_buffer_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) 	size_t		sg_chain_buffer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) 	unsigned int	num_queue_groups;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) 	u16		max_hw_queue_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) 	u16		num_elements_per_iq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) 	u16		num_elements_per_oq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) 	u16		max_inbound_iu_length_per_firmware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) 	u16		max_inbound_iu_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) 	unsigned int	max_sg_per_iu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) 	void		*admin_queue_memory_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) 	u32		admin_queue_memory_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) 	dma_addr_t	admin_queue_memory_base_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) 	void		*queue_memory_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) 	u32		queue_memory_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) 	dma_addr_t	queue_memory_base_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) 	struct pqi_admin_queues admin_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) 	struct pqi_queue_group queue_groups[PQI_MAX_QUEUE_GROUPS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) 	struct pqi_event_queue event_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) 	enum pqi_irq_mode irq_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) 	int		max_msix_vectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) 	int		num_msix_vectors_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) 	int		num_msix_vectors_initialized;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) 	int		event_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) 	struct Scsi_Host *scsi_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) 	struct mutex	scan_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) 	struct mutex	lun_reset_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) 	struct mutex	ofa_mutex; /* serialize ofa */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) 	bool		controller_online;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) 	bool		block_requests;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) 	bool		block_device_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) 	bool		in_ofa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) 	bool		in_shutdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) 	u8		inbound_spanning_supported : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) 	u8		outbound_spanning_supported : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) 	u8		pqi_mode_enabled : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) 	u8		pqi_reset_quiesce_supported : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) 	u8		soft_reset_handshake_supported : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) 	u8		raid_iu_timeout_supported: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) 	u8		tmf_iu_timeout_supported: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) 	struct list_head scsi_device_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) 	spinlock_t	scsi_device_list_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) 	struct delayed_work rescan_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) 	struct delayed_work update_time_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) 	struct pqi_sas_node *sas_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) 	u64		sas_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) 	struct pqi_io_request *io_request_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) 	u16		next_io_request_slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) 	struct pqi_event events[PQI_NUM_SUPPORTED_EVENTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) 	struct work_struct event_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) 	atomic_t	num_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) 	int		previous_num_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) 	u32		previous_heartbeat_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) 	__le32 __iomem	*heartbeat_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) 	u8 __iomem	*soft_reset_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) 	struct timer_list heartbeat_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) 	struct work_struct ctrl_offline_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) 	struct semaphore sync_request_sem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) 	atomic_t	num_busy_threads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) 	atomic_t	num_blocked_threads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) 	wait_queue_head_t block_requests_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) 	struct list_head raid_bypass_retry_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) 	spinlock_t	raid_bypass_retry_list_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) 	struct work_struct raid_bypass_retry_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) 	struct pqi_ofa_memory *pqi_ofa_mem_virt_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) 	dma_addr_t	pqi_ofa_mem_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) 	void		**pqi_ofa_chunk_virt_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) 	atomic_t	sync_cmds_outstanding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) enum pqi_ctrl_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) 	SIS_MODE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) 	PQI_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)  * assume worst case: SATA queue depth of 31 minus 4 internal firmware commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) #define PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH	27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) /* CISS commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) #define CISS_READ		0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) #define CISS_REPORT_LOG		0xc2	/* Report Logical LUNs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) #define CISS_REPORT_PHYS	0xc3	/* Report Physical LUNs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) #define CISS_GET_RAID_MAP	0xc8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) /* BMIC commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) #define BMIC_IDENTIFY_CONTROLLER		0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) #define BMIC_IDENTIFY_PHYSICAL_DEVICE		0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) #define BMIC_READ				0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) #define BMIC_WRITE				0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) #define BMIC_SENSE_CONTROLLER_PARAMETERS	0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) #define BMIC_SENSE_SUBSYSTEM_INFORMATION	0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) #define BMIC_CSMI_PASSTHRU			0x68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) #define BMIC_WRITE_HOST_WELLNESS		0xa5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) #define BMIC_FLUSH_CACHE			0xc2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) #define BMIC_SET_DIAG_OPTIONS			0xf4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) #define BMIC_SENSE_DIAG_OPTIONS			0xf5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) #define CSMI_CC_SAS_SMP_PASSTHRU		0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) #define SA_FLUSH_CACHE				0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) #define MASKED_DEVICE(lunid)			((lunid)[3] & 0xc0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) #define CISS_GET_LEVEL_2_BUS(lunid)		((lunid)[7] & 0x3f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) #define CISS_GET_LEVEL_2_TARGET(lunid)		((lunid)[6])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) #define CISS_GET_DRIVE_NUMBER(lunid)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) 	(((CISS_GET_LEVEL_2_BUS((lunid)) - 1) << 8) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) 	CISS_GET_LEVEL_2_TARGET((lunid)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) #define NO_TIMEOUT		((unsigned long) -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) struct bmic_identify_controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) 	u8	configured_logical_drive_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) 	__le32	configuration_signature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) 	u8	firmware_version[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) 	u8	reserved[145];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) 	__le16	extended_logical_unit_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) 	u8	reserved1[34];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) 	__le16	firmware_build_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) 	u8	reserved2[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) 	u8	vendor_id[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) 	u8	product_id[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) 	u8	reserved3[68];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) 	u8	controller_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) 	u8	reserved4[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) struct bmic_sense_subsystem_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) 	u8	reserved[44];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) 	u8	ctrl_serial_number[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) /* constants for device_type field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) #define SA_DEVICE_TYPE_SATA		0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) #define SA_DEVICE_TYPE_SAS		0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) #define SA_DEVICE_TYPE_EXPANDER_SMP	0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) #define SA_DEVICE_TYPE_SES		0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) #define SA_DEVICE_TYPE_CONTROLLER	0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) #define SA_DEVICE_TYPE_NVME		0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) struct bmic_identify_physical_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) 	u8	scsi_bus;		/* SCSI Bus number on controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) 	u8	scsi_id;		/* SCSI ID on this bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) 	__le16	block_size;		/* sector size in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) 	__le32	total_blocks;		/* number for sectors on drive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) 	__le32	reserved_blocks;	/* controller reserved (RIS) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) 	u8	model[40];		/* Physical Drive Model */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) 	u8	serial_number[40];	/* Drive Serial Number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) 	u8	firmware_revision[8];	/* drive firmware revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) 	u8	scsi_inquiry_bits;	/* inquiry byte 7 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) 	u8	compaq_drive_stamp;	/* 0 means drive not stamped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) 	u8	last_failure_reason;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) 	u8	flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) 	u8	more_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) 	u8	scsi_lun;		/* SCSI LUN for phys drive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) 	u8	yet_more_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) 	u8	even_more_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) 	__le32	spi_speed_rules;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) 	u8	phys_connector[2];	/* connector number on controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) 	u8	phys_box_on_bus;	/* phys enclosure this drive resides */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) 	u8	phys_bay_in_box;	/* phys drv bay this drive resides */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) 	__le32	rpm;			/* drive rotational speed in RPM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) 	u8	device_type;		/* type of drive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) 	u8	sata_version;		/* only valid when device_type = */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) 					/* SA_DEVICE_TYPE_SATA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) 	__le64	big_total_block_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) 	__le64	ris_starting_lba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) 	__le32	ris_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) 	u8	wwid[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) 	u8	controller_phy_map[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) 	__le16	phy_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) 	u8	phy_connected_dev_type[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) 	u8	phy_to_drive_bay_num[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) 	__le16	phy_to_attached_dev_index[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) 	u8	box_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) 	u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) 	__le16	extra_physical_drive_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) 	u8	negotiated_link_rate[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) 	u8	phy_to_phy_map[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) 	u8	redundant_path_present_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) 	u8	redundant_path_failure_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) 	u8	active_path_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) 	__le16	alternate_paths_phys_connector[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) 	u8	alternate_paths_phys_box_on_port[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) 	u8	multi_lun_device_lun_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) 	u8	minimum_good_fw_revision[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) 	u8	unique_inquiry_bytes[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) 	u8	current_temperature_degrees;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) 	u8	temperature_threshold_degrees;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) 	u8	max_temperature_degrees;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) 	u8	logical_blocks_per_phys_block_exp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) 	__le16	current_queue_depth_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) 	u8	switch_name[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) 	__le16	switch_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) 	u8	alternate_paths_switch_name[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) 	u8	alternate_paths_switch_port[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) 	__le16	power_on_hours;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) 	__le16	percent_endurance_used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) 	u8	drive_authentication;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) 	u8	smart_carrier_authentication;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) 	u8	smart_carrier_app_fw_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) 	u8	smart_carrier_bootloader_fw_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) 	u8	sanitize_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) 	u8	encryption_key_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) 	u8	encryption_key_name[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) 	__le32	misc_drive_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) 	__le16	dek_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) 	__le16	hba_drive_encryption_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) 	__le16	max_overwrite_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) 	__le16	max_block_erase_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) 	__le16	max_crypto_erase_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) 	u8	connector_info[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) 	u8	connector_name[8][8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) 	u8	page_83_identifier[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) 	u8	maximum_link_rate[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) 	u8	negotiated_physical_link_rate[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) 	u8	box_connector_name[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) 	u8	padding_to_multiple_of_512[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) struct bmic_smp_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) 	u8	frame_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) 	u8	function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) 	u8	allocated_response_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) 	u8	request_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) 	u8	additional_request_bytes[1016];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) struct  bmic_smp_response {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) 	u8	frame_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) 	u8	function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) 	u8	function_result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) 	u8	response_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) 	u8	additional_response_bytes[1016];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) struct bmic_csmi_ioctl_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) 	__le32	header_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) 	u8	signature[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) 	__le32	timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) 	__le32	control_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) 	__le32	return_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) 	__le32	length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) struct bmic_csmi_smp_passthru {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) 	u8	phy_identifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) 	u8	port_identifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) 	u8	connection_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) 	u8	reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) 	__be64	destination_sas_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) 	__le32	request_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) 	struct bmic_smp_request request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) 	u8	connection_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) 	u8	reserved1[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) 	__le32	response_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) 	struct bmic_smp_response response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) struct bmic_csmi_smp_passthru_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) 	struct bmic_csmi_ioctl_header ioctl_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) 	struct bmic_csmi_smp_passthru parameters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) struct bmic_flush_cache {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) 	u8	disable_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) 	u8	system_power_action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) 	u8	ndu_flush;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) 	u8	shutdown_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) 	u8	reserved[28];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) /* for shutdown_event member of struct bmic_flush_cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) enum bmic_flush_cache_shutdown_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) 	NONE_CACHE_FLUSH_ONLY = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) 	SHUTDOWN = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) 	HIBERNATE = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) 	SUSPEND = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) 	RESTART = 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) struct bmic_diag_options {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) 	__le32 options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) 	atomic_inc(&ctrl_info->num_busy_threads);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) 	atomic_dec(&ctrl_info->num_busy_threads);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) static inline struct pqi_ctrl_info *shost_to_hba(struct Scsi_Host *shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) 	void *hostdata = shost_priv(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) 	return *((struct pqi_ctrl_info **)hostdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) void pqi_sas_smp_handler(struct bsg_job *job, struct Scsi_Host *shost,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) 	struct sas_rphy *rphy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) int pqi_add_sas_host(struct Scsi_Host *shost, struct pqi_ctrl_info *ctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) void pqi_delete_sas_host(struct pqi_ctrl_info *ctrl_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) int pqi_add_sas_device(struct pqi_sas_node *pqi_sas_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) 	struct pqi_scsi_dev *device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) void pqi_remove_sas_device(struct pqi_scsi_dev *device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) struct pqi_scsi_dev *pqi_find_device_by_sas_rphy(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) 	struct pqi_ctrl_info *ctrl_info, struct sas_rphy *rphy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) 	struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) 	struct pqi_raid_error_info *error_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) extern struct sas_function_template pqi_sas_transport_functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) #endif /* _SMARTPQI_H */