Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 2001 Florian Lohoff (flo@rfc822.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 2003, 07 Ralf Baechle (ralf@linux-mips.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * (In all truth, Jed Schimmel wrote all this code.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #undef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <asm/sgi/hpc3.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <asm/sgi/ip22.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <asm/sgi/wd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include "scsi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include "wd33c93.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) struct ip22_hostdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct WD33C93_hostdata wh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	void *cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define host_to_hostdata(host) ((struct ip22_hostdata *)((host)->hostdata))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) struct hpc_chunk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct hpc_dma_desc desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	u32 _padding;	/* align to quadword boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /* space for hpc dma descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define HPC_DMA_SIZE   PAGE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define DMA_DIR(d)   ((d == DATA_OUT_DIR) ? DMA_TO_DEVICE : DMA_FROM_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static irqreturn_t sgiwd93_intr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct Scsi_Host * host = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	spin_lock_irqsave(host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	wd33c93_intr(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	spin_unlock_irqrestore(host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static inline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) void fill_hpc_entries(struct ip22_hostdata *hd, struct scsi_cmnd *cmd, int din)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	unsigned long len = cmd->SCp.this_residual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	void *addr = cmd->SCp.ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	dma_addr_t physaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	unsigned long count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct hpc_chunk *hcp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	physaddr = dma_map_single(hd->dev, addr, len, DMA_DIR(din));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	cmd->SCp.dma_handle = physaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	hcp = hd->cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	while (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		 * even cntinfo could be up to 16383, without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		 * magic only 8192 works correctly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		count = len > 8192 ? 8192 : len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		hcp->desc.pbuf = physaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		hcp->desc.cntinfo = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		hcp++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		len -= count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		physaddr += count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	 * To make sure, if we trip an HPC bug, that we transfer every single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	 * byte, we tag on an extra zero length dma descriptor at the end of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	 * the chain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	hcp->desc.pbuf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	hcp->desc.cntinfo = HPCDMA_EOX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	dma_sync_single_for_device(hd->dev, hd->dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		       (unsigned long)(hcp + 1) - (unsigned long)hd->cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		       DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static int dma_setup(struct scsi_cmnd *cmd, int datainp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	struct ip22_hostdata *hdata = host_to_hostdata(cmd->device->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	struct hpc3_scsiregs *hregs =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 		(struct hpc3_scsiregs *) cmd->device->host->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	pr_debug("dma_setup: datainp<%d> hcp<%p> ", datainp, hdata->cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	hdata->wh.dma_dir = datainp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	 * wd33c93 shouldn't pass us bogus dma_setups, but it does:-(  The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	 * other wd33c93 drivers deal with it the same way (which isn't that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	 * obvious).  IMHO a better fix would be, not to do these dma setups
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	 * in the first place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	if (cmd->SCp.ptr == NULL || cmd->SCp.this_residual == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	fill_hpc_entries(hdata, cmd, datainp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	pr_debug(" HPCGO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	/* Start up the HPC. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	hregs->ndptr = hdata->dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (datainp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		hregs->ctrl = HPC3_SCTRL_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		hregs->ctrl = HPC3_SCTRL_ACTIVE | HPC3_SCTRL_DIR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		     int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	struct ip22_hostdata *hdata = host_to_hostdata(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct hpc3_scsiregs *hregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	if (!SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	if (SCpnt->SCp.ptr == NULL || SCpnt->SCp.this_residual == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	hregs = (struct hpc3_scsiregs *) SCpnt->device->host->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	pr_debug("dma_stop: status<%d> ", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	/* First stop the HPC and flush it's FIFO. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (hdata->wh.dma_dir) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		hregs->ctrl |= HPC3_SCTRL_FLUSH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		while (hregs->ctrl & HPC3_SCTRL_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	hregs->ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	dma_unmap_single(hdata->dev, SCpnt->SCp.dma_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			 SCpnt->SCp.this_residual,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			 DMA_DIR(hdata->wh.dma_dir));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	pr_debug("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) void sgiwd93_reset(unsigned long base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	hregs->ctrl = HPC3_SCTRL_CRESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	hregs->ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) EXPORT_SYMBOL_GPL(sgiwd93_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static inline void init_hpc_chain(struct ip22_hostdata *hdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct hpc_chunk *hcp = (struct hpc_chunk *)hdata->cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	dma_addr_t dma = hdata->dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	unsigned long start, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	start = (unsigned long) hcp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	end = start + HPC_DMA_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	while (start < end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		hcp->desc.pnext = (u32) (dma + sizeof(struct hpc_chunk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		hcp->desc.cntinfo = HPCDMA_EOX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		hcp++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		dma += sizeof(struct hpc_chunk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		start += sizeof(struct hpc_chunk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	hcp--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	hcp->desc.pnext = hdata->dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)  * Kludge alert - the SCSI code calls the abort and reset method with int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)  * arguments not with pointers.  So this is going to blow up beautyfully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)  * on 64-bit systems with memory outside the compat address spaces.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static struct scsi_host_template sgiwd93_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	.module			= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.proc_name		= "SGIWD93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.name			= "SGI WD93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	.queuecommand		= wd33c93_queuecommand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	.eh_abort_handler	= wd33c93_abort,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	.eh_host_reset_handler	= wd33c93_host_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	.can_queue		= 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	.this_id		= 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	.sg_tablesize		= SG_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	.cmd_per_lun		= 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	.dma_boundary		= PAGE_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int sgiwd93_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	struct sgiwd93_platform_data *pd = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	unsigned char *wdregs = pd->wdregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct hpc3_scsiregs *hregs = pd->hregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	struct ip22_hostdata *hdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	struct Scsi_Host *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	wd33c93_regs regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	unsigned int unit = pd->unit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	unsigned int irq = pd->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	host = scsi_host_alloc(&sgiwd93_template, sizeof(struct ip22_hostdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	if (!host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	host->base = (unsigned long) hregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	host->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	hdata = host_to_hostdata(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	hdata->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	hdata->cpu = dma_alloc_noncoherent(&pdev->dev, HPC_DMA_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 				&hdata->dma, DMA_TO_DEVICE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (!hdata->cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		printk(KERN_WARNING "sgiwd93: Could not allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 		       "host %d buffer.\n", unit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 		goto out_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	init_hpc_chain(hdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	regs.SASR = wdregs + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	regs.SCMD = wdregs + 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	hdata->wh.no_sync = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	hdata->wh.fast = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	hdata->wh.dma_mode = CTRL_BURST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	wd33c93_init(host, regs, dma_setup, dma_stop, WD33C93_FS_MHZ(20));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	err = request_irq(irq, sgiwd93_intr, 0, "SGI WD93", host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		printk(KERN_WARNING "sgiwd93: Could not register irq %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		       "for host %d.\n", irq, unit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	platform_set_drvdata(pdev, host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	err = scsi_add_host(host, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		goto out_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	scsi_scan_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) out_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	free_irq(irq, host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) out_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	dma_free_noncoherent(&pdev->dev, HPC_DMA_SIZE, hdata->cpu, hdata->dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) out_put:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	scsi_host_put(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static int sgiwd93_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	struct Scsi_Host *host = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	struct ip22_hostdata *hdata = (struct ip22_hostdata *) host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct sgiwd93_platform_data *pd = pdev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	scsi_remove_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	free_irq(pd->irq, host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	dma_free_noncoherent(&pdev->dev, HPC_DMA_SIZE, hdata->cpu, hdata->dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 			DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	scsi_host_put(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static struct platform_driver sgiwd93_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	.probe  = sgiwd93_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	.remove = sgiwd93_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		.name   = "sgiwd93",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static int __init sgiwd93_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	return platform_driver_register(&sgiwd93_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static void __exit sgiwd93_module_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	return platform_driver_unregister(&sgiwd93_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) module_init(sgiwd93_module_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) module_exit(sgiwd93_module_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) MODULE_DESCRIPTION("SGI WD33C93 driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) MODULE_ALIAS("platform:sgiwd93");