^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * QLogic iSCSI HBA Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2003-2013 QLogic Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <scsi/iscsi_if.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include "ql4_def.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "ql4_glbl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "ql4_dbg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "ql4_inline.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static void ql4xxx_set_mac_number(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) uint32_t value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* Get the function number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) value = readw(&ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) switch (value & ISP_CONTROL_FN_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) case ISP_CONTROL_FN0_SCSI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) ha->mac_index = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) case ISP_CONTROL_FN1_SCSI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ha->mac_index = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) DEBUG2(printk("scsi%ld: %s: Invalid function number, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) "ispControlStatus = 0x%x\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) __func__, value));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) DEBUG2(printk("scsi%ld: %s: mac_index %d.\n", ha->host_no, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ha->mac_index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * qla4xxx_free_ddb - deallocate ddb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * @ha: pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * @ddb_entry: pointer to device database entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * This routine marks a DDB entry INVALID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void qla4xxx_free_ddb(struct scsi_qla_host *ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct ddb_entry *ddb_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* Remove device pointer from index mapping arrays */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) (struct ddb_entry *) INVALID_ENTRY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ha->tot_ddbs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * qla4xxx_init_response_q_entries() - Initializes response queue entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @ha: HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Beginning of request ring has initialization control block already built
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * by nvram config routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static void qla4xxx_init_response_q_entries(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) uint16_t cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct response *pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) pkt = (struct response *)ha->response_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) for (cnt = 0; cnt < RESPONSE_QUEUE_DEPTH; cnt++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) pkt->signature = RESPONSE_PROCESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) pkt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * qla4xxx_init_rings - initialize hw queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * @ha: pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * This routine initializes the internal queues for the specified adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * The QLA4010 requires us to restart the queues at index 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * The QLA4000 doesn't care, so just default to QLA4010's requirement.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int qla4xxx_init_rings(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* Initialize request queue. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ha->request_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ha->request_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ha->request_ptr = &ha->request_ring[ha->request_in];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ha->req_q_count = REQUEST_QUEUE_DEPTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Initialize response queue. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ha->response_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) ha->response_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ha->response_ptr = &ha->response_ring[ha->response_out];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (is_qla8022(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) writel(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) (unsigned long __iomem *)&ha->qla4_82xx_reg->req_q_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) writel(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) (unsigned long __iomem *)&ha->qla4_82xx_reg->rsp_q_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) writel(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) (unsigned long __iomem *)&ha->qla4_82xx_reg->rsp_q_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) } else if (is_qla8032(ha) || is_qla8042(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) writel(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) (unsigned long __iomem *)&ha->qla4_83xx_reg->req_q_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) writel(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) (unsigned long __iomem *)&ha->qla4_83xx_reg->rsp_q_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) writel(0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) (unsigned long __iomem *)&ha->qla4_83xx_reg->rsp_q_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Initialize DMA Shadow registers. The firmware is really
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * supposed to take care of this, but on some uniprocessor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * systems, the shadow registers aren't cleared-- causing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * the interrupt_handler to think there are responses to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * processed when there aren't.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ha->shadow_regs->req_q_out = __constant_cpu_to_le32(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ha->shadow_regs->rsp_q_in = __constant_cpu_to_le32(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) writel(0, &ha->reg->req_q_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) writel(0, &ha->reg->rsp_q_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) readl(&ha->reg->rsp_q_out);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) qla4xxx_init_response_q_entries(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* Initialize mailbox active array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) for (i = 0; i < MAX_MRB; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ha->active_mrb_array[i] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * qla4xxx_get_sys_info - validate adapter MAC address(es)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * @ha: pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) int qla4xxx_get_sys_info(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct flash_sys_info *sys_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) dma_addr_t sys_info_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) sys_info = dma_alloc_coherent(&ha->pdev->dev, sizeof(*sys_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) &sys_info_dma, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (sys_info == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) DEBUG2(printk("scsi%ld: %s: Unable to allocate dma buffer.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) goto exit_get_sys_info_no_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* Get flash sys info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (qla4xxx_get_flash(ha, sys_info_dma, FLASH_OFFSET_SYS_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) sizeof(*sys_info)) != QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) DEBUG2(printk("scsi%ld: %s: get_flash FLASH_OFFSET_SYS_INFO "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) "failed\n", ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) goto exit_get_sys_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* Save M.A.C. address & serial_number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) memcpy(ha->my_mac, &sys_info->physAddr[0].address[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) min(sizeof(ha->my_mac),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) sizeof(sys_info->physAddr[0].address)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) memcpy(ha->serial_number, &sys_info->acSerialNumber,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) min(sizeof(ha->serial_number),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) sizeof(sys_info->acSerialNumber)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) exit_get_sys_info:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) dma_free_coherent(&ha->pdev->dev, sizeof(*sys_info), sys_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) sys_info_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) exit_get_sys_info_no_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * qla4xxx_init_local_data - initialize adapter specific local data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * @ha: pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static void qla4xxx_init_local_data(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* Initialize aen queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ha->aen_q_count = MAX_AEN_ENTRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static uint8_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) qla4xxx_wait_for_ip_config(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) uint8_t ipv4_wait = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) uint8_t ipv6_wait = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int8_t ip_address[IPv6_ADDR_LEN] = {0} ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* If both IPv4 & IPv6 are enabled, possibly only one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * IP address may be acquired, so check to see if we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * need to wait for another */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (is_ipv4_enabled(ha) && is_ipv6_enabled(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (((ha->addl_fw_state & FW_ADDSTATE_DHCPv4_ENABLED) != 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ((ha->addl_fw_state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) FW_ADDSTATE_DHCPv4_LEASE_ACQUIRED) == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ipv4_wait = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (((ha->ip_config.ipv6_addl_options &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) IPV6_ADDOPT_NEIGHBOR_DISCOVERY_ADDR_ENABLE) != 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ((ha->ip_config.ipv6_link_local_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) IP_ADDRSTATE_ACQUIRING) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) (ha->ip_config.ipv6_addr0_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) IP_ADDRSTATE_ACQUIRING) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) (ha->ip_config.ipv6_addr1_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) IP_ADDRSTATE_ACQUIRING))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ipv6_wait = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if ((ha->ip_config.ipv6_link_local_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) IP_ADDRSTATE_PREFERRED) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) (ha->ip_config.ipv6_addr0_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) IP_ADDRSTATE_PREFERRED) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) (ha->ip_config.ipv6_addr1_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) IP_ADDRSTATE_PREFERRED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) DEBUG2(printk(KERN_INFO "scsi%ld: %s: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) "Preferred IP configured."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) " Don't wait!\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ipv6_wait = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) if (memcmp(&ha->ip_config.ipv6_default_router_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ip_address, IPv6_ADDR_LEN) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) DEBUG2(printk(KERN_INFO "scsi%ld: %s: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) "No Router configured. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) "Don't wait!\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ipv6_wait = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if ((ha->ip_config.ipv6_default_router_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) IPV6_RTRSTATE_MANUAL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) (ha->ip_config.ipv6_link_local_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) IP_ADDRSTATE_TENTATIVE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) (memcmp(&ha->ip_config.ipv6_link_local_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) &ha->ip_config.ipv6_default_router_addr, 4) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) DEBUG2(printk("scsi%ld: %s: LinkLocal Router & "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) "IP configured. Don't wait!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ipv6_wait = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (ipv4_wait || ipv6_wait) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) DEBUG2(printk("scsi%ld: %s: Wait for additional "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) "IP(s) \"", ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (ipv4_wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) DEBUG2(printk("IPv4 "));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (ha->ip_config.ipv6_link_local_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) IP_ADDRSTATE_ACQUIRING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DEBUG2(printk("IPv6LinkLocal "));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (ha->ip_config.ipv6_addr0_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) IP_ADDRSTATE_ACQUIRING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) DEBUG2(printk("IPv6Addr0 "));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if (ha->ip_config.ipv6_addr1_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) IP_ADDRSTATE_ACQUIRING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) DEBUG2(printk("IPv6Addr1 "));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) DEBUG2(printk("\"\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return ipv4_wait|ipv6_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static int qla4_80xx_is_minidump_dma_capable(struct scsi_qla_host *ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct qla4_8xxx_minidump_template_hdr *md_hdr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) int offset = (is_qla8022(ha)) ? QLA8022_TEMPLATE_CAP_OFFSET :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) QLA83XX_TEMPLATE_CAP_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) int rval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) uint32_t *cap_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) cap_offset = (uint32_t *)((char *)md_hdr + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (!(le32_to_cpu(*cap_offset) & BIT_0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ql4_printk(KERN_INFO, ha, "PEX DMA Not supported %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) *cap_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) rval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * qla4xxx_alloc_fw_dump - Allocate memory for minidump data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * @ha: pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) uint32_t capture_debug_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int hdr_entry_bit, k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) void *md_tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) dma_addr_t md_tmp_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct qla4_8xxx_minidump_template_hdr *md_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) int dma_capable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (ha->fw_dump) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ql4_printk(KERN_WARNING, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) "Firmware dump previously allocated.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) status = qla4xxx_req_template_size(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (status != QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) "scsi%ld: Failed to get template size\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ha->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) clear_bit(AF_82XX_FW_DUMPED, &ha->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* Allocate memory for saving the template */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) md_tmp = dma_alloc_coherent(&ha->pdev->dev, ha->fw_dump_tmplt_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) &md_tmp_dma, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (!md_tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) "scsi%ld: Failed to allocate DMA memory\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ha->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* Request template */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) status = qla4xxx_get_minidump_template(ha, md_tmp_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (status != QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) "scsi%ld: Failed to get minidump template\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) ha->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) goto alloc_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) md_hdr = (struct qla4_8xxx_minidump_template_hdr *)md_tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) dma_capable = qla4_80xx_is_minidump_dma_capable(ha, md_hdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) capture_debug_level = md_hdr->capture_debug_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* Get capture mask based on module loadtime setting. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if ((ql4xmdcapmask >= 0x3 && ql4xmdcapmask <= 0x7F) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) (ql4xmdcapmask == 0xFF && dma_capable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ha->fw_dump_capture_mask = ql4xmdcapmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (ql4xmdcapmask == 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) ql4_printk(KERN_INFO, ha, "Falling back to default capture mask, as PEX DMA is not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ha->fw_dump_capture_mask = capture_debug_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) md_hdr->driver_capture_mask = ha->fw_dump_capture_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) DEBUG2(ql4_printk(KERN_INFO, ha, "Minimum num of entries = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) md_hdr->num_of_entries));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) DEBUG2(ql4_printk(KERN_INFO, ha, "Dump template size = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ha->fw_dump_tmplt_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) DEBUG2(ql4_printk(KERN_INFO, ha, "Selected Capture mask =0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ha->fw_dump_capture_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* Calculate fw_dump_size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) for (hdr_entry_bit = 0x2, k = 1; (hdr_entry_bit & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) hdr_entry_bit <<= 1, k++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (hdr_entry_bit & ha->fw_dump_capture_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ha->fw_dump_size += md_hdr->capture_size_array[k];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Total firmware dump size including command header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) ha->fw_dump_size += ha->fw_dump_tmplt_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ha->fw_dump = vmalloc(ha->fw_dump_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (!ha->fw_dump)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) goto alloc_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) "Minidump Template Size = 0x%x KB\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ha->fw_dump_tmplt_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) "Total Minidump size = 0x%x KB\n", ha->fw_dump_size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) memcpy(ha->fw_dump, md_tmp, ha->fw_dump_tmplt_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) ha->fw_dump_tmplt_hdr = ha->fw_dump;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) alloc_cleanup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) dma_free_coherent(&ha->pdev->dev, ha->fw_dump_tmplt_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) md_tmp, md_tmp_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) static int qla4xxx_fw_ready(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) uint32_t timeout_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) int ready = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) DEBUG2(ql4_printk(KERN_INFO, ha, "Waiting for Firmware Ready..\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) for (timeout_count = ADAPTER_INIT_TOV; timeout_count > 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) timeout_count--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) qla4xxx_get_dhcp_ip_address(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /* Get firmware state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (qla4xxx_get_firmware_state(ha) != QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) DEBUG2(printk("scsi%ld: %s: unable to get firmware "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) "state\n", ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (ha->firmware_state & FW_STATE_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) DEBUG2(printk("scsi%ld: %s: an unrecoverable error has"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) " occurred\n", ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (ha->firmware_state & FW_STATE_CONFIG_WAIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) * The firmware has not yet been issued an Initialize
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) * Firmware command, so issue it now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (qla4xxx_initialize_fw_cb(ha) == QLA_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* Go back and test for ready state - no wait. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (ha->firmware_state & FW_STATE_WAIT_AUTOCONNECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) DEBUG2(printk(KERN_INFO "scsi%ld: %s: fwstate:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) "AUTOCONNECT in progress\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (ha->firmware_state & FW_STATE_CONFIGURING_IP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) DEBUG2(printk(KERN_INFO "scsi%ld: %s: fwstate:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) " CONFIGURING IP\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * Check for link state after 15 secs and if link is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * still DOWN then, cable is unplugged. Ignore "DHCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * in Progress/CONFIGURING IP" bit to check if firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * is in ready state or not after 15 secs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * This is applicable for both 2.x & 3.x firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (timeout_count <= (ADAPTER_INIT_TOV - 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (ha->addl_fw_state & FW_ADDSTATE_LINK_UP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) DEBUG2(printk(KERN_INFO "scsi%ld: %s:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) " LINK UP (Cable plugged)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) } else if (ha->firmware_state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) (FW_STATE_CONFIGURING_IP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) FW_STATE_READY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) DEBUG2(printk(KERN_INFO "scsi%ld: %s: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) "LINK DOWN (Cable unplugged)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) ha->firmware_state = FW_STATE_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (ha->firmware_state == FW_STATE_READY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /* If DHCP IP Addr is available, retrieve it now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) &ha->dpc_flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) qla4xxx_get_dhcp_ip_address(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (!qla4xxx_wait_for_ip_config(ha) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) timeout_count == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) "Firmware Ready..\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /* The firmware is ready to process SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) commands. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) "scsi%ld: %s: MEDIA TYPE"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) " - %s\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) __func__, (ha->addl_fw_state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) FW_ADDSTATE_OPTICAL_MEDIA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) != 0 ? "OPTICAL" : "COPPER"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) "scsi%ld: %s: DHCPv4 STATE"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) " Enabled %s\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) __func__, (ha->addl_fw_state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) FW_ADDSTATE_DHCPv4_ENABLED) != 0 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) "YES" : "NO"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) "scsi%ld: %s: LINK %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) ha->host_no, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) (ha->addl_fw_state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) FW_ADDSTATE_LINK_UP) != 0 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) "UP" : "DOWN"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) "scsi%ld: %s: iSNS Service "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) "Started %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) ha->host_no, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) (ha->addl_fw_state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) FW_ADDSTATE_ISNS_SVC_ENABLED) != 0 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) "YES" : "NO"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) ready = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) DEBUG2(printk("scsi%ld: %s: waiting on fw, state=%x:%x - "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) "seconds expired= %d\n", ha->host_no, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ha->firmware_state, ha->addl_fw_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) timeout_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (is_qla4032(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) !(ha->addl_fw_state & FW_ADDSTATE_LINK_UP) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) (timeout_count < ADAPTER_INIT_TOV - 5)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) msleep(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) } /* end of for */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (timeout_count <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) DEBUG2(printk("scsi%ld: %s: FW Initialization timed out!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (ha->firmware_state & FW_STATE_CONFIGURING_IP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) DEBUG2(printk("scsi%ld: %s: FW initialized, but is reporting "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) "it's waiting to configure an IP address\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) ready = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) } else if (ha->firmware_state & FW_STATE_WAIT_AUTOCONNECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) DEBUG2(printk("scsi%ld: %s: FW initialized, but "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) "auto-discovery still in process\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) ready = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * qla4xxx_init_firmware - initializes the firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * @ha: pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static int qla4xxx_init_firmware(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) int status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (is_aer_supported(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /* For 82xx, stop firmware before initializing because if BIOS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * has previously initialized firmware, then driver's initialize
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * firmware will fail. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (is_qla80XX(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) qla4_8xxx_stop_firmware(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) ql4_printk(KERN_INFO, ha, "Initializing firmware..\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (qla4xxx_initialize_fw_cb(ha) == QLA_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) DEBUG2(printk("scsi%ld: %s: Failed to initialize firmware "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) "control block\n", ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (!qla4xxx_fw_ready(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) if (is_qla80XX(ha) && !test_bit(AF_INIT_DONE, &ha->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) qla4xxx_alloc_fw_dump(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return qla4xxx_get_firmware_status(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static void qla4xxx_set_model_info(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) uint16_t board_id_string[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) int size = sizeof(ha->nvram->isp4022.boardIdStr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int offset = offsetof(struct eeprom_data, isp4022.boardIdStr) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) for (i = 0; i < (size / 2) ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) board_id_string[i] = rd_nvram_word(ha, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) offset += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) memcpy(ha->model_name, board_id_string, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) static int qla4xxx_config_nvram(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) union external_hw_config_reg extHwConfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) DEBUG2(printk("scsi%ld: %s: Get EEProm parameters \n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) if (ql4xxx_lock_flash(ha) != QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (ql4xxx_lock_nvram(ha) != QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) ql4xxx_unlock_flash(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /* Get EEPRom Parameters from NVRAM and validate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) ql4_printk(KERN_INFO, ha, "Configuring NVRAM ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (qla4xxx_is_nvram_configuration_valid(ha) == QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) extHwConfig.Asuint32_t =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) rd_nvram_word(ha, eeprom_ext_hw_conf_offset(ha));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) ql4_printk(KERN_WARNING, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) "scsi%ld: %s: EEProm checksum invalid. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) "Please update your EEPROM\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /* Attempt to set defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) if (is_qla4010(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) extHwConfig.Asuint32_t = 0x1912;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) else if (is_qla4022(ha) | is_qla4032(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) extHwConfig.Asuint32_t = 0x0023;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) if (is_qla4022(ha) || is_qla4032(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) qla4xxx_set_model_info(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) strcpy(ha->model_name, "QLA4010");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) DEBUG(printk("scsi%ld: %s: Setting extHwConfig to 0xFFFF%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) ha->host_no, __func__, extHwConfig.Asuint32_t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) writel((0xFFFF << 16) | extHwConfig.Asuint32_t, isp_ext_hw_conf(ha));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) readl(isp_ext_hw_conf(ha));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) ql4xxx_unlock_nvram(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) ql4xxx_unlock_flash(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) return QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) * qla4_8xxx_pci_config() - Setup ISP82xx PCI configuration registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) * @ha: HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) void qla4_8xxx_pci_config(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) pci_set_master(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) void qla4xxx_pci_config(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) uint16_t w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) ql4_printk(KERN_INFO, ha, "Configuring PCI space...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) pci_set_master(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) status = pci_set_mwi(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) ql4_printk(KERN_WARNING, ha, "Failed to set MWI\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * We want to respect framework's setting of PCI configuration space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * command register and also want to make sure that all bits of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * interest to us are properly set in command register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) w |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) w &= ~PCI_COMMAND_INTX_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) pci_write_config_word(ha->pdev, PCI_COMMAND, w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static int qla4xxx_start_firmware_from_flash(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) int status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) unsigned long max_wait_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) uint32_t mbox_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) ql4_printk(KERN_INFO, ha, "Starting firmware ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) * Start firmware from flash ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) * WORKAROUND: Stuff a non-constant value that the firmware can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) * use as a seed for a random number generator in MB7 prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * setting BOOT_ENABLE. Fixes problem where the TCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) * connections use the same TCP ports after each reboot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) * causing some connections to not get re-established.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) DEBUG(printk("scsi%d: %s: Start firmware from flash ROM\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) writel(jiffies, &ha->reg->mailbox[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (is_qla4022(ha) | is_qla4032(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) writel(set_rmask(NVR_WRITE_ENABLE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) &ha->reg->u1.isp4022.nvram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) writel(2, &ha->reg->mailbox[6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) readl(&ha->reg->mailbox[6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) writel(set_rmask(CSR_BOOT_ENABLE), &ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) readl(&ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) /* Wait for firmware to come UP. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) DEBUG2(printk(KERN_INFO "scsi%ld: %s: Wait up to %d seconds for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) "boot firmware to complete...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) ha->host_no, __func__, FIRMWARE_UP_TOV));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) max_wait_time = jiffies + (FIRMWARE_UP_TOV * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) uint32_t ctrl_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) ctrl_status = readw(&ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) mbox_status = readw(&ha->reg->mailbox[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (ctrl_status & set_rmask(CSR_SCSI_PROCESSOR_INTR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) if (mbox_status == MBOX_STS_COMMAND_COMPLETE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) DEBUG2(printk(KERN_INFO "scsi%ld: %s: Waiting for boot "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) "firmware to complete... ctrl_sts=0x%x, remaining=%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) ha->host_no, __func__, ctrl_status, max_wait_time));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) msleep_interruptible(250);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) } while (!time_after_eq(jiffies, max_wait_time));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (mbox_status == MBOX_STS_COMMAND_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) DEBUG(printk(KERN_INFO "scsi%ld: %s: Firmware has started\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) writel(set_rmask(CSR_SCSI_PROCESSOR_INTR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) &ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) readl(&ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) printk(KERN_INFO "scsi%ld: %s: Boot firmware failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) "- mbox status 0x%x\n", ha->host_no, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) mbox_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) int ql4xxx_lock_drvr_wait(struct scsi_qla_host *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) #define QL4_LOCK_DRVR_WAIT 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) #define QL4_LOCK_DRVR_SLEEP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) int drvr_wait = QL4_LOCK_DRVR_WAIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) while (drvr_wait) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) if (ql4xxx_lock_drvr(a) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) ssleep(QL4_LOCK_DRVR_SLEEP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) DEBUG2(printk("scsi%ld: %s: Waiting for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) "Global Init Semaphore(%d)...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) a->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) __func__, drvr_wait));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) drvr_wait -= QL4_LOCK_DRVR_SLEEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) DEBUG2(printk("scsi%ld: %s: Global Init Semaphore "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) "acquired\n", a->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) return QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * qla4xxx_start_firmware - starts qla4xxx firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) * @ha: Pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) * This routine performs the necessary steps to start the firmware for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) * the QLA4010 adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) int qla4xxx_start_firmware(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) uint32_t mbox_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) int status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) int soft_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) int config_chip = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (is_qla4022(ha) | is_qla4032(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) ql4xxx_set_mac_number(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if (ql4xxx_lock_drvr_wait(ha) != QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) DEBUG2(printk("scsi%ld: %s: port_ctrl = 0x%08X\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) __func__, readw(isp_port_ctrl(ha))));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) DEBUG(printk("scsi%ld: %s: port_status = 0x%08X\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) __func__, readw(isp_port_status(ha))));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) /* Is Hardware already initialized? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if ((readw(isp_port_ctrl(ha)) & 0x8000) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) DEBUG(printk("scsi%ld: %s: Hardware has already been "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) "initialized\n", ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) /* Receive firmware boot acknowledgement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) mbox_status = readw(&ha->reg->mailbox[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) DEBUG2(printk("scsi%ld: %s: H/W Config complete - mbox[0]= "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) "0x%x\n", ha->host_no, __func__, mbox_status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) /* Is firmware already booted? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) if (mbox_status == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /* F/W not running, must be config by net driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) config_chip = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) soft_reset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) writel(set_rmask(CSR_SCSI_PROCESSOR_INTR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) &ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) readl(&ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) writel(set_rmask(CSR_SCSI_COMPLETION_INTR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) &ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) readl(&ha->reg->ctrl_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (qla4xxx_get_firmware_state(ha) == QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) DEBUG2(printk("scsi%ld: %s: Get firmware "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) "state -- state = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) __func__, ha->firmware_state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) /* F/W is running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) if (ha->firmware_state &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) FW_STATE_CONFIG_WAIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) DEBUG2(printk("scsi%ld: %s: Firmware "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) "in known state -- "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) "config and "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) "boot, state = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) ha->host_no, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) ha->firmware_state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) config_chip = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) soft_reset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) DEBUG2(printk("scsi%ld: %s: Firmware in "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) "unknown state -- resetting,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) " state = "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) "0x%x\n", ha->host_no, __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) ha->firmware_state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) DEBUG(printk("scsi%ld: %s: H/W initialization hasn't been "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) "started - resetting\n", ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) DEBUG(printk("scsi%ld: %s: Flags soft_rest=%d, config= %d\n ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) ha->host_no, __func__, soft_reset, config_chip));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) if (soft_reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) DEBUG(printk("scsi%ld: %s: Issue Soft Reset\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) status = qla4xxx_soft_reset(ha); /* NOTE: acquires drvr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) * lock again, but ok */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) if (status == QLA_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) DEBUG(printk("scsi%d: %s: Soft Reset failed!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) ql4xxx_unlock_drvr(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) config_chip = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) /* Reset clears the semaphore, so acquire again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) if (ql4xxx_lock_drvr_wait(ha) != QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) if (config_chip) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) if ((status = qla4xxx_config_nvram(ha)) == QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) status = qla4xxx_start_firmware_from_flash(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) ql4xxx_unlock_drvr(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) if (status == QLA_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) if (test_and_clear_bit(AF_GET_CRASH_RECORD, &ha->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) qla4xxx_get_crash_record(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) qla4xxx_init_rings(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) DEBUG(printk("scsi%ld: %s: Firmware has NOT started\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) ha->host_no, __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) * qla4xxx_free_ddb_index - Free DDBs reserved by firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) * @ha: pointer to adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) * Since firmware is not running in autoconnect mode the DDB indices should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) * be freed so that when login happens from user space there are free DDB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) * indices available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) void qla4xxx_free_ddb_index(struct scsi_qla_host *ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) int max_ddbs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) uint32_t idx = 0, next_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) uint32_t state = 0, conn_err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) MAX_DEV_DB_ENTRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) for (idx = 0; idx < max_ddbs; idx = next_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) &next_idx, &state, &conn_err,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) if (ret == QLA_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) next_idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) if (state == DDB_DS_NO_CONNECTION_ACTIVE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) state == DDB_DS_SESSION_FAILED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) "Freeing DDB index = 0x%x\n", idx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) ret = qla4xxx_clear_ddb_entry(ha, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (ret == QLA_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) ql4_printk(KERN_ERR, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) "Unable to clear DDB index = "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) "0x%x\n", idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) if (next_idx == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) * qla4xxx_initialize_adapter - initiailizes hba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) * @ha: Pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) * @is_reset: Is this init path or reset path
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) * This routine parforms all of the steps necessary to initialize the adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) int status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) ha->eeprom_cmd_data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) ql4_printk(KERN_INFO, ha, "Configuring PCI space...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) ha->isp_ops->pci_config(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) ha->isp_ops->disable_intrs(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) /* Initialize the Host adapter request/response queues and firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (ha->isp_ops->start_firmware(ha) == QLA_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) goto exit_init_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) * For ISP83XX, mailbox and IOCB interrupts are enabled separately.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) * Mailbox interrupts must be enabled prior to issuing any mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) * command in order to prevent the possibility of losing interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) * while switching from polling to interrupt mode. IOCB interrupts are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) * enabled via isp_ops->enable_intrs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) if (is_qla8032(ha) || is_qla8042(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) qla4_83xx_enable_mbox_intrs(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) if (qla4xxx_about_firmware(ha) == QLA_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) goto exit_init_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) if (ha->isp_ops->get_sys_info(ha) == QLA_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) goto exit_init_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) qla4xxx_init_local_data(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) status = qla4xxx_init_firmware(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) if (status == QLA_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) goto exit_init_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) if (is_reset == RESET_ADAPTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) qla4xxx_build_ddb_list(ha, is_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) set_bit(AF_ONLINE, &ha->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) exit_init_hba:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) DEBUG2(printk("scsi%ld: initialize adapter: %s\n", ha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) status == QLA_ERROR ? "FAILED" : "SUCCEEDED"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) struct ddb_entry *ddb_entry, uint32_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) uint32_t old_fw_ddb_device_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) int status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) "%s: DDB - old state = 0x%x, new state = 0x%x for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) "index [%d]\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) ddb_entry->fw_ddb_device_state, state, fw_ddb_index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) ddb_entry->fw_ddb_device_state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) switch (old_fw_ddb_device_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) case DDB_DS_LOGIN_IN_PROCESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) case DDB_DS_SESSION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) case DDB_DS_DISCOVERY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) qla4xxx_update_session_conn_param(ha, ddb_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) ddb_entry->unblock_sess(ddb_entry->sess);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) case DDB_DS_NO_CONNECTION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) iscsi_conn_login_event(ddb_entry->conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) ISCSI_CONN_STATE_FREE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) case DDB_DS_SESSION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) case DDB_DS_DISCOVERY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) * iscsi_session failure will cause userspace to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) * stop the connection which in turn would block the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) * iscsi_session and start relogin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) iscsi_session_failure(ddb_entry->sess->dd_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) ISCSI_ERR_CONN_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) case DDB_DS_NO_CONNECTION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) clear_bit(fw_ddb_index, ha->ddb_idx_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) case DDB_DS_SESSION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) case DDB_DS_DISCOVERY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) ddb_entry->unblock_sess(ddb_entry->sess);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) qla4xxx_update_session_conn_param(ha, ddb_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) iscsi_session_failure(ddb_entry->sess->dd_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) ISCSI_ERR_CONN_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Unknown Event\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) void qla4xxx_arm_relogin_timer(struct ddb_entry *ddb_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) * This triggers a relogin. After the relogin_timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) * expires, the relogin gets scheduled. We must wait a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) * minimum amount of time since receiving an 0x8014 AEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) * with failed device_state or a logout response before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) * we can issue another relogin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) * Firmware pads this timeout: (time2wait +1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) * Driver retry to login should be longer than F/W.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) * Otherwise F/W will fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) * set_ddb() mbx cmd with 0x4005 since it still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) * counting down its time2wait.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) atomic_set(&ddb_entry->relogin_timer, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) atomic_set(&ddb_entry->retry_relogin_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) ddb_entry->default_time2wait + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) struct ddb_entry *ddb_entry, uint32_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) uint32_t old_fw_ddb_device_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) int status = QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) old_fw_ddb_device_state = ddb_entry->fw_ddb_device_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) "%s: DDB - old state = 0x%x, new state = 0x%x for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) "index [%d]\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) ddb_entry->fw_ddb_device_state, state, fw_ddb_index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) ddb_entry->fw_ddb_device_state = state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) switch (old_fw_ddb_device_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) case DDB_DS_LOGIN_IN_PROCESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) case DDB_DS_NO_CONNECTION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) case DDB_DS_SESSION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) ddb_entry->unblock_sess(ddb_entry->sess);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) iscsi_block_session(ddb_entry->sess);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) if (!test_bit(DF_RELOGIN, &ddb_entry->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) qla4xxx_arm_relogin_timer(ddb_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) case DDB_DS_SESSION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) iscsi_block_session(ddb_entry->sess);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) if (!test_bit(DF_RELOGIN, &ddb_entry->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) qla4xxx_arm_relogin_timer(ddb_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) case DDB_DS_SESSION_ACTIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) ddb_entry->unblock_sess(ddb_entry->sess);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) case DDB_DS_SESSION_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) if (!test_bit(DF_RELOGIN, &ddb_entry->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) qla4xxx_arm_relogin_timer(ddb_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) status = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Unknown Event\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) __func__));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) * qla4xxx_process_ddb_changed - process ddb state change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) * @ha: Pointer to host adapter structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) * @fw_ddb_index: Firmware's device database index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) * @state: Device state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) * @conn_err: Unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) * This routine processes a Decive Database Changed AEN Event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) uint32_t fw_ddb_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) uint32_t state, uint32_t conn_err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) struct ddb_entry *ddb_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) /* check for out of range index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) if (fw_ddb_index >= MAX_DDB_ENTRIES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) goto exit_ddb_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) /* Get the corresponging ddb entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) /* Device does not currently exist in our database. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) if (ddb_entry == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) __func__, fw_ddb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) if (state == DDB_DS_NO_CONNECTION_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) clear_bit(fw_ddb_index, ha->ddb_idx_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) goto exit_ddb_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) ddb_entry->ddb_change(ha, fw_ddb_index, ddb_entry, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) exit_ddb_event:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) return QLA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) * qla4xxx_login_flash_ddb - Login to target (DDB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) * @cls_session: Pointer to the session to login
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) * This routine logins to the target.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) * Issues setddb and conn open mbx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) void qla4xxx_login_flash_ddb(struct iscsi_cls_session *cls_session)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) struct iscsi_session *sess;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) struct ddb_entry *ddb_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) struct scsi_qla_host *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) struct dev_db_entry *fw_ddb_entry = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) dma_addr_t fw_ddb_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) uint32_t mbx_sts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) sess = cls_session->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) ddb_entry = sess->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) ha = ddb_entry->ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) if (!test_bit(AF_LINK_UP, &ha->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if (ddb_entry->ddb_type != FLASH_DDB) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) DEBUG2(ql4_printk(KERN_INFO, ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) "Skipping login to non FLASH DB"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) goto exit_login;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) &fw_ddb_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) if (fw_ddb_entry == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) goto exit_login;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) if (ddb_entry->fw_ddb_index == INVALID_ENTRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) ret = qla4xxx_get_ddb_index(ha, &ddb_entry->fw_ddb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) if (ret == QLA_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) goto exit_login;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) ha->tot_ddbs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) memcpy(fw_ddb_entry, &ddb_entry->fw_ddb_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) sizeof(struct dev_db_entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) ddb_entry->sess->target_id = ddb_entry->fw_ddb_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) ret = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) fw_ddb_dma, &mbx_sts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) if (ret == QLA_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) DEBUG2(ql4_printk(KERN_ERR, ha, "Set DDB failed\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) goto exit_login;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) ddb_entry->fw_ddb_device_state = DDB_DS_LOGIN_IN_PROCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) ret = qla4xxx_conn_open(ha, ddb_entry->fw_ddb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) if (ret == QLA_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) ql4_printk(KERN_ERR, ha, "%s: Login failed: %s\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) sess->targetname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) goto exit_login;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) exit_login:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) if (fw_ddb_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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