^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * QLogic Fibre Channel HBA Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2003-2014 QLogic Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include "qla_def.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include "qla_target.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/t10-pi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <scsi/scsi_tcq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <scsi/scsi_bsg_fc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <scsi/scsi_eh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <scsi/fc/fc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/nvme-fc-driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) sts_entry_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static void qla27xx_process_purex_fpin(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct purex_item *item);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static struct purex_item *qla24xx_alloc_purex_item(scsi_qla_host_t *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) uint16_t size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static struct purex_item *qla24xx_copy_std_pkt(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void *pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static struct purex_item *qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void **pkt, struct rsp_que **rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) qla27xx_process_purex_fpin(struct scsi_qla_host *vha, struct purex_item *item)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void *pkt = &item->iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) uint16_t pkt_size = item->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) "%s: Enter\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) "-------- ELS REQ -------\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x508f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) pkt, pkt_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) const char *const port_state_str[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "Unknown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) "UNCONFIGURED",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) "DEAD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) "LOST",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) "ONLINE"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) qla24xx_process_abts(struct scsi_qla_host *vha, struct purex_item *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct abts_entry_24xx *abts =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) (struct abts_entry_24xx *)&pkt->iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct els_entry_24xx *rsp_els;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct abts_entry_24xx *abts_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) dma_addr_t dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) uint32_t fctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ql_log(ql_log_warn, vha, 0x0287,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) abts->seq_id, abts->seq_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) "-------- ABTS RCV -------\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) (uint8_t *)abts, sizeof(*abts));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (!rsp_els) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ql_log(ql_log_warn, vha, 0x0287,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) "Failed allocate dma buffer ABTS/ELS RSP.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* terminate exchange */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) rsp_els->entry_type = ELS_IOCB_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) rsp_els->entry_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) rsp_els->nport_handle = cpu_to_le16(~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) rsp_els->control_flags = cpu_to_le16(EPD_RX_XCHG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ql_dbg(ql_dbg_init, vha, 0x0283,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) "Sending ELS Response to terminate exchange %#x...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) abts->rx_xch_addr_to_abort);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) "-------- ELS RSP -------\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) (uint8_t *)rsp_els, sizeof(*rsp_els));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (rval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ql_log(ql_log_warn, vha, 0x0288,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) "%s: iocb failed to execute -> %x\n", __func__, rval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) } else if (rsp_els->comp_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ql_log(ql_log_warn, vha, 0x0289,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) __func__, rsp_els->comp_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) rsp_els->error_subcode_1, rsp_els->error_subcode_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ql_dbg(ql_dbg_init, vha, 0x028a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) "%s: abort exchange done.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* send ABTS response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) abts_rsp = (void *)rsp_els;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) memset(abts_rsp, 0, sizeof(*abts_rsp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) abts_rsp->entry_type = ABTS_RSP_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) abts_rsp->entry_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) abts_rsp->nport_handle = abts->nport_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) abts_rsp->vp_idx = abts->vp_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) abts_rsp->sof_type = abts->sof_type & 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) abts_rsp->rx_xch_addr = abts->rx_xch_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) abts_rsp->d_id[0] = abts->s_id[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) abts_rsp->d_id[1] = abts->s_id[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) abts_rsp->d_id[2] = abts->s_id[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) abts_rsp->s_id[0] = abts->d_id[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) abts_rsp->s_id[1] = abts->d_id[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) abts_rsp->s_id[2] = abts->d_id[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) abts_rsp->cs_ctl = abts->cs_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* include flipping bit23 in fctl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) fctl = ~(abts->f_ctl[2] | 0x7F) << 16 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) abts_rsp->f_ctl[0] = fctl >> 0 & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) abts_rsp->f_ctl[1] = fctl >> 8 & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) abts_rsp->f_ctl[2] = fctl >> 16 & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) abts_rsp->type = FC_TYPE_BLD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) abts_rsp->rx_id = abts->rx_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) abts_rsp->ox_id = abts->ox_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) abts_rsp->payload.ba_acc.high_seq_cnt = cpu_to_le16(~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ql_dbg(ql_dbg_init, vha, 0x028b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) "Sending BA ACC response to ABTS %#x...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) abts->rx_xch_addr_to_abort);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) "-------- ELS RSP -------\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) (uint8_t *)abts_rsp, sizeof(*abts_rsp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (rval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ql_log(ql_log_warn, vha, 0x028c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) "%s: iocb failed to execute -> %x\n", __func__, rval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) } else if (abts_rsp->comp_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ql_log(ql_log_warn, vha, 0x028d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) __func__, abts_rsp->comp_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) abts_rsp->payload.error.subcode1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) abts_rsp->payload.error.subcode2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ql_dbg(ql_dbg_init, vha, 0x028ea,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) "%s: done.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * @irq: interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * @dev_id: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * Called by system whenever the host adapter generates an interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * Returns handled flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) qla2100_intr_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) scsi_qla_host_t *vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct qla_hw_data *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct device_reg_2xxx __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned long iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) uint16_t hccr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) uint16_t mb[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct rsp_que *rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) rsp = (struct rsp_que *) dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (!rsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ql_log(ql_log_info, NULL, 0x505d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) "%s: NULL response queue pointer.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return (IRQ_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) ha = rsp->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) reg = &ha->iobase->isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) for (iter = 50; iter--; ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) hccr = rd_reg_word(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (qla2x00_check_reg16_for_disconnect(vha, hccr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (hccr & HCCR_RISC_PAUSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (pci_channel_offline(ha->pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * Issue a "HARD" reset in order for the RISC interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * bit to be cleared. Schedule a big hammer to get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * out of the RISC PAUSED state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) wrt_reg_word(®->hccr, HCCR_RESET_RISC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) rd_reg_word(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ha->isp_ops->fw_dump(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) } else if ((rd_reg_word(®->istatus) & ISR_RISC_INT) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (rd_reg_word(®->semaphore) & BIT_0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) rd_reg_word(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* Get mailbox data. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) mb[0] = RD_MAILBOX_REG(ha, reg, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (mb[0] > 0x3fff && mb[0] < 0x8000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) qla2x00_mbx_completion(vha, mb[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) status |= MBX_INTERRUPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) mb[1] = RD_MAILBOX_REG(ha, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) mb[2] = RD_MAILBOX_REG(ha, reg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) mb[3] = RD_MAILBOX_REG(ha, reg, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) qla2x00_async_event(vha, rsp, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /*EMPTY*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ql_dbg(ql_dbg_async, vha, 0x5025,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) "Unrecognized interrupt type (%d).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) mb[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /* Release mailbox registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) wrt_reg_word(®->semaphore, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) rd_reg_word(®->semaphore);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) qla2x00_process_response_queue(rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) rd_reg_word(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) qla2x00_handle_mbx_completion(ha, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return (IRQ_HANDLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /* Check for PCI disconnection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * Schedule this (only once) on the default system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * workqueue so that all the adapter workqueues and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * DPC thread can be shutdown cleanly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) schedule_work(&vha->hw->board_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * @irq: interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * @dev_id: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * Called by system whenever the host adapter generates an interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * Returns handled flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) qla2300_intr_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) scsi_qla_host_t *vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct device_reg_2xxx __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) unsigned long iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) uint32_t stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) uint16_t hccr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) uint16_t mb[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct rsp_que *rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct qla_hw_data *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) rsp = (struct rsp_que *) dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (!rsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ql_log(ql_log_info, NULL, 0x5058,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) "%s: NULL response queue pointer.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return (IRQ_NONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) ha = rsp->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) reg = &ha->iobase->isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) for (iter = 50; iter--; ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) stat = rd_reg_dword(®->u.isp2300.host_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (qla2x00_check_reg32_for_disconnect(vha, stat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (stat & HSR_RISC_PAUSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (unlikely(pci_channel_offline(ha->pdev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) hccr = rd_reg_word(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) ql_log(ql_log_warn, vha, 0x5026,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) "Parity error -- HCCR=%x, Dumping "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) "firmware.\n", hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ql_log(ql_log_warn, vha, 0x5027,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) "RISC paused -- HCCR=%x, Dumping "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) "firmware.\n", hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * Issue a "HARD" reset in order for the RISC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * interrupt bit to be cleared. Schedule a big
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * hammer to get out of the RISC PAUSED state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) wrt_reg_word(®->hccr, HCCR_RESET_RISC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) rd_reg_word(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ha->isp_ops->fw_dump(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) } else if ((stat & HSR_RISC_INT) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) switch (stat & 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) case 0x1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) case 0x2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) case 0x10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) case 0x11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) qla2x00_mbx_completion(vha, MSW(stat));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) status |= MBX_INTERRUPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* Release mailbox registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) wrt_reg_word(®->semaphore, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case 0x12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) mb[0] = MSW(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) mb[1] = RD_MAILBOX_REG(ha, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) mb[2] = RD_MAILBOX_REG(ha, reg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) mb[3] = RD_MAILBOX_REG(ha, reg, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) qla2x00_async_event(vha, rsp, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) case 0x13:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) qla2x00_process_response_queue(rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) case 0x15:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) mb[0] = MBA_CMPLT_1_16BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) mb[1] = MSW(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) qla2x00_async_event(vha, rsp, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) case 0x16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) mb[0] = MBA_SCSI_COMPLETION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) mb[1] = MSW(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) mb[2] = RD_MAILBOX_REG(ha, reg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) qla2x00_async_event(vha, rsp, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) ql_dbg(ql_dbg_async, vha, 0x5028,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) "Unrecognized interrupt type (%d).\n", stat & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) rd_reg_word_relaxed(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) qla2x00_handle_mbx_completion(ha, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return (IRQ_HANDLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * qla2x00_mbx_completion() - Process mailbox command completions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * @mb0: Mailbox0 register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) uint16_t cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) uint32_t mboxes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) __le16 __iomem *wptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* Read all mbox registers? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) WARN_ON_ONCE(ha->mbx_count > 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) mboxes = (1ULL << ha->mbx_count) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (!ha->mcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) mboxes = ha->mcp->in_mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /* Load return mailbox registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) ha->flags.mbox_int = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ha->mailbox_out[0] = mb0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) mboxes >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) wptr = MAILBOX_REG(ha, reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) for (cnt = 1; cnt < ha->mbx_count; cnt++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (IS_QLA2200(ha) && cnt == 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) wptr = MAILBOX_REG(ha, reg, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) else if (mboxes & BIT_0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) ha->mailbox_out[cnt] = rd_reg_word(wptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) wptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) mboxes >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static char *event[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) { "Complete", "Request Notification", "Time Extension" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) __le16 __iomem *wptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* Seed data -- mailbox1 -> mailbox7. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) wptr = ®24->mailbox1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) else if (IS_QLA8044(vha->hw))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) wptr = ®82->mailbox_out[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) mb[cnt] = rd_reg_word(wptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) ql_dbg(ql_dbg_async, vha, 0x5021,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) "Inter-Driver Communication %s -- "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) "%04x %04x %04x %04x %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) mb[4], mb[5], mb[6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) switch (aen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /* Handle IDC Error completion case. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) case MBA_IDC_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (mb[1] >> 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) vha->hw->flags.idc_compl_status = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) complete(&vha->hw->dcbx_comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) case MBA_IDC_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /* Acknowledgement needed? [Notify && non-zero timeout]. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) timeout = (descr >> 8) & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) ql_dbg(ql_dbg_async, vha, 0x5022,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) vha->host_no, event[aen & 0xff], timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (!timeout)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) rval = qla2x00_post_idc_ack_work(vha, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (rval != QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) ql_log(ql_log_warn, vha, 0x5023,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) "IDC failed to post ACK.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) case MBA_IDC_TIME_EXT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) vha->hw->idc_extend_tmo = descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) ql_dbg(ql_dbg_async, vha, 0x5087,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) "%lu Inter-Driver Communication %s -- "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) "Extend timeout by=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #define LS_UNKNOWN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) const char *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static const char *const link_speeds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) "1", "2", "?", "4", "8", "16", "32", "10"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (IS_QLA2100(ha) || IS_QLA2200(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return link_speeds[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) else if (speed == 0x13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) return link_speeds[QLA_LAST_SPEED];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) else if (speed < QLA_LAST_SPEED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return link_speeds[speed];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return link_speeds[LS_UNKNOWN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * 8200 AEN Interpretation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * mb[0] = AEN code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * mb[1] = AEN Reason code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * mb[2] = LSW of Peg-Halt Status-1 Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * mb[6] = MSW of Peg-Halt Status-1 Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * mb[3] = LSW of Peg-Halt Status-2 register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * mb[7] = MSW of Peg-Halt Status-2 register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * mb[4] = IDC Device-State Register value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * mb[5] = IDC Driver-Presence Register value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) mb[0], mb[1], mb[2], mb[6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) IDC_HEARTBEAT_FAILURE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) ha->flags.nic_core_hung = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) ql_log(ql_log_warn, vha, 0x5060,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) "83XX: F/W Error Reported: Check if reset required.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) uint32_t protocol_engine_id, fw_err_code, err_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * IDC_PEG_HALT_STATUS_CHANGE interpretation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * - PEG-Halt Status-1 Register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * (LSW = mb[2], MSW = mb[6])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * Bits 0-7 = protocol-engine ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * Bits 8-28 = f/w error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * Bits 29-31 = Error-level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * Error-level 0x1 = Non-Fatal error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * Error-level 0x2 = Recoverable Fatal error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * Error-level 0x4 = UnRecoverable Fatal error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * - PEG-Halt Status-2 Register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * (LSW = mb[3], MSW = mb[7])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) protocol_engine_id = (mb[2] & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) fw_err_code = (((mb[2] & 0xff00) >> 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) ((mb[6] & 0x1fff) << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) err_level = ((mb[6] & 0xe000) >> 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) "Register: protocol_engine_id=0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) "fw_err_code=0x%x err_level=0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) protocol_engine_id, fw_err_code, err_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) "Register: 0x%x%x.\n", mb[7], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) if (err_level == ERR_LEVEL_NON_FATAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) ql_log(ql_log_warn, vha, 0x5063,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) "Not a fatal error, f/w has recovered itself.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) ql_log(ql_log_fatal, vha, 0x5064,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) "Recoverable Fatal error: Chip reset "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) "required.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) qla83xx_schedule_work(vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) QLA83XX_NIC_CORE_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) ql_log(ql_log_fatal, vha, 0x5065,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) "Unrecoverable Fatal error: Set FAILED "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) "state, reboot required.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) qla83xx_schedule_work(vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) QLA83XX_NIC_CORE_UNRECOVERABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) uint16_t peg_fw_state, nw_interface_link_up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) uint16_t nw_interface_signal_detect, sfp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) uint16_t htbt_counter, htbt_monitor_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) uint16_t sfp_additional_info, sfp_multirate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) uint16_t sfp_tx_fault, link_speed, dcbx_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * IDC_NIC_FW_REPORTED_FAILURE interpretation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) * - PEG-to-FC Status Register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) * (LSW = mb[2], MSW = mb[6])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) * Bits 0-7 = Peg-Firmware state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) * Bit 8 = N/W Interface Link-up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) * Bit 9 = N/W Interface signal detected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) * Bits 10-11 = SFP Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) * SFP Status 0x0 = SFP+ transceiver not expected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * SFP Status 0x1 = SFP+ transceiver not present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * SFP Status 0x2 = SFP+ transceiver invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) * SFP Status 0x3 = SFP+ transceiver present and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * Bits 12-14 = Heartbeat Counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * Bit 15 = Heartbeat Monitor Enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * Bits 16-17 = SFP Additional Info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * SFP info 0x0 = Unregocnized transceiver for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * SFP info 0x1 = SFP+ brand validation failed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * SFP info 0x2 = SFP+ speed validation failed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * SFP info 0x3 = SFP+ access error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * Bit 18 = SFP Multirate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * Bit 19 = SFP Tx Fault
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * Bits 20-22 = Link Speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * Bits 23-27 = Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * Bits 28-30 = DCBX Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * DCBX Status 0x0 = DCBX Disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * DCBX Status 0x1 = DCBX Enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) * DCBX Status 0x2 = DCBX Exchange error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) * Bit 31 = Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) peg_fw_state = (mb[2] & 0x00ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) sfp_status = ((mb[2] & 0x0c00) >> 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) htbt_counter = ((mb[2] & 0x7000) >> 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) sfp_additional_info = (mb[6] & 0x0003);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) sfp_multirate = ((mb[6] & 0x0004) >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) link_speed = ((mb[6] & 0x0070) >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) dcbx_status = ((mb[6] & 0x7000) >> 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) ql_log(ql_log_warn, vha, 0x5066,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) "Peg-to-Fc Status Register:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) "nw_interface_signal_detect=0x%x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) "\nsfp_statis=0x%x.\n ", peg_fw_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) nw_interface_link_up, nw_interface_signal_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) sfp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) ql_log(ql_log_warn, vha, 0x5067,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) htbt_counter, htbt_monitor_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) sfp_additional_info, sfp_multirate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) ql_log(ql_log_warn, vha, 0x5068,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) "sfp_tx_fault=0x%x, link_state=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) dcbx_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (mb[1] & IDC_HEARTBEAT_FAILURE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) ql_log(ql_log_warn, vha, 0x5069,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) "Heartbeat Failure encountered, chip reset "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) "required.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) ql_log(ql_log_info, vha, 0x506a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) "IDC Device-State changed = 0x%x.\n", mb[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) if (ha->flags.nic_core_reset_owner)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) qla83xx_schedule_work(vha, MBA_IDC_AEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) scsi_qla_host_t *vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) uint32_t vp_did;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (!ha->num_vhosts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) spin_lock_irqsave(&ha->vport_slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) list_for_each_entry(vp, &ha->vp_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) vp_did = vp->d_id.b24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (vp_did == rscn_entry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) spin_unlock_irqrestore(&ha->vport_slock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) fc_port_t *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) fc_port_t *f, *tf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) f = tf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (f->loop_id == loop_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) return f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) fc_port_t *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) fc_port_t *f, *tf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) f = tf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (incl_deleted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) return f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) else if (f->deleted == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) return f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) fc_port_t *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) u8 incl_deleted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) fc_port_t *f, *tf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) f = tf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) if (f->d_id.b24 == id->b24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) if (incl_deleted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) return f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) else if (f->deleted == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) return f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) /* Shall be called only on supported adapters. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) bool reset_isp_needed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) ql_log(ql_log_warn, vha, 0x02f0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) "MPI Heartbeat stop. MPI reset is%s needed. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) "MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) mb[1] & BIT_8 ? "" : " not",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) mb[0], mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if ((mb[1] & BIT_8) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) ql_log(ql_log_warn, vha, 0x02f1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) "MPI Heartbeat stop. FW dump needed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (ql2xfulldump_on_mpifail) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) ha->isp_ops->fw_dump(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) reset_isp_needed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) ha->isp_ops->mpi_fw_dump(vha, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (reset_isp_needed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) vha->hw->flags.fw_init_done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) qla2xxx_wake_dpc(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) static struct purex_item *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) qla24xx_alloc_purex_item(scsi_qla_host_t *vha, uint16_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct purex_item *item = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) uint8_t item_hdr_size = sizeof(*item);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (size > QLA_DEFAULT_PAYLOAD_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) item = kzalloc(item_hdr_size +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) (size - QLA_DEFAULT_PAYLOAD_SIZE), GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (atomic_inc_return(&vha->default_item.in_use) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) item = &vha->default_item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) goto initialize_purex_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) item = kzalloc(item_hdr_size, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) if (!item) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) ql_log(ql_log_warn, vha, 0x5092,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ">> Failed allocate purex list item.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) initialize_purex_header:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) item->vha = vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) item->size = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) return item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) qla24xx_queue_purex_item(scsi_qla_host_t *vha, struct purex_item *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) void (*process_item)(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) struct purex_item *pkt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) struct purex_list *list = &vha->purex_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) ulong flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) pkt->process_item = process_item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) spin_lock_irqsave(&list->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) list_add_tail(&pkt->list, &list->head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) spin_unlock_irqrestore(&list->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) * qla24xx_copy_std_pkt() - Copy over purex ELS which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) * contained in a single IOCB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) * purex packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) * @pkt: ELS packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) static struct purex_item
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, void *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) struct purex_item *item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) item = qla24xx_alloc_purex_item(vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) QLA_DEFAULT_PAYLOAD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) if (!item)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) return item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) memcpy(&item->iocb, pkt, sizeof(item->iocb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) return item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * qla27xx_copy_fpin_pkt() - Copy over fpin packets that can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * span over multiple IOCBs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) * @pkt: ELS packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) * @rsp: Response queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) static struct purex_item *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, void **pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) struct rsp_que **rsp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) struct purex_entry_24xx *purex = *pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) struct rsp_que *rsp_q = *rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) sts_cont_entry_t *new_pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) uint16_t buffer_copy_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) uint16_t entry_count, entry_count_remaining;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct purex_item *item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) void *fpin_pkt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) - PURX_ELS_HEADER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) pending_bytes = total_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) entry_count = entry_count_remaining = purex->entry_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) no_bytes = (pending_bytes > sizeof(purex->els_frame_payload)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) sizeof(purex->els_frame_payload) : pending_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) ql_log(ql_log_info, vha, 0x509a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) "FPIN ELS, frame_size 0x%x, entry count %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) total_bytes, entry_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) item = qla24xx_alloc_purex_item(vha, total_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (!item)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) return item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) fpin_pkt = &item->iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) memcpy(fpin_pkt, &purex->els_frame_payload[0], no_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) buffer_copy_offset += no_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) pending_bytes -= no_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) --entry_count_remaining;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) ((response_t *)purex)->signature = RESPONSE_PROCESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) while ((total_bytes > 0) && (entry_count_remaining > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) if (rsp_q->ring_ptr->signature == RESPONSE_PROCESSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) ql_dbg(ql_dbg_async, vha, 0x5084,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) "Ran out of IOCBs, partial data 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) buffer_copy_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) *pkt = new_pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) if (new_pkt->entry_type != STATUS_CONT_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) ql_log(ql_log_warn, vha, 0x507a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) "Unexpected IOCB type, partial data 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) buffer_copy_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) rsp_q->ring_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) if (rsp_q->ring_index == rsp_q->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) rsp_q->ring_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) rsp_q->ring_ptr = rsp_q->ring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) rsp_q->ring_ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) no_bytes = (pending_bytes > sizeof(new_pkt->data)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) sizeof(new_pkt->data) : pending_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if ((buffer_copy_offset + no_bytes) <= total_bytes) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) memcpy(((uint8_t *)fpin_pkt +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) buffer_copy_offset), new_pkt->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) no_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) buffer_copy_offset += no_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) pending_bytes -= no_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) --entry_count_remaining;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) ql_log(ql_log_warn, vha, 0x5044,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) "Attempt to copy more that we got, optimizing..%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) buffer_copy_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) memcpy(((uint8_t *)fpin_pkt +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) buffer_copy_offset), new_pkt->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) total_bytes - buffer_copy_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) ((response_t *)new_pkt)->signature = RESPONSE_PROCESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) if (pending_bytes != 0 || entry_count_remaining != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) ql_log(ql_log_fatal, vha, 0x508b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) "Dropping partial FPIN, underrun bytes = 0x%x, entry cnts 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) total_bytes, entry_count_remaining);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) qla24xx_free_purex_item(item);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) } while (entry_count_remaining > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) host_to_fcp_swap((uint8_t *)&item->iocb, total_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) return item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) * qla2x00_async_event() - Process aynchronous events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) * @rsp: response queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) * @mb: Mailbox registers (0 - 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) uint16_t handle_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) uint16_t cnt, mbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) uint32_t handles[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) uint32_t rscn_entry, host_pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) fc_port_t *fcport = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) if (!vha->hw->flags.fw_started)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) /* Setup to process RIO completion. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) handle_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) if (IS_CNA_CAPABLE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) goto skip_rio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) switch (mb[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) case MBA_SCSI_COMPLETION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) handles[0] = make_handle(mb[2], mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) handle_cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) case MBA_CMPLT_1_16BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) handles[0] = mb[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) handle_cnt = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) mb[0] = MBA_SCSI_COMPLETION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) case MBA_CMPLT_2_16BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) handles[0] = mb[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) handles[1] = mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) handle_cnt = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) mb[0] = MBA_SCSI_COMPLETION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) case MBA_CMPLT_3_16BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) handles[0] = mb[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) handles[1] = mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) handles[2] = mb[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) handle_cnt = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) mb[0] = MBA_SCSI_COMPLETION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) case MBA_CMPLT_4_16BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) handles[0] = mb[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) handles[1] = mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) handles[2] = mb[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) handle_cnt = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) mb[0] = MBA_SCSI_COMPLETION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) case MBA_CMPLT_5_16BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) handles[0] = mb[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) handles[1] = mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) handles[2] = mb[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) handle_cnt = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) mb[0] = MBA_SCSI_COMPLETION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) case MBA_CMPLT_2_32BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) handles[0] = make_handle(mb[2], mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) handles[1] = make_handle(RD_MAILBOX_REG(ha, reg, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) RD_MAILBOX_REG(ha, reg, 6));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) handle_cnt = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) mb[0] = MBA_SCSI_COMPLETION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) skip_rio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) switch (mb[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) case MBA_SCSI_COMPLETION: /* Fast Post */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (!vha->flags.online)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) for (cnt = 0; cnt < handle_cnt; cnt++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) qla2x00_process_completed_request(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) handles[cnt]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) case MBA_RESET: /* Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) ql_dbg(ql_dbg_async, vha, 0x5002,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) "Asynchronous RESET.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) case MBA_SYSTEM_ERR: /* System Error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) mbx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) u16 m[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) m[0] = rd_reg_word(®24->mailbox4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) m[1] = rd_reg_word(®24->mailbox5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) m[2] = rd_reg_word(®24->mailbox6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) mbx = m[3] = rd_reg_word(®24->mailbox7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) ql_log(ql_log_warn, vha, 0x5003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) ql_log(ql_log_warn, vha, 0x5003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) if ((IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) rd_reg_word(®24->mailbox7) & BIT_8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) ha->isp_ops->mpi_fw_dump(vha, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) ha->isp_ops->fw_dump(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) ha->flags.fw_init_done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) QLA_FW_STOPPED(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) if (IS_FWI2_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) if (mb[1] == 0 && mb[2] == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) ql_log(ql_log_fatal, vha, 0x5004,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) "Unrecoverable Hardware Error: adapter "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) "marked OFFLINE!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) vha->flags.online = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) vha->device_flags |= DFLG_DEV_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) /* Check to see if MPI timeout occurred */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) if ((mbx & MBX_3) && (ha->port_no == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) set_bit(MPI_RESET_NEEDED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) } else if (mb[1] == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) ql_log(ql_log_fatal, vha, 0x5005,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) "Unrecoverable Hardware Error: adapter marked "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) "OFFLINE!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) vha->flags.online = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) vha->device_flags |= DFLG_DEV_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) ql_log(ql_log_warn, vha, 0x5006,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) "ISP Request Transfer Error (%x).\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) ql_log(ql_log_warn, vha, 0x5007,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) "ISP Response Transfer Error (%x).\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) ql_dbg(ql_dbg_async, vha, 0x5008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) case MBA_LOOP_INIT_ERR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) ql_log(ql_log_warn, vha, 0x5090,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) "LOOP INIT ERROR (%x).\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) ha->flags.lip_ae = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) ql_dbg(ql_dbg_async, vha, 0x5009,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) "LIP occurred (%x).\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) atomic_set(&vha->loop_state, LOOP_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) qla2x00_mark_all_devices_lost(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) if (vha->vp_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) atomic_set(&vha->vp_state, VP_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) vha->flags.management_server_logged_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) case MBA_LOOP_UP: /* Loop Up Event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) if (IS_QLA2100(ha) || IS_QLA2200(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) ha->link_data_rate = PORT_SPEED_1GB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) ha->link_data_rate = mb[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) ql_log(ql_log_info, vha, 0x500a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) "LOOP UP detected (%s Gbps).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) qla2x00_get_link_speed_str(ha, ha->link_data_rate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) if (mb[2] & BIT_0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) ql_log(ql_log_info, vha, 0x11a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) "FEC=enabled (link up).\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) vha->flags.management_server_logged_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) case MBA_LOOP_DOWN: /* Loop Down Event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) SAVE_TOPO(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) ha->flags.lip_ae = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) ha->current_topology = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) ? rd_reg_word(®24->mailbox4) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) mbx = (IS_P3P_TYPE(ha)) ? rd_reg_word(®82->mailbox_out[4])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) : mbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) ql_log(ql_log_info, vha, 0x500b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) "LOOP DOWN detected (%x %x %x %x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) mb[1], mb[2], mb[3], mbx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) atomic_set(&vha->loop_state, LOOP_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) * In case of loop down, restore WWPN from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) * NVRAM in case of FA-WWPN capable ISP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) * Restore for Physical Port only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) if (!vha->vp_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) if (ha->flags.fawwpn_enabled &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) (ha->current_topology == ISP_CFG_F)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) void *wwpn = ha->init_cb->port_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) memcpy(vha->port_name, wwpn, WWN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) fc_host_port_name(vha->host) =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) wwn_to_u64(vha->port_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) ql_dbg(ql_dbg_init + ql_dbg_verbose,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) vha, 0x00d8, "LOOP DOWN detected,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) "restore WWPN %016llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) wwn_to_u64(vha->port_name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) clear_bit(VP_CONFIG_OK, &vha->vp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) vha->device_flags |= DFLG_NO_CABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) qla2x00_mark_all_devices_lost(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) if (vha->vp_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) atomic_set(&vha->vp_state, VP_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) vha->flags.management_server_logged_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) ha->link_data_rate = PORT_SPEED_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) case MBA_LIP_RESET: /* LIP reset occurred */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) ql_dbg(ql_dbg_async, vha, 0x500c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) "LIP reset occurred (%x).\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) atomic_set(&vha->loop_state, LOOP_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) qla2x00_mark_all_devices_lost(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) if (vha->vp_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) atomic_set(&vha->vp_state, VP_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) ha->operating_mode = LOOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) vha->flags.management_server_logged_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) /* case MBA_DCBX_COMPLETE: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) case MBA_POINT_TO_POINT: /* Point-to-Point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) ha->flags.lip_ae = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) if (IS_QLA2100(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) if (IS_CNA_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) ql_dbg(ql_dbg_async, vha, 0x500d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) "DCBX Completed -- %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) if (ha->notify_dcbx_comp && !vha->vp_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) complete(&ha->dcbx_comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) ql_dbg(ql_dbg_async, vha, 0x500e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) "Asynchronous P2P MODE received.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) * Until there's a transition from loop down to loop up, treat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) * this as loop down only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) atomic_set(&vha->loop_state, LOOP_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) if (!atomic_read(&vha->loop_down_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) atomic_set(&vha->loop_down_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) LOOP_DOWN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) if (!N2N_TOPO(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) qla2x00_mark_all_devices_lost(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) if (vha->vp_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) atomic_set(&vha->vp_state, VP_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) vha->flags.management_server_logged_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) if (IS_QLA2100(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) ql_dbg(ql_dbg_async, vha, 0x500f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) "Configuration change detected: value=%x.\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) atomic_set(&vha->loop_state, LOOP_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) if (!atomic_read(&vha->loop_down_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) atomic_set(&vha->loop_down_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) LOOP_DOWN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) qla2x00_mark_all_devices_lost(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) if (vha->vp_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) atomic_set(&vha->vp_state, VP_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) case MBA_PORT_UPDATE: /* Port database update */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) * Handle only global and vn-port update events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) * Relevant inputs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) * mb[1] = N_Port handle of changed port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) * OR 0xffff for global event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) * mb[2] = New login state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * 7 = Port logged out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) * mb[3] = LSB is vp_idx, 0xff = all vps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) * Skip processing if:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) * Event is global, vp_idx is NOT all vps,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) * vp_idx does not match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) * Event is not global, vp_idx does not match
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) if (IS_QLA2XXX_MIDTYPE(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) if (mb[2] == 0x7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) ql_dbg(ql_dbg_async, vha, 0x5010,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) "Port %s %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) mb[1] == 0xffff ? "unavailable" : "logout",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) if (mb[1] == 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) goto global_port_update;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) if (mb[1] == NPH_SNS_LID(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) /* use handle_cnt for loop id/nport handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) if (IS_FWI2_CAPABLE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) handle_cnt = NPH_SNS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) handle_cnt = SIMPLE_NAME_SERVER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) if (mb[1] == handle_cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) /* Port logout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) if (!fcport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) if (atomic_read(&fcport->state) != FCS_ONLINE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) ql_dbg(ql_dbg_async, vha, 0x508a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) "Marking port lost loopid=%04x portid=%06x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) fcport->loop_id, fcport->d_id.b24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) if (qla_ini_mode_enabled(vha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) fcport->logout_on_delete = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) qlt_schedule_sess_for_deletion(fcport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) global_port_update:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) atomic_set(&vha->loop_state, LOOP_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) atomic_set(&vha->loop_down_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) LOOP_DOWN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) vha->device_flags |= DFLG_NO_CABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) qla2x00_mark_all_devices_lost(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) if (vha->vp_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) atomic_set(&vha->vp_state, VP_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) fc_vport_set_state(vha->fc_vport,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) FC_VPORT_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) qla2x00_mark_all_devices_lost(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) vha->flags.management_server_logged_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) ha->link_data_rate = PORT_SPEED_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) * event etc. earlier indicating loop is down) then process
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) * it. Otherwise ignore it and Wait for RSCN to come in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) atomic_set(&vha->loop_down_timer, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) !ha->flags.n2n_ae &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) atomic_read(&vha->loop_state) != LOOP_DEAD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) ql_dbg(ql_dbg_async, vha, 0x5011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) ql_dbg(ql_dbg_async, vha, 0x5012,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) "Port database changed %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) * Mark all devices as missing so we will login again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) atomic_set(&vha->loop_state, LOOP_UP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) vha->scan.scan_retry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) set_bit(VP_CONFIG_OK, &vha->vp_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) case MBA_RSCN_UPDATE: /* State Change Registration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) /* Check if the Vport has issued a SCR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) /* Only handle SCNs for our Vport index. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) ql_dbg(ql_dbg_async, vha, 0x5013,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) "RSCN database changed -- %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) | vha->d_id.b.al_pa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) if (rscn_entry == host_pid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) ql_dbg(ql_dbg_async, vha, 0x5014,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) "Ignoring RSCN update to local host "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) "port ID (%06x).\n", host_pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) /* Ignore reserved bits from RSCN-payload. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) /* Skip RSCNs for virtual ports on the same physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) if (qla2x00_is_a_vp_did(vha, rscn_entry))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) atomic_set(&vha->loop_down_timer, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) vha->flags.management_server_logged_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) struct event_arg ea;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) memset(&ea, 0, sizeof(ea));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) ea.id.b24 = rscn_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) ea.id.b.rsvd_1 = rscn_entry >> 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) qla2x00_handle_rscn(vha, &ea);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) case MBA_CONGN_NOTI_RECV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) if (!ha->flags.scm_enabled ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) mb[1] != QLA_CON_PRIMITIVE_RECEIVED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) if (mb[2] == QLA_CONGESTION_ARB_WARNING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) ql_dbg(ql_dbg_async, vha, 0x509b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) "Congestion Warning %04x %04x.\n", mb[1], mb[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) } else if (mb[2] == QLA_CONGESTION_ARB_ALARM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) ql_log(ql_log_warn, vha, 0x509b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) "Congestion Alarm %04x %04x.\n", mb[1], mb[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) /* case MBA_RIO_RESPONSE: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) case MBA_ZIO_RESPONSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) ql_dbg(ql_dbg_async, vha, 0x5015,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) "[R|Z]IO update completion.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) if (IS_FWI2_CAPABLE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) qla24xx_process_response_queue(vha, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) qla2x00_process_response_queue(rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) case MBA_DISCARD_RND_FRAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) ql_dbg(ql_dbg_async, vha, 0x5016,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) "Discard RND Frame -- %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) case MBA_TRACE_NOTIFICATION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) ql_dbg(ql_dbg_async, vha, 0x5017,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) case MBA_ISP84XX_ALERT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) ql_dbg(ql_dbg_async, vha, 0x5018,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) "ISP84XX Alert Notification -- %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) switch (mb[1]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) case A84_PANIC_RECOVERY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) ql_log(ql_log_info, vha, 0x5019,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) "Alert 84XX: panic recovery %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) case A84_OP_LOGIN_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) ql_log(ql_log_info, vha, 0x501a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) "Alert 84XX: firmware version %x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) ha->cs84xx->op_fw_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) case A84_DIAG_LOGIN_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) ql_log(ql_log_info, vha, 0x501b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) "Alert 84XX: diagnostic firmware version %x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) ha->cs84xx->diag_fw_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) case A84_GOLD_LOGIN_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) ha->cs84xx->fw_update = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) ql_log(ql_log_info, vha, 0x501c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) "Alert 84XX: gold firmware version %x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) ha->cs84xx->gold_fw_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) ql_log(ql_log_warn, vha, 0x501d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) case MBA_DCBX_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) ql_dbg(ql_dbg_async, vha, 0x501e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) "DCBX Started -- %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) case MBA_DCBX_PARAM_UPDATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) ql_dbg(ql_dbg_async, vha, 0x501f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) "DCBX Parameters Updated -- %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) case MBA_FCF_CONF_ERR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) ql_dbg(ql_dbg_async, vha, 0x5020,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) "FCF Configuration Error -- %04x %04x %04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) case MBA_IDC_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) mb[4] = rd_reg_word(®24->mailbox4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) * Extend loop down timer since port is active.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) if (atomic_read(&vha->loop_state) == LOOP_DOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) atomic_set(&vha->loop_down_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) LOOP_DOWN_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) qla2xxx_wake_dpc(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) case MBA_IDC_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) if (ha->notify_lb_portup_comp && !vha->vp_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) complete(&ha->lb_portup_comp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) case MBA_IDC_TIME_EXT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) IS_QLA8044(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) qla81xx_idc_event(vha, mb[0], mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) case MBA_IDC_AEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) qla27xx_handle_8200_aen(vha, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) } else if (IS_QLA83XX(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) mb[4] = rd_reg_word(®24->mailbox4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) mb[5] = rd_reg_word(®24->mailbox5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) mb[6] = rd_reg_word(®24->mailbox6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) mb[7] = rd_reg_word(®24->mailbox7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) qla83xx_handle_8200_aen(vha, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) ql_dbg(ql_dbg_async, vha, 0x5052,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) mb[0], mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) case MBA_DPORT_DIAGNOSTICS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) ql_dbg(ql_dbg_async, vha, 0x5052,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) "D-Port Diagnostics: %04x %04x %04x %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) mb[0], mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) memcpy(vha->dport_data, mb, sizeof(vha->dport_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) static char *results[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) "start", "done(pass)", "done(error)", "undefined" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) static char *types[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) "none", "dynamic", "static", "other" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) uint result = mb[1] >> 0 & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) uint type = mb[1] >> 6 & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) uint sw = mb[1] >> 15 & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) ql_dbg(ql_dbg_async, vha, 0x5052,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) "D-Port Diagnostics: result=%s type=%s [sw=%u]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) results[result], types[type], sw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) if (result == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) static char *reasons[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) "reserved", "unexpected reject",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) "unexpected phase", "retry exceeded",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) "timed out", "not supported",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) "user stopped" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) uint reason = mb[2] >> 0 & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) uint phase = mb[2] >> 12 & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) ql_dbg(ql_dbg_async, vha, 0x5052,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) "D-Port Diagnostics: reason=%s phase=%u \n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) reason < 7 ? reasons[reason] : "other",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) phase >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) case MBA_TEMPERATURE_ALERT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) ql_dbg(ql_dbg_async, vha, 0x505e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) if (mb[1] == 0x12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) schedule_work(&ha->board_disable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) case MBA_TRANS_INSERT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) ql_dbg(ql_dbg_async, vha, 0x5091,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) "Transceiver Insertion: %04x\n", mb[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) case MBA_TRANS_REMOVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) ql_dbg(ql_dbg_async, vha, 0x5057,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) "Unknown AEN:%04x %04x %04x %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) mb[0], mb[1], mb[2], mb[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) qlt_async_event(mb[0], vha, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) if (!vha->vp_idx && ha->num_vhosts)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) qla2x00_alert_all_vps(rsp, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) * qla2x00_process_completed_request() - Process a Fast Post response.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) * @req: request queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) * @index: SRB index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) qla2x00_process_completed_request(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) struct req_que *req, uint32_t index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) /* Validate handle. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) if (index >= req->num_outstanding_cmds) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) ql_log(ql_log_warn, vha, 0x3014,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) "Invalid SCSI command index (%x).\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) if (IS_P3P_TYPE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) sp = req->outstanding_cmds[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) if (sp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) /* Free outstanding command slot. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) req->outstanding_cmds[index] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) /* Save ISP completion status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) sp->done(sp, DID_OK << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) if (IS_P3P_TYPE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) srb_t *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) struct req_que *req, void *iocb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) sts_entry_t *pkt = iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) uint16_t index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) index = LSW(pkt->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) if (index >= req->num_outstanding_cmds) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) ql_log(ql_log_warn, vha, 0x5031,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) "%s: Invalid command index (%x) type %8ph.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) func, index, iocb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) if (IS_P3P_TYPE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) sp = req->outstanding_cmds[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) if (!sp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) ql_log(ql_log_warn, vha, 0x5032,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) "%s: Invalid completion handle (%x) -- timed-out.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) func, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) if (sp->handle != index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) ql_log(ql_log_warn, vha, 0x5033,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) "%s: SRB handle (%x) mismatch %x.\n", func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) sp->handle, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) req->outstanding_cmds[index] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) return sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) struct mbx_entry *mbx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) const char func[] = "MBX-IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) const char *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) fc_port_t *fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) struct srb_iocb *lio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) uint16_t *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) uint16_t status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) lio = &sp->u.iocb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) type = sp->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) fcport = sp->fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) data = lio->u.logio.data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) data[0] = MBS_COMMAND_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) QLA_LOGIO_LOGIN_RETRIED : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) if (mbx->entry_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) ql_dbg(ql_dbg_async, vha, 0x5043,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) "entry-status=%x status=%x state-flag=%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) "status-flags=%x.\n", type, sp->handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) fcport->d_id.b.domain, fcport->d_id.b.area,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) fcport->d_id.b.al_pa, mbx->entry_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) le16_to_cpu(mbx->status_flags));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) mbx, sizeof(*mbx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) goto logio_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) status = le16_to_cpu(mbx->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) ql_dbg(ql_dbg_async, vha, 0x5045,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) type, sp->handle, fcport->d_id.b.domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) fcport->d_id.b.area, fcport->d_id.b.al_pa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) le16_to_cpu(mbx->mb1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) data[0] = MBS_COMMAND_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) if (sp->type == SRB_LOGIN_CMD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) fcport->port_type = FCT_TARGET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) if (le16_to_cpu(mbx->mb1) & BIT_0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) fcport->port_type = FCT_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) else if (le16_to_cpu(mbx->mb1) & BIT_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) fcport->flags |= FCF_FCP2_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) goto logio_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) data[0] = le16_to_cpu(mbx->mb0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) switch (data[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) case MBS_PORT_ID_USED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) data[1] = le16_to_cpu(mbx->mb1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) case MBS_LOOP_ID_USED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) data[0] = MBS_COMMAND_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) ql_log(ql_log_warn, vha, 0x5046,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) le16_to_cpu(mbx->mb7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) logio_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) sp->done(sp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) struct mbx_24xx_entry *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) const char func[] = "MBX-IOCB2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) struct srb_iocb *si;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) u16 sz, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) if (sp->type == SRB_SCSI_CMD ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) sp->type == SRB_NVME_CMD ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) sp->type == SRB_TM_CMD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) ql_log(ql_log_warn, vha, 0x509d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) "Inconsistent event entry type %d\n", sp->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) if (IS_P3P_TYPE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) si = &sp->u.iocb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) for (i = 0; i < sz; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) si->u.mbx.in_mb[i] = pkt->mb[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) res = (si->u.mbx.in_mb[0] & MBS_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) sp->done(sp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) struct nack_to_isp *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) const char func[] = "nack";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) res = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) sp->done(sp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) sts_entry_t *pkt, int iocb_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) const char func[] = "CT_IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) const char *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) struct bsg_job *bsg_job;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) struct fc_bsg_reply *bsg_reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) uint16_t comp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) switch (sp->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) case SRB_CT_CMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) bsg_job = sp->u.bsg_job;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) bsg_reply = bsg_job->reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) type = "ct pass-through";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) comp_status = le16_to_cpu(pkt->comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) * fc payload to the caller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) bsg_job->reply_len = sizeof(struct fc_bsg_reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) if (comp_status != CS_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) if (comp_status == CS_DATA_UNDERRUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) res = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) bsg_reply->reply_payload_rcv_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) le16_to_cpu(pkt->rsp_info_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) ql_log(ql_log_warn, vha, 0x5048,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) type, comp_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) bsg_reply->reply_payload_rcv_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) ql_log(ql_log_warn, vha, 0x5049,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) "CT pass-through-%s error comp_status=0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) type, comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) bsg_reply->reply_payload_rcv_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) pkt, sizeof(*pkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) res = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) bsg_reply->reply_payload_rcv_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) bsg_job->reply_payload.payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) bsg_job->reply_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) case SRB_CT_PTHRU_CMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) * borrowing sts_entry_24xx.comp_status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) * same location as ct_entry_24xx.comp_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) sp->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) sp->done(sp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) struct sts_entry_24xx *pkt, int iocb_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) struct els_sts_entry_24xx *ese = (struct els_sts_entry_24xx *)pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) const char func[] = "ELS_CT_IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) const char *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) struct bsg_job *bsg_job;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) struct fc_bsg_reply *bsg_reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) uint16_t comp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) uint32_t fw_status[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) struct srb_iocb *els;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) type = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) switch (sp->type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) case SRB_ELS_CMD_RPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) case SRB_ELS_CMD_HST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) type = "els";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) case SRB_CT_CMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) type = "ct pass-through";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) case SRB_ELS_DCMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) type = "Driver ELS logo";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) if (iocb_type != ELS_IOCB_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) ql_dbg(ql_dbg_user, vha, 0x5047,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) "Completing %s: (%p) type=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) type, sp, sp->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) sp->done(sp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) case SRB_CT_PTHRU_CMD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) /* borrowing sts_entry_24xx.comp_status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) same location as ct_entry_24xx.comp_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) sp->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) sp->done(sp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) ql_dbg(ql_dbg_user, vha, 0x503e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) fw_status[1] = le32_to_cpu(ese->error_subcode_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) fw_status[2] = le32_to_cpu(ese->error_subcode_2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) if (iocb_type == ELS_IOCB_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) els = &sp->u.iocb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) els->u.els_plogi.fw_status[0] = cpu_to_le32(fw_status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) els->u.els_plogi.fw_status[1] = cpu_to_le32(fw_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) els->u.els_plogi.fw_status[2] = cpu_to_le32(fw_status[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) els->u.els_plogi.comp_status = cpu_to_le16(fw_status[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) if (comp_status == CS_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) res = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) if (comp_status == CS_DATA_UNDERRUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) res = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) els->u.els_plogi.len = cpu_to_le16(le32_to_cpu(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) ese->total_byte_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) els->u.els_plogi.len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) ql_dbg(ql_dbg_disc, vha, 0x503f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) "ELS IOCB Done -%s hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) type, sp->handle, comp_status, fw_status[1], fw_status[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) le32_to_cpu(ese->total_byte_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) goto els_ct_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) * fc payload to the caller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) bsg_job = sp->u.bsg_job;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) bsg_reply = bsg_job->reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) if (comp_status != CS_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) if (comp_status == CS_DATA_UNDERRUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) res = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) bsg_reply->reply_payload_rcv_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) le32_to_cpu(ese->total_byte_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) ql_dbg(ql_dbg_user, vha, 0x503f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) type, sp->handle, comp_status, fw_status[1], fw_status[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) le32_to_cpu(ese->total_byte_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) ql_dbg(ql_dbg_user, vha, 0x5040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) "error subcode 1=0x%x error subcode 2=0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) type, sp->handle, comp_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) le32_to_cpu(ese->error_subcode_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) le32_to_cpu(ese->error_subcode_2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) bsg_reply->reply_payload_rcv_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) fw_status, sizeof(fw_status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) pkt, sizeof(*pkt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) res = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) bsg_job->reply_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) els_ct_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) sp->done(sp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) struct logio_entry_24xx *logio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) const char func[] = "LOGIO-IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) const char *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) fc_port_t *fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) struct srb_iocb *lio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) uint16_t *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) uint32_t iop[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) lio = &sp->u.iocb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) type = sp->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) fcport = sp->fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) data = lio->u.logio.data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) data[0] = MBS_COMMAND_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) QLA_LOGIO_LOGIN_RETRIED : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) if (logio->entry_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) ql_log(ql_log_warn, fcport->vha, 0x5034,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) "Async-%s error entry - %8phC hdl=%x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) "portid=%02x%02x%02x entry-status=%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) fcport->d_id.b.area, fcport->d_id.b.al_pa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) logio->entry_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) logio, sizeof(*logio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) goto logio_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) ql_dbg(ql_dbg_async, sp->vha, 0x5036,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) type, sp->handle, fcport->d_id.b24, fcport->port_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) le32_to_cpu(logio->io_parameter[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) vha->hw->exch_starvation = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) data[0] = MBS_COMMAND_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) if (sp->type == SRB_PRLI_CMD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) lio->u.logio.iop[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) le32_to_cpu(logio->io_parameter[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) lio->u.logio.iop[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) le32_to_cpu(logio->io_parameter[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) goto logio_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) if (sp->type != SRB_LOGIN_CMD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) goto logio_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) iop[0] = le32_to_cpu(logio->io_parameter[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (iop[0] & BIT_4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) fcport->port_type = FCT_TARGET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) if (iop[0] & BIT_8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) fcport->flags |= FCF_FCP2_DEVICE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) } else if (iop[0] & BIT_5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) fcport->port_type = FCT_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) if (iop[0] & BIT_7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) fcport->flags |= FCF_CONF_COMP_SUPPORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) if (logio->io_parameter[7] || logio->io_parameter[8])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) fcport->supported_classes |= FC_COS_CLASS2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) if (logio->io_parameter[9] || logio->io_parameter[10])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) fcport->supported_classes |= FC_COS_CLASS3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) goto logio_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) iop[0] = le32_to_cpu(logio->io_parameter[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) iop[1] = le32_to_cpu(logio->io_parameter[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) lio->u.logio.iop[0] = iop[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) lio->u.logio.iop[1] = iop[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) switch (iop[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) case LSC_SCODE_PORTID_USED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) data[0] = MBS_PORT_ID_USED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) data[1] = LSW(iop[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) case LSC_SCODE_NPORT_USED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) data[0] = MBS_LOOP_ID_USED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) case LSC_SCODE_CMD_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) if (iop[1] == 0x0606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) * Target side acked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) data[0] = MBS_COMMAND_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) goto logio_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) data[0] = MBS_COMMAND_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) case LSC_SCODE_NOXCB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) vha->hw->exch_starvation++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) if (vha->hw->exch_starvation > 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) ql_log(ql_log_warn, vha, 0xd046,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) "Exchange starvation. Resetting RISC\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) vha->hw->exch_starvation = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) if (IS_P3P_TYPE(vha->hw))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) qla2xxx_wake_dpc(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) data[0] = MBS_COMMAND_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) ql_dbg(ql_dbg_async, sp->vha, 0x5037,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) "Async-%s failed: handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) type, sp->handle, fcport->d_id.b24, fcport->port_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) le16_to_cpu(logio->comp_status),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) le32_to_cpu(logio->io_parameter[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) le32_to_cpu(logio->io_parameter[1]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) logio_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) sp->done(sp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) const char func[] = "TMF-IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) const char *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) fc_port_t *fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) struct srb_iocb *iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) iocb = &sp->u.iocb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) type = sp->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) fcport = sp->fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) iocb->u.tmf.data = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) if (sts->entry_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) ql_log(ql_log_warn, fcport->vha, 0x5038,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) "Async-%s error - hdl=%x entry-status(%x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) type, sp->handle, sts->entry_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) iocb->u.tmf.data = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) ql_log(ql_log_warn, fcport->vha, 0x5039,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) "Async-%s error - hdl=%x completion status(%x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) type, sp->handle, sts->comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) iocb->u.tmf.data = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) } else if ((le16_to_cpu(sts->scsi_status) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) SS_RESPONSE_INFO_LEN_VALID)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) host_to_fcp_swap(sts->data, sizeof(sts->data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) if (le32_to_cpu(sts->rsp_data_len) < 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) ql_log(ql_log_warn, fcport->vha, 0x503b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) "Async-%s error - hdl=%x not enough response(%d).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) type, sp->handle, sts->rsp_data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) } else if (sts->data[3]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) ql_log(ql_log_warn, fcport->vha, 0x503c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) "Async-%s error - hdl=%x response(%x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) type, sp->handle, sts->data[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) iocb->u.tmf.data = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) if (iocb->u.tmf.data != QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) sts, sizeof(*sts));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) sp->done(sp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) void *tsk, srb_t *sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) fc_port_t *fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) struct srb_iocb *iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) uint16_t state_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) struct nvmefc_fcp_req *fd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) uint16_t ret = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) __le16 comp_status = sts->comp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) int logit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) iocb = &sp->u.iocb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) fcport = sp->fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) iocb->u.nvme.comp_status = comp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) state_flags = le16_to_cpu(sts->state_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) fd = iocb->u.nvme.desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) if (unlikely(iocb->u.nvme.aen_op))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) if (unlikely(comp_status != CS_COMPLETE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) logit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) fd->transferred_length = fd->payload_length -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) le32_to_cpu(sts->residual_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) * State flags: Bit 6 and 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) * If 0 is set, we don't care about 6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) * both cases resp was dma'd to host buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) * if both are 0, that is good path case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) * if six is set and 0 is clear, we need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) * copy resp data from status iocb to resp buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) iocb->u.nvme.rsp_pyld_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) } else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) (SF_FCP_RSP_DMA | SF_NVME_ERSP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) /* Response already DMA'd to fd->rspaddr. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) } else if ((state_flags & SF_FCP_RSP_DMA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) * as an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) iocb->u.nvme.rsp_pyld_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) fd->transferred_length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) ql_dbg(ql_dbg_io, fcport->vha, 0x307a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) "Unexpected values in NVMe_RSP IU.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) logit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) } else if (state_flags & SF_NVME_ERSP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) uint32_t *inbuf, *outbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) uint16_t iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) inbuf = (uint32_t *)&sts->nvme_ersp_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) outbuf = (uint32_t *)fd->rspaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) if (unlikely(le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) sizeof(struct nvme_fc_ersp_iu))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) if (ql_mask_match(ql_dbg_io)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) WARN_ONCE(1, "Unexpected response payload length %u.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) iocb->u.nvme.rsp_pyld_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) ql_log(ql_log_warn, fcport->vha, 0x5100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) "Unexpected response payload length %u.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) iocb->u.nvme.rsp_pyld_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) iocb->u.nvme.rsp_pyld_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) cpu_to_le16(sizeof(struct nvme_fc_ersp_iu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) iter = le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) for (; iter; iter--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) *outbuf++ = swab32(*inbuf++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) if (state_flags & SF_NVME_ERSP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) u32 tgt_xfer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) if (fd->transferred_length != tgt_xfer_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) ql_dbg(ql_dbg_io, fcport->vha, 0x3079,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) "Dropped frame(s) detected (sent/rcvd=%u/%u).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) tgt_xfer_len, fd->transferred_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) logit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) } else if (le16_to_cpu(comp_status) == CS_DATA_UNDERRUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) * Do not log if this is just an underflow and there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) * is no data loss.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) logit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) if (unlikely(logit))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) ql_log(ql_log_warn, fcport->vha, 0x5060,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) sp->name, sp->handle, comp_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) fd->transferred_length, le32_to_cpu(sts->residual_len),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) sts->ox_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) * If transport error then Failure (HBA rejects request)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) * otherwise transport will handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) switch (le16_to_cpu(comp_status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) case CS_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) case CS_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) case CS_PORT_UNAVAILABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) case CS_PORT_LOGGED_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) fcport->nvme_flag |= NVME_FLAG_RESETTING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) case CS_ABORTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) case CS_PORT_BUSY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) fd->transferred_length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) iocb->u.nvme.rsp_pyld_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) ret = QLA_ABORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) case CS_DATA_UNDERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) ret = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) sp->done(sp, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) struct vp_ctrl_entry_24xx *vce)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) const char func[] = "CTRLVP-IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) int rval = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) if (vce->entry_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) ql_dbg(ql_dbg_vport, vha, 0x10c4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) "%s: Failed to complete IOCB -- error status (%x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) sp->name, vce->entry_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) rval = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) ql_dbg(ql_dbg_vport, vha, 0x10c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) sp->name, le16_to_cpu(vce->comp_status),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) le16_to_cpu(vce->vp_idx_failed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) rval = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) ql_dbg(ql_dbg_vport, vha, 0x10c6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) "Done %s.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) sp->rc = rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) sp->done(sp, rval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) /* Process a single response queue entry. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) struct rsp_que *rsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) sts_entry_t *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) sts21_entry_t *sts21_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) sts22_entry_t *sts22_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) uint16_t handle_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) uint16_t cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) switch (pkt->entry_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) case STATUS_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) qla2x00_status_entry(vha, rsp, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) case STATUS_TYPE_21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) sts21_entry = (sts21_entry_t *)pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) handle_cnt = sts21_entry->handle_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) for (cnt = 0; cnt < handle_cnt; cnt++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) qla2x00_process_completed_request(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) sts21_entry->handle[cnt]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) case STATUS_TYPE_22:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) sts22_entry = (sts22_entry_t *)pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) handle_cnt = sts22_entry->handle_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) for (cnt = 0; cnt < handle_cnt; cnt++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) qla2x00_process_completed_request(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) sts22_entry->handle[cnt]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) case STATUS_CONT_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) case MBX_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) case CT_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) /* Type Not Supported. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) ql_log(ql_log_warn, vha, 0x504a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) "Received unknown response pkt type %x entry status=%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) pkt->entry_type, pkt->entry_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) * qla2x00_process_response_queue() - Process response queue entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) * @rsp: response queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) qla2x00_process_response_queue(struct rsp_que *rsp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) struct scsi_qla_host *vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) struct qla_hw_data *ha = rsp->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) sts_entry_t *pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) if (!vha->flags.online)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) pkt = (sts_entry_t *)rsp->ring_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) rsp->ring_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) if (rsp->ring_index == rsp->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) rsp->ring_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) rsp->ring_ptr = rsp->ring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) rsp->ring_ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) if (pkt->entry_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) qla2x00_error_entry(vha, rsp, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) qla2x00_process_response_entry(vha, rsp, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) /* Adjust ring index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) uint32_t sense_len, struct rsp_que *rsp, int res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) struct scsi_qla_host *vha = sp->vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) struct scsi_cmnd *cp = GET_CMD_SP(sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) uint32_t track_sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) if (sense_len >= SCSI_SENSE_BUFFERSIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) sense_len = SCSI_SENSE_BUFFERSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) SET_CMD_SENSE_LEN(sp, sense_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) track_sense_len = sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) if (sense_len > par_sense_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) sense_len = par_sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) memcpy(cp->sense_buffer, sense_data, sense_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) track_sense_len -= sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) SET_CMD_SENSE_LEN(sp, track_sense_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) if (track_sense_len != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) rsp->status_srb = sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) cp->result = res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) if (sense_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) sp->vha->host_no, cp->device->id, cp->device->lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) cp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) cp->sense_buffer, sense_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) struct scsi_dif_tuple {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) __be16 guard; /* Checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) __be16 app_tag; /* APPL identifier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) __be32 ref_tag; /* Target LBA or indirect LBA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) * Checks the guard or meta-data for the type of error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) * detected by the HBA. In case of errors, we set the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) * to indicate to the kernel that the HBA detected error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) struct scsi_qla_host *vha = sp->vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) struct scsi_cmnd *cmd = GET_CMD_SP(sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) uint8_t *ap = &sts24->data[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) uint8_t *ep = &sts24->data[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) uint32_t e_ref_tag, a_ref_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) uint16_t e_app_tag, a_app_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) uint16_t e_guard, a_guard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) * swab32 of the "data" field in the beginning of qla2x00_status_entry()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) * would make guard field appear at offset 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) a_guard = get_unaligned_le16(ap + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) a_app_tag = get_unaligned_le16(ap + 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) a_ref_tag = get_unaligned_le32(ap + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) e_guard = get_unaligned_le16(ep + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) e_app_tag = get_unaligned_le16(ep + 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) e_ref_tag = get_unaligned_le32(ep + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) ql_dbg(ql_dbg_io, vha, 0x3023,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) "iocb(s) %p Returned STATUS.\n", sts24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) ql_dbg(ql_dbg_io, vha, 0x3024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) a_app_tag, e_app_tag, a_guard, e_guard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) * Ignore sector if:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) * For type 3: ref & app tag is all 'f's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) * For type 0,1,2: app tag is all 'f's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) if (a_app_tag == be16_to_cpu(T10_PI_APP_ESCAPE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) (scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) a_ref_tag == be32_to_cpu(T10_PI_REF_ESCAPE))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) uint32_t blocks_done, resid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) sector_t lba_s = scsi_get_lba(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) /* 2TB boundary case covered automatically with this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) resid = scsi_bufflen(cmd) - (blocks_done *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) cmd->device->sector_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) scsi_set_resid(cmd, resid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) cmd->result = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) /* Update protection tag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) if (scsi_prot_sg_count(cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) uint32_t i, j = 0, k = 0, num_ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) struct t10_pi_tuple *spt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) /* Patch the corresponding protection tags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) scsi_for_each_prot_sg(cmd, sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) scsi_prot_sg_count(cmd), i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) num_ent = sg_dma_len(sg) / 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) if (k + num_ent < blocks_done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) k += num_ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) j = blocks_done - k - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) k = blocks_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) if (k != blocks_done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) ql_log(ql_log_warn, vha, 0x302f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) "unexpected tag values tag:lba=%x:%llx)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) e_ref_tag, (unsigned long long)lba_s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) spt = page_address(sg_page(sg)) + sg->offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) spt += j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) spt->app_tag = T10_PI_APP_ESCAPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) spt->ref_tag = T10_PI_REF_ESCAPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) /* check guard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) if (e_guard != a_guard) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) 0x10, 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) set_driver_byte(cmd, DRIVER_SENSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) set_host_byte(cmd, DID_ABORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) cmd->result |= SAM_STAT_CHECK_CONDITION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) /* check ref tag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) if (e_ref_tag != a_ref_tag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) 0x10, 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) set_driver_byte(cmd, DRIVER_SENSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) set_host_byte(cmd, DID_ABORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) cmd->result |= SAM_STAT_CHECK_CONDITION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) /* check appl tag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) if (e_app_tag != a_app_tag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) 0x10, 0x2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) set_driver_byte(cmd, DRIVER_SENSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) set_host_byte(cmd, DID_ABORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) cmd->result |= SAM_STAT_CHECK_CONDITION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) struct req_que *req, uint32_t index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) uint16_t comp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) uint16_t scsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) uint16_t thread_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) uint32_t rval = EXT_STATUS_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) struct bsg_job *bsg_job = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) struct fc_bsg_request *bsg_request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) struct fc_bsg_reply *bsg_reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) sts_entry_t *sts = pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) struct sts_entry_24xx *sts24 = pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) /* Validate handle. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) if (index >= req->num_outstanding_cmds) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) ql_log(ql_log_warn, vha, 0x70af,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) "Invalid SCSI completion handle 0x%x.\n", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) sp = req->outstanding_cmds[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) if (!sp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) ql_log(ql_log_warn, vha, 0x70b0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) req->id, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) /* Free outstanding command slot. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) req->outstanding_cmds[index] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) bsg_job = sp->u.bsg_job;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) bsg_request = bsg_job->request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) bsg_reply = bsg_job->reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) if (IS_FWI2_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) comp_status = le16_to_cpu(sts24->comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) comp_status = le16_to_cpu(sts->comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) switch (comp_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) case CS_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) if (scsi_status == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) bsg_reply->reply_payload_rcv_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) bsg_job->reply_payload.payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) vha->qla_stats.input_bytes +=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) bsg_reply->reply_payload_rcv_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) vha->qla_stats.input_requests++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) rval = EXT_STATUS_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) case CS_DATA_OVERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) ql_dbg(ql_dbg_user, vha, 0x70b1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) "Command completed with data overrun thread_id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) rval = EXT_STATUS_DATA_OVERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) case CS_DATA_UNDERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) ql_dbg(ql_dbg_user, vha, 0x70b2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) "Command completed with data underrun thread_id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) rval = EXT_STATUS_DATA_UNDERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) case CS_BIDIR_RD_OVERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) ql_dbg(ql_dbg_user, vha, 0x70b3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) "Command completed with read data overrun thread_id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) rval = EXT_STATUS_DATA_OVERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) case CS_BIDIR_RD_WR_OVERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) ql_dbg(ql_dbg_user, vha, 0x70b4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) "Command completed with read and write data overrun "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) "thread_id=%d\n", thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) rval = EXT_STATUS_DATA_OVERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) ql_dbg(ql_dbg_user, vha, 0x70b5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) "Command completed with read data over and write data "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) "underrun thread_id=%d\n", thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) rval = EXT_STATUS_DATA_OVERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) case CS_BIDIR_RD_UNDERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) ql_dbg(ql_dbg_user, vha, 0x70b6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) "Command completed with read data underrun "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) "thread_id=%d\n", thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) rval = EXT_STATUS_DATA_UNDERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) ql_dbg(ql_dbg_user, vha, 0x70b7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) "Command completed with read data under and write data "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) "overrun thread_id=%d\n", thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) rval = EXT_STATUS_DATA_UNDERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) case CS_BIDIR_RD_WR_UNDERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) ql_dbg(ql_dbg_user, vha, 0x70b8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) "Command completed with read and write data underrun "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) "thread_id=%d\n", thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) rval = EXT_STATUS_DATA_UNDERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) case CS_BIDIR_DMA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) ql_dbg(ql_dbg_user, vha, 0x70b9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) "Command completed with data DMA error thread_id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) rval = EXT_STATUS_DMA_ERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) case CS_TIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) ql_dbg(ql_dbg_user, vha, 0x70ba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) "Command completed with timeout thread_id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) rval = EXT_STATUS_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) ql_dbg(ql_dbg_user, vha, 0x70bb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) "Command completed with completion status=0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) "thread_id=%d\n", comp_status, thread_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) rval = EXT_STATUS_ERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) bsg_reply->reply_payload_rcv_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) /* Return the vendor specific reply to API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) bsg_job->reply_len = sizeof(struct fc_bsg_reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) /* Always return DID_OK, bsg will send the vendor specific response
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) * in this case only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) sp->done(sp, DID_OK << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) * qla2x00_status_entry() - Process a Status IOCB entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) * @rsp: response queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) * @pkt: Entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) fc_port_t *fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) struct scsi_cmnd *cp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) sts_entry_t *sts = pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) struct sts_entry_24xx *sts24 = pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) uint16_t comp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) uint16_t scsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) uint16_t ox_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) uint8_t lscsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) int32_t resid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) fw_resid_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) uint8_t *rsp_info, *sense_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) uint32_t handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) uint16_t que;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) struct req_que *req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) int logit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) uint16_t state_flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) uint16_t sts_qual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) if (IS_FWI2_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) comp_status = le16_to_cpu(sts24->comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) state_flags = le16_to_cpu(sts24->state_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) comp_status = le16_to_cpu(sts->comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) handle = (uint32_t) LSW(sts->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) que = MSW(sts->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) req = ha->req_q_map[que];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) /* Check for invalid queue pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) if (req == NULL ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) ql_dbg(ql_dbg_io, vha, 0x3059,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) "Invalid status handle (0x%x): Bad req pointer. req=%p, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) "que=%u.\n", sts->handle, req, que);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) /* Validate handle. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) if (handle < req->num_outstanding_cmds) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) sp = req->outstanding_cmds[handle];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) if (!sp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) ql_dbg(ql_dbg_io, vha, 0x3075,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) "%s(%ld): Already returned command for status handle (0x%x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) __func__, vha->host_no, sts->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) ql_dbg(ql_dbg_io, vha, 0x3017,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) "Invalid status handle, out of range (0x%x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) sts->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) if (IS_P3P_TYPE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) qla2xxx_wake_dpc(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) qla_put_iocbs(sp->qpair, &sp->iores);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) if (sp->cmd_type != TYPE_SRB) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) req->outstanding_cmds[handle] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) ql_dbg(ql_dbg_io, vha, 0x3015,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) "Unknown sp->cmd_type %x %p).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) sp->cmd_type, sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) /* NVME completion. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) if (sp->type == SRB_NVME_CMD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) req->outstanding_cmds[handle] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) /* Task Management completion. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) if (sp->type == SRB_TM_CMD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) qla24xx_tm_iocb_entry(vha, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) /* Fast path completion. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) if (comp_status == CS_COMPLETE && scsi_status == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) qla2x00_process_completed_request(vha, req, handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) req->outstanding_cmds[handle] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) cp = GET_CMD_SP(sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) if (cp == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) ql_dbg(ql_dbg_io, vha, 0x3018,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) "Command already returned (0x%x/%p).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) sts->handle, sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) lscsi_status = scsi_status & STATUS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) fcport = sp->fcport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) ox_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) sense_len = par_sense_len = rsp_info_len = resid_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) fw_resid_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) if (IS_FWI2_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) if (scsi_status & SS_SENSE_LEN_VALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) sense_len = le32_to_cpu(sts24->sense_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) resid_len = le32_to_cpu(sts24->rsp_residual_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) if (comp_status == CS_DATA_UNDERRUN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) fw_resid_len = le32_to_cpu(sts24->residual_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) rsp_info = sts24->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) sense_data = sts24->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) host_to_fcp_swap(sts24->data, sizeof(sts24->data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) ox_id = le16_to_cpu(sts24->ox_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) par_sense_len = sizeof(sts24->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) sts_qual = le16_to_cpu(sts24->status_qualifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) if (scsi_status & SS_SENSE_LEN_VALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) sense_len = le16_to_cpu(sts->req_sense_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) rsp_info_len = le16_to_cpu(sts->rsp_info_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) resid_len = le32_to_cpu(sts->residual_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) rsp_info = sts->rsp_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) sense_data = sts->req_sense_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) par_sense_len = sizeof(sts->req_sense_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) /* Check for any FCP transport errors. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) /* Sense data lies beyond any FCP RESPONSE data. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) if (IS_FWI2_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) sense_data += rsp_info_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) par_sense_len -= rsp_info_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) if (rsp_info_len > 3 && rsp_info[3]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) "FCP I/O protocol failure (0x%x/0x%x).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) rsp_info_len, rsp_info[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) res = DID_BUS_BUSY << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) /* Check for overrun. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) scsi_status & SS_RESIDUAL_OVER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) comp_status = CS_DATA_OVERRUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) * Check retry_delay_timer value if we receive a busy or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) * queue full.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) if (unlikely(lscsi_status == SAM_STAT_TASK_SET_FULL ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) lscsi_status == SAM_STAT_BUSY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) qla2x00_set_retry_delay_timestamp(fcport, sts_qual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) * Based on Host and scsi status generate status code for Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) switch (comp_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) case CS_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) case CS_QUEUE_FULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) if (scsi_status == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) res = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) resid = resid_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) scsi_set_resid(cp, resid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) if (!lscsi_status &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) ((unsigned)(scsi_bufflen(cp) - resid) <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) cp->underflow)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) resid, scsi_bufflen(cp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) res = DID_OK << 16 | lscsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) "QUEUE FULL detected.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) logit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) if (lscsi_status != SS_CHECK_CONDITION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) if (!(scsi_status & SS_SENSE_LEN_VALID))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) rsp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) case CS_DATA_UNDERRUN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) /* Use F/W calculated residual length. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) scsi_set_resid(cp, resid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) if (scsi_status & SS_RESIDUAL_UNDER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) resid, scsi_bufflen(cp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) res = DID_ERROR << 16 | lscsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) goto check_scsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) if (!lscsi_status &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) ((unsigned)(scsi_bufflen(cp) - resid) <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) cp->underflow)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) resid, scsi_bufflen(cp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) lscsi_status != SAM_STAT_BUSY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) * scsi status of task set and busy are considered to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) * task not completed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) resid, scsi_bufflen(cp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) res = DID_ERROR << 16 | lscsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) goto check_scsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) "scsi_status: 0x%x, lscsi_status: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) scsi_status, lscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) res = DID_OK << 16 | lscsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) logit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) check_scsi_status:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) * Check to see if SCSI Status is non zero. If so report SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) * Status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) if (lscsi_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) "QUEUE FULL detected.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) logit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) if (lscsi_status != SS_CHECK_CONDITION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) if (!(scsi_status & SS_SENSE_LEN_VALID))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) qla2x00_handle_sense(sp, sense_data, par_sense_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) sense_len, rsp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) case CS_PORT_LOGGED_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) case CS_PORT_CONFIG_CHG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) case CS_PORT_BUSY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) case CS_INCOMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) case CS_PORT_UNAVAILABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) case CS_TIMEOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) case CS_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) * We are going to have the fc class block the rport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) * while we try to recover so instruct the mid layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) * to requeue until the class decides how to handle this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) res = DID_TRANSPORT_DISRUPTED << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) if (comp_status == CS_TIMEOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) if (IS_FWI2_CAPABLE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) else if ((le16_to_cpu(sts->status_flags) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) SF_LOGOUT_SENT) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) if (atomic_read(&fcport->state) == FCS_ONLINE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) "Port to be marked lost on fcport=%02x%02x%02x, current "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) fcport->d_id.b.area, fcport->d_id.b.al_pa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) port_state_str[FCS_ONLINE],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) qlt_schedule_sess_for_deletion(fcport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) case CS_ABORTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) res = DID_RESET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) case CS_DIF_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) logit = qla2x00_handle_dif_error(sp, sts24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) res = cp->result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) case CS_TRANSPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) if (!IS_PI_SPLIT_DET_CAPABLE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) if (state_flags & BIT_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) scmd_printk(KERN_WARNING, cp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) "Unsupported device '%s' found.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) cp->device->vendor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) case CS_DMA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) ql_log(ql_log_info, fcport->vha, 0x3022,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) comp_status, scsi_status, res, vha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) cp->device->id, cp->device->lun, fcport->d_id.b24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) resid_len, fw_resid_len, sp, cp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) pkt, sizeof(*sts24));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) if (logit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) comp_status, scsi_status, res, vha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) cp->device->id, cp->device->lun, fcport->d_id.b.domain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) cp->cmnd, scsi_bufflen(cp), rsp_info_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) resid_len, fw_resid_len, sp, cp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) if (rsp->status_srb == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) sp->done(sp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) * qla2x00_status_cont_entry() - Process a Status Continuations entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) * @rsp: response queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) * @pkt: Entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) * Extended sense data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) uint8_t sense_sz = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) struct qla_hw_data *ha = rsp->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) srb_t *sp = rsp->status_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) struct scsi_cmnd *cp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) uint32_t sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) uint8_t *sense_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) if (!sp || !GET_CMD_SENSE_LEN(sp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) sense_len = GET_CMD_SENSE_LEN(sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) sense_ptr = GET_CMD_SENSE_PTR(sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) cp = GET_CMD_SP(sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) if (cp == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) ql_log(ql_log_warn, vha, 0x3025,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) "cmd is NULL: already returned to OS (sp=%p).\n", sp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) rsp->status_srb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) if (sense_len > sizeof(pkt->data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) sense_sz = sizeof(pkt->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) sense_sz = sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) /* Move sense data. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) if (IS_FWI2_CAPABLE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) host_to_fcp_swap(pkt->data, sizeof(pkt->data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) memcpy(sense_ptr, pkt->data, sense_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) sense_ptr, sense_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) sense_len -= sense_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) sense_ptr += sense_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) SET_CMD_SENSE_PTR(sp, sense_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) SET_CMD_SENSE_LEN(sp, sense_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) /* Place command on done queue. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) if (sense_len == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) rsp->status_srb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) sp->done(sp, cp->result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) * qla2x00_error_entry() - Process an error entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) * @rsp: response queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) * @pkt: Entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) * return : 1=allow further error analysis. 0=no additional error analysis.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) const char func[] = "ERROR-IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) uint16_t que = MSW(pkt->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) struct req_que *req = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) int res = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) ql_dbg(ql_dbg_async, vha, 0x502a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) if (que >= ha->max_req_queues || !ha->req_q_map[que])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) goto fatal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) req = ha->req_q_map[que];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) if (pkt->entry_status & RF_BUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) res = DID_BUS_BUSY << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) switch (pkt->entry_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) case NOTIFY_ACK_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) case STATUS_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) case STATUS_CONT_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) case LOGINOUT_PORT_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) case CT_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) case ELS_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) case ABORT_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) case MBX_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) if (sp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) qla_put_iocbs(sp->qpair, &sp->iores);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) sp->done(sp, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) case ABTS_RESP_24XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) case CTIO_TYPE7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) case CTIO_CRC2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) fatal:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) ql_log(ql_log_warn, vha, 0x5030,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) "Error entry - invalid handle/queue (%04x).\n", que);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) * qla24xx_mbx_completion() - Process mailbox command completions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) * @mb0: Mailbox0 register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) uint16_t cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) uint32_t mboxes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) __le16 __iomem *wptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) /* Read all mbox registers? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) WARN_ON_ONCE(ha->mbx_count > 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) mboxes = (1ULL << ha->mbx_count) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) if (!ha->mcp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) mboxes = ha->mcp->in_mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) /* Load return mailbox registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) ha->flags.mbox_int = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) ha->mailbox_out[0] = mb0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) mboxes >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) wptr = ®->mailbox1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) for (cnt = 1; cnt < ha->mbx_count; cnt++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) if (mboxes & BIT_0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) ha->mailbox_out[cnt] = rd_reg_word(wptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) mboxes >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) wptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) struct abort_entry_24xx *pkt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) const char func[] = "ABT_IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) struct srb_iocb *abt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) abt = &sp->u.iocb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) abt->u.abt.comp_status = pkt->nport_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) sp->done(sp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) struct pt_ls4_request *pkt, struct req_que *req)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) srb_t *sp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) const char func[] = "LS4_IOCB";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) uint16_t comp_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) if (!sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) comp_status = le16_to_cpu(pkt->status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) sp->done(sp, comp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) * qla24xx_process_response_queue() - Process response queue entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) * @vha: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) * @rsp: response queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) void qla24xx_process_response_queue(struct scsi_qla_host *vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) struct rsp_que *rsp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) struct sts_entry_24xx *pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) struct purex_entry_24xx *purex_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) struct purex_item *pure_item;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) if (!ha->flags.fw_started)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) rsp->qpair->rcv_intr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) qla_cpu_update(rsp->qpair, smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) rsp->ring_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) if (rsp->ring_index == rsp->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) rsp->ring_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) rsp->ring_ptr = rsp->ring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445) rsp->ring_ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) if (pkt->entry_status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) goto process_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) process_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) switch (pkt->entry_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) case STATUS_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) qla2x00_status_entry(vha, rsp, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) case STATUS_CONT_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) case VP_RPT_ID_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) qla24xx_report_id_acquisition(vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) (struct vp_rpt_id_entry_24xx *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) case LOGINOUT_PORT_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) qla24xx_logio_entry(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) (struct logio_entry_24xx *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) case CT_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) case ELS_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) case ABTS_RECV_24XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) if (qla_ini_mode_enabled(vha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) pure_item = qla24xx_copy_std_pkt(vha, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) if (!pure_item)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) qla24xx_queue_purex_item(vha, pure_item,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) qla24xx_process_abts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) IS_QLA28XX(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) /* ensure that the ATIO queue is empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) qlt_handle_abts_recv(vha, rsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) (response_t *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) qlt_24xx_process_atio_queue(vha, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) case ABTS_RESP_24XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) case CTIO_TYPE7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) case CTIO_CRC2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) case PT_LS4_REQUEST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) rsp->req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) case NOTIFY_ACK_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) if (pkt->handle == QLA_TGT_SKIP_HANDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) qlt_response_pkt_all_vps(vha, rsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) (response_t *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) qla24xxx_nack_iocb_entry(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) (struct nack_to_isp *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) case MARKER_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) /* Do nothing in this case, this check is to prevent it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) * from falling into default case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) case ABORT_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) qla24xx_abort_iocb_entry(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) (struct abort_entry_24xx *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) case MBX_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) qla24xx_mbx_iocb_entry(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) (struct mbx_24xx_entry *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) case VP_CTRL_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) qla_ctrlvp_completed(vha, rsp->req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) (struct vp_ctrl_entry_24xx *)pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) case PUREX_IOCB_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) purex_entry = (void *)pkt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) switch (purex_entry->els_frame_payload[3]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) case ELS_RDP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) pure_item = qla24xx_copy_std_pkt(vha, pkt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) if (!pure_item)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) qla24xx_queue_purex_item(vha, pure_item,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) qla24xx_process_purex_rdp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) case ELS_FPIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) if (!vha->hw->flags.scm_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) ql_log(ql_log_warn, vha, 0x5094,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) "SCM not active for this port\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) pure_item = qla27xx_copy_fpin_pkt(vha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) (void **)&pkt, &rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) if (!pure_item)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) qla24xx_queue_purex_item(vha, pure_item,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) qla27xx_process_purex_fpin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) ql_log(ql_log_warn, vha, 0x509c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) "Discarding ELS Request opcode 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) purex_entry->els_frame_payload[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) /* Type Not Supported. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) ql_dbg(ql_dbg_async, vha, 0x5042,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) "Received unknown response pkt type 0x%x entry status=%x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) pkt->entry_type, pkt->entry_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) /* Adjust ring index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) if (IS_P3P_TYPE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) wrt_reg_dword(®->rsp_q_out[0], rsp->ring_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) qla2xxx_check_risc_status(scsi_qla_host_t *vha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) int rval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) uint32_t cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) rval = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) wrt_reg_dword(®->iobase_addr, 0x7C00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) rd_reg_dword(®->iobase_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) wrt_reg_dword(®->iobase_window, 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) for (cnt = 10000; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) rval == QLA_SUCCESS; cnt--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) if (cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) wrt_reg_dword(®->iobase_window, 0x0001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) rval = QLA_FUNCTION_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) if (rval == QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) goto next_test;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) rval = QLA_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) wrt_reg_dword(®->iobase_window, 0x0003);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) for (cnt = 100; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) rval == QLA_SUCCESS; cnt--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) if (cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) wrt_reg_dword(®->iobase_window, 0x0003);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) rval = QLA_FUNCTION_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) if (rval != QLA_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) next_test:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) if (rd_reg_dword(®->iobase_c8) & BIT_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) ql_log(ql_log_info, vha, 0x504c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) "Additional code -- 0x55AA.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) wrt_reg_dword(®->iobase_window, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) rd_reg_dword(®->iobase_window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) * @irq: interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) * @dev_id: SCSI driver HA context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) * Called by system whenever the host adapter generates an interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) * Returns handled flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) qla24xx_intr_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) scsi_qla_host_t *vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) struct qla_hw_data *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) struct device_reg_24xx __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) unsigned long iter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) uint32_t stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) uint32_t hccr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) uint16_t mb[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) struct rsp_que *rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) bool process_atio = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) rsp = (struct rsp_que *) dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) if (!rsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) ql_log(ql_log_info, NULL, 0x5059,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) "%s: NULL response queue pointer.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) ha = rsp->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) reg = &ha->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) if (unlikely(pci_channel_offline(ha->pdev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) for (iter = 50; iter--; ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) stat = rd_reg_dword(®->host_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) if (qla2x00_check_reg32_for_disconnect(vha, stat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) if (stat & HSRX_RISC_PAUSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) if (unlikely(pci_channel_offline(ha->pdev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) hccr = rd_reg_dword(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) ql_log(ql_log_warn, vha, 0x504b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) "RISC paused -- HCCR=%x, Dumping firmware.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) qla2xxx_check_risc_status(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) ha->isp_ops->fw_dump(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) } else if ((stat & HSRX_RISC_INT) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) switch (stat & 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) case INTR_ROM_MB_SUCCESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) case INTR_ROM_MB_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) case INTR_MB_SUCCESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) case INTR_MB_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) qla24xx_mbx_completion(vha, MSW(stat));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) status |= MBX_INTERRUPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) case INTR_ASYNC_EVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) mb[0] = MSW(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) mb[1] = rd_reg_word(®->mailbox1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) mb[2] = rd_reg_word(®->mailbox2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) mb[3] = rd_reg_word(®->mailbox3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) qla2x00_async_event(vha, rsp, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) case INTR_RSP_QUE_UPDATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) case INTR_RSP_QUE_UPDATE_83XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) qla24xx_process_response_queue(vha, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) case INTR_ATIO_QUE_UPDATE_27XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) case INTR_ATIO_QUE_UPDATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) process_atio = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) case INTR_ATIO_RSP_QUE_UPDATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) process_atio = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) qla24xx_process_response_queue(vha, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) ql_dbg(ql_dbg_async, vha, 0x504f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) "Unrecognized interrupt type (%d).\n", stat * 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) rd_reg_dword_relaxed(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) ndelay(3500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) qla2x00_handle_mbx_completion(ha, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) if (process_atio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) spin_lock_irqsave(&ha->tgt.atio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) qlt_24xx_process_atio_queue(vha, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) static irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) qla24xx_msix_rsp_q(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) struct qla_hw_data *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) struct rsp_que *rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) struct device_reg_24xx __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) struct scsi_qla_host *vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) rsp = (struct rsp_que *) dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) if (!rsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) ql_log(ql_log_info, NULL, 0x505a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) "%s: NULL response queue pointer.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) ha = rsp->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) reg = &ha->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) qla24xx_process_response_queue(vha, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) if (!ha->flags.disable_msix_handshake) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) rd_reg_dword_relaxed(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) static irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) qla24xx_msix_default(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) scsi_qla_host_t *vha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) struct qla_hw_data *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) struct rsp_que *rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) struct device_reg_24xx __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) uint32_t stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) uint32_t hccr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) uint16_t mb[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) bool process_atio = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) rsp = (struct rsp_que *) dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) if (!rsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) ql_log(ql_log_info, NULL, 0x505c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) "%s: NULL response queue pointer.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) ha = rsp->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) reg = &ha->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) stat = rd_reg_dword(®->host_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) if (qla2x00_check_reg32_for_disconnect(vha, stat))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) if (stat & HSRX_RISC_PAUSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) if (unlikely(pci_channel_offline(ha->pdev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) hccr = rd_reg_dword(®->hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) ql_log(ql_log_info, vha, 0x5050,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) "RISC paused -- HCCR=%x, Dumping firmware.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) hccr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) qla2xxx_check_risc_status(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) ha->isp_ops->fw_dump(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) } else if ((stat & HSRX_RISC_INT) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) switch (stat & 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) case INTR_ROM_MB_SUCCESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) case INTR_ROM_MB_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) case INTR_MB_SUCCESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) case INTR_MB_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) qla24xx_mbx_completion(vha, MSW(stat));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) status |= MBX_INTERRUPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833) case INTR_ASYNC_EVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) mb[0] = MSW(stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) mb[1] = rd_reg_word(®->mailbox1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) mb[2] = rd_reg_word(®->mailbox2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837) mb[3] = rd_reg_word(®->mailbox3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) qla2x00_async_event(vha, rsp, mb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) case INTR_RSP_QUE_UPDATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) case INTR_RSP_QUE_UPDATE_83XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) qla24xx_process_response_queue(vha, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) case INTR_ATIO_QUE_UPDATE_27XX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) case INTR_ATIO_QUE_UPDATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) process_atio = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) case INTR_ATIO_RSP_QUE_UPDATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) process_atio = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) qla24xx_process_response_queue(vha, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) ql_dbg(ql_dbg_async, vha, 0x5051,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) "Unrecognized interrupt type (%d).\n", stat & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) } while (0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) qla2x00_handle_mbx_completion(ha, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) if (process_atio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) spin_lock_irqsave(&ha->tgt.atio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) qlt_24xx_process_atio_queue(vha, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) qla2xxx_msix_rsp_q(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) struct qla_hw_data *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) struct qla_qpair *qpair;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) qpair = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) if (!qpair) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) ql_log(ql_log_info, NULL, 0x505b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) "%s: NULL response queue pointer.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) ha = qpair->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) qla2xxx_msix_rsp_q_hs(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) struct qla_hw_data *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) struct qla_qpair *qpair;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) struct device_reg_24xx __iomem *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) qpair = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) if (!qpair) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) ql_log(ql_log_info, NULL, 0x505b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) "%s: NULL response queue pointer.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) ha = qpair->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) reg = &ha->iobase->isp24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) spin_lock_irqsave(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) spin_unlock_irqrestore(&ha->hardware_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) /* Interrupt handling helpers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) struct qla_init_msix_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920) irq_handler_t handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923) static const struct qla_init_msix_entry msix_entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) { "default", qla24xx_msix_default },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) { "rsp_q", qla24xx_msix_rsp_q },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) { "atio_q", qla83xx_msix_atio_q },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927) { "qpair_multiq", qla2xxx_msix_rsp_q },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) { "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) { "qla2xxx (default)", qla82xx_msix_default },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) struct qla_msix_entry *qentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942) int min_vecs = QLA_BASE_VECTORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) struct irq_affinity desc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) .pre_vectors = QLA_BASE_VECTORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948) IS_ATIO_MSIX_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) desc.pre_vectors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) min_vecs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) /* user wants to control IRQ setting for target mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) ha->msix_count, PCI_IRQ_MSIX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958) ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) &desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963) ql_log(ql_log_fatal, vha, 0x00c7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) "MSI-X: Failed to enable support, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) "giving up -- %d/%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) ha->msix_count, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) goto msix_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) } else if (ret < ha->msix_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) ql_log(ql_log_info, vha, 0x00c6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970) "MSI-X: Using %d vectors\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) ha->msix_count = ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) /* Recalculate queue values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973) if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) ha->max_req_queues = ha->msix_count - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) /* ATIOQ needs 1 vector. That's 1 less QPair */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) if (QLA_TGT_MODE_ENABLED())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978) ha->max_req_queues--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) ha->max_rsp_queues = ha->max_req_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) ha->max_qpairs = ha->max_req_queues - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983) ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984) "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987) vha->irq_offset = desc.pre_vectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) ha->msix_entries = kcalloc(ha->msix_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) sizeof(struct qla_msix_entry),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) if (!ha->msix_entries) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) ql_log(ql_log_fatal, vha, 0x00c8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) "Failed to allocate memory for ha->msix_entries.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) goto free_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997) ha->flags.msix_enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) for (i = 0; i < ha->msix_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) qentry = &ha->msix_entries[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001) qentry->vector = pci_irq_vector(ha->pdev, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) qentry->entry = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) qentry->have_irq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) qentry->in_use = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) qentry->handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008) /* Enable MSI-X vectors for the base queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) for (i = 0; i < QLA_BASE_VECTORS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010) qentry = &ha->msix_entries[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) qentry->handle = rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) rsp->msix = qentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) scnprintf(qentry->name, sizeof(qentry->name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) if (IS_P3P_TYPE(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016) ret = request_irq(qentry->vector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) qla82xx_msix_entries[i].handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) 0, qla82xx_msix_entries[i].name, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020) ret = request_irq(qentry->vector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021) msix_entries[i].handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) 0, qentry->name, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) goto msix_register_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) qentry->have_irq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) qentry->in_use = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030) * If target mode is enable, also request the vector for the ATIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) * queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034) IS_ATIO_MSIX_CAPABLE(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) rsp->msix = qentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) qentry->handle = rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) scnprintf(qentry->name, sizeof(qentry->name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) "qla2xxx%lu_%s", vha->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) msix_entries[QLA_ATIO_VECTOR].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) qentry->in_use = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) ret = request_irq(qentry->vector,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043) msix_entries[QLA_ATIO_VECTOR].handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) 0, qentry->name, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) qentry->have_irq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) msix_register_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) ql_log(ql_log_fatal, vha, 0x00cb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051) "MSI-X: unable to register handler -- %x/%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) qentry->vector, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) qla2x00_free_irqs(vha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) ha->mqenable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) goto msix_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) /* Enable MSI-X vector for response queue update for queue 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060) if (ha->msixbase && ha->mqiobase &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) ql2xmqsupport))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) ha->mqenable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065) if (ha->mqiobase &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067) ql2xmqsupport))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) ha->mqenable = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) ql_dbg(ql_dbg_multiq, vha, 0xc005,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072) ql_dbg(ql_dbg_init, vha, 0x0055,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073) "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) msix_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) free_irqs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) pci_free_irq_vectors(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) goto msix_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) int ret = QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088) device_reg_t *reg = ha->iobase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089) scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) /* If possible, enable MSI-X. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093) !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) goto skip_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) if (ql2xenablemsix == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) goto skip_msix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) (ha->pdev->subsystem_device == 0x7040 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) ha->pdev->subsystem_device == 0x7041 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) ha->pdev->subsystem_device == 0x1705)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) ql_log(ql_log_warn, vha, 0x0034,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105) "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106) ha->pdev->subsystem_vendor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) ha->pdev->subsystem_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) goto skip_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) ql_log(ql_log_warn, vha, 0x0035,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) goto skip_msix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118) ret = qla24xx_enable_msix(ha, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) ql_dbg(ql_dbg_init, vha, 0x0036,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121) "MSI-X: Enabled (0x%X, 0x%X).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) ha->chip_revision, ha->fw_attributes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) goto clear_risc_ints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126) skip_msix:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) ql_log(ql_log_info, vha, 0x0037,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129) "Falling back-to MSI mode -- ret=%d.\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131) if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134) goto skip_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) if (ret > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138) ql_dbg(ql_dbg_init, vha, 0x0038,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) "MSI: Enabled.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) ha->flags.msi_enabled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) ql_log(ql_log_warn, vha, 0x0039,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) "Falling back-to INTa mode -- ret=%d.\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) skip_msi:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) /* Skip INTx on ISP82xx. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148) return QLA_FUNCTION_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150) ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) ha->flags.msi_enabled ? 0 : IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) QLA2XXX_DRIVER_NAME, rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) ql_log(ql_log_warn, vha, 0x003a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155) "Failed to reserve interrupt %d already in use.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) ha->pdev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) } else if (!ha->flags.msi_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159) ql_dbg(ql_dbg_init, vha, 0x0125,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) "INTa mode: Enabled.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) ha->flags.mr_intr_valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162) /* Set max_qpair to 0, as MSI-X and MSI in not enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) ha->max_qpairs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) clear_risc_ints:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167) if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170) spin_lock_irq(&ha->hardware_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171) wrt_reg_word(®->isp.semaphore, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) spin_unlock_irq(&ha->hardware_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179) qla2x00_free_irqs(scsi_qla_host_t *vha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) struct qla_hw_data *ha = vha->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) struct rsp_que *rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) struct qla_msix_entry *qentry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187) * We need to check that ha->rsp_q_map is valid in case we are called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) * from a probe failure context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) if (!ha->rsp_q_map || !ha->rsp_q_map[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) goto free_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) rsp = ha->rsp_q_map[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) if (ha->flags.msix_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) for (i = 0; i < ha->msix_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) qentry = &ha->msix_entries[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197) if (qentry->have_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) irq_set_affinity_notifier(qentry->vector, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) kfree(ha->msix_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) ha->msix_entries = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) ha->flags.msix_enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) ql_dbg(ql_dbg_init, vha, 0x0042,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) "Disabled MSI-X.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) free_irq(pci_irq_vector(ha->pdev, 0), rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) free_irqs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) pci_free_irq_vectors(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216) struct qla_msix_entry *msix, int vector_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) scnprintf(msix->name, sizeof(msix->name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223) "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226) ql_log(ql_log_fatal, vha, 0x00e6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227) "MSI-X: Unable to register handler -- %x/%d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) msix->vector, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231) msix->have_irq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) msix->handle = qpair;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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