^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Driver for the PPA3 parallel port SCSI HBA embedded in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * the Iomega ZIP drive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (c) 1996 Grant R. Guenther grant@torque.net
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * David Campbell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * All comments to David.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _PPA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _PPA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define PPA_VERSION "2.07 (for Linux 2.4.x)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * this driver has been hacked by Matteo Frigo (athena@theory.lcs.mit.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * to support EPP and scatter-gather. [0.26-athena]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * additional hacks by David Campbell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * in response to this driver "mis-behaving" on his machine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Fixed EPP to handle "software" changing of EPP port data direction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Chased down EPP timeouts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Made this driver "kernel version friendly" [0.28-athena]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * [ Stuff removed ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * Corrected ppa.h for 2.1.x kernels (>=2.1.85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * Modified "Nat Semi Kludge" for extended chipsets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * [1.41]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Fixed id_probe for EPP 1.9 chipsets (misdetected as EPP 1.7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * [1.42]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Development solely for 2.1.x kernels from now on!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * [2.00]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Hack and slash at the init code (EPP device check routine)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Added INSANE option.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * [2.01]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Patch applied to sync against the 2.1.x kernel code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Included qboot_zip.sh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * [2.02]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * Cleaned up the mess left by someone else trying to fix the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * asm section to keep egcc happy. The asm section no longer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * exists, the nibble code is *almost* as fast as the asm code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * providing it is compiled with egcc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * Other clean ups include the follow changes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * CONFIG_SCSI_PPA_HAVE_PEDANTIC => CONFIG_SCSI_IZIP_EPP16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * added CONFIG_SCSI_IZIP_SLOW_CTR option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * [2.03]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Use ppa_wait() to check for ready AND connected status bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Add ppa_wait() calls to ppa_completion()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * by Peter Cherriman <pjc@ecs.soton.ac.uk> and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Tim Waugh <twaugh@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * [2.04]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Fix kernel panic on scsi timeout, 2000-08-18 [2.05]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Avoid io_request_lock problems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * John Cavan <johncavan@home.com> [2.06]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * Busy wait for connected status bit in ppa_completion()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * in order to cope with some hardware that has this bit low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * for short periods of time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Add udelay() to ppa_select()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * by Peter Cherriman <pjc@ecs.soton.ac.uk> and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * Oleg Makarenko <omakarenko@cyberplat.ru>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * [2.07]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* ------ END OF USER CONFIGURABLE PARAMETERS ----- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #include <linux/stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* batteries not included :-) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * modes in which the driver can operate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define PPA_AUTODETECT 0 /* Autodetect mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define PPA_NIBBLE 1 /* work in standard 4 bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define PPA_PS2 2 /* PS/2 byte mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define PPA_EPP_8 3 /* EPP mode, 8 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define PPA_EPP_16 4 /* EPP mode, 16 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define PPA_EPP_32 5 /* EPP mode, 32 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define PPA_UNKNOWN 6 /* Just in case... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static char *PPA_MODE_STRING[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) "Autodetect",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) "SPP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) "PS/2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) "EPP 8 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) "EPP 16 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #ifdef CONFIG_SCSI_IZIP_EPP16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) "EPP 16 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) "EPP 32 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) "Unknown"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* other options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define PPA_BURST_SIZE 512 /* data burst size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define PPA_SELECT_TMO 5000 /* how long to wait for target ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define PPA_SPIN_TMO 50000 /* ppa_wait loop limiter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define PPA_RECON_TMO 500 /* scsi reconnection loop limiter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define PPA_DEBUG 0 /* debugging option */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define IN_EPP_MODE(x) (x == PPA_EPP_8 || x == PPA_EPP_16 || x == PPA_EPP_32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* args to ppa_connect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define CONNECT_EPP_MAYBE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define CONNECT_NORMAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define r_dtr(x) (unsigned char)inb((x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define r_str(x) (unsigned char)inb((x)+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define r_ctr(x) (unsigned char)inb((x)+2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define r_epp(x) (unsigned char)inb((x)+4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* On PCI is base+0x400 != base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define r_ecr(x) (unsigned char)inb((x)+0x2) /* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define w_dtr(x,y) outb(y, (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define w_str(x,y) outb(y, (x)+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define w_epp(x,y) outb(y, (x)+4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define w_fifo(x,y) outb(y, (x)) /* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define w_ecr(x,y) outb(y, (x)+0x2)/* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #ifdef CONFIG_SCSI_IZIP_SLOW_CTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define w_ctr(x,y) outb_p(y, (x)+2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define w_ctr(x,y) outb(y, (x)+2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int ppa_engine(ppa_struct *, struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #endif /* _PPA_H */