^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2008-2009 USI Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * notice, this list of conditions, and the following disclaimer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * without modification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * 2. Redistributions in binary form must reproduce at minimum a disclaimer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * substantially similar to the "NO WARRANTY" disclaimer below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * ("Disclaimer") and any redistribution must be conditioned upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * including a substantially similar Disclaimer requirement for further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * binary redistribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * 3. Neither the names of the above-listed copyright holders nor the names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * of any contributors may be used to endorse or promote products derived
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Alternatively, this software may be distributed under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * GNU General Public License ("GPL") version 2 as published by the Free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * POSSIBILITY OF SUCH DAMAGES.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include "pm8001_sas.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * pm8001_find_tag - from sas task to find out tag that belongs to this task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * @task: the task sent to the LLDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * @tag: the found tag associated with the task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static int pm8001_find_tag(struct sas_task *task, u32 *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (task->lldd_task) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct pm8001_ccb_info *ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ccb = task->lldd_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *tag = ccb->ccb_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * pm8001_tag_free - free the no more needed tag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * @pm8001_ha: our hba struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @tag: the found tag associated with the task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void *bitmap = pm8001_ha->tags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) clear_bit(tag, bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * pm8001_tag_alloc - allocate a empty tag for task used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * @pm8001_ha: our hba struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * @tag_out: the found empty tag .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) inline int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned int tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) void *bitmap = pm8001_ha->tags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) spin_lock_irqsave(&pm8001_ha->bitmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) tag = find_first_zero_bit(bitmap, pm8001_ha->tags_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (tag >= pm8001_ha->tags_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) spin_unlock_irqrestore(&pm8001_ha->bitmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return -SAS_QUEUE_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) set_bit(tag, bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) spin_unlock_irqrestore(&pm8001_ha->bitmap_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) *tag_out = tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) for (i = 0; i < pm8001_ha->tags_num; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) pm8001_tag_free(pm8001_ha, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * pm8001_mem_alloc - allocate memory for pm8001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * @pdev: pci device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @virt_addr: the allocated virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * @pphys_addr_hi: the physical address high byte address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * @pphys_addr_lo: the physical address low byte address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * @mem_size: memory size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) dma_addr_t *pphys_addr, u32 *pphys_addr_hi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 *pphys_addr_lo, u32 mem_size, u32 align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) caddr_t mem_virt_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) dma_addr_t mem_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u64 phys_align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u64 align_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) align_offset = (dma_addr_t)align - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) mem_virt_alloc = dma_alloc_coherent(&pdev->dev, mem_size + align,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) &mem_dma_handle, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (!mem_virt_alloc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) pr_err("pm80xx: memory allocation error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) *pphys_addr = mem_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) phys_align = (*pphys_addr + align_offset) & ~align_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) *virt_addr = (void *)mem_virt_alloc + phys_align - *pphys_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) *pphys_addr_hi = upper_32_bits(phys_align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) *pphys_addr_lo = lower_32_bits(phys_align);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * pm8001_find_ha_by_dev - from domain device which come from sas layer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * find out our hba struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * @dev: the domain device which from sas layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct pm8001_hba_info *pm8001_find_ha_by_dev(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct sas_ha_struct *sha = dev->port->ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct pm8001_hba_info *pm8001_ha = sha->lldd_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return pm8001_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * pm8001_phy_control - this function should be registered to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * sas_domain_function_template to provide libsas used, note: this is just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * control the HBA phy rather than other expander phy if you want control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * other phy, you should use SMP command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * @sas_phy: which phy in HBA phys.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * @func: the operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * @funcdata: always NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) void *funcdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int rc = 0, phy_id = sas_phy->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct pm8001_hba_info *pm8001_ha = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct sas_phy_linkrates *rates;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct pm8001_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) DECLARE_COMPLETION_ONSTACK(completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) pm8001_ha = sas_phy->ha->lldd_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) phy = &pm8001_ha->phy[phy_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pm8001_ha->phy[phy_id].enable_completion = &completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) switch (func) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case PHY_FUNC_SET_LINK_RATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) rates = funcdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (rates->minimum_linkrate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) pm8001_ha->phy[phy_id].minimum_linkrate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) rates->minimum_linkrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (rates->maximum_linkrate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) pm8001_ha->phy[phy_id].maximum_linkrate =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) rates->maximum_linkrate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (pm8001_ha->phy[phy_id].phy_state == PHY_LINK_DISABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) PM8001_CHIP_DISP->phy_start_req(pm8001_ha, phy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) wait_for_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) PM8001_CHIP_DISP->phy_ctl_req(pm8001_ha, phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) PHY_LINK_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) case PHY_FUNC_HARD_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (pm8001_ha->phy[phy_id].phy_state == PHY_LINK_DISABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) PM8001_CHIP_DISP->phy_start_req(pm8001_ha, phy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) wait_for_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) PM8001_CHIP_DISP->phy_ctl_req(pm8001_ha, phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) PHY_HARD_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) case PHY_FUNC_LINK_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (pm8001_ha->phy[phy_id].phy_state == PHY_LINK_DISABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) PM8001_CHIP_DISP->phy_start_req(pm8001_ha, phy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) wait_for_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) PM8001_CHIP_DISP->phy_ctl_req(pm8001_ha, phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) PHY_LINK_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) case PHY_FUNC_RELEASE_SPINUP_HOLD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) PM8001_CHIP_DISP->phy_ctl_req(pm8001_ha, phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) PHY_LINK_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) case PHY_FUNC_DISABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (pm8001_ha->chip_id != chip_8001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (pm8001_ha->phy[phy_id].phy_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) PHY_STATE_LINK_UP_SPCV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) sas_phy_disconnected(&phy->sas_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) sas_notify_phy_event(&phy->sas_phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) PHYE_LOSS_OF_SIGNAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) phy->phy_attached = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (pm8001_ha->phy[phy_id].phy_state ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) PHY_STATE_LINK_UP_SPC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) sas_phy_disconnected(&phy->sas_phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) sas_notify_phy_event(&phy->sas_phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) PHYE_LOSS_OF_SIGNAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) phy->phy_attached = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) PM8001_CHIP_DISP->phy_stop_req(pm8001_ha, phy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) case PHY_FUNC_GET_EVENTS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (pm8001_ha->chip_id == chip_8001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (-1 == pm8001_bar4_shift(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) (phy_id < 4) ? 0x30000 : 0x40000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) struct sas_phy *phy = sas_phy->phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) uint32_t *qp = (uint32_t *)(((char *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) pm8001_ha->io_mem[2].memvirtaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) + 0x1034 + (0x4000 * (phy_id & 3)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) phy->invalid_dword_count = qp[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) phy->running_disparity_error_count = qp[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) phy->loss_of_dword_sync_count = qp[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) phy->phy_reset_problem_count = qp[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (pm8001_ha->chip_id == chip_8001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) pm8001_bar4_shift(pm8001_ha, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) pm8001_dbg(pm8001_ha, DEVIO, "func 0x%x\n", func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) rc = -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) msleep(300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * pm8001_scan_start - we should enable all HBA phys by sending the phy_start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * command to HBA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * @shost: the scsi host data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) void pm8001_scan_start(struct Scsi_Host *shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct pm8001_hba_info *pm8001_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) DECLARE_COMPLETION_ONSTACK(completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) pm8001_ha = sha->lldd_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* SAS_RE_INITIALIZATION not available in SPCv/ve */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (pm8001_ha->chip_id == chip_8001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) PM8001_CHIP_DISP->sas_re_init_req(pm8001_ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) for (i = 0; i < pm8001_ha->chip->n_phy; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) pm8001_ha->phy[i].enable_completion = &completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) PM8001_CHIP_DISP->phy_start_req(pm8001_ha, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) wait_for_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) msleep(300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /* give the phy enabling interrupt event time to come in (1s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * is empirically about all it takes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (time < HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) /* Wait for discovery to finish */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) sas_drain_work(ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * pm8001_task_prep_smp - the dispatcher function, prepare data for smp task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * @pm8001_ha: our hba card information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * @ccb: the ccb which attached to smp task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static int pm8001_task_prep_smp(struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct pm8001_ccb_info *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return PM8001_CHIP_DISP->smp_req(pm8001_ha, ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct ata_queued_cmd *qc = task->uldd_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (qc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) qc->tf.command == ATA_CMD_FPDMA_READ ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) qc->tf.command == ATA_CMD_FPDMA_RECV ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) qc->tf.command == ATA_CMD_FPDMA_SEND ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) qc->tf.command == ATA_CMD_NCQ_NON_DATA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) *tag = qc->tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * pm8001_task_prep_ata - the dispatcher function, prepare data for sata task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * @pm8001_ha: our hba card information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * @ccb: the ccb which attached to sata task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static int pm8001_task_prep_ata(struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct pm8001_ccb_info *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return PM8001_CHIP_DISP->sata_req(pm8001_ha, ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * pm8001_task_prep_ssp_tm - the dispatcher function, prepare task management data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * @pm8001_ha: our hba card information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * @ccb: the ccb which attached to TM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * @tmf: the task management IU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static int pm8001_task_prep_ssp_tm(struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return PM8001_CHIP_DISP->ssp_tm_req(pm8001_ha, ccb, tmf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * pm8001_task_prep_ssp - the dispatcher function,prepare ssp data for ssp task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * @pm8001_ha: our hba card information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * @ccb: the ccb which attached to ssp task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) static int pm8001_task_prep_ssp(struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct pm8001_ccb_info *ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return PM8001_CHIP_DISP->ssp_io_req(pm8001_ha, ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* Find the local port id that's attached to this device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int sas_find_local_port_id(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct domain_device *pdev = dev->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) /* Directly attached device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (!pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return dev->port->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) while (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct domain_device *pdev_p = pdev->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (!pdev_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return pdev->port->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) pdev = pdev->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #define DEV_IS_GONE(pm8001_dev) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ((!pm8001_dev || (pm8001_dev->dev_type == SAS_PHY_UNUSED)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * pm8001_task_exec - queue the task(ssp, smp && ata) to the hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * @task: the task to be execute.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * @gfp_flags: gfp_flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * @is_tmf: if it is task management task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * @tmf: the task management IU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) static int pm8001_task_exec(struct sas_task *task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) gfp_t gfp_flags, int is_tmf, struct pm8001_tmf_task *tmf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct domain_device *dev = task->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct pm8001_hba_info *pm8001_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) struct pm8001_device *pm8001_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct pm8001_port *port = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) struct sas_task *t = task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct pm8001_ccb_info *ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) u32 tag = 0xdeadbeef, rc = 0, n_elem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) enum sas_protocol task_proto = t->task_proto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (!dev->port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct task_status_struct *tsm = &t->task_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) tsm->resp = SAS_TASK_UNDELIVERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) tsm->stat = SAS_PHY_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (dev->dev_type != SAS_SATA_DEV)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) t->task_done(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) pm8001_ha = pm8001_find_ha_by_dev(task->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (pm8001_ha->controller_fatal_error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct task_status_struct *ts = &t->task_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ts->resp = SAS_TASK_UNDELIVERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) t->task_done(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) pm8001_dbg(pm8001_ha, IO, "pm8001_task_exec device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) dev = t->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) port = &pm8001_ha->port[sas_find_local_port_id(dev)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (DEV_IS_GONE(pm8001_dev) || !port->port_attached) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (sas_protocol_ata(task_proto)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct task_status_struct *ts = &t->task_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) ts->resp = SAS_TASK_UNDELIVERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ts->stat = SAS_PHY_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) t->task_done(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct task_status_struct *ts = &t->task_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) ts->resp = SAS_TASK_UNDELIVERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) ts->stat = SAS_PHY_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) t->task_done(t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) rc = pm8001_tag_alloc(pm8001_ha, &tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) ccb = &pm8001_ha->ccb_info[tag];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (!sas_protocol_ata(task_proto)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (t->num_scatter) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) n_elem = dma_map_sg(pm8001_ha->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) t->scatter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) t->num_scatter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) t->data_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (!n_elem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) goto err_out_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) n_elem = t->num_scatter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) t->lldd_task = ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) ccb->n_elem = n_elem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ccb->ccb_tag = tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ccb->task = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) ccb->device = pm8001_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) switch (task_proto) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) case SAS_PROTOCOL_SMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) atomic_inc(&pm8001_dev->running_req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) rc = pm8001_task_prep_smp(pm8001_ha, ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) case SAS_PROTOCOL_SSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) atomic_inc(&pm8001_dev->running_req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (is_tmf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) rc = pm8001_task_prep_ssp_tm(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ccb, tmf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) rc = pm8001_task_prep_ssp(pm8001_ha, ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) case SAS_PROTOCOL_SATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) case SAS_PROTOCOL_STP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) atomic_inc(&pm8001_dev->running_req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) rc = pm8001_task_prep_ata(pm8001_ha, ccb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) dev_printk(KERN_ERR, pm8001_ha->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) "unknown sas_task proto: 0x%x\n", task_proto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) pm8001_dbg(pm8001_ha, IO, "rc is %x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) atomic_dec(&pm8001_dev->running_req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) goto err_out_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /* TODO: select normal or high priority */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) spin_lock(&t->task_state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) t->task_state_flags |= SAS_TASK_AT_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) spin_unlock(&t->task_state_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) } while (0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) goto out_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) err_out_tag:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) pm8001_tag_free(pm8001_ha, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) dev_printk(KERN_ERR, pm8001_ha->dev, "pm8001 exec failed[%d]!\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (!sas_protocol_ata(task_proto))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (n_elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) dma_unmap_sg(pm8001_ha->dev, t->scatter, t->num_scatter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) t->data_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) out_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * pm8001_queue_command - register for upper layer used, all IO commands sent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * to HBA are from this interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * @task: the task to be execute.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * @gfp_flags: gfp_flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return pm8001_task_exec(task, gfp_flags, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * pm8001_ccb_task_free - free the sg for ssp and smp command, free the ccb.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * @pm8001_ha: our hba card information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * @ccb: the ccb which attached to ssp task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * @task: the task to be free.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * @ccb_idx: ccb index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (!ccb->task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (!sas_protocol_ata(task->task_proto))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (ccb->n_elem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) dma_unmap_sg(pm8001_ha->dev, task->scatter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) task->num_scatter, task->data_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) switch (task->task_proto) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) case SAS_PROTOCOL_SMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) dma_unmap_sg(pm8001_ha->dev, &task->smp_task.smp_resp, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) dma_unmap_sg(pm8001_ha->dev, &task->smp_task.smp_req, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) case SAS_PROTOCOL_SATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) case SAS_PROTOCOL_STP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) case SAS_PROTOCOL_SSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) /* do nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) task->lldd_task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ccb->task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ccb->ccb_tag = 0xFFFFFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ccb->open_retry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) pm8001_tag_free(pm8001_ha, ccb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * pm8001_alloc_dev - find a empty pm8001_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * @pm8001_ha: our hba card information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static struct pm8001_device *pm8001_alloc_dev(struct pm8001_hba_info *pm8001_ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) u32 dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) for (dev = 0; dev < PM8001_MAX_DEVICES; dev++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (pm8001_ha->devices[dev].dev_type == SAS_PHY_UNUSED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) pm8001_ha->devices[dev].id = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return &pm8001_ha->devices[dev];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (dev == PM8001_MAX_DEVICES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) pm8001_dbg(pm8001_ha, FAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) "max support %d devices, ignore ..\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) PM8001_MAX_DEVICES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * pm8001_find_dev - find a matching pm8001_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) * @pm8001_ha: our hba card information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) * @device_id: device ID to match against
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) u32 device_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) u32 dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) for (dev = 0; dev < PM8001_MAX_DEVICES; dev++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if (pm8001_ha->devices[dev].device_id == device_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return &pm8001_ha->devices[dev];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) if (dev == PM8001_MAX_DEVICES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) pm8001_dbg(pm8001_ha, FAIL, "NO MATCHING DEVICE FOUND !!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static void pm8001_free_dev(struct pm8001_device *pm8001_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) u32 id = pm8001_dev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) memset(pm8001_dev, 0, sizeof(*pm8001_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) pm8001_dev->id = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) pm8001_dev->dev_type = SAS_PHY_UNUSED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) pm8001_dev->device_id = PM8001_MAX_DEVICES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) pm8001_dev->sas_device = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) * pm8001_dev_found_notify - libsas notify a device is found.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) * @dev: the device structure which sas layer used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) * when libsas find a sas domain device, it should tell the LLDD that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) * device is found, and then LLDD register this device to HBA firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) * by the command "OPC_INB_REG_DEV", after that the HBA will assign a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * device ID(according to device's sas address) and returned it to LLDD. From
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * now on, we communicate with HBA FW with the device ID which HBA assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) * rather than sas address. it is the necessary step for our HBA but it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * the optional for other HBA driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static int pm8001_dev_found_notify(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) struct pm8001_hba_info *pm8001_ha = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) struct domain_device *parent_dev = dev->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) struct pm8001_device *pm8001_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) DECLARE_COMPLETION_ONSTACK(completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) u32 flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) pm8001_device = pm8001_alloc_dev(pm8001_ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (!pm8001_device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) res = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) goto found_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) pm8001_device->sas_device = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) dev->lldd_dev = pm8001_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) pm8001_device->dev_type = dev->dev_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) pm8001_device->dcompletion = &completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) int phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) struct ex_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) for (phy_id = 0; phy_id < parent_dev->ex_dev.num_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) phy_id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) phy = &parent_dev->ex_dev.ex_phy[phy_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (SAS_ADDR(phy->attached_sas_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) == SAS_ADDR(dev->sas_addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) pm8001_device->attached_phy = phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (phy_id == parent_dev->ex_dev.num_phys) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) pm8001_dbg(pm8001_ha, FAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) "Error: no attached dev:%016llx at ex:%016llx.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) SAS_ADDR(dev->sas_addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) SAS_ADDR(parent_dev->sas_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) res = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (dev->dev_type == SAS_SATA_DEV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) pm8001_device->attached_phy =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) dev->rphy->identify.phy_identifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) flag = 1; /* directly sata */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) } /*register this device to HBA*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) pm8001_dbg(pm8001_ha, DISC, "Found device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) PM8001_CHIP_DISP->reg_dev_req(pm8001_ha, pm8001_device, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) wait_for_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (dev->dev_type == SAS_END_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) pm8001_ha->flags = PM8001F_RUN_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) found_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) int pm8001_dev_found(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) return pm8001_dev_found_notify(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) void pm8001_task_done(struct sas_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) del_timer(&task->slow_task->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) complete(&task->slow_task->completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static void pm8001_tmf_timedout(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct sas_task_slow *slow = from_timer(slow, t, timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct sas_task *task = slow->task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) spin_lock_irqsave(&task->task_state_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) task->task_state_flags |= SAS_TASK_STATE_ABORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) complete(&task->slow_task->completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) spin_unlock_irqrestore(&task->task_state_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) #define PM8001_TASK_TIMEOUT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) * pm8001_exec_internal_tmf_task - execute some task management commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) * @dev: the wanted device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) * @tmf: which task management wanted to be take.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) * @para_len: para_len.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) * @parameter: ssp task parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) * when errors or exception happened, we may want to do something, for example
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) * abort the issued task which result in this execption, it is done by calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) * this function, note it is also with the task execute interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) static int pm8001_exec_internal_tmf_task(struct domain_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) void *parameter, u32 para_len, struct pm8001_tmf_task *tmf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) int res, retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) struct sas_task *task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) struct pm8001_hba_info *pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) struct pm8001_device *pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) DECLARE_COMPLETION_ONSTACK(completion_setstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) for (retry = 0; retry < 3; retry++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) task = sas_alloc_slow_task(GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (!task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) task->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) task->task_proto = dev->tproto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) memcpy(&task->ssp_task, parameter, para_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) task->task_done = pm8001_task_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) task->slow_task->timer.function = pm8001_tmf_timedout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) task->slow_task->timer.expires = jiffies + PM8001_TASK_TIMEOUT*HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) add_timer(&task->slow_task->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) res = pm8001_task_exec(task, GFP_KERNEL, 1, tmf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) if (res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) del_timer(&task->slow_task->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) pm8001_dbg(pm8001_ha, FAIL, "Executing internal task failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) goto ex_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) wait_for_completion(&task->slow_task->completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (pm8001_ha->chip_id != chip_8001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) pm8001_dev->setds_completion = &completion_setstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) PM8001_CHIP_DISP->set_dev_state_req(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) pm8001_dev, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) wait_for_completion(&completion_setstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) res = -TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) /* Even TMF timed out, return direct. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) if (task->task_state_flags & SAS_TASK_STATE_ABORTED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) struct pm8001_ccb_info *ccb = task->lldd_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) pm8001_dbg(pm8001_ha, FAIL, "TMF task[%x]timeout.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) tmf->tmf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) if (ccb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) ccb->task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) goto ex_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (task->task_status.resp == SAS_TASK_COMPLETE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) task->task_status.stat == SAM_STAT_GOOD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) res = TMF_RESP_FUNC_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (task->task_status.resp == SAS_TASK_COMPLETE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) task->task_status.stat == SAS_DATA_UNDERRUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) /* no error, but return the number of bytes of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) * underrun */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) res = task->task_status.residual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (task->task_status.resp == SAS_TASK_COMPLETE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) task->task_status.stat == SAS_DATA_OVERRUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) pm8001_dbg(pm8001_ha, FAIL, "Blocked task error.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) res = -EMSGSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) pm8001_dbg(pm8001_ha, EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) " Task to dev %016llx response:0x%x status 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) SAS_ADDR(dev->sas_addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) task->task_status.resp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) task->task_status.stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) sas_free_task(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) ex_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) BUG_ON(retry == 3 && task != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) sas_free_task(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) pm8001_exec_internal_task_abort(struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) struct pm8001_device *pm8001_dev, struct domain_device *dev, u32 flag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) u32 task_tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) int res, retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) u32 ccb_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) struct pm8001_ccb_info *ccb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) struct sas_task *task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) for (retry = 0; retry < 3; retry++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) task = sas_alloc_slow_task(GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (!task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) task->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) task->task_proto = dev->tproto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) task->task_done = pm8001_task_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) task->slow_task->timer.function = pm8001_tmf_timedout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) task->slow_task->timer.expires = jiffies + PM8001_TASK_TIMEOUT * HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) add_timer(&task->slow_task->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) goto ex_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) ccb = &pm8001_ha->ccb_info[ccb_tag];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) ccb->device = pm8001_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) ccb->ccb_tag = ccb_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) ccb->task = task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) ccb->n_elem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) res = PM8001_CHIP_DISP->task_abort(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) pm8001_dev, flag, task_tag, ccb_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) del_timer(&task->slow_task->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) pm8001_dbg(pm8001_ha, FAIL, "Executing internal task failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) goto ex_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) wait_for_completion(&task->slow_task->completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) res = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) /* Even TMF timed out, return direct. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) if (task->task_state_flags & SAS_TASK_STATE_ABORTED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) pm8001_dbg(pm8001_ha, FAIL, "TMF task timeout.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) goto ex_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) if (task->task_status.resp == SAS_TASK_COMPLETE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) task->task_status.stat == SAM_STAT_GOOD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) res = TMF_RESP_FUNC_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) pm8001_dbg(pm8001_ha, EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) " Task to dev %016llx response: 0x%x status 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) SAS_ADDR(dev->sas_addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) task->task_status.resp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) task->task_status.stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) sas_free_task(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) ex_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) BUG_ON(retry == 3 && task != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) sas_free_task(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) * pm8001_dev_gone_notify - see the comments for "pm8001_dev_found_notify"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * @dev: the device structure which sas layer used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) static void pm8001_dev_gone_notify(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) struct pm8001_hba_info *pm8001_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct pm8001_device *pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (pm8001_dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) u32 device_id = pm8001_dev->device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) pm8001_dbg(pm8001_ha, DISC, "found dev[%d:%x] is gone.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) pm8001_dev->device_id, pm8001_dev->dev_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) if (atomic_read(&pm8001_dev->running_req)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) dev, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) while (atomic_read(&pm8001_dev->running_req))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) PM8001_CHIP_DISP->dereg_dev_req(pm8001_ha, device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) pm8001_free_dev(pm8001_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) pm8001_dbg(pm8001_ha, DISC, "Found dev has gone.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) dev->lldd_dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) void pm8001_dev_gone(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) pm8001_dev_gone_notify(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) static int pm8001_issue_ssp_tmf(struct domain_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) u8 *lun, struct pm8001_tmf_task *tmf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) struct sas_ssp_task ssp_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) if (!(dev->tproto & SAS_PROTOCOL_SSP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) return TMF_RESP_FUNC_ESUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) strncpy((u8 *)&ssp_task.LUN, lun, 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return pm8001_exec_internal_tmf_task(dev, &ssp_task, sizeof(ssp_task),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) tmf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) /* retry commands by ha, by task and/or by device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) void pm8001_open_reject_retry(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) struct pm8001_hba_info *pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) struct sas_task *task_to_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) struct pm8001_device *device_to_close)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (pm8001_ha == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) for (i = 0; i < PM8001_MAX_CCB; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) struct sas_task *task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) struct task_status_struct *ts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) struct pm8001_device *pm8001_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) unsigned long flags1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) u32 tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) struct pm8001_ccb_info *ccb = &pm8001_ha->ccb_info[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) pm8001_dev = ccb->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (!pm8001_dev || (pm8001_dev->dev_type == SAS_PHY_UNUSED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) if (!device_to_close) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) uintptr_t d = (uintptr_t)pm8001_dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) - (uintptr_t)&pm8001_ha->devices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) if (((d % sizeof(*pm8001_dev)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) || ((d / sizeof(*pm8001_dev)) >= PM8001_MAX_DEVICES))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) } else if (pm8001_dev != device_to_close)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) tag = ccb->ccb_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) if (!tag || (tag == 0xFFFFFFFF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) task = ccb->task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (!task || !task->task_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) if (task_to_close && (task != task_to_close))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) ts = &task->task_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) ts->resp = SAS_TASK_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) /* Force the midlayer to retry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) ts->stat = SAS_OPEN_REJECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) ts->open_rej_reason = SAS_OREJ_RSVD_RETRY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (pm8001_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) atomic_dec(&pm8001_dev->running_req);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) spin_lock_irqsave(&task->task_state_lock, flags1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) task->task_state_flags &= ~SAS_TASK_AT_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) task->task_state_flags |= SAS_TASK_STATE_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) if (unlikely((task->task_state_flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) & SAS_TASK_STATE_ABORTED))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) spin_unlock_irqrestore(&task->task_state_lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) flags1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) pm8001_ccb_task_free(pm8001_ha, task, ccb, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) spin_unlock_irqrestore(&task->task_state_lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) flags1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) pm8001_ccb_task_free(pm8001_ha, task, ccb, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) mb();/* in order to force CPU ordering */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) task->task_done(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) spin_lock_irqsave(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) spin_unlock_irqrestore(&pm8001_ha->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) * Standard mandates link reset for ATA (type 0) and hard reset for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) * SSP (type 1) , only for RECOVERY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) * @dev: the device structure for the device to reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) int pm8001_I_T_nexus_reset(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) int rc = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) struct pm8001_device *pm8001_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) struct pm8001_hba_info *pm8001_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) struct sas_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) if (!dev || !dev->lldd_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) phy = sas_get_local_phy(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) if (dev_is_sata(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) if (scsi_is_sas_phy_local(phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) rc = sas_phy_reset(phy, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) pm8001_dbg(pm8001_ha, EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) "phy reset failed for device %x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) "with rc %d\n", pm8001_dev->device_id, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) rc = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) msleep(2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) dev, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) pm8001_dbg(pm8001_ha, EH, "task abort failed %x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) "with rc %d\n", pm8001_dev->device_id, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) rc = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) rc = sas_phy_reset(phy, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) msleep(2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) pm8001_dbg(pm8001_ha, EH, " for device[%x]:rc=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) pm8001_dev->device_id, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) sas_put_local_phy(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) * This function handle the IT_NEXUS_XXX event or completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * status code for SSP/SATA/SMP I/O request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) int pm8001_I_T_nexus_event_handler(struct domain_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) int rc = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) struct pm8001_device *pm8001_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) struct pm8001_hba_info *pm8001_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) struct sas_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) if (!dev || !dev->lldd_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) pm8001_dbg(pm8001_ha, EH, "I_T_Nexus handler invoked !!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) phy = sas_get_local_phy(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) if (dev_is_sata(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) DECLARE_COMPLETION_ONSTACK(completion_setstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (scsi_is_sas_phy_local(phy)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) /* send internal ssp/sata/smp abort command to FW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) dev, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) /* deregister the target device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) pm8001_dev_gone_notify(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) /*send phy reset to hard reset target */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) rc = sas_phy_reset(phy, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) msleep(2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) pm8001_dev->setds_completion = &completion_setstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) wait_for_completion(&completion_setstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) /* send internal ssp/sata/smp abort command to FW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) dev, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) /* deregister the target device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) pm8001_dev_gone_notify(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) msleep(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) /*send phy reset to hard reset target */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) rc = sas_phy_reset(phy, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) msleep(2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) pm8001_dbg(pm8001_ha, EH, " for device[%x]:rc=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) pm8001_dev->device_id, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) sas_put_local_phy(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) /* mandatory SAM-3, the task reset the specified LUN*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) int pm8001_lu_reset(struct domain_device *dev, u8 *lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) int rc = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) struct pm8001_tmf_task tmf_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) struct pm8001_device *pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) struct pm8001_hba_info *pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) DECLARE_COMPLETION_ONSTACK(completion_setstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) if (dev_is_sata(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) struct sas_phy *phy = sas_get_local_phy(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) dev, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) rc = sas_phy_reset(phy, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) sas_put_local_phy(phy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) pm8001_dev->setds_completion = &completion_setstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) rc = PM8001_CHIP_DISP->set_dev_state_req(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) pm8001_dev, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) wait_for_completion(&completion_setstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) tmf_task.tmf = TMF_LU_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) rc = pm8001_issue_ssp_tmf(dev, lun, &tmf_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) /* If failed, fall-through I_T_Nexus reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) pm8001_dbg(pm8001_ha, EH, "for device[%x]:rc=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) pm8001_dev->device_id, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) /* optional SAM-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) int pm8001_query_task(struct sas_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) u32 tag = 0xdeadbeef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) struct scsi_lun lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) struct pm8001_tmf_task tmf_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) int rc = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) if (unlikely(!task || !task->lldd_task || !task->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) if (task->task_proto & SAS_PROTOCOL_SSP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) struct scsi_cmnd *cmnd = task->uldd_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) struct domain_device *dev = task->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) struct pm8001_hba_info *pm8001_ha =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) int_to_scsilun(cmnd->device->lun, &lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) rc = pm8001_find_tag(task, &tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) if (rc == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) rc = TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) pm8001_dbg(pm8001_ha, EH, "Query:[%16ph]\n", cmnd->cmnd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) tmf_task.tmf = TMF_QUERY_TASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) tmf_task.tag_of_task_to_be_managed = tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) rc = pm8001_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) switch (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) /* The task is still in Lun, release it then */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) case TMF_RESP_FUNC_SUCC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) pm8001_dbg(pm8001_ha, EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) "The task is still in Lun\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) /* The task is not in Lun or failed, reset the phy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) case TMF_RESP_FUNC_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) case TMF_RESP_FUNC_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) pm8001_dbg(pm8001_ha, EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) "The task is not in Lun or failed, reset the phy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) pr_err("pm80xx: rc= %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) /* mandatory SAM-3, still need free task/ccb info, abort the specified task */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) int pm8001_abort_task(struct sas_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) u32 tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) struct domain_device *dev ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) struct pm8001_hba_info *pm8001_ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) struct scsi_lun lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) struct pm8001_device *pm8001_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) struct pm8001_tmf_task tmf_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) int rc = TMF_RESP_FUNC_FAILED, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) u32 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) struct sas_task_slow slow_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) if (unlikely(!task || !task->lldd_task || !task->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) return TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) dev = task->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) phy_id = pm8001_dev->attached_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) ret = pm8001_find_tag(task, &tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) pm8001_printk("no tag for task:%p\n", task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) return TMF_RESP_FUNC_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) spin_lock_irqsave(&task->task_state_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) if (task->task_state_flags & SAS_TASK_STATE_DONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) spin_unlock_irqrestore(&task->task_state_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) return TMF_RESP_FUNC_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) task->task_state_flags |= SAS_TASK_STATE_ABORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) if (task->slow_task == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) init_completion(&slow_task.completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) task->slow_task = &slow_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) spin_unlock_irqrestore(&task->task_state_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) if (task->task_proto & SAS_PROTOCOL_SSP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) struct scsi_cmnd *cmnd = task->uldd_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) int_to_scsilun(cmnd->device->lun, &lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) tmf_task.tmf = TMF_ABORT_TASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) tmf_task.tag_of_task_to_be_managed = tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) rc = pm8001_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) pm8001_dev->sas_device, 0, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) } else if (task->task_proto & SAS_PROTOCOL_SATA ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) task->task_proto & SAS_PROTOCOL_STP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) if (pm8001_ha->chip_id == chip_8006) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) DECLARE_COMPLETION_ONSTACK(completion_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) DECLARE_COMPLETION_ONSTACK(completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) struct pm8001_phy *phy = pm8001_ha->phy + phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) /* 1. Set Device state as Recovery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) pm8001_dev->setds_completion = &completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) PM8001_CHIP_DISP->set_dev_state_req(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) pm8001_dev, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) wait_for_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) /* 2. Send Phy Control Hard Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) reinit_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) phy->port_reset_status = PORT_RESET_TMO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) phy->reset_success = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) phy->enable_completion = &completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) phy->reset_completion = &completion_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) ret = PM8001_CHIP_DISP->phy_ctl_req(pm8001_ha, phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) PHY_HARD_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) phy->enable_completion = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) phy->reset_completion = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) /* In the case of the reset timeout/fail we still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) * abort the command at the firmware. The assumption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) * here is that the drive is off doing something so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) * that it's not processing requests, and we want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) * avoid getting a completion for this and either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) * leaking the task in libsas or losing the race and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) * getting a double free.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) pm8001_dbg(pm8001_ha, MSG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) "Waiting for local phy ctl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) ret = wait_for_completion_timeout(&completion,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) PM8001_TASK_TIMEOUT * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) if (!ret || !phy->reset_success) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) phy->enable_completion = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) phy->reset_completion = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) /* 3. Wait for Port Reset complete or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) * Port reset TMO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) pm8001_dbg(pm8001_ha, MSG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) "Waiting for Port reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) ret = wait_for_completion_timeout(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) &completion_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) PM8001_TASK_TIMEOUT * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) phy->reset_completion = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) WARN_ON(phy->port_reset_status ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) PORT_RESET_TMO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) if (phy->port_reset_status == PORT_RESET_TMO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) pm8001_dev_gone_notify(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) * 4. SATA Abort ALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) * we wait for the task to be aborted so that the task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) * is removed from the ccb. on success the caller is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) * going to free the task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) ret = pm8001_exec_internal_task_abort(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) pm8001_dev, pm8001_dev->sas_device, 1, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) ret = wait_for_completion_timeout(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) &task->slow_task->completion,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) PM8001_TASK_TIMEOUT * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) /* 5. Set Device State as Operational */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) reinit_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) pm8001_dev->setds_completion = &completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) PM8001_CHIP_DISP->set_dev_state_req(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) pm8001_dev, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) wait_for_completion(&completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) rc = pm8001_exec_internal_task_abort(pm8001_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) pm8001_dev, pm8001_dev->sas_device, 0, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) rc = TMF_RESP_FUNC_COMPLETE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) } else if (task->task_proto & SAS_PROTOCOL_SMP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) /* SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) pm8001_dev->sas_device, 0, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) spin_lock_irqsave(&task->task_state_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) if (task->slow_task == &slow_task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) task->slow_task = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) spin_unlock_irqrestore(&task->task_state_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) if (rc != TMF_RESP_FUNC_COMPLETE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) pm8001_printk("rc= %d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) int pm8001_abort_task_set(struct domain_device *dev, u8 *lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) struct pm8001_tmf_task tmf_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) tmf_task.tmf = TMF_ABORT_TASK_SET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) return pm8001_issue_ssp_tmf(dev, lun, &tmf_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) int pm8001_clear_aca(struct domain_device *dev, u8 *lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) struct pm8001_tmf_task tmf_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) tmf_task.tmf = TMF_CLEAR_ACA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) return pm8001_issue_ssp_tmf(dev, lun, &tmf_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) int pm8001_clear_task_set(struct domain_device *dev, u8 *lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) struct pm8001_tmf_task tmf_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) struct pm8001_device *pm8001_dev = dev->lldd_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) struct pm8001_hba_info *pm8001_ha = pm8001_find_ha_by_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) pm8001_dbg(pm8001_ha, EH, "I_T_L_Q clear task set[%x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) pm8001_dev->device_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) tmf_task.tmf = TMF_CLEAR_TASK_SET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) return pm8001_issue_ssp_tmf(dev, lun, &tmf_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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