Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (c) 2008-2009 USI Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *    notice, this list of conditions, and the following disclaimer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  *    without modification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  *    substantially similar to the "NO WARRANTY" disclaimer below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  *    ("Disclaimer") and any redistribution must be conditioned upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  *    including a substantially similar Disclaimer requirement for further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  *    binary redistribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * 3. Neither the names of the above-listed copyright holders nor the names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  *    of any contributors may be used to endorse or promote products derived
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  *    from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * Alternatively, this software may be distributed under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * GNU General Public License ("GPL") version 2 as published by the Free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)  * POSSIBILITY OF SUCH DAMAGES.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #ifndef _PM8001_CHIPS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define _PM8001_CHIPS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static inline u32 pm8001_read_32(void *virt_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	return *((u32 *)virt_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static inline void pm8001_write_32(void *addr, u32 offset, __le32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	*((__le32 *)(addr + offset)) = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static inline u32 pm8001_cr32(struct pm8001_hba_info *pm8001_ha, u32 bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	return readl(pm8001_ha->io_mem[bar].memvirtaddr + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline void pm8001_cw32(struct pm8001_hba_info *pm8001_ha, u32 bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		u32 addr, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	writel(val, pm8001_ha->io_mem[bar].memvirtaddr + addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static inline u32 pm8001_mr32(void __iomem *addr, u32 offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	return readl(addr + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static inline void pm8001_mw32(void __iomem *addr, u32 offset, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	writel(val, addr + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static inline u32 get_pci_bar_index(u32 pcibar)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 		switch (pcibar) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 		case 0x18:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 		case 0x1C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 		case 0x20:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 			return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 		case 0x24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 			return 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #endif  /* _PM8001_CHIPS_H_ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)