^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Workbit NinjaSCSI-32Bi/UDE PCI/CardBus SCSI Host Bus Adapter driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * I/O routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This software may be used and distributed according to the terms of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * the GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef _NSP32_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define _NSP32_IO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) static inline void nsp32_write1(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) outb(val, (base + index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static inline unsigned char nsp32_read1(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) return inb(base + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static inline void nsp32_write2(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned short val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) outw(val, (base + index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static inline unsigned short nsp32_read2(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return inw(base + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static inline void nsp32_write4(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) outl(val, (base + index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static inline unsigned long nsp32_read4(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return inl(base + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /*==============================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static inline void nsp32_mmio_write1(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) volatile unsigned char *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) writeb(val, ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static inline unsigned char nsp32_mmio_read1(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) volatile unsigned char *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ptr = (unsigned char *)(base + NSP32_MMIO_OFFSET + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return readb(ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static inline void nsp32_mmio_write2(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned short val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) volatile unsigned short *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) writew(cpu_to_le16(val), ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static inline unsigned short nsp32_mmio_read2(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) volatile unsigned short *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return le16_to_cpu(readw(ptr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static inline void nsp32_mmio_write4(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) volatile unsigned long *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) ptr = (unsigned long *)(base + NSP32_MMIO_OFFSET + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) writel(cpu_to_le32(val), ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static inline unsigned long nsp32_mmio_read4(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) unsigned int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) volatile unsigned long *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ptr = (unsigned long *)(base + NSP32_MMIO_OFFSET + index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return le32_to_cpu(readl(ptr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*==============================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static inline unsigned char nsp32_index_read1(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) outb(reg, base + INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return inb(base + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static inline void nsp32_index_write1(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) outb(reg, base + INDEX_REG );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) outb(val, base + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static inline unsigned short nsp32_index_read2(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) outb(reg, base + INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return inw(base + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static inline void nsp32_index_write2(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned short val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) outb(reg, base + INDEX_REG );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) outw(val, base + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static inline unsigned long nsp32_index_read4(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned long h,l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) outb(reg, base + INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) l = inw(base + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) h = inw(base + DATA_REG_HI );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return ((h << 16) | l);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static inline void nsp32_index_write4(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) unsigned long h,l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) h = (val & 0xffff0000) >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) l = (val & 0x0000ffff) >> 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) outb(reg, base + INDEX_REG );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) outw(l, base + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) outw(h, base + DATA_REG_HI );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /*==============================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static inline unsigned char nsp32_mmio_index_read1(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) volatile unsigned short *index_ptr, *data_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) writeb(reg, index_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return readb(data_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static inline void nsp32_mmio_index_write1(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) volatile unsigned short *index_ptr, *data_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) writeb(reg, index_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) writeb(val, data_ptr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static inline unsigned short nsp32_mmio_index_read2(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) volatile unsigned short *index_ptr, *data_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) writeb(reg, index_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) return le16_to_cpu(readw(data_ptr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static inline void nsp32_mmio_index_write2(unsigned long base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) unsigned short val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) volatile unsigned short *index_ptr, *data_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) index_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) data_ptr = (unsigned short *)(base + NSP32_MMIO_OFFSET + DATA_REG_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) writeb(reg, index_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) writew(cpu_to_le16(val), data_ptr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /*==============================================*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static inline void nsp32_multi_read4(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) void *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) unsigned long count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) insl(base + reg, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static inline void nsp32_fifo_read(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) void *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) unsigned long count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) nsp32_multi_read4(base, FIFO_DATA_LOW, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static inline void nsp32_multi_write4(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) void *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) unsigned long count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) outsl(base + reg, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static inline void nsp32_fifo_write(unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) void *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) unsigned long count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) nsp32_multi_write4(base, FIFO_DATA_LOW, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #endif /* _NSP32_IO_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /* end */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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