^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2001, 2002, 2003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Revision History:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * 1.0: Initial Release.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * 1.1: Add /proc SDTR status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Remove obsolete error handler nsp32_reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Some clean up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * 1.2: PowerPC (big endian) support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/major.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <scsi/scsi_cmnd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <scsi/scsi_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <scsi/scsi_ioctl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "nsp32.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /***********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Module parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static int trans_mode = 0; /* default: BIOS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) module_param (trans_mode, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define ASYNC_MODE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ULTRA20M_MODE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static bool auto_param = 0; /* default: ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) module_param (auto_param, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static bool disc_priv = 1; /* default: OFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) module_param (disc_priv, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static const char *nsp32_release_version = "1.2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * Supported hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static struct pci_device_id nsp32_pci_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .vendor = PCI_VENDOR_ID_IODATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .driver_data = MODEL_IODATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .vendor = PCI_VENDOR_ID_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .driver_data = MODEL_KME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .vendor = PCI_VENDOR_ID_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .driver_data = MODEL_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .vendor = PCI_VENDOR_ID_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .driver_data = MODEL_PCI_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .vendor = PCI_VENDOR_ID_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .driver_data = MODEL_LOGITEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .vendor = PCI_VENDOR_ID_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .driver_data = MODEL_PCI_LOGITEC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .vendor = PCI_VENDOR_ID_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .driver_data = MODEL_PCI_MELCO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .vendor = PCI_VENDOR_ID_WORKBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .driver_data = MODEL_PCI_MELCO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {0,0,},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * Period/AckWidth speed conversion table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * Note: This period/ackwidth speed table must be in descending order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static nsp32_sync_table nsp32_sync_table_40M[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static nsp32_sync_table nsp32_sync_table_20M[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static nsp32_sync_table nsp32_sync_table_pci[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * function declaration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) /* module entry point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static void nsp32_remove(struct pci_dev *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static int __init init_nsp32 (void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void __exit exit_nsp32 (void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* struct struct scsi_host_template */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int nsp32_detect (struct pci_dev *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static const char *nsp32_info (struct Scsi_Host *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int nsp32_release (struct Scsi_Host *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* SCSI error handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int nsp32_eh_abort (struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int nsp32_eh_host_reset(struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* generate SCSI message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static void nsp32_build_identify(struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static void nsp32_build_nop (struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static void nsp32_build_reject (struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* SCSI message handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static void nsp32_msgout_occur (struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int nsp32_setup_sg_table (struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static int nsp32_selection_autopara(struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int nsp32_selection_autoscsi(struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static void nsp32_scsi_done (struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* SCSI SDTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static void nsp32_analyze_sdtr (struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) /* SCSI bus status handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static void nsp32_wait_req (nsp32_hw_data *, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static void nsp32_wait_sack (nsp32_hw_data *, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static void nsp32_sack_assert (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static void nsp32_sack_negate (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static void nsp32_do_bus_reset(nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* hardware interrupt handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static irqreturn_t do_nsp32_isr(int, void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /* initialize hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int nsp32hw_init(nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* EEPROM handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int nsp32_getprom_param (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int nsp32_getprom_at24 (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static int nsp32_getprom_c16 (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void nsp32_prom_start (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static void nsp32_prom_stop (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int nsp32_prom_read (nsp32_hw_data *, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static int nsp32_prom_read_bit (nsp32_hw_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static void nsp32_prom_write_bit(nsp32_hw_data *, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static void nsp32_prom_set (nsp32_hw_data *, int, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static int nsp32_prom_get (nsp32_hw_data *, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /* debug/warning/info message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static void nsp32_message (const char *, int, char *, char *, ...);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #ifdef NSP32_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static void nsp32_dmessage(const char *, int, int, char *, ...);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * max_sectors is currently limited up to 128.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static struct scsi_host_template nsp32_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .proc_name = "nsp32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .name = "Workbit NinjaSCSI-32Bi/UDE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .show_info = nsp32_show_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .info = nsp32_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .queuecommand = nsp32_queuecommand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .can_queue = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .sg_tablesize = NSP32_SG_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .max_sectors = 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .this_id = NSP32_HOST_SCSIID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .dma_boundary = PAGE_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .eh_abort_handler = nsp32_eh_abort,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .eh_host_reset_handler = nsp32_eh_host_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* .highmem_io = 1, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #include "nsp32_io.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /***********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * debug, error print
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #ifndef NSP32_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) # define NSP32_DEBUG_MASK 0x000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) # define nsp32_dbg(mask, args...) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) # define NSP32_DEBUG_MASK 0xffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) # define nsp32_msg(type, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) nsp32_message (__func__, __LINE__, (type), args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) # define nsp32_dbg(mask, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) nsp32_dmessage(__func__, __LINE__, (mask), args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define NSP32_DEBUG_REGISTER BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define NSP32_DEBUG_AUTOSCSI BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define NSP32_DEBUG_INTR BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define NSP32_DEBUG_SGLIST BIT(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define NSP32_DEBUG_BUSFREE BIT(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define NSP32_DEBUG_RESELECTION BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define NSP32_DEBUG_MSGINOCCUR BIT(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define NSP32_DEBUG_EEPROM BIT(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define NSP32_DEBUG_BUSRESET BIT(11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define NSP32_DEBUG_RESTART BIT(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define NSP32_DEBUG_SYNC BIT(13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define NSP32_DEBUG_WAIT BIT(14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define NSP32_DEBUG_TARGETFLAG BIT(15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #define NSP32_DEBUG_PROC BIT(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #define NSP32_DEBUG_INIT BIT(17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define NSP32_DEBUG_BUF_LEN 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) va_list args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) char buf[NSP32_DEBUG_BUF_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) va_start(args, fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) vsnprintf(buf, sizeof(buf), fmt, args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) va_end(args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #ifndef NSP32_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) printk("%snsp32: %s\n", type, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #ifdef NSP32_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) va_list args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) char buf[NSP32_DEBUG_BUF_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) va_start(args, fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) vsnprintf(buf, sizeof(buf), fmt, args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) va_end(args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (mask & NSP32_DEBUG_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #ifdef NSP32_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) # include "nsp32_debug.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) # define show_command(arg) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) # define show_busphase(arg) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) # define show_autophase(arg) /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * IDENTIFY Message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) int pos = data->msgout_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) int mode = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* XXX: Auto DiscPriv detection is progressing... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (disc_priv == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* mode = TRUE; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) data->msgout_len = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * SDTR Message Routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) unsigned char period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) unsigned char offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int pos = data->msgout_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) data->msgoutbuf[pos] = period; pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) data->msgoutbuf[pos] = offset; pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) data->msgout_len = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * No Operation Message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) int pos = data->msgout_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (pos != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) nsp32_msg(KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) "Some messages are already contained!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) data->msgoutbuf[pos] = NOP; pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) data->msgout_len = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * Reject Message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) int pos = data->msgout_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) data->msgout_len = pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) * timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) unsigned int base = SCpnt->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (time & (~TIMER_CNT_MASK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * set SCSI command and other parameter to asic, and start selection phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) unsigned int host_id = SCpnt->device->host->this_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) unsigned char target = scmd_id(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) nsp32_autoparam *param = data->autoparam;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) unsigned char phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) unsigned int msgout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) u16_le s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * check bus free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) phase = nsp32_read1(base, SCSI_BUS_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (phase != BUSMON_BUS_FREE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) nsp32_msg(KERN_WARNING, "bus busy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) show_busphase(phase & BUSMON_PHASE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) SCpnt->result = DID_BUS_BUSY << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * message out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * over 3 messages needs another routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (data->msgout_len == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) SCpnt->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) msgout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) for (i = 0; i < data->msgout_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * the sending order of the message is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) * MCNT 2: MSG#1 -> MSG#2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * MCNT 1: MSG#2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) msgout >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) msgout |= MV_VALID; /* MV valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) msgout |= (unsigned int)data->msgout_len; /* len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* data->msgout_len > 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) msgout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * setup asic parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) memset(param, 0, sizeof(nsp32_autoparam));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* cdb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) for (i = 0; i < SCpnt->cmd_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) param->cdb[4 * i] = SCpnt->cmnd[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /* outgoing messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) param->msgout = cpu_to_le32(msgout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) /* syncreg, ackwidth, target id, SREQ sampling rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) param->syncreg = data->cur_target->syncreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) param->ackwidth = data->cur_target->ackwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) param->target_id = BIT(host_id) | BIT(target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) param->sample_reg = data->cur_target->sample_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) /* command control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) AUTOSCSI_START |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) AUTO_MSGIN_00_OR_04 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) AUTO_MSGIN_02 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) AUTO_ATN );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /* transfer control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) s = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) switch (data->trans_method) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) case NSP32_TRANSFER_BUSMASTER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) s |= BM_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) case NSP32_TRANSFER_MMIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) s |= CB_MMIO_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) case NSP32_TRANSFER_PIO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) s |= CB_IO_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) nsp32_msg(KERN_ERR, "unknown trans_method");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * For bus master transfer, it's taken off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) s |= (TRANSFER_GO | ALL_COUNTER_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) param->transfer_control = cpu_to_le16(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* sg table addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) * transfer parameter to ASIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) nsp32_write4(base, SGT_ADR, data->auto_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) AUTO_PARAMETER );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * Check arbitration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) ret = nsp32_arbitration(SCpnt, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * Selection with AUTO SCSI (without AUTO PARAMETER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) unsigned int host_id = SCpnt->device->host->this_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) unsigned char target = scmd_id(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) unsigned char phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) unsigned short command = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) unsigned int msgout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) unsigned short execph;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * IRQ disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * check bus line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) phase = nsp32_read1(base, SCSI_BUS_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if ((phase & BUSMON_BSY) || (phase & BUSMON_SEL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) nsp32_msg(KERN_WARNING, "bus busy");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) SCpnt->result = DID_BUS_BUSY << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) status = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) * clear execph
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) * clear FIFO counter to set CDBs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * set CDB0 - CDB15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) for (i = 0; i < SCpnt->cmd_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * set SCSI MSGOUT REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * over 3 messages needs another routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (data->msgout_len == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) SCpnt->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) status = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) msgout = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) for (i = 0; i < data->msgout_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) * the sending order of the message is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) * MCNT 2: MSG#1 -> MSG#2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) * MCNT 1: MSG#2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) msgout >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) msgout |= MV_VALID; /* MV valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) msgout |= (unsigned int)data->msgout_len; /* len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) nsp32_write4(base, SCSI_MSG_OUT, msgout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) /* data->msgout_len > 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) nsp32_write4(base, SCSI_MSG_OUT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * set selection timeout(= 250ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) * set SREQ hazard killer sampling rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) * check other internal clock!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * clear Arbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) * set SYNCREG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * Don't set BM_START_ADR before setting this register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * set ACKWIDTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) data->msgout_len, msgout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * set SGT ADDR (physical address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) * set TRANSFER CONTROL REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) command = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) command |= (TRANSFER_GO | ALL_COUNTER_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (scsi_bufflen(SCpnt) > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) command |= BM_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) command |= CB_MMIO_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) } else if (data->trans_method & NSP32_TRANSFER_PIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) command |= CB_IO_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) nsp32_write2(base, TRANSFER_CONTROL, command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) * start AUTO SCSI, kick off arbitration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) command = (CLEAR_CDB_FIFO_POINTER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) AUTOSCSI_START |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) AUTO_MSGIN_00_OR_04 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) AUTO_MSGIN_02 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) AUTO_ATN );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) nsp32_write2(base, COMMAND_CONTROL, command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * Check arbitration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) status = nsp32_arbitration(SCpnt, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * IRQ enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) nsp32_write2(base, IRQ_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * Arbitration Status Check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * Using udelay(1) consumes CPU time and system time, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * arbitration delay time is defined minimal 2.4us in SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * specification, thus udelay works as coarse grained wait timer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) unsigned char arbit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) int status = TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) int time = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) arbit = nsp32_read1(base, ARBIT_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) time++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) (time <= ARBIT_TIMEOUT_TIME));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) "arbit: 0x%x, delay time: %d", arbit, time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) if (arbit & ARBIT_WIN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) /* Arbitration succeeded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) SCpnt->result = DID_OK << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) } else if (arbit & ARBIT_FAIL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* Arbitration failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) SCpnt->result = DID_BUS_BUSY << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) status = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) * unknown error or ARBIT_GO timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) * something lock up! guess no connection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) SCpnt->result = DID_NO_CONNECT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) status = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) * clear Arbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) * reselection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) * Note: This reselection routine is called from msgin_occur,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) * reselection target id&lun must be already set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) unsigned int host_id = SCpnt->device->host->this_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) unsigned char tmpid, newid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) * calculate reselected SCSI ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) tmpid = nsp32_read1(base, RESELECT_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) tmpid &= (~BIT(host_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) newid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) while (tmpid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (tmpid & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) tmpid >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) newid++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) * If reselected New ID:LUN is not existed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) * or current nexus is not existed, unexpected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) * reselection is occurred. Send reject message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) nsp32_msg(KERN_WARNING, "unknown id/lun");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) } else if(data->lunt[newid][newlun].SCpnt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) nsp32_msg(KERN_WARNING, "no SCSI command is processing");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) data->cur_id = newid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) data->cur_lun = newlun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) data->cur_target = &(data->target[newid]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) data->cur_lunt = &(data->lunt[newid][newlun]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) /* reset SACK/SavedACK counter (or ALL clear?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) * nsp32_setup_sg_table - build scatter gather list for transfer data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) * with bus master.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) int num, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) u32_le l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (sgt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) num = scsi_dma_map(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) if (!num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) else if (num < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) scsi_for_each_sg(SCpnt, sg, num, i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) * Build nsp32_sglist, substitute sg dma addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) sgt[i].len = cpu_to_le32(sg_dma_len(sg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if (le32_to_cpu(sgt[i].len) > 0x10000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) nsp32_msg(KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) nsp32_dbg(NSP32_DEBUG_SGLIST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) "num 0x%x : addr 0x%lx len 0x%lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) le32_to_cpu(sgt[i].addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) le32_to_cpu(sgt[i].len ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) /* set end mark */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) l = le32_to_cpu(sgt[num-1].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) sgt[num-1].len = cpu_to_le32(l | SGTEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) nsp32_target *target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) nsp32_lunt *cur_lunt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) if (data->CurrentSC != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) data->CurrentSC = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) SCpnt->result = DID_NO_CONNECT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) /* check target ID is not same as this initiator ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) SCpnt->result = DID_BAD_TARGET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) /* check target LUN is allowable value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (SCpnt->device->lun >= MAX_LUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) SCpnt->result = DID_BAD_TARGET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) show_command(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) SCpnt->scsi_done = done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) data->CurrentSC = SCpnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) SCpnt->SCp.Status = CHECK_CONDITION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) SCpnt->SCp.Message = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) SCpnt->SCp.buffer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) SCpnt->SCp.buffers_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) /* initialize data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) data->msgout_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) data->msgin_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) cur_lunt->SCpnt = SCpnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) cur_lunt->save_datp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) cur_lunt->msgin03 = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) data->cur_lunt = cur_lunt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) data->cur_id = SCpnt->device->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) data->cur_lun = SCpnt->device->lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) ret = nsp32_setup_sg_table(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) if (ret == FALSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) nsp32_msg(KERN_ERR, "SGT fail");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) SCpnt->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) /* Build IDENTIFY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) nsp32_build_identify(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) * If target is the first time to transfer after the reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) * message SDTR is needed to do synchronous transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) target = &data->target[scmd_id(SCpnt)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) data->cur_target = target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) unsigned char period, offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) if (trans_mode != ASYNC_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) nsp32_set_max_sync(data, target, &period, &offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) nsp32_build_sdtr(SCpnt, period, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) target->sync_flag |= SDTR_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) nsp32_set_async(data, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) target->sync_flag |= SDTR_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) target->limit_entry, period, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) } else if (target->sync_flag & SDTR_INITIATOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) * It was negotiating SDTR with target, sending from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) * initiator, but there are no chance to remove this flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) * Set async because we don't get proper negotiation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) nsp32_set_async(data, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) target->sync_flag &= ~SDTR_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) target->sync_flag |= SDTR_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) "SDTR_INITIATOR: fall back to async");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) } else if (target->sync_flag & SDTR_TARGET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) * It was negotiating SDTR with target, sending from target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) * but there are no chance to remove this flag. Set async
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) * because we don't get proper negotiation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) nsp32_set_async(data, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) target->sync_flag &= ~SDTR_TARGET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) target->sync_flag |= SDTR_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) "Unknown SDTR from target is reached, fall back to async.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) SCpnt->device->id, target->sync_flag, target->syncreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) target->ackwidth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) /* Selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (auto_param == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) ret = nsp32_selection_autopara(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) ret = nsp32_selection_autoscsi(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (ret != TRUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) static DEF_SCSI_QCMD(nsp32_queuecommand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) /* initialize asic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) static int nsp32hw_init(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) unsigned short irq_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) unsigned long lc_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) unsigned char power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if ((lc_reg & 0xff00) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) lc_reg |= (0x20 << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) nsp32_write2(base, TRANSFER_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) nsp32_write4(base, BM_CNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) irq_stat = nsp32_read2(base, IRQ_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) } while (irq_stat & IRQSTATUS_ANY_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) * designated by specification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) if ((data->trans_method & NSP32_TRANSFER_PIO) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) (data->trans_method & NSP32_TRANSFER_MMIO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) nsp32_index_write1(base, CLOCK_DIV, data->clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) * initialize MISC_WRRD register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) * Note: Designated parameters is obeyed as following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) * MISC_MASTER_TERMINATION_SELECT: It must be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) * MISC_AUTOSEL_TIMING_SEL: It should be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) * MISC_DELAYED_BMSTART: It's selected for safety.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) * we have to set TRANSFERCONTROL_BM_START as 0 and set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) * appropriate value before restarting bus master transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) nsp32_index_write2(base, MISC_WR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) (SCSI_DIRECTION_DETECTOR_SELECT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) DELAYED_BMSTART |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) MASTER_TERMINATION_SELECT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) BMREQ_NEGATE_TIMING_SEL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) AUTOSEL_TIMING_SEL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) BMSTOP_CHANGE2_NONDATA_PHASE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) power = nsp32_index_read1(base, TERM_PWR_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) if (!(power & SENSE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) nsp32_msg(KERN_INFO, "term power on");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) nsp32_write2(base, TIMER_SET, TIMER_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) nsp32_write1(base, SYNC_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) nsp32_write1(base, ACK_WIDTH, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) * enable to select designated IRQ (except for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) IRQSELECT_SCSIRESET_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) IRQSELECT_FIFO_SHLD_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) IRQSELECT_RESELECT_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) IRQSELECT_PHASE_CHANGE_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) IRQSELECT_AUTO_SCSI_SEQ_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) // IRQSELECT_BMCNTERR_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) IRQSELECT_TARGET_ABORT_IRQ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) IRQSELECT_MASTER_ABORT_IRQ );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) nsp32_write2(base, IRQ_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) /* PCI LED off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) nsp32_index_write1(base, EXT_PORT, LED_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) /* interrupt routine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) nsp32_hw_data *data = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) struct scsi_cmnd *SCpnt = data->CurrentSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) unsigned short auto_stat, irq_stat, trans_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) unsigned char busmon, busphase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) int handled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) struct Scsi_Host *host = data->Host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) spin_lock_irqsave(host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) * IRQ check, then enable IRQ mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) irq_stat = nsp32_read2(base, IRQ_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) nsp32_dbg(NSP32_DEBUG_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) /* is this interrupt comes from Ninja asic? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) goto out2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) handled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) busphase = busmon & BUSMON_PHASE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) trans_stat = nsp32_read2(base, TRANSFER_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) nsp32_msg(KERN_INFO, "card disconnect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) if (data->CurrentSC != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) nsp32_msg(KERN_INFO, "clean up current SCSI command");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) SCpnt->result = DID_BAD_TARGET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) /* Timer IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) if (irq_stat & IRQSTATUS_TIMER_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) nsp32_write2(base, TIMER_SET, TIMER_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) /* SCSI reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) nsp32_msg(KERN_INFO, "detected someone do bus reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) nsp32_do_bus_reset(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) if (SCpnt != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) SCpnt->result = DID_RESET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) if (SCpnt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) * AutoSCSI Interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) * Note: This interrupt is occurred when AutoSCSI is finished. Then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) * recorded when AutoSCSI sequencer has been processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) /* getting SCSI executed phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) /* Selection Timeout, go busfree phase. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) if (auto_stat & SELECTION_TIMEOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) nsp32_dbg(NSP32_DEBUG_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) "selection timeout occurred");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) SCpnt->result = DID_TIME_OUT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) if (auto_stat & MSGOUT_PHASE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) * MsgOut phase was processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) * If MSG_IN_OCCUER is not set, then MsgOut phase is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) * completed. Thus, msgout_len must reset. Otherwise,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) * nothing to do here. If MSG_OUT_OCCUER is occurred,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) * then we will encounter the condition and check.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) if (!(auto_stat & MSG_IN_OCCUER) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) (data->msgout_len <= 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) * !MSG_IN_OCCUER && msgout_len <=3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) * ---> AutoSCSI with MSGOUTreg is processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) data->msgout_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) if ((auto_stat & DATA_IN_PHASE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) (scsi_get_resid(SCpnt) > 0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) printk( "auto+fifo\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) //nsp32_pio_read(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) nsp32_dbg(NSP32_DEBUG_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) "Data in/out phase processed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) /* read BMCNT, SGT pointer addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) nsp32_read4(base, BM_CNT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) nsp32_read4(base, SGT_ADR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) nsp32_read4(base, SACK_CNT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) nsp32_read4(base, SAVED_SACK_CNT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) scsi_set_resid(SCpnt, 0); /* all data transferred! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) * MsgIn Occur
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) if (auto_stat & MSG_IN_OCCUER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) * MsgOut Occur
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) if (auto_stat & MSG_OUT_OCCUER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) nsp32_msgout_occur(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) * Bus Free Occur
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) if (auto_stat & BUS_FREE_OCCUER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) ret = nsp32_busfree_occur(SCpnt, auto_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) if (ret == TRUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) if (auto_stat & STATUS_PHASE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) * Read CSB and substitute CSB for SCpnt->result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) * to save status phase stutas byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) * scsi error handler checks host_byte (DID_*:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) * low level driver to indicate status), then checks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) * status_byte (SCSI status byte).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) if (auto_stat & ILLEGAL_PHASE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) /* Illegal phase is detected. SACK is not back. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) nsp32_msg(KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) /* TODO: currently we don't have any action... bus reset? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) * To send back SACK, assert, wait, and negate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) nsp32_sack_assert(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) nsp32_wait_req(data, NEGATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) nsp32_sack_negate(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) if (auto_stat & COMMAND_PHASE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) /* nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) if (auto_stat & AUTOSCSI_BUSY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) /* AutoSCSI is running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) show_autophase(auto_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) /* FIFO_SHLD_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) switch(busphase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) case BUSPHASE_DATA_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) //nsp32_pio_write(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) case BUSPHASE_DATA_IN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) //nsp32_pio_read(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) case BUSPHASE_STATUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) show_busphase(busphase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) /* Phase Change IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) switch(busphase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) case BUSPHASE_MESSAGE_IN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) nsp32_msgin_occur(SCpnt, irq_stat, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) nsp32_msg(KERN_WARNING, "phase chg/other phase?");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) irq_stat, trans_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) show_busphase(busphase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) /* PCI_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) if (irq_stat & IRQSTATUS_PCI_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) /* Do nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) /* BMCNTERR_IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) * TODO: To be implemented improving bus master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) * transfer reliability when BMCNTERR is occurred in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) * AutoSCSI phase described in specification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) nsp32_dbg(NSP32_DEBUG_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) show_busphase(busphase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) /* disable IRQ mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) nsp32_write2(base, IRQ_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) out2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) spin_unlock_irqrestore(host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) nsp32_dbg(NSP32_DEBUG_INTR, "exit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) return IRQ_RETVAL(handled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) nsp32_hw_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) int hostno;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) unsigned int base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) unsigned char mode_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) int id, speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) long model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) hostno = host->host_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) data = (nsp32_hw_data *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) base = host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) seq_puts(m, "NinjaSCSI-32 status\n\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) seq_printf(m, "SCSI host No.: %d\n", hostno);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) seq_printf(m, "IRQ: %d\n", host->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) seq_printf(m, "IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) seq_printf(m, "sg_tablesize: %d\n", host->sg_tablesize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) seq_printf(m, "Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) mode_reg = nsp32_index_read1(base, CHIP_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) model = data->pci_devid->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) seq_printf(m, "Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) seq_printf(m, "OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) spin_lock_irqsave(&(data->Lock), flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) spin_unlock_irqrestore(&(data->Lock), flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) seq_puts(m, "SDTR status\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) for (id = 0; id < ARRAY_SIZE(data->target); id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) seq_printf(m, "id %d: ", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) if (id == host->this_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) if (data->target[id].sync_flag == SDTR_DONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) if (data->target[id].period == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) data->target[id].offset == ASYNC_OFFSET ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) seq_puts(m, "async");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) seq_puts(m, " sync");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) seq_puts(m, " none");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) if (data->target[id].period != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) speed = 1000000 / (data->target[id].period * 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) seq_printf(m, " transfer %d.%dMB/s, offset %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) speed / 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) speed % 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) data->target[id].offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) * Reset parameters and call scsi_done for data->cur_lunt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) * Be careful setting SCpnt->result = DID_* before calling this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) scsi_dma_unmap(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) * clear TRANSFERCONTROL_BM_START
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) nsp32_write2(base, TRANSFER_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) nsp32_write4(base, BM_CNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) * call scsi_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) (*SCpnt->scsi_done)(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) * reset parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) data->cur_lunt->SCpnt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) data->cur_lunt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) data->cur_target = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) data->CurrentSC = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) * Bus Free Occur
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) * with ACK reply when below condition is matched:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) * MsgIn 00: Command Complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) * MsgIn 02: Save Data Pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) * MsgIn 04: Disconnect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) * In other case, unexpected BUSFREE is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) show_autophase(execph);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) nsp32_write4(base, BM_CNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) nsp32_write2(base, TRANSFER_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) * MsgIn 02: Save Data Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) * VALID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) * Save Data Pointer is received. Adjust pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) * NO-VALID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) * SCSI-3 says if Save Data Pointer is not received, then we restart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) * processing and we can't adjust any SCSI data pointer in next data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) * phase.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) if (execph & MSGIN_02_VALID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) * Check sack_cnt/saved_sack_cnt, then adjust sg table if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) * needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) if (!(execph & MSGIN_00_VALID) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) unsigned int sacklen, s_sacklen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) * Read SACK count and SAVEDSACK count, then compare.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) sacklen = nsp32_read4(base, SACK_CNT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) * If SAVEDSACKCNT == 0, it means SavedDataPointer is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) * come after data transferring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) if (s_sacklen > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) * Comparing between sack and savedsack to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) * check the condition of AutoMsgIn03.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) * If they are same, set msgin03 == TRUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) * reselection. On the other hand, if they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) * aren't same, set msgin03 == FALSE, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) * reselection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) if (sacklen != s_sacklen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) data->cur_lunt->msgin03 = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) data->cur_lunt->msgin03 = TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) nsp32_adjust_busfree(SCpnt, s_sacklen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) /* This value has not substitude with valid value yet... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) //data->cur_lunt->save_datp = data->cur_datp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) * no processing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) if (execph & MSGIN_03_VALID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) /* MsgIn03 was valid to be processed. No need processing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) * target SDTR check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) if (data->cur_target->sync_flag & SDTR_INITIATOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) * SDTR negotiation pulled by the initiator has not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) * finished yet. Fall back to ASYNC mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) nsp32_set_async(data, data->cur_target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) data->cur_target->sync_flag &= ~SDTR_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) data->cur_target->sync_flag |= SDTR_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) } else if (data->cur_target->sync_flag & SDTR_TARGET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) * SDTR negotiation pulled by the target has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) * negotiating.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) * If valid message is received, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) * negotiation is succeeded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) * On the contrary, if unexpected bus free is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) * occurred, then negotiation is failed. Fall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) * back to ASYNC mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) nsp32_set_async(data, data->cur_target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) data->cur_target->sync_flag &= ~SDTR_TARGET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) data->cur_target->sync_flag |= SDTR_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) * It is always ensured by SCSI standard that initiator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) * switches into Bus Free Phase after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) * receiving message 00 (Command Complete), 04 (Disconnect).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) * It's the reason that processing here is valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) if (execph & MSGIN_00_VALID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) /* MsgIn 00: Command Complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) SCpnt->SCp.Message = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) nsp32_dbg(NSP32_DEBUG_BUSFREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) "normal end stat=0x%x resid=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) SCpnt->SCp.Status, scsi_get_resid(SCpnt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) SCpnt->result = (DID_OK << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) (SCpnt->SCp.Message << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) (SCpnt->SCp.Status << 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) /* All operation is done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) } else if (execph & MSGIN_04_VALID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) /* MsgIn 04: Disconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) SCpnt->SCp.Message = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) /* Unexpected bus free */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) /* DID_ERROR? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) SCpnt->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) * nsp32_adjust_busfree - adjusting SG table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) * Note: This driver adjust the SG table using SCSI ACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) * counter instead of BMCNT counter!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) int old_entry = data->cur_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) int new_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) int sg_num = data->cur_lunt->sg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) unsigned int restlen, sentlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) u32_le len, addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) /* adjust saved SACK count with 4 byte start address boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) * calculate new_entry from sack count and each sgt[].len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) * calculate the byte which is intent to send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) sentlen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) if (sentlen > s_sacklen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) /* all sgt is processed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) if (new_entry == sg_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) goto last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) if (sentlen == s_sacklen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) /* XXX: confirm it's ok or not */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) /* In this case, it's ok because we are at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) the head element of the sg. restlen is correctly calculated. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) /* calculate the rest length for transferring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) restlen = sentlen - s_sacklen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) /* update adjusting current SG table entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) len = le32_to_cpu(sgt[new_entry].len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) addr = le32_to_cpu(sgt[new_entry].addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) addr += (len - restlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) sgt[new_entry].addr = cpu_to_le32(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) sgt[new_entry].len = cpu_to_le32(restlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) /* set cur_entry with new_entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) data->cur_entry = new_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) last:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) if (scsi_get_resid(SCpnt) < sentlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) nsp32_msg(KERN_ERR, "resid underflow");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) /* update hostdata and lun */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) * It's called MsgOut phase occur.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) * message out phase. It, however, has more than 3 messages,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) * HBA creates the interrupt and we have to process by hand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) //unsigned short command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) long new_sgtp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) "enter: msgout_len: 0x%x", data->msgout_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) * If MsgOut phase is occurred without having any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) * message, then No_Operation is sent (SCSI-2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) if (data->msgout_len == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) nsp32_build_nop(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) * Set SGTP ADDR current entry for restarting AUTOSCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) * because SGTP is incremented next point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) * There is few statement in the specification...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) new_sgtp = data->cur_lunt->sglun_paddr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) * send messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) for (i = 0; i < data->msgout_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) "%d : 0x%x", i, data->msgoutbuf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) * Check REQ is asserted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) nsp32_wait_req(data, ASSERT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) if (i == (data->msgout_len - 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) * If the last message, set the AutoSCSI restart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) * before send back the ack message. AutoSCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) * restart automatically negate ATN signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) //nsp32_restart_autoscsi(SCpnt, command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) nsp32_write2(base, COMMAND_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) (CLEAR_CDB_FIFO_POINTER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) AUTO_COMMAND_PHASE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) AUTOSCSI_RESTART |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) AUTO_MSGIN_00_OR_04 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) AUTO_MSGIN_02 ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) * Write data with SACK, then wait sack is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) * automatically negated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) nsp32_wait_sack(data, NEGATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) nsp32_read1(base, SCSI_BUS_MONITOR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) data->msgout_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) * Restart AutoSCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) * Note: Restarting AutoSCSI needs set:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) unsigned short transfer = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) if (data->cur_target == NULL || data->cur_lunt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) nsp32_msg(KERN_ERR, "Target or Lun is invalid");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) * set SYNC_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) * Don't set BM_START_ADR before setting this register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) * set ACKWIDTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) * set SREQ hazard killer sampling rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) * set SGT ADDR (physical address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) * set TRANSFER CONTROL REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) transfer = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) if (scsi_bufflen(SCpnt) > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) transfer |= BM_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) transfer |= CB_MMIO_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) } else if (data->trans_method & NSP32_TRANSFER_PIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) transfer |= CB_IO_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) nsp32_write2(base, TRANSFER_CONTROL, transfer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) * restart AutoSCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) command |= (CLEAR_CDB_FIFO_POINTER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) AUTO_COMMAND_PHASE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) AUTOSCSI_RESTART );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) nsp32_write2(base, COMMAND_CONTROL, command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) * cannot run automatically message in occur
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) unsigned long irq_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) unsigned short execph)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) unsigned char msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) unsigned char msgtype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) unsigned char newlun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) unsigned short command = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) int msgclear = TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) long new_sgtp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) * read first message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) * of Message-In have to be processed before sending back SCSI ACK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) msg = nsp32_read1(base, SCSI_DATA_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) data->msginbuf[(unsigned char)data->msgin_len] = msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) msgtype = data->msginbuf[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) data->msgin_len, msg, msgtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) * TODO: We need checking whether bus phase is message in?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) * assert SCSI ACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) nsp32_sack_assert(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) * processing IDENTIFY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) if (msgtype & 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) /* Invalid (non reselect) phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) ret = nsp32_reselection(SCpnt, newlun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) if (ret == TRUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) goto restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) * processing messages except for IDENTIFY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) switch (msgtype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) * 1-byte message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) case COMMAND_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) case DISCONNECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) * These messages should not be occurred.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) * They should be processed on AutoSCSI sequencer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) nsp32_msg(KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) case RESTORE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) * AutoMsgIn03 is disabled, and HBA gets this message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) unsigned int s_sacklen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) nsp32_adjust_busfree(SCpnt, s_sacklen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) /* No need to rewrite SGT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) data->cur_lunt->msgin03 = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) /* Update with the new value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) /* reset SACK/SavedACK counter (or ALL clear?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) * set new sg pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) new_sgtp = data->cur_lunt->sglun_paddr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) nsp32_write4(base, SGT_ADR, new_sgtp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) case SAVE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) * These messages should not be occurred.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) * They should be processed on AutoSCSI sequencer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) nsp32_msg (KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) case MESSAGE_REJECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) /* If previous message_out is sending SDTR, and get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) message_reject from target, SDTR negotiation is failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) if (data->cur_target->sync_flag &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) (SDTR_INITIATOR | SDTR_TARGET)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) * Current target is negotiating SDTR, but it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) * failed. Fall back to async transfer mode, and set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) * SDTR_DONE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) nsp32_set_async(data, data->cur_target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) data->cur_target->sync_flag &= ~SDTR_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) data->cur_target->sync_flag |= SDTR_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) case LINKED_CMD_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) case LINKED_FLG_CMD_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) /* queue tag is not supported currently */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) nsp32_msg (KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) "unsupported message: 0x%x", msgtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) case INITIATE_RECOVERY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) /* staring ECA (Extended Contingent Allegiance) state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) /* This message is declined in SPI2 or later. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) * 2-byte message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) case SIMPLE_QUEUE_TAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) case 0x23:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) * No support is needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) if (data->msgin_len >= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) /* current position is 1-byte of 2 byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) msgclear = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) * extended message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) case EXTENDED_MESSAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) if (data->msgin_len < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) * Current position does not reach 2-byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) * (2-byte is extended message length).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) msgclear = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) if ((data->msginbuf[1] + 1) > data->msgin_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) * Current extended message has msginbuf[1] + 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) * (msgin_len starts counting from 0, so buf[1] + 1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) * If current message position is not finished,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) * continue receiving message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) msgclear = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) * Reach here means regular length of each type of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) * extended messages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) switch (data->msginbuf[2]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) case EXTENDED_MODIFY_DATA_POINTER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) /* TODO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) goto reject; /* not implemented yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) case EXTENDED_SDTR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) * Exchange this message between initiator and target.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) * received inappropriate message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) nsp32_analyze_sdtr(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) case EXTENDED_EXTENDED_IDENTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) /* SCSI-I only, not supported. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) goto reject; /* not implemented yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) case EXTENDED_WDTR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) goto reject; /* not implemented yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) restart:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) if (msgclear == TRUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) data->msgin_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) * If restarting AutoSCSI, but there are some message to out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) * (MV_VALID = 0). When commandcontrol is written with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) * AutoSCSI restart, at the same time MsgOutOccur should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) * happened (however, such situation is really possible...?).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) if (data->msgout_len > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) nsp32_write4(base, SCSI_MSG_OUT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) command |= AUTO_ATN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) * restart AutoSCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) * If current msgin03 is TRUE, then flag on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) if (data->cur_lunt->msgin03 == TRUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) command |= AUTO_MSGIN_03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) data->cur_lunt->msgin03 = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) data->msgin_len++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) * restart AutoSCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) nsp32_restart_autoscsi(SCpnt, command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) * wait SCSI REQ negate for REQ-ACK handshake
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) nsp32_wait_req(data, NEGATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) * negate SCSI ACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) nsp32_sack_negate(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) reject:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) nsp32_msg(KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) "invalid or unsupported MessageIn, rejected. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) msg, data->msgin_len, msgtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) nsp32_build_reject(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) data->msgin_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) goto restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) nsp32_target *target = data->cur_target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) nsp32_sync_table *synct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) unsigned char get_period = data->msginbuf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) unsigned char get_offset = data->msginbuf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) int entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) int syncnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) synct = data->synct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) syncnum = data->syncnum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) * If this inititor sent the SDTR message, then target responds SDTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) * initiator SYNCREG, ACKWIDTH from SDTR parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) * Messages are not appropriate, then send back reject message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) * If initiator did not send the SDTR, but target sends SDTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) * initiator calculator the appropriate parameter and send back SDTR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) if (target->sync_flag & SDTR_INITIATOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) * Initiator sent SDTR, the target responds and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) * send back negotiation SDTR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) target->sync_flag &= ~SDTR_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) target->sync_flag |= SDTR_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) * offset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) if (get_offset > SYNC_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) * Negotiation is failed, the target send back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) * unexpected offset value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) if (get_offset == ASYNC_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) * Negotiation is succeeded, the target want
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) * to fall back into asynchronous transfer mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) goto async;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) * period:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) * Check whether sync period is too short. If too short,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) * fall back to async mode. If it's ok, then investigate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) * the received sync period. If sync period is acceptable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) * between sync table start_period and end_period, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) * set this I_T nexus as sent offset and period.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) * If it's not acceptable, send back reject and fall back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) * to async mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) if (get_period < data->synct[0].period_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) * Negotiation is failed, the target send back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) * unexpected period value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) entry = nsp32_search_period_entry(data, target, get_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) if (entry < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) * Target want to use long period which is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) * acceptable NinjaSCSI-32Bi/UDE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) goto reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) * Set new sync table and offset in this I_T nexus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) nsp32_set_sync_entry(data, target, entry, get_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) /* Target send SDTR to initiator. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) target->sync_flag |= SDTR_INITIATOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) /* offset: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) if (get_offset > SYNC_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) /* send back as SYNC_OFFSET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) get_offset = SYNC_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) /* period: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) if (get_period < data->synct[0].period_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) get_period = data->synct[0].period_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) entry = nsp32_search_period_entry(data, target, get_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) if (get_offset == ASYNC_OFFSET || entry < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) nsp32_set_async(data, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) nsp32_set_sync_entry(data, target, entry, get_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) nsp32_build_sdtr(SCpnt, get_period, get_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) target->period = get_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) reject:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) * If the current message is unacceptable, send back to the target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) * with reject message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) nsp32_build_reject(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) async:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) nsp32_set_async(data, target); /* set as ASYNC transfer mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) target->period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) * Search config entry number matched in sync_table from given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) * target and speed period value. If failed to search, return negative value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) static int nsp32_search_period_entry(nsp32_hw_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) nsp32_target *target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) unsigned char period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) if (target->limit_entry >= data->syncnum) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) target->limit_entry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) for (i = target->limit_entry; i < data->syncnum; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) if (period >= data->synct[i].start_period &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) period <= data->synct[i].end_period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) * Check given period value is over the sync_table value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) * If so, return max value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) if (i == data->syncnum) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) i = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) * target <-> initiator use ASYNC transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) unsigned char period = data->synct[target->limit_entry].period_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) target->offset = ASYNC_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) target->period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) target->ackwidth = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) target->sample_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) * target <-> initiator use maximum SYNC transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) static void nsp32_set_max_sync(nsp32_hw_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) nsp32_target *target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) unsigned char *period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) unsigned char *offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) unsigned char period_num, ackwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) period_num = data->synct[target->limit_entry].period_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) *period = data->synct[target->limit_entry].start_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) ackwidth = data->synct[target->limit_entry].ackwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) *offset = SYNC_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) target->syncreg = TO_SYNCREG(period_num, *offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) target->ackwidth = ackwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) target->offset = *offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) target->sample_reg = 0; /* disable SREQ sampling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) * target <-> initiator use entry number speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) static void nsp32_set_sync_entry(nsp32_hw_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) nsp32_target *target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) int entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) unsigned char offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) unsigned char period, ackwidth, sample_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) period = data->synct[entry].period_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) ackwidth = data->synct[entry].ackwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) sample_rate = data->synct[entry].sample_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) target->syncreg = TO_SYNCREG(period, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) target->ackwidth = ackwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) target->offset = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) target->sample_reg = sample_rate | SAMPLING_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) * It waits until SCSI REQ becomes assertion or negation state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) * connected target responds SCSI REQ negation. We have to wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) * SCSI REQ becomes negation in order to negate SCSI ACK signal for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) * REQ-ACK handshake.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) static void nsp32_wait_req(nsp32_hw_data *data, int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) int wait_time = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) unsigned char bus, req_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) if (!((state == ASSERT) || (state == NEGATE))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) nsp32_msg(KERN_ERR, "unknown state designation");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) /* REQ is BIT(5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) req_bit = (state == ASSERT ? BUSMON_REQ : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) bus = nsp32_read1(base, SCSI_BUS_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) if ((bus & BUSMON_REQ) == req_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) nsp32_dbg(NSP32_DEBUG_WAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) "wait_time: %d", wait_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) wait_time++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) } while (wait_time < REQSACK_TIMEOUT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) * It waits until SCSI SACK becomes assertion or negation state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) static void nsp32_wait_sack(nsp32_hw_data *data, int state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) int wait_time = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) unsigned char bus, ack_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) if (!((state == ASSERT) || (state == NEGATE))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) nsp32_msg(KERN_ERR, "unknown state designation");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) /* ACK is BIT(4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) bus = nsp32_read1(base, SCSI_BUS_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) if ((bus & BUSMON_ACK) == ack_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) nsp32_dbg(NSP32_DEBUG_WAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) "wait_time: %d", wait_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) wait_time++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) } while (wait_time < REQSACK_TIMEOUT_TIME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) * assert SCSI ACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) static void nsp32_sack_assert(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) unsigned char busctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) * negate SCSI ACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) static void nsp32_sack_negate(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) unsigned char busctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) busctrl &= ~BUSCTL_ACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) * Note: n_io_port is defined as 0x7f because I/O register port is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) * assigned as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) * 0x800-0x8ff: memory mapped I/O port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) * 0xc00-0xfff: CardBus status registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) static int nsp32_detect(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) struct Scsi_Host *host; /* registered host structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) nsp32_hw_data *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) * register this HBA as SCSI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) if (host == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) nsp32_msg (KERN_ERR, "failed to scsi register");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) * set nsp32_hw_data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) data = (nsp32_hw_data *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) host->irq = data->IrqNumber;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) host->io_port = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) host->unique_id = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) host->n_io_port = data->NumAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) host->base = (unsigned long)data->MmioAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) data->Host = host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) spin_lock_init(&(data->Lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) data->cur_lunt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) data->cur_target = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) * Bus master transfer mode is supported currently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) data->trans_method = NSP32_TRANSFER_BUSMASTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) * Set clock div, CLOCK_4 (HBA has own external clock, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) * dividing * 100ns/4).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) data->clock = CLOCK_4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) switch (data->clock) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) case CLOCK_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) /* If data->clock is CLOCK_4, then select 40M sync table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) data->synct = nsp32_sync_table_40M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) case CLOCK_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) /* If data->clock is CLOCK_2, then select 20M sync table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) data->synct = nsp32_sync_table_20M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) case PCICLK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) /* If data->clock is PCICLK, then select pci sync table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) data->synct = nsp32_sync_table_pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) nsp32_msg(KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) "Invalid clock div is selected, set CLOCK_4.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) /* Use default value CLOCK_4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) data->clock = CLOCK_4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) data->synct = nsp32_sync_table_40M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) * setup nsp32_lunt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) * setup DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) goto scsi_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) * allocate autoparam DMA resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) data->autoparam = dma_alloc_coherent(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) sizeof(nsp32_autoparam), &(data->auto_paddr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) if (data->autoparam == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) goto scsi_unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) * allocate scatter-gather DMA resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) &data->sg_paddr, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) if (data->sg_list == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) goto free_autoparam;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) nsp32_lunt tmp = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) .SCpnt = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) .save_datp = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) .msgin03 = FALSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) .sg_num = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) .cur_entry = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) .sglun = &(data->sg_list[offset]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) data->lunt[i][j] = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) * setup target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) for (i = 0; i < ARRAY_SIZE(data->target); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) nsp32_target *target = &(data->target[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) target->limit_entry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) target->sync_flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) nsp32_set_async(data, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) * EEPROM check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) ret = nsp32_getprom_param(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) if (ret == FALSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) data->resettime = 3; /* default 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) * setup HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) nsp32hw_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) snprintf(data->info_str, sizeof(data->info_str),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) host->irq, host->io_port, host->n_io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) * SCSI bus reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) * Note: It's important to reset SCSI bus in initialization phase.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) * system is coming up, so SCSI devices connected to HBA is set as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) * un-asynchronous mode. It brings the merit that this HBA is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) * ready to start synchronous transfer without any preparation,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) * but we are difficult to control transfer speed. In addition,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) * it prevents device transfer speed from effecting EEPROM start-up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) * Auto Mode, then FAST-10M is selected when SCSI devices are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) * connected same or more than 4 devices. It should be avoided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) * depending on this specification. Thus, resetting the SCSI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) * restores all connected SCSI devices to asynchronous mode, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) * this driver set SDTR safely later, and we can control all SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) * device transfer mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) nsp32_do_bus_reset(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) "SCSI PCI controller. Interrupt: %d", host->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) goto free_sg_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) * PCI IO register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) res = request_region(host->io_port, host->n_io_port, "nsp32");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) if (res == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) nsp32_msg(KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) "I/O region 0x%lx+0x%lx is already used",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) data->BaseAddress, data->NumAddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) goto free_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) ret = scsi_add_host(host, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) nsp32_msg(KERN_ERR, "failed to add scsi host");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) goto free_region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) scsi_scan_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) pci_set_drvdata(pdev, host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) free_region:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) release_region(host->io_port, host->n_io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) free_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) free_irq(host->irq, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) free_sg_list:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) dma_free_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) data->sg_list, data->sg_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) free_autoparam:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) dma_free_coherent(&pdev->dev, sizeof(nsp32_autoparam),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) data->autoparam, data->auto_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) scsi_unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) scsi_host_put(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) static int nsp32_release(struct Scsi_Host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) if (data->autoparam) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) data->autoparam, data->auto_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) if (data->sg_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) data->sg_list, data->sg_paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) if (host->irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) free_irq(host->irq, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) if (host->io_port && host->n_io_port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) release_region(host->io_port, host->n_io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) if (data->MmioAddress) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) iounmap(data->MmioAddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) static const char *nsp32_info(struct Scsi_Host *shpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) return data->info_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) * error handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) nsp32_msg(KERN_WARNING, "abort");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) if (data->cur_lunt->SCpnt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) /* reset SDTR negotiation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) data->cur_target->sync_flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) nsp32_set_async(data, data->cur_target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) nsp32_write2(base, TRANSFER_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) nsp32_write2(base, BM_CNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) SCpnt->result = DID_ABORT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) nsp32_scsi_done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) static void nsp32_do_bus_reset(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) unsigned int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) unsigned short intrdat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) * stop all transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) * clear TRANSFERCONTROL_BM_START
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) * clear counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) nsp32_write2(base, TRANSFER_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) nsp32_write4(base, BM_CNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) * fall back to asynchronous transfer mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) * initialize SDTR negotiation flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) for (i = 0; i < ARRAY_SIZE(data->target); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) nsp32_target *target = &data->target[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) target->sync_flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) nsp32_set_async(data, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) * reset SCSI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) mdelay(RESET_HOLD_TIME / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) nsp32_write1(base, SCSI_BUS_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) for(i = 0; i < 5; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) data->CurrentSC = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) struct Scsi_Host *host = SCpnt->device->host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) unsigned int base = SCpnt->device->host->io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) nsp32_msg(KERN_INFO, "Host Reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) spin_lock_irq(SCpnt->device->host->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) nsp32hw_init(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) nsp32_do_bus_reset(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) nsp32_write2(base, IRQ_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) spin_unlock_irq(SCpnt->device->host->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) return SUCCESS; /* Host reset is succeeded at any time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) /**************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) * EEPROM handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) * getting EEPROM parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) static int nsp32_getprom_param(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) int vendor = data->pci_devid->vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) int device = data->pci_devid->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) int ret, val, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) * EEPROM checking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) ret = nsp32_prom_read(data, 0x7e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) if (ret != 0x55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) ret = nsp32_prom_read(data, 0x7f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) if (ret != 0xaa) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) return FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) * check EEPROM type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) if (vendor == PCI_VENDOR_ID_WORKBIT &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) ret = nsp32_getprom_c16(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) ret = nsp32_getprom_at24(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) ret = nsp32_getprom_at24(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) nsp32_msg(KERN_WARNING, "Unknown EEPROM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) ret = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) /* for debug : SPROM data full checking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) for (i = 0; i <= 0x1f; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) val = nsp32_prom_read(data, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) nsp32_dbg(NSP32_DEBUG_EEPROM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) "rom address 0x%x : 0x%x", i, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) * ROMADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) * 0x07 : HBA Synchronous Transfer Period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) * Value 0: AutoSync, 1: Manual Setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) * 0x08 - 0x0f : Not Used? (0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) * 0x10 : Bus Termination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) * Value 0: Auto[ON], 1: ON, 2: OFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) * 0x11 : Not Used? (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) * 0x12 : Bus Reset Delay Time (0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) * 0x13 : Bootable CD Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) * Value 0: Disable, 1: Enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) * 0x14 : Device Scan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) * Bit 7 6 5 4 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) * | <----------------->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) * | SCSI ID: Value 0: Skip, 1: YES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) * |-> Value 0: ALL scan, Value 1: Manual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) * 0x15 - 0x1b : Not Used? (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) * 0x1c : Constant? (0x01) (clock div?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) * 0x1d - 0x7c : Not Used (0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) * 0x7d : Not Used? (0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) * 0x7e : Constant (0x55), Validity signature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) * 0x7f : Constant (0xaa), Validity signature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) static int nsp32_getprom_at24(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) int auto_sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) nsp32_target *target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) int entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) * Reset time which is designated by EEPROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) * TODO: Not used yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) data->resettime = nsp32_prom_read(data, 0x12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) * HBA Synchronous Transfer Period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) * that if auto_sync is 0 (auto), and connected SCSI devices are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) * same or lower than 3, then transfer speed is set as ULTRA-20M.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) * On the contrary if connected SCSI devices are same or higher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) * than 4, then transfer speed is set as FAST-10M.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) * I break this rule. The number of connected SCSI devices are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) * only ignored. If auto_sync is 0 (auto), then transfer speed is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) * forced as ULTRA-20M.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) ret = nsp32_prom_read(data, 0x07);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) switch (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) auto_sync = TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) auto_sync = FALSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) nsp32_msg(KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) "Unsupported Auto Sync mode. Fall back to manual mode.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) auto_sync = TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) if (trans_mode == ULTRA20M_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) auto_sync = TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) * each device Synchronous Transfer Period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) for (i = 0; i < NSP32_HOST_SCSIID; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) target = &data->target[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) if (auto_sync == TRUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) target->limit_entry = 0; /* set as ULTRA20M */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) ret = nsp32_prom_read(data, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) entry = nsp32_search_period_entry(data, target, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) if (entry < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) /* search failed... set maximum speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) entry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) target->limit_entry = entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) * C16 110 (I-O Data: SC-NBD) data map:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) * ROMADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) * 0x08 - 0x0f : Not Used? (0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) * 0x10 : Transfer Mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) * Value 0: PIO, 1: Busmater
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) * 0x11 : Bus Reset Delay Time (0x00-0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) * 0x12 : Bus Termination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) * Value 0: Disable, 1: Enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) * 0x13 - 0x19 : Disconnection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) * Value 0: Disable, 1: Enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) * 0x1a - 0x7c : Not Used? (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) * 0x7d : Not Used? (0xf8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) * 0x7e : Constant (0x55), Validity signature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) * 0x7f : Constant (0xaa), Validity signature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) static int nsp32_getprom_c16(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) nsp32_target *target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) int entry, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) * Reset time which is designated by EEPROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) * TODO: Not used yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) data->resettime = nsp32_prom_read(data, 0x11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) * each device Synchronous Transfer Period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) for (i = 0; i < NSP32_HOST_SCSIID; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) target = &data->target[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) ret = nsp32_prom_read(data, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) switch (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) case 0: /* 20MB/s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) val = 0x0c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) case 1: /* 10MB/s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) val = 0x19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) case 2: /* 5MB/s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) val = 0x32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) case 3: /* ASYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) val = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) default: /* default 20MB/s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) val = 0x0c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) entry = nsp32_search_period_entry(data, target, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) if (entry < 0 || trans_mode == ULTRA20M_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) /* search failed... set maximum speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) entry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) target->limit_entry = entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) return TRUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) * Atmel AT24C01A (drived in 5V) serial EEPROM routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) int i, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) /* start condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) nsp32_prom_start(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) /* device address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) nsp32_prom_write_bit(data, 1); /* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) nsp32_prom_write_bit(data, 0); /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) nsp32_prom_write_bit(data, 1); /* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) nsp32_prom_write_bit(data, 0); /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) /* R/W: W for dummy write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) nsp32_prom_write_bit(data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) /* ack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) nsp32_prom_write_bit(data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) /* word address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) for (i = 7; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) /* ack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) nsp32_prom_write_bit(data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) /* start condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) nsp32_prom_start(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) /* device address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) nsp32_prom_write_bit(data, 1); /* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) nsp32_prom_write_bit(data, 0); /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) nsp32_prom_write_bit(data, 1); /* 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) nsp32_prom_write_bit(data, 0); /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) /* R/W: R */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) nsp32_prom_write_bit(data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) /* ack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) nsp32_prom_write_bit(data, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) /* data... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) for (i = 7; i >= 0; i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) val += (nsp32_prom_read_bit(data) << i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) /* no ack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) nsp32_prom_write_bit(data, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) /* stop condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) nsp32_prom_stop(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) if (val == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) tmp &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) tmp |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) static int nsp32_prom_get(nsp32_hw_data *data, int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) int base = data->BaseAddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) int tmp, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) if (bit != SDA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) nsp32_msg(KERN_ERR, "return value is not appropriate");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) if (tmp == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) static void nsp32_prom_start (nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) /* start condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) nsp32_prom_set(data, SCL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) nsp32_prom_set(data, SDA, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) nsp32_prom_set(data, ENA, 1); /* output mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) * SDA 1->0 is start condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) nsp32_prom_set(data, SCL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) static void nsp32_prom_stop (nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) /* stop condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) nsp32_prom_set(data, SCL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) nsp32_prom_set(data, SDA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) nsp32_prom_set(data, ENA, 1); /* output mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) nsp32_prom_set(data, SDA, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) nsp32_prom_set(data, SCL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) /* write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) nsp32_prom_set(data, SDA, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) nsp32_prom_set(data, SCL, 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) nsp32_prom_set(data, SCL, 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) static int nsp32_prom_read_bit(nsp32_hw_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) /* read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) nsp32_prom_set(data, ENA, 0); /* input mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) nsp32_prom_set(data, SCL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) val = nsp32_prom_get(data, SDA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) nsp32_prom_set(data, SCL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) nsp32_prom_set(data, ENA, 1); /* output mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) /**************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) * Power Management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) /* Device suspended */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) struct Scsi_Host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) pci_save_state (pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) pci_disable_device (pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) pci_set_power_state(pdev, pci_choose_state(pdev, state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) /* Device woken up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) static int nsp32_resume(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) struct Scsi_Host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) unsigned short reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) pci_set_power_state(pdev, PCI_D0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) pci_enable_wake (pdev, PCI_D0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) pci_restore_state (pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) reg = nsp32_read2(data->BaseAddress, INDEX_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) if (reg == 0xffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) nsp32_msg(KERN_INFO, "missing device. abort resume.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) nsp32hw_init (data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) nsp32_do_bus_reset(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) nsp32_msg(KERN_INFO, "resume success");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) /************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) * PCI/Cardbus probe/remove routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) nsp32_hw_data *data = &nsp32_data_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) ret = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) nsp32_msg(KERN_ERR, "failed to enable pci device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) data->Pci = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) data->pci_devid = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) data->IrqNumber = pdev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) data->BaseAddress = pci_resource_start(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) data->NumAddress = pci_resource_len (pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) data->MmioAddress = pci_ioremap_bar(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) data->MmioLength = pci_resource_len (pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) ret = nsp32_detect(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) pdev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) data->MmioAddress, data->MmioLength,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) pci_name(pdev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) nsp32_model[id->driver_data]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) static void nsp32_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) struct Scsi_Host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) scsi_remove_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) nsp32_release(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) scsi_host_put(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) static struct pci_driver nsp32_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) .name = "nsp32",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) .id_table = nsp32_pci_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) .probe = nsp32_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) .remove = nsp32_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) .suspend = nsp32_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) .resume = nsp32_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) /*********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) * Moule entry point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) static int __init init_nsp32(void) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) nsp32_msg(KERN_INFO, "loading...");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) return pci_register_driver(&nsp32_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) static void __exit exit_nsp32(void) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) nsp32_msg(KERN_INFO, "unloading...");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) pci_unregister_driver(&nsp32_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) module_init(init_nsp32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) module_exit(exit_nsp32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) /* end */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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