^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Management Module Support for MPT (Message Passing Technology) based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This code is based on drivers/scsi/mpt3sas/mpt3sas_ctl.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2012-2014 LSI Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2013-2014 Avago Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * (mailto: MPT-FusionLinux.pdl@avagotech.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * modify it under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * as published by the Free Software Foundation; either version 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * of the License, or (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #ifndef MPT3SAS_CTL_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MPT3SAS_CTL_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #ifndef MPT2SAS_MINOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define MPT2SAS_MINOR (MPT_MINOR + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #ifndef MPT3SAS_MINOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MPT3SAS_MINOR (MPT_MINOR + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MPT2SAS_DEV_NAME "mpt2ctl"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MPT3SAS_DEV_NAME "mpt3ctl"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MPT3_MAGIC_NUMBER 'L'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define MPT3_IOCTL_DEFAULT_TIMEOUT (10) /* in seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * IOCTL opcodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define MPT3IOCINFO _IOWR(MPT3_MAGIC_NUMBER, 17, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct mpt3_ioctl_iocinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define MPT3COMMAND _IOWR(MPT3_MAGIC_NUMBER, 20, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct mpt3_ioctl_command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define MPT3COMMAND32 _IOWR(MPT3_MAGIC_NUMBER, 20, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct mpt3_ioctl_command32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define MPT3EVENTQUERY _IOWR(MPT3_MAGIC_NUMBER, 21, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct mpt3_ioctl_eventquery)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define MPT3EVENTENABLE _IOWR(MPT3_MAGIC_NUMBER, 22, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct mpt3_ioctl_eventenable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define MPT3EVENTREPORT _IOWR(MPT3_MAGIC_NUMBER, 23, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) struct mpt3_ioctl_eventreport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define MPT3HARDRESET _IOWR(MPT3_MAGIC_NUMBER, 24, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct mpt3_ioctl_diag_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define MPT3BTDHMAPPING _IOWR(MPT3_MAGIC_NUMBER, 31, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct mpt3_ioctl_btdh_mapping)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* diag buffer support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MPT3DIAGREGISTER _IOWR(MPT3_MAGIC_NUMBER, 26, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct mpt3_diag_register)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MPT3DIAGRELEASE _IOWR(MPT3_MAGIC_NUMBER, 27, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct mpt3_diag_release)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MPT3DIAGUNREGISTER _IOWR(MPT3_MAGIC_NUMBER, 28, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct mpt3_diag_unregister)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define MPT3DIAGQUERY _IOWR(MPT3_MAGIC_NUMBER, 29, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct mpt3_diag_query)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define MPT3DIAGREADBUFFER _IOWR(MPT3_MAGIC_NUMBER, 30, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct mpt3_diag_read_buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* Trace Buffer default UniqueId */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define MPT2DIAGBUFFUNIQUEID (0x07075900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define MPT3DIAGBUFFUNIQUEID (0x4252434D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* UID not found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define MPT3_DIAG_UID_NOT_FOUND (0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * struct mpt3_ioctl_header - main header structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * @ioc_number - IOC unit number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * @port_number - IOC port number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * @max_data_size - maximum number bytes to transfer on read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct mpt3_ioctl_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) uint32_t ioc_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) uint32_t port_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) uint32_t max_data_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * struct mpt3_ioctl_diag_reset - diagnostic reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct mpt3_ioctl_diag_reset {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * struct mpt3_ioctl_pci_info - pci device info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @device - pci device id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * @function - pci function id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * @bus - pci bus id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * @segment_id - pci segment id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct mpt3_ioctl_pci_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) uint32_t device:5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) uint32_t function:3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) uint32_t bus:24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) } bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) uint32_t word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) uint32_t segment_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define MPT2_IOCTL_INTERFACE_SCSI (0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define MPT2_IOCTL_INTERFACE_FC (0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define MPT2_IOCTL_INTERFACE_FC_IP (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define MPT2_IOCTL_INTERFACE_SAS (0x03)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define MPT2_IOCTL_INTERFACE_SAS2 (0x04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define MPT2_IOCTL_INTERFACE_SAS2_SSS6200 (0x05)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define MPT3_IOCTL_INTERFACE_SAS3 (0x06)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define MPT3_IOCTL_INTERFACE_SAS35 (0x07)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define MPT2_IOCTL_VERSION_LENGTH (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * struct mpt3_ioctl_iocinfo - generic controller info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * @adapter_type - type of adapter (spi, fc, sas)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * @port_number - port number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * @pci_id - PCI Id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * @hw_rev - hardware revision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * @sub_system_device - PCI subsystem Device ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * @sub_system_vendor - PCI subsystem Vendor ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * @rsvd0 - reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * @firmware_version - firmware version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * @bios_version - BIOS version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * @driver_version - driver version - 32 ASCII characters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * @rsvd1 - reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * @scsi_id - scsi id of adapter 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * @rsvd2 - reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * @pci_information - pci info (2nd revision)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct mpt3_ioctl_iocinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) uint32_t adapter_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) uint32_t port_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) uint32_t pci_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) uint32_t hw_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) uint32_t subsystem_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) uint32_t subsystem_vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) uint32_t rsvd0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) uint32_t firmware_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) uint32_t bios_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) uint8_t driver_version[MPT2_IOCTL_VERSION_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) uint8_t rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) uint8_t scsi_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) uint16_t rsvd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct mpt3_ioctl_pci_info pci_information;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* number of event log entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define MPT3SAS_CTL_EVENT_LOG_SIZE (200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * struct mpt3_ioctl_eventquery - query event count and type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * @event_entries - number of events returned by get_event_report
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * @rsvd - reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * @event_types - type of events currently being captured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct mpt3_ioctl_eventquery {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) uint16_t event_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) uint16_t rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) uint32_t event_types[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * struct mpt3_ioctl_eventenable - enable/disable event capturing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * @event_types - toggle off/on type of events to be captured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct mpt3_ioctl_eventenable {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) uint32_t event_types[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define MPT3_EVENT_DATA_SIZE (192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * struct MPT3_IOCTL_EVENTS -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * @event - the event that was reported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * @context - unique value for each event assigned by driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * @data - event data returned in fw reply message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct MPT3_IOCTL_EVENTS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) uint32_t event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) uint32_t context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) uint8_t data[MPT3_EVENT_DATA_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * struct mpt3_ioctl_eventreport - returing event log
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * @event_data - (see struct MPT3_IOCTL_EVENTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct mpt3_ioctl_eventreport {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct MPT3_IOCTL_EVENTS event_data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * struct mpt3_ioctl_command - generic mpt firmware passthru ioctl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * @timeout - command timeout in seconds. (if zero then use driver default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * value).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * @reply_frame_buf_ptr - reply location
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * @data_in_buf_ptr - destination for read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * @data_out_buf_ptr - data source for write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * @sense_data_ptr - sense data location
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * @max_reply_bytes - maximum number of reply bytes to be sent to app.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * @data_in_size - number bytes for data transfer in (read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * @data_out_size - number bytes for data transfer out (write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * @max_sense_bytes - maximum number of bytes for auto sense buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * @data_sge_offset - offset in words from the start of the request message to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * the first SGL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * @mf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct mpt3_ioctl_command {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) uint32_t timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) void __user *reply_frame_buf_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) void __user *data_in_buf_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) void __user *data_out_buf_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) void __user *sense_data_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) uint32_t max_reply_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) uint32_t data_in_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) uint32_t data_out_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) uint32_t max_sense_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) uint32_t data_sge_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) uint8_t mf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct mpt3_ioctl_command32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) uint32_t timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) uint32_t reply_frame_buf_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) uint32_t data_in_buf_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) uint32_t data_out_buf_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) uint32_t sense_data_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) uint32_t max_reply_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) uint32_t data_in_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) uint32_t data_out_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) uint32_t max_sense_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) uint32_t data_sge_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) uint8_t mf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * struct mpt3_ioctl_btdh_mapping - mapping info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * @id - target device identification number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * @bus - SCSI bus number that the target device exists on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * @handle - device handle for the target device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * @rsvd - reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * To obtain a bus/id the application sets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * handle to valid handle, and bus/id to 0xFFFF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * To obtain the device handle the application sets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * bus/id valid value, and the handle to 0xFFFF.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct mpt3_ioctl_btdh_mapping {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) uint32_t id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) uint32_t bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) uint16_t handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) uint16_t rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /* application flags for mpt3_diag_register, mpt3_diag_query */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define MPT3_APP_FLAGS_APP_OWNED (0x0001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define MPT3_APP_FLAGS_BUFFER_VALID (0x0002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define MPT3_APP_FLAGS_FW_BUFFER_ACCESS (0x0004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define MPT3_APP_FLAGS_DYNAMIC_BUFFER_ALLOC (0x0008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* flags for mpt3_diag_read_buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define MPT3_FLAGS_REREGISTER (0x0001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define MPT3_PRODUCT_SPECIFIC_DWORDS 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * struct mpt3_diag_register - application register with driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * @reserved -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * @buffer_type - specifies either TRACE, SNAPSHOT, or EXTENDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * @application_flags - misc flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * @diagnostic_flags - specifies flags affecting command processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * @product_specific - product specific information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * @requested_buffer_size - buffers size in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * @unique_id - tag specified by application that is used to signal ownership
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) * of the buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * This will allow the driver to setup any required buffers that will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * needed by firmware to communicate with the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct mpt3_diag_register {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) uint8_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) uint8_t buffer_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) uint16_t application_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) uint32_t diagnostic_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) uint32_t product_specific[MPT3_PRODUCT_SPECIFIC_DWORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) uint32_t requested_buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) uint32_t unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * struct mpt3_diag_unregister - application unregister with driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) * @unique_id - tag uniquely identifies the buffer to be unregistered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * This will allow the driver to cleanup any memory allocated for diag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * messages and to free up any resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct mpt3_diag_unregister {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) uint32_t unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * struct mpt3_diag_query - query relevant info associated with diag buffers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * @reserved -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * @buffer_type - specifies either TRACE, SNAPSHOT, or EXTENDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * @application_flags - misc flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * @diagnostic_flags - specifies flags affecting command processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * @product_specific - product specific information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * @total_buffer_size - diag buffer size in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * @driver_added_buffer_size - size of extra space appended to end of buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * @unique_id - unique id associated with this buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * The application will send only buffer_type and unique_id. Driver will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * inspect unique_id first, if valid, fill in all the info. If unique_id is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * 0x00, the driver will return info specified by Buffer Type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct mpt3_diag_query {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) uint8_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) uint8_t buffer_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) uint16_t application_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) uint32_t diagnostic_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) uint32_t product_specific[MPT3_PRODUCT_SPECIFIC_DWORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) uint32_t total_buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) uint32_t driver_added_buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) uint32_t unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * struct mpt3_diag_release - request to send Diag Release Message to firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * @unique_id - tag uniquely identifies the buffer to be released
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * This allows ownership of the specified buffer to returned to the driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * allowing an application to read the buffer without fear that firmware is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * overwriting information in the buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct mpt3_diag_release {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) uint32_t unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * struct mpt3_diag_read_buffer - request for copy of the diag buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * @hdr - generic header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * @status -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * @reserved -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * @flags - misc flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * @starting_offset - starting offset within drivers buffer where to start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * reading data at into the specified application buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * @bytes_to_read - number of bytes to copy from the drivers buffer into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * application buffer starting at starting_offset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) * @unique_id - unique id associated with this buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * @diagnostic_data - data payload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) struct mpt3_diag_read_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct mpt3_ioctl_header hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) uint8_t status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) uint8_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) uint16_t flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) uint32_t starting_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) uint32_t bytes_to_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) uint32_t unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) uint32_t diagnostic_data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #endif /* MPT3SAS_CTL_H_INCLUDED */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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