^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This is the Fusion MPT base driver providing common API layer interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * for access to MPT (Message Passing Technology) firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2012-2014 LSI Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2013-2014 Avago Technologies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * (mailto: MPT-FusionLinux.pdl@avagotech.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * modify it under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * as published by the Free Software Foundation; either version 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * of the License, or (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #ifndef MPT3SAS_BASE_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MPT3SAS_BASE_H_INCLUDED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include "mpi/mpi2_type.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include "mpi/mpi2.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include "mpi/mpi2_ioc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include "mpi/mpi2_cnfg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include "mpi/mpi2_init.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include "mpi/mpi2_raid.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include "mpi/mpi2_tool.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include "mpi/mpi2_sas.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include "mpi/mpi2_pci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include "mpi/mpi2_image.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <scsi/scsi_cmnd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <scsi/scsi_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include <scsi/scsi_tcq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include <scsi/scsi_transport_sas.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include <scsi/scsi_dbg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #include <scsi/scsi_eh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #include <linux/poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #include <linux/irq_poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #include "mpt3sas_debug.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #include "mpt3sas_trigger_diag.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* driver versioning info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define MPT3SAS_DRIVER_NAME "mpt3sas"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define MPT3SAS_DRIVER_VERSION "35.100.00.00"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define MPT3SAS_MAJOR_VERSION 35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define MPT3SAS_MINOR_VERSION 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define MPT3SAS_BUILD_VERSION 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define MPT3SAS_RELEASE_VERSION 00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define MPT2SAS_DRIVER_NAME "mpt2sas"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MPT2SAS_DRIVER_VERSION "20.102.00.00"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define MPT2SAS_MAJOR_VERSION 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MPT2SAS_MINOR_VERSION 102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MPT2SAS_BUILD_VERSION 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MPT2SAS_RELEASE_VERSION 00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* CoreDump: Default timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15) /*15 seconds*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * Set MPT3SAS_SG_DEPTH value based on user input.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define MPT_MIN_PHYS_SEGMENTS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define MCPU_MAX_CHAINS_PER_IO 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * Generic Defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define MPT3SAS_SATA_QUEUE_DEPTH 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define MPT3SAS_SAS_QUEUE_DEPTH 254
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define MPT3SAS_RAID_QUEUE_DEPTH 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define MPT3SAS_RAID_MAX_SECTORS 8192
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define MPT3SAS_HOST_PAGE_SIZE_4K 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define MPT3SAS_NVME_QUEUE_DEPTH 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define MPT_NAME_LENGTH 32 /* generic length of strings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define MPT_STRING_LENGTH 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define MPI_FRAME_START_OFFSET 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define MPT_MAX_CALLBACKS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* reserved for issuing internally framed scsi io cmds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define INTERNAL_SCSIIO_CMDS_COUNT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define MAX_CHAIN_ELEMT_SZ 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define DEFAULT_NUM_FWCHAIN_ELEMTS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define FW_IMG_HDR_READ_TIMEOUT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define IOC_OPERATIONAL_WAIT_COUNT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * NVMe defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define NVME_PRP_SIZE 8 /* PRP size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define NVME_TASK_ABORT_MIN_TIMEOUT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define NVME_TASK_ABORT_MAX_TIMEOUT 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define NVME_PRP_PAGE_SIZE 4096 /* Page size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) struct mpt3sas_nvme_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) u8 rsvd[24];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) __le64 prp1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) __le64 prp2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * logging format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define ioc_err(ioc, fmt, ...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define ioc_notice(ioc, fmt, ...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define ioc_warn(ioc, fmt, ...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define ioc_info(ioc, fmt, ...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * WarpDrive Specific Log codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define MPT2_WARPDRIVE_LC_SSDT (0x41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * per target private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define MPT_TARGET_FLAGS_VOLUME 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define MPT_TARGET_FLAGS_DELETED 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define MPT_TARGET_FASTPATH_IO 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Atlas PCIe Switch Management Port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * Intel HBA branding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define MPT2SAS_INTEL_RMS25JB080_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) "Intel(R) Integrated RAID Module RMS25JB080"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define MPT2SAS_INTEL_RMS25JB040_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) "Intel(R) Integrated RAID Module RMS25JB040"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define MPT2SAS_INTEL_RMS25KB080_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) "Intel(R) Integrated RAID Module RMS25KB080"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define MPT2SAS_INTEL_RMS25KB040_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) "Intel(R) Integrated RAID Module RMS25KB040"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define MPT2SAS_INTEL_RMS25LB040_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) "Intel(R) Integrated RAID Module RMS25LB040"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define MPT2SAS_INTEL_RMS25LB080_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) "Intel(R) Integrated RAID Module RMS25LB080"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define MPT2SAS_INTEL_RMS2LL080_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) "Intel Integrated RAID Module RMS2LL080"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define MPT2SAS_INTEL_RMS2LL040_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) "Intel Integrated RAID Module RMS2LL040"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define MPT2SAS_INTEL_RS25GB008_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) "Intel(R) RAID Controller RS25GB008"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define MPT2SAS_INTEL_SSD910_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) "Intel(R) SSD 910 Series"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define MPT3SAS_INTEL_RMS3JC080_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) "Intel(R) Integrated RAID Module RMS3JC080"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define MPT3SAS_INTEL_RS3GC008_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) "Intel(R) RAID Controller RS3GC008"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define MPT3SAS_INTEL_RS3FC044_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) "Intel(R) RAID Controller RS3FC044"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define MPT3SAS_INTEL_RS3UC080_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) "Intel(R) RAID Controller RS3UC080"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * Intel HBA SSDIDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * Dell HBA branding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define MPT2SAS_DELL_BRANDING_SIZE 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define MPT3SAS_DELL_12G_HBA_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) "Dell 12Gbps HBA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * Dell HBA SSDIDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * Cisco HBA branding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) "Cisco 9300-8E 12G SAS HBA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) "Cisco 9300-8i 12G SAS HBA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) "Cisco 12G Modular SAS Pass through Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) "UCS C3X60 12G SAS Pass through Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * Cisco HBA SSSDIDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * status bits for ioc->diag_buffer_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * HP HBA branding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define MPT2SAS_HP_3PAR_SSVID 0x1590
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) "HP H220 Host Bus Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) "HP H221 Host Bus Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) "HP H222 Host Bus Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) "HP H220i Host Bus Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) "HP H210i Host Bus Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * HO HBA SSDIDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * Combined Reply Queue constants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * There are twelve Supplemental Reply Post Host Index Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * and each register is at offset 0x10 bytes from the previous one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /* OEM Identifiers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define MFG10_OEM_ID_INVALID (0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define MFG10_OEM_ID_DELL (0x00000001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define MFG10_OEM_ID_FSC (0x00000002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define MFG10_OEM_ID_SUN (0x00000003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define MFG10_OEM_ID_IBM (0x00000004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* GENERIC Flags 0*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #define MFG10_GF0_OCE_DISABLED (0x00000001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define MFG10_GF0_R10_DISPLAY (0x00000004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* High IOPs definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* OEM Specific Flags will come from OEM specific header files */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct Mpi2ManufacturingPage10_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) U8 OEMIdentifier; /* 04h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) U8 Reserved1; /* 05h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) U16 Reserved2; /* 08h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) U32 Reserved3; /* 0Ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) U32 GenericFlags0; /* 10h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) U32 GenericFlags1; /* 14h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) U32 Reserved4; /* 18h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) U32 OEMSpecificFlags0; /* 1Ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) U32 OEMSpecificFlags1; /* 20h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) U32 Reserved5[18]; /* 24h - 60h*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /* Miscellaneous options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct Mpi2ManufacturingPage11_t {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) __le32 Reserved1; /* 04h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) u8 Reserved2; /* 08h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u8 EEDPTagMode; /* 09h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) u8 Reserved3; /* 0Ah */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) u8 Reserved4; /* 0Bh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) __le32 Reserved5[8]; /* 0Ch-2Ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) u16 AddlFlags2; /* 2Ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) u8 AddlFlags3; /* 2Eh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u8 Reserved6; /* 2Fh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) __le32 Reserved7[7]; /* 30h - 4Bh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) u8 NVMeAbortTO; /* 4Ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u8 NumPerDevEvents; /* 4Dh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) u8 HostTraceBufferDecrementSizeKB; /* 4Eh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) u8 HostTraceBufferFlags; /* 4Fh */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) u16 HostTraceBufferMaxSizeKB; /* 50h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) u16 HostTraceBufferMinSizeKB; /* 52h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) u8 CoreDumpTOSec; /* 54h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u8 Reserved8; /* 55h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) u16 Reserved9; /* 56h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) __le32 Reserved10; /* 58h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * struct MPT3SAS_TARGET - starget private hostdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * @starget: starget object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * @sas_address: target sas address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * @raid_device: raid_device pointer to access volume data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * @handle: device handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) * @num_luns: number luns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * @flags: MPT_TARGET_FLAGS_XXX flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) * @deleted: target flaged for deletion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) * @tm_busy: target is busy with TM request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) * @sas_dev: The sas_device associated with this target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * @pcie_dev: The pcie device associated with this target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct MPT3SAS_TARGET {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) struct scsi_target *starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) u64 sas_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct _raid_device *raid_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) int num_luns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) u8 deleted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) u8 tm_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct _sas_device *sas_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) struct _pcie_device *pcie_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * per device private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) #define MPT_DEVICE_FLAGS_INIT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * struct MPT3SAS_DEVICE - sdev private hostdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * @sas_target: starget private hostdata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * @lun: lun number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * @flags: MPT_DEVICE_XXX flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * @configured_lun: lun is configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * @block: device is in SDEV_BLOCK state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * @tlr_snoop_check: flag used in determining whether to disable TLR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * @eedp_enable: eedp support enable bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * @eedp_block_length: block size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * @ata_command_pending: SATL passthrough outstanding for device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) struct MPT3SAS_DEVICE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) struct MPT3SAS_TARGET *sas_target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) unsigned int lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) u8 configured_lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) u8 block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) u8 tlr_snoop_check;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) u8 ignore_delay_remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /* Iopriority Command Handling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) u8 ncq_prio_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * Bug workaround for SATL handling: the mpt2/3sas firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * doesn't return BUSY or TASK_SET_FULL for subsequent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * commands while a SATL pass through is in operation as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * spec requires, it simply does nothing with them until the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * pass through completes, causing them possibly to timeout if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * the passthrough is a long executing command (like format or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * secure erase). This variable allows us to do the right
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * thing while a SATL command is pending.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) unsigned long ata_command_pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) #define MPT3_CMD_NOT_USED 0x8000 /* free */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) #define MPT3_CMD_COMPLETE 0x0001 /* completed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #define MPT3_CMD_PENDING 0x0002 /* pending */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) * struct _internal_cmd - internal commands struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) * @mutex: mutex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) * @done: completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) * @reply: reply message pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) * @sense: sense data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * @status: MPT3_CMD_XXX status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * @smid: system message id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct _internal_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) struct mutex mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) struct completion done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) void *reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) void *sense;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) u16 smid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * struct _sas_device - attached device information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * @list: sas device list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * @starget: starget object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) * @sas_address: device sas address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) * @device_name: retrieved from the SAS IDENTIFY frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) * @handle: device handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * @sas_address_parent: sas address of parent expander or sas host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * @enclosure_handle: enclosure handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * @enclosure_logical_id: enclosure logical identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * @volume_handle: volume handle (valid when hidden raid member)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * @volume_wwid: volume unique identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * @device_info: bitfield provides detailed info about the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) * @id: target id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) * @channel: target channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) * @slot: number number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * @phy: phy identifier provided in sas device page 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * @responding: used in _scsih_sas_device_mark_responding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * @fast_path: fast path feature enable bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * @pfa_led_on: flag for PFA LED status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * addition routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * @chassis_slot: chassis slot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * @is_chassis_slot_valid: chassis slot valid or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) struct _sas_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) struct scsi_target *starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) u64 sas_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u64 device_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) u64 sas_address_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) u16 enclosure_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) u64 enclosure_logical_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) u16 volume_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) u64 volume_wwid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) u32 device_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) u16 slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) u8 phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) u8 responding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) u8 fast_path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) u8 pfa_led_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) u8 pend_sas_rphy_add;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) u8 enclosure_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) u8 chassis_slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) u8 is_chassis_slot_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) u8 connector_name[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) struct kref refcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static inline void sas_device_get(struct _sas_device *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) kref_get(&s->refcount);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) static inline void sas_device_free(struct kref *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) kfree(container_of(r, struct _sas_device, refcount));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static inline void sas_device_put(struct _sas_device *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) kref_put(&s->refcount, sas_device_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) * struct _pcie_device - attached PCIe device information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) * @list: pcie device list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) * @starget: starget object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * @wwid: device WWID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * @handle: device handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * @device_info: bitfield provides detailed info about the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * @id: target id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * @channel: target channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * @slot: slot number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * @port_num: port number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * @responding: used in _scsih_pcie_device_mark_responding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * @fast_path: fast path feature enable bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * NVMe device only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * @enclosure_handle: enclosure handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * @enclosure_logical_id: enclosure logical identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) * @enclosure_level: The level of device's enclosure from the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) * @connector_name: ASCII value of the Connector's name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) * @serial_number: pointer of serial number string allocated runtime
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) * @access_status: Device's Access Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * @shutdown_latency: NVMe device's RTD3 Entry Latency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * @refcount: reference count for deletion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) struct _pcie_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) struct scsi_target *starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) u64 wwid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) u32 device_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) u16 slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) u8 port_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u8 responding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) u8 fast_path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) u32 nvme_mdts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) u16 enclosure_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) u64 enclosure_logical_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) u8 enclosure_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) u8 connector_name[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) u8 *serial_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) u8 reset_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) u8 access_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) u16 shutdown_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) struct kref refcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * pcie_device_get - Increment the pcie device reference count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * @p: pcie_device object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * When ever this function called it will increment the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * reference count of the pcie device for which this function called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) static inline void pcie_device_get(struct _pcie_device *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) kref_get(&p->refcount);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) * pcie_device_free - Release the pcie device object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) * @r - kref object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) * Free's the pcie device object. It will be called when reference count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) * reaches to zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static inline void pcie_device_free(struct kref *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) kfree(container_of(r, struct _pcie_device, refcount));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * pcie_device_put - Decrement the pcie device reference count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * @p: pcie_device object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) * When ever this function called it will decrement the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * reference count of the pcie device for which this function called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * When refernce count reaches to Zero, this will call pcie_device_free to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) * pcie_device object.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static inline void pcie_device_put(struct _pcie_device *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) kref_put(&p->refcount, pcie_device_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) * struct _raid_device - raid volume link list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * @list: sas device list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * @starget: starget object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * @sdev: scsi device struct (volumes are single lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * @wwid: unique identifier for the volume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) * @handle: device handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) * @block_size: Block size of the volume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) * @id: target id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) * @channel: target channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) * @volume_type: the raid level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * @device_info: bitfield provides detailed info about the hidden components
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) * @num_pds: number of hidden raid components
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) * @responding: used in _scsih_raid_device_mark_responding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) * @percent_complete: resync percent complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * @direct_io_enabled: Whether direct io to PDs are allowed or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * @stripe_exponent: X where 2powX is the stripe sz in blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) * @block_exponent: X where 2powX is the block sz in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) * @max_lba: Maximum number of LBA in the volume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) * @stripe_sz: Stripe Size of the volume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * @device_info: Device info of the volume member disk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) * @pd_handle: Array of handles of the physical drives for direct I/O in le16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) #define MPT_MAX_WARPDRIVE_PDS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) struct _raid_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) struct scsi_target *starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) struct scsi_device *sdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) u64 wwid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) u16 block_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) u8 volume_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) u8 num_pds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) u8 responding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) u8 percent_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) u8 direct_io_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) u8 stripe_exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) u8 block_exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) u64 max_lba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) u32 stripe_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) u32 device_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) * struct _boot_device - boot device info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) * @channel: sas, raid, or pcie channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) * @device: holds pointer for struct _sas_device, struct _raid_device or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * struct _pcie_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) struct _boot_device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) void *device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * struct _sas_port - wide/narrow sas port information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * @port_list: list of ports belonging to expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) * @num_phys: number of phys belonging to this port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) * @remote_identify: attached device identification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) * @rphy: sas transport rphy object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * @port: sas transport wide/narrow port object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * @phy_list: _sas_phy list objects belonging to this port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) struct _sas_port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) struct list_head port_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) u8 num_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) struct sas_identify remote_identify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) struct sas_rphy *rphy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) struct sas_port *port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) struct list_head phy_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * struct _sas_phy - phy information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * @port_siblings: list of phys belonging to a port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * @identify: phy identification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * @remote_identify: attached device identification
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * @phy: sas transport phy object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * @phy_id: unique phy id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * @handle: device handle for this phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * @attached_handle: device handle for attached device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * @phy_belongs_to_port: port has been created for this phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) struct _sas_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) struct list_head port_siblings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) struct sas_identify identify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) struct sas_identify remote_identify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) struct sas_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) u16 attached_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) u8 phy_belongs_to_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) * struct _sas_node - sas_host/expander information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) * @list: list of expanders
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) * @parent_dev: parent device class
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) * @num_phys: number phys belonging to this sas_host/expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) * @sas_address: sas address of this sas_host/expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) * @handle: handle for this sas_host/expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) * @sas_address_parent: sas address of parent expander or sas host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) * @enclosure_handle: handle for this a member of an enclosure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) * @device_info: bitwise defining capabilities of this sas_host/expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) * @responding: used in _scsih_expander_device_mark_responding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) * @phy: a list of phys that make up this sas_host/expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * @sas_port_list: list of ports attached to this sas_host/expander
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) struct _sas_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) struct device *parent_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) u8 num_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) u64 sas_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) u64 sas_address_parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) u16 enclosure_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) u64 enclosure_logical_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) u8 responding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct _sas_phy *phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) struct list_head sas_port_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) * struct _enclosure_node - enclosure information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) * @list: list of enclosures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) * @pg0: enclosure pg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) struct _enclosure_node {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) Mpi2SasEnclosurePage0_t pg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) * enum reset_type - reset state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) * @FORCE_BIG_HAMMER: issue diagnostic reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) enum reset_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) FORCE_BIG_HAMMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) SOFT_RESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) * @pcie_sgl: PCIe native SGL for NVMe devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) * @pcie_sgl_dma: physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) struct pcie_sg_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) void *pcie_sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) dma_addr_t pcie_sgl_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) * struct chain_tracker - firmware chain tracker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) * @chain_buffer: chain buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) * @chain_buffer_dma: physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) * @tracker_list: list of free request (ioc->free_chain_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) struct chain_tracker {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) void *chain_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) dma_addr_t chain_buffer_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) struct chain_lookup {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) struct chain_tracker *chains_per_smid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) atomic_t chain_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) * struct scsiio_tracker - scsi mf request tracker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) * @smid: system message id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) * @cb_idx: callback index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) * @chain_list: list of associated firmware chain tracker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) * @msix_io: IO's msix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) struct scsiio_tracker {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) u16 smid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) struct scsi_cmnd *scmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) u8 cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) u8 direct_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct pcie_sg_list pcie_sg_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) struct list_head chain_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) u16 msix_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) * struct request_tracker - firmware request tracker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * @smid: system message id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * @cb_idx: callback index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) * @tracker_list: list of free request (ioc->free_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) struct request_tracker {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) u16 smid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) u8 cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) struct list_head tracker_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) * struct _tr_list - target reset list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) * @handle: device handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) * @state: state machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) struct _tr_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) u16 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) * @handle: device handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) struct _sc_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) u16 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) * struct _event_ack_list - delayed event acknowledgment list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) * @Event: Event ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) * @EventContext: used to track the event uniquely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) struct _event_ack_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) U16 Event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) U32 EventContext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) * struct adapter_reply_queue - the reply queue struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) * @ioc: per adapter object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) * @msix_index: msix index into vector table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) * @vector: irq vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) * @reply_post_host_index: head index in the pool where FW completes IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) * @reply_post_free: reply post base virt address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) * @name: the name registered to request_irq()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) * @busy: isr is actively processing replies on another cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) * @os_irq: irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) * @irqpoll: irq_poll object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) * @list: this list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) struct adapter_reply_queue {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) struct MPT3SAS_ADAPTER *ioc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) u8 msix_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) u32 reply_post_host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) Mpi2ReplyDescriptorsUnion_t *reply_post_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) char name[MPT_NAME_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) atomic_t busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) u32 os_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) struct irq_poll irqpoll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) bool irq_poll_scheduled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) bool irq_line_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) /* SAS3.0 support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) dma_addr_t data_out_dma, size_t data_out_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) dma_addr_t data_in_dma, size_t data_in_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) void *paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) /* SAS3.5 support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) size_t data_in_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) /* To support atomic and non atomic descriptors*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) u16 funcdep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) * To get high iops reply queue's msix index when high iops mode is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) * else get the msix index of general reply queues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) struct scsi_cmnd *scmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) /* IOC Facts and Port Facts converted from little endian to cpu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) union mpi3_version_union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) MPI2_VERSION_STRUCT Struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) u32 Word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) struct mpt3sas_facts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) u16 MsgVersion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) u16 HeaderVersion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) u8 IOCNumber;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) u8 VP_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) u8 VF_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) u16 IOCExceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) u16 IOCStatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) u32 IOCLogInfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) u8 MaxChainDepth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) u8 WhoInit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) u8 NumberOfPorts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) u8 MaxMSIxVectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) u16 RequestCredit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) u16 ProductID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) u32 IOCCapabilities;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) union mpi3_version_union FWVersion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) u16 IOCRequestFrameSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) u16 IOCMaxChainSegmentSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) u16 MaxInitiators;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) u16 MaxTargets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) u16 MaxSasExpanders;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) u16 MaxEnclosures;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) u16 ProtocolFlags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) u16 HighPriorityCredit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) u16 MaxReplyDescriptorPostQueueDepth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) u8 ReplyFrameSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) u8 MaxVolumes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) u16 MaxDevHandle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) u16 MaxPersistentEntries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) u16 MinDevHandle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) u8 CurrentHostPageSize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) struct mpt3sas_port_facts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) u8 PortNumber;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) u8 VP_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) u8 VF_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) u8 PortType;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) u16 MaxPostedCmdBuffers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) struct reply_post_struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) Mpi2ReplyDescriptorsUnion_t *reply_post_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) dma_addr_t reply_post_free_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) * struct MPT3SAS_ADAPTER - per adapter struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) * @list: ioc_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) * @shost: shost object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * @id: unique adapter id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * @cpu_count: number online cpus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) * @name: generic ioc string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) * @tmp_string: tmp string used for logging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) * @pdev: pci pdev object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * @pio_chip: physical io register space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) * @chip: memory mapped register space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) * @chip_phys: physical addrss prior to mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) * @logging_level: see mpt3sas_debug.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) * @fwfault_debug: debuging FW timeouts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) * @ir_firmware: IR firmware present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) * @bars: bitmask of BAR's that must be configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * @mask_interrupts: ignore interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) * pci resource handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) * @fault_reset_work_q_name: fw fault work queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) * @fault_reset_work_q: ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) * @fault_reset_work: ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) * @firmware_event_name: fw event work queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) * @firmware_event_thread: ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) * @fw_event_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) * @fw_event_list: list of fw events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) * @current_evet: current processing firmware event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) * @fw_event_cleanup: set to one while cleaning up the fw events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * @aen_event_read_flag: event log was read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) * @broadcast_aen_busy: broadcast aen waiting to be serviced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) * @shost_recovery: host reset in progress
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * @ioc_reset_in_progress_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) * @ioc_link_reset_in_progress: phy/hard reset in progress
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) * @ignore_loginfos: ignore loginfos during task management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) * @remove_host: flag for when driver unloads, to avoid sending dev resets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) * @pci_error_recovery: flag to prevent ioc access until slot reset completes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) * @wait_for_discovery_to_complete: flag set at driver load time when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) * waiting on reporting devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) * @is_driver_loading: flag set at driver load time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) * @port_enable_failed: flag set when port enable has failed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) * @start_scan_failed: means port enable failed, return's the ioc_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) * @msix_enable: flag indicating msix is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) * @msix_vector_count: number msix vectors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) * @cpu_msix_table: table for mapping cpus to msix index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) * @cpu_msix_table_sz: table size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) * @total_io_cnt: Gives total IO count, used to load balance the interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) * @high_iops_outstanding: used to load balance the interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) * within high iops reply queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * @msix_load_balance: Enables load balancing of interrupts across
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * the multiple MSIXs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) * @thresh_hold: Max number of reply descriptors processed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) * before updating Host Index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) * @drv_support_bitmap: driver's supported feature bit map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) * @use_32bit_dma: Flag to use 32 bit consistent dma mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) * @scsi_io_cb_idx: shost generated commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) * @tm_cb_idx: task management commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) * @scsih_cb_idx: scsih internal commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) * @transport_cb_idx: transport internal commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) * @ctl_cb_idx: clt internal commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) * @base_cb_idx: base internal commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) * @config_cb_idx: base internal commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) * @tm_tr_cb_idx : device removal target reset handshake
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) * @tm_tr_volume_cb_idx : volume removal target reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) * @base_cmds:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) * @transport_cmds:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) * @scsih_cmds:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) * @tm_cmds:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) * @ctl_cmds:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) * @config_cmds:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) * @base_add_sg_single: handler for either 32/64 bit sgl's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) * @event_type: bits indicating which events to log
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) * @event_context: unique id for each logged event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) * @event_log: event log pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) * @event_masks: events that are masked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) * @max_shutdown_latency: timeout value for NVMe shutdown operation,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) * which is equal that NVMe drive's RTD3 Entry Latency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) * which has reported maximum RTD3 Entry Latency value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) * among attached NVMe drives.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) * @facts: static facts data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) * @prev_fw_facts: previous fw facts data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) * @pfacts: static port facts data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) * @manu_pg0: static manufacturing page 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) * @manu_pg10: static manufacturing page 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) * @manu_pg11: static manufacturing page 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) * @bios_pg2: static bios page 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) * @bios_pg3: static bios page 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) * @ioc_pg8: static ioc page 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) * @iounit_pg0: static iounit page 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) * @iounit_pg1: static iounit page 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) * @iounit_pg8: static iounit page 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) * @sas_hba: sas host object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) * @sas_expander_list: expander object list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) * @enclosure_list: enclosure object list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) * @sas_node_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) * @sas_device_list: sas device object list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) * @sas_device_init_list: sas device object list (used only at init time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) * @sas_device_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) * @pcie_device_list: pcie device object list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) * @pcie_device_init_list: pcie device object list (used only at init time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) * @pcie_device_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) * @io_missing_delay: time for IO completed by fw when PDR enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) * @device_missing_delay: time for device missing by fw when PDR enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) * @sas_id : used for setting volume target IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) * @pcie_target_id: used for setting pcie target IDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) * @blocking_handles: bitmask used to identify which devices need blocking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) * @pd_handles : bitmask for PD handles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) * @pd_handles_sz : size of pd_handle bitmask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) * @config_page_sz: config page size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) * @config_page: reserve memory for config page payload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) * @config_page_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) * @hba_queue_depth: hba request queue depth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) * @sge_size: sg element size for either 32/64 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) * @scsiio_depth: SCSI_IO queue depth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) * @request_sz: per request frame size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) * @request: pool of request frames
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) * @request_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) * @request_dma_sz:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) * @scsi_lookup: firmware request tracker list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) * @scsi_lookup_lock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) * @free_list: free list of request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) * @pending_io_count:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) * @reset_wq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) * @chain: pool of chains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) * @chain_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) * @max_sges_in_main_message: number sg elements in main message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) * @max_sges_in_chain_message: number sg elements per chain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) * @chains_needed_per_io: max chains per io
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) * @chain_depth: total chains allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) * @chain_segment_sz: gives the max number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) * SGEs accommodate on single chain buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) * @hi_priority_smid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) * @hi_priority:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) * @hi_priority_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) * @hi_priority_depth:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) * @hpr_lookup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) * @hpr_free_list:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) * @internal_smid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) * @internal:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) * @internal_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) * @internal_depth:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) * @internal_lookup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) * @internal_free_list:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) * @sense: pool of sense
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) * @sense_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) * @sense_dma_pool:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) * @reply_depth: hba reply queue depth:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) * @reply_sz: per reply frame size:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) * @reply: pool of replys:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) * @reply_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) * @reply_dma_pool:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) * @reply_free_queue_depth: reply free depth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) * @reply_free: pool for reply free queue (32 bit addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) * @reply_free_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) * @reply_free_dma_pool:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) * @reply_free_host_index: tail index in pool to insert free replys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) * @reply_post_queue_depth: reply post queue depth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) * @reply_post_struct: struct for reply_post_free physical & virt address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) * @rdpq_array_enable: rdpq_array support is enabled in the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) * is assigned only ones
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) * @reply_queue_count: number of reply queue's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) * @reply_queue_list: link list contaning the reply queue info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) * @msix96_vector: 96 MSI-X vector support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) * @delayed_tr_list: target reset link list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) * @delayed_tr_volume_list: volume target reset link list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) * @delayed_sc_list:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) * @delayed_event_ack_list:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) * @temp_sensors_count: flag to carry the number of temperature sensors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) * pci resource handling. PCI resource freeing will lead to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) * vital hardware/memory resource, which might be in use by cli/sysfs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) * path functions resulting in Null pointer reference followed by kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) * crash. To avoid the above race condition we use mutex syncrhonization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) * which ensures the syncrhonization between cli/sysfs_show path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) * @atomic_desc_capable: Atomic Request Descriptor support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) * @GET_MSIX_INDEX: Get the msix index of high iops queues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) struct MPT3SAS_ADAPTER {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) int cpu_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) char name[MPT_NAME_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) char driver_name[MPT_NAME_LENGTH - 8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) char tmp_string[MPT_STRING_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) Mpi2SystemInterfaceRegs_t __iomem *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) phys_addr_t chip_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) int logging_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) int fwfault_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) u8 ir_firmware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) int bars;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) u8 mask_interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) /* fw fault handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) char fault_reset_work_q_name[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) struct workqueue_struct *fault_reset_work_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) struct delayed_work fault_reset_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) /* fw event handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) char firmware_event_name[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) struct workqueue_struct *firmware_event_thread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) spinlock_t fw_event_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) struct list_head fw_event_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) struct fw_event_work *current_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) u8 fw_events_cleanup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) /* misc flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) int aen_event_read_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) u8 broadcast_aen_busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) u16 broadcast_aen_pending;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) u8 shost_recovery;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) u8 got_task_abort_from_ioctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) struct mutex reset_in_progress_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) spinlock_t ioc_reset_in_progress_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) u8 ioc_link_reset_in_progress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) u8 ignore_loginfos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) u8 remove_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) u8 pci_error_recovery;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) u8 wait_for_discovery_to_complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) u8 is_driver_loading;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) u8 port_enable_failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) u8 start_scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) u16 start_scan_failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) u8 msix_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) u16 msix_vector_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) u8 *cpu_msix_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) u16 cpu_msix_table_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) resource_size_t __iomem **reply_post_host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) u32 ioc_reset_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) u32 non_operational_loop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) u8 ioc_coredump_loop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) atomic64_t total_io_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) atomic64_t high_iops_outstanding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) bool msix_load_balance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) u16 thresh_hold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) u8 high_iops_queues;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) u32 drv_support_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) bool enable_sdev_max_qd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) bool use_32bit_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) /* internal commands, callback index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) u8 scsi_io_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) u8 tm_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) u8 transport_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) u8 scsih_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) u8 ctl_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) u8 base_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) u8 port_enable_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) u8 config_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) u8 tm_tr_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) u8 tm_tr_volume_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) u8 tm_sas_control_cb_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) struct _internal_cmd base_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) struct _internal_cmd port_enable_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) struct _internal_cmd transport_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) struct _internal_cmd scsih_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) struct _internal_cmd tm_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) struct _internal_cmd ctl_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) struct _internal_cmd config_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) MPT_ADD_SGE base_add_sg_single;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) /* function ptr for either IEEE or MPI sg elements */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) MPT_BUILD_SG_SCMD build_sg_scmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) MPT_BUILD_SG build_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) u16 sge_size_ieee;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) u16 hba_mpi_version_belonged;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) /* function ptr for MPI sg elements only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) MPT_BUILD_SG build_sg_mpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) /* function ptr for NVMe PRP elements only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) NVME_BUILD_PRP build_nvme_prp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) /* event log */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) u32 event_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) void *event_log;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) u8 tm_custom_handling;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) u8 nvme_abort_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) u16 max_shutdown_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) /* static config pages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) struct mpt3sas_facts facts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) struct mpt3sas_facts prev_fw_facts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) struct mpt3sas_port_facts *pfacts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) Mpi2ManufacturingPage0_t manu_pg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) struct Mpi2ManufacturingPage10_t manu_pg10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) struct Mpi2ManufacturingPage11_t manu_pg11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) Mpi2BiosPage2_t bios_pg2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) Mpi2BiosPage3_t bios_pg3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) Mpi2IOCPage8_t ioc_pg8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) Mpi2IOUnitPage0_t iounit_pg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) Mpi2IOUnitPage1_t iounit_pg1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) Mpi2IOUnitPage8_t iounit_pg8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) Mpi2IOCPage1_t ioc_pg1_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) struct _boot_device req_boot_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) struct _boot_device req_alt_boot_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) struct _boot_device current_boot_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) /* sas hba, expander, and device list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) struct _sas_node sas_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) struct list_head sas_expander_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) struct list_head enclosure_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) spinlock_t sas_node_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) struct list_head sas_device_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) struct list_head sas_device_init_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) spinlock_t sas_device_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) struct list_head pcie_device_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) struct list_head pcie_device_init_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) spinlock_t pcie_device_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) struct list_head raid_device_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) spinlock_t raid_device_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) u8 io_missing_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) u16 device_missing_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) int sas_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) int pcie_target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) void *blocking_handles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) void *pd_handles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) u16 pd_handles_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) void *pend_os_device_add;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) u16 pend_os_device_add_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) /* config page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) u16 config_page_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) void *config_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) dma_addr_t config_page_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) void *config_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) /* scsiio request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) u16 hba_queue_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) u16 sge_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) u16 scsiio_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) u16 request_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) u8 *request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) dma_addr_t request_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) u32 request_dma_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) struct pcie_sg_list *pcie_sg_lookup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) spinlock_t scsi_lookup_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) int pending_io_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) wait_queue_head_t reset_wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) /* PCIe SGL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) struct dma_pool *pcie_sgl_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) /* Host Page Size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) u32 page_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) /* chain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) struct chain_lookup *chain_lookup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) struct list_head free_chain_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) struct dma_pool *chain_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) ulong chain_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) u16 max_sges_in_main_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) u16 max_sges_in_chain_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) u16 chains_needed_per_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) u32 chain_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) u16 chain_segment_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) u16 chains_per_prp_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /* hi-priority queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) u16 hi_priority_smid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) u8 *hi_priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) dma_addr_t hi_priority_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) u16 hi_priority_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) struct request_tracker *hpr_lookup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) struct list_head hpr_free_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) /* internal queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) u16 internal_smid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) u8 *internal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) dma_addr_t internal_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) u16 internal_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) struct request_tracker *internal_lookup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) struct list_head internal_free_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) /* sense */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) u8 *sense;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) dma_addr_t sense_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) struct dma_pool *sense_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) /* reply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) u16 reply_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) u8 *reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) dma_addr_t reply_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) u32 reply_dma_max_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) u32 reply_dma_min_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) struct dma_pool *reply_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) /* reply free queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) u16 reply_free_queue_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) __le32 *reply_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) dma_addr_t reply_free_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) struct dma_pool *reply_free_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) u32 reply_free_host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) /* reply post queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) u16 reply_post_queue_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) struct reply_post_struct *reply_post;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) u8 rdpq_array_capable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) u8 rdpq_array_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) u8 rdpq_array_enable_assigned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) struct dma_pool *reply_post_free_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) struct dma_pool *reply_post_free_array_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) dma_addr_t reply_post_free_array_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) u8 reply_queue_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) struct list_head reply_queue_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) u8 combined_reply_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) u8 combined_reply_index_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) u8 smp_affinity_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) /* reply post register index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) resource_size_t **replyPostRegisterIndex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) struct list_head delayed_tr_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) struct list_head delayed_tr_volume_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) struct list_head delayed_sc_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) struct list_head delayed_event_ack_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) u8 temp_sensors_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) struct mutex pci_access_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) /* diag buffer support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) u32 ring_buffer_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) u32 ring_buffer_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) u8 is_warpdrive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) u8 is_mcpu_endpoint;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) u8 hide_ir_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) u8 mfg_pg10_hide_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) u8 hide_drives;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) spinlock_t diag_trigger_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) u8 diag_trigger_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) u8 atomic_desc_capable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) BASE_READ_REG base_readl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) void *device_remove_in_progress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) u16 device_remove_in_progress_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) u8 is_gen35_ioc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) u8 is_aero_ioc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) struct dentry *debugfs_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) struct dentry *ioc_dump;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) PUT_SMID_IO_FP_HIP put_smid_scsi_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) PUT_SMID_IO_FP_HIP put_smid_fast_path;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) PUT_SMID_IO_FP_HIP put_smid_hi_priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) PUT_SMID_DEFAULT put_smid_default;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) GET_MSIX_INDEX get_msix_index_for_smlio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) struct mpt3sas_debugfs_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) void *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) u32 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) /* base shared API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) extern struct list_head mpt3sas_ioc_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) extern char driver_name[MPT_NAME_LENGTH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) /* spinlock on list operations over IOCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) * Case: when multiple warpdrive cards(IOCs) are in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) * Each IOC will added to the ioc list structure on initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) * Watchdog threads run at regular intervals to check IOC for any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) * fault conditions which will trigger the dead_ioc thread to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) * deallocate pci resource, resulting deleting the IOC netry from list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) * this deletion need to protected by spinlock to enusre that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) * ioc removal is syncrhonized, if not synchronized it might lead to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) * list_del corruption as the ioc list is traversed in cli path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) extern spinlock_t gioc_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) enum reset_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) u16 msix_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) /* hi-priority queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) struct scsi_cmnd *scmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) struct scsiio_tracker *st);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) void mpt3sas_base_initialize_callback_handler(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) void mpt3sas_base_release_callback_handler(u8 cb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) u8 msix_index, u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) u32 phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) #define mpt3sas_print_fault_code(ioc, fault_code) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) mpt3sas_base_fault_info(ioc, fault_code); } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) #define mpt3sas_print_coredump_info(ioc, fault_code) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) const char *caller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) Mpi2SasIoUnitControlReply_t *mpi_reply,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) Mpi2SasIoUnitControlRequest_t *mpi_request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) u32 *event_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) u16 device_missing_delay, u8 io_missing_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) u8 status, void *mpi_request, int sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) do { ioc_err(ioc, "In func: %s\n", __func__); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) status, mpi_request, sz); } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) /* scsih shared API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) void mpt3sas_scsih_clear_outstanding_scsi_tm_commands(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) uint channel, uint id, u64 lun, u8 type, u16 smid_task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) u16 msix_task, u8 timeout, u8 tr_method);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) uint channel, uint id, u64 lun, u8 type, u16 smid_task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) u16 msix_task, u8 timeout, u8 tr_method);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) u64 sas_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) u16 smid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) struct MPT3SAS_ADAPTER *ioc, u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) struct _sas_device *mpt3sas_get_sdev_by_addr(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) struct _sas_device *__mpt3sas_get_sdev_by_addr(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) struct _raid_device *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) /* config shared API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) u8 *num_phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) u16 sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) Mpi2ConfigReply_t *mpi_reply,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) struct Mpi2ManufacturingPage10_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) Mpi2ConfigReply_t *mpi_reply,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) struct Mpi2ManufacturingPage11_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) Mpi2ConfigReply_t *mpi_reply,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) struct Mpi2ManufacturingPage11_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) *mpi_reply, Mpi2BiosPage2_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) *mpi_reply, Mpi2BiosPage3_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) *mpi_reply, Mpi2IOUnitPage0_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) u32 form, u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) u32 form, u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) u32 form, u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) u32 form, u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) u16 sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) *mpi_reply, Mpi2IOUnitPage1_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) *mpi_reply, Mpi2IOUnitPage1_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) *mpi_reply, Mpi2IOUnitPage8_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) u16 sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) u16 sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) *mpi_reply, Mpi2IOCPage1_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) *mpi_reply, Mpi2IOCPage1_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) *mpi_reply, Mpi2IOCPage8_t *config_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) u32 form, u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) u32 phy_number, u16 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) u32 form, u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) u8 *num_pds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) u32 handle, u16 sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) u32 form, u32 form_specific);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) u16 *volume_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) u16 volume_handle, u64 *wwid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) /* ctl shared API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) extern struct device_attribute *mpt3sas_host_attrs[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) extern struct device_attribute *mpt3sas_dev_attrs[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) void mpt3sas_ctl_init(ushort hbas_to_enumerate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) u8 msix_index, u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) Mpi2EventNotificationReply_t *mpi_reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) u8 bits_to_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) u8 *issue_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) /* transport shared API */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) extern struct scsi_transport_template *mpt3sas_transport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) u32 reply);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) u16 handle, u64 sas_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) u64 sas_address_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) struct device *parent_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) extern struct sas_function_template mpt3sas_transport_functions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) extern struct scsi_transport_template *mpt3sas_transport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) /* trigger data externs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) u32 trigger_bitmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) u16 log_entry_qualifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) u8 asc, u8 ascq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) u32 loginfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) /* warpdrive APIs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) struct _raid_device *raid_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) /* NCQ Prio Handling Check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) bool scsih_ncq_prio_supp(struct scsi_device *sdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) void mpt3sas_init_debugfs(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) void mpt3sas_exit_debugfs(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) * @device_info: bitfield providing information about the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) * Context: none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) * Returns 1 if scsi device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) if ((device_info &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) #endif /* MPT3SAS_BASE_H_INCLUDED */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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