Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *			Linux MegaRAID device driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (c) 2003-2004  LSI Logic Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * FILE		: megaraid_ioctl.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Definitions to interface with user level applications
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #ifndef _MEGARAID_IOCTL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define _MEGARAID_IOCTL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/semaphore.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include "mbox_defs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * console messages debug levels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define	CL_ANN		0	/* print unconditionally, announcements */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define CL_DLEVEL1	1	/* debug level 1, informative */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define CL_DLEVEL2	2	/* debug level 2, verbose */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define CL_DLEVEL3	3	/* debug level 3, very verbose */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * con_log() - console log routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * @level		: indicates the severity of the message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * @fmt			: format string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * con_log displays the error messages on the console based on the current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * debug level. Also it attaches the appropriate kernel severity level with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * the message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define	con_log(level, fmt) if (LSI_DBGLVL >= level) printk fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * Definitions & Declarations needed to use common management module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define MEGAIOC_MAGIC		'm'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define MEGAIOCCMD		_IOWR(MEGAIOC_MAGIC, 0, mimd_t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define MEGAIOC_QNADAP		'm'	/* Query # of adapters		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define MEGAIOC_QDRVRVER	'e'	/* Query driver version		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define MEGAIOC_QADAPINFO   	'g'	/* Query adapter information	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define USCSICMD		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define UIOC_RD			0x00001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define UIOC_WR			0x00002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define MBOX_CMD		0x00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define GET_DRIVER_VER		0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define GET_N_ADAP		0x20000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define GET_ADAP_INFO		0x30000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define GET_CAP			0x40000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define GET_STATS		0x50000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define GET_IOCTL_VERSION	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define EXT_IOCTL_SIGN_SZ	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define EXT_IOCTL_SIGN		"$$_EXTD_IOCTL_$$"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define	MBOX_LEGACY		0x00		/* ioctl has legacy mbox*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define MBOX_HPE		0x01		/* ioctl has hpe mbox	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define	APPTYPE_MIMD		0x00		/* old existing apps	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define APPTYPE_UIOC		0x01		/* new apps using uioc	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define IOCTL_ISSUE		0x00000001	/* Issue ioctl		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define IOCTL_ABORT		0x00000002	/* Abort previous ioctl	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define DRVRTYPE_MBOX		0x00000001	/* regular mbox driver	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define DRVRTYPE_HPE		0x00000002	/* new hpe driver	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define MKADAP(adapno)	(MEGAIOC_MAGIC << 8 | (adapno) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define GETADAP(mkadap)	((mkadap) ^ MEGAIOC_MAGIC << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define MAX_DMA_POOLS		5		/* 4k, 8k, 16k, 32k, 64k*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * struct uioc_t - the common ioctl packet structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  * @signature	: Must be "$$_EXTD_IOCTL_$$"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  * @mb_type	: Type of the mail box (MB_LEGACY or MB_HPE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  * @app_type	: Type of the issuing application (existing or new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)  * @opcode	: Opcode of the command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)  * @adapno	: Adapter number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  * @cmdbuf	: Pointer to buffer - can point to mbox or plain data buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  * @xferlen	: xferlen for DCMD and non mailbox commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  * @data_dir	: Direction of the data transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  * @status	: Status from the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  * @reserved	: reserved bytes for future expansion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)  * @user_data	: user data transfer address is saved in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)  * @user_data_len: length of the data buffer sent by user app
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)  * @user_pthru	: user passthru address is saves in this (null if DCMD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)  * @pthru32	: kernel address passthru (allocated per kioc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)  * @pthru32_h	: physicall address of @pthru32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)  * @list	: for kioc free pool list maintenance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)  * @done	: call back routine for llds to call when kioc is completed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)  * @buf_vaddr	: dma pool buffer attached to kioc for data transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  * @buf_paddr	: physical address of the dma pool buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  * @pool_index	: index of the dma pool that @buf_vaddr is taken from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  * @free_buf	: indicates if buffer needs to be freed after kioc completes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * Note		: All LSI drivers understand only this packet. Any other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  *		: format sent by applications would be converted to this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) typedef struct uioc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* User Apps: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	uint8_t			signature[EXT_IOCTL_SIGN_SZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	uint16_t		mb_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	uint16_t		app_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	uint32_t		opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	uint32_t		adapno;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	uint64_t		cmdbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	uint32_t		xferlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	uint32_t		data_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int32_t			status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	uint8_t			reserved[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Driver Data: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	void __user *		user_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	uint32_t		user_data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/* 64bit alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	uint32_t                pad_for_64bit_align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	mraid_passthru_t	__user *user_pthru;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	mraid_passthru_t	*pthru32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	dma_addr_t		pthru32_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	struct list_head	list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	void			(*done)(struct uioc*);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	caddr_t			buf_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	dma_addr_t		buf_paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	int8_t			pool_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	uint8_t			free_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	uint8_t			timedout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) } __attribute__ ((aligned(1024),packed)) uioc_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /* For on-stack uioc timers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct uioc_timeout {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	struct timer_list timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	uioc_t		  *uioc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)  * struct mraid_hba_info - information about the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  * @pci_vendor_id		: PCI vendor id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)  * @pci_device_id		: PCI device id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)  * @subsystem_vendor_id		: PCI subsystem vendor id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)  * @subsystem_device_id		: PCI subsystem device id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)  * @baseport			: base port of hba memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)  * @pci_bus			: PCI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)  * @pci_dev_fn			: PCI device/function values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)  * @irq				: interrupt vector for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)  * Extended information of 256 bytes about the controller. Align on the single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  * byte boundary so that 32-bit applications can be run on 64-bit platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  * drivers withoug re-compilation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  * NOTE: reduce the number of reserved bytes whenever new field are added, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)  * that total size of the structure remains 256 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) typedef struct mraid_hba_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	uint16_t	pci_vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	uint16_t	pci_device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	uint16_t	subsys_vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	uint16_t	subsys_device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	uint64_t	baseport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	uint8_t		pci_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	uint8_t		pci_dev_fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	uint8_t		pci_slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	uint8_t		irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	uint32_t	unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	uint32_t	host_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	uint8_t		num_ldrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) } __attribute__ ((aligned(256), packed)) mraid_hba_info_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)  * mcontroller	: adapter info structure for old mimd_t apps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)  * @base	: base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  * @irq		: irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  * @numldrv	: number of logical drives
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)  * @pcibus	: pci bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)  * @pcidev	: pci device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)  * @pcifun	: pci function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)  * @pciid	: pci id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)  * @pcivendor	: vendor id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)  * @pcislot	: slot number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)  * @uid		: unique id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) typedef struct mcontroller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	uint64_t	base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	uint8_t		irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	uint8_t		numldrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	uint8_t		pcibus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	uint16_t	pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	uint8_t		pcifun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	uint16_t	pciid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	uint16_t	pcivendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	uint8_t		pcislot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	uint32_t	uid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) } __attribute__ ((packed)) mcontroller_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)  * mm_dmapool_t	: Represents one dma pool with just one buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)  * @vaddr	: Virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)  * @paddr	: DMA physicall address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)  * @bufsize	: In KB - 4 = 4k, 8 = 8k etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)  * @handle	: Handle to the dma pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)  * @lock	: lock to synchronize access to the pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)  * @in_use	: If pool already in use, attach new block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) typedef struct mm_dmapool {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	caddr_t		vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	dma_addr_t	paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	uint32_t	buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	struct dma_pool	*handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	spinlock_t	lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	uint8_t		in_use;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) } mm_dmapool_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)  * mraid_mmadp_t: Structure that drivers pass during (un)registration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)  * @unique_id		: Any unique id (usually PCI bus+dev+fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)  * @drvr_type		: megaraid or hpe (DRVRTYPE_MBOX or DRVRTYPE_HPE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)  * @drv_data		: Driver specific; not touched by the common module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)  * @timeout		: timeout for issued kiocs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)  * @max_kioc		: Maximum ioctl packets acceptable by the lld
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)  * @pdev		: pci dev; used for allocating dma'ble memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)  * @issue_uioc		: Driver supplied routine to issue uioc_t commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)  *			: issue_uioc(drvr_data, kioc, ISSUE/ABORT, uioc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)  * @quiescent		: flag to indicate if ioctl can be issued to this adp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)  * @list		: attach with the global list of adapters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)  * @kioc_list		: block of mem for @max_kioc number of kiocs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)  * @kioc_pool		: pool of free kiocs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)  * @kioc_pool_lock	: protection for free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)  * @kioc_semaphore	: so as not to exceed @max_kioc parallel ioctls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)  * @mbox_list		: block of mem for @max_kioc number of mboxes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)  * @pthru_dma_pool	: DMA pool to allocate passthru packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)  * @dma_pool_list	: array of dma pools
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) typedef struct mraid_mmadp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* Filled by driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	uint32_t		unique_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	uint32_t		drvr_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	unsigned long		drvr_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	uint16_t		timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	uint8_t			max_kioc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	struct pci_dev		*pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	int(*issue_uioc)(unsigned long, uioc_t *, uint32_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* Maintained by common module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	uint32_t		quiescent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	struct list_head	list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	uioc_t			*kioc_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	struct list_head	kioc_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	spinlock_t		kioc_pool_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct semaphore	kioc_semaphore;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	mbox64_t		*mbox_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	struct dma_pool		*pthru_dma_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	mm_dmapool_t		dma_pool_list[MAX_DMA_POOLS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) } mraid_mmadp_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int mraid_mm_register_adp(mraid_mmadp_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int mraid_mm_unregister_adp(uint32_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) uint32_t mraid_mm_adapter_app_handle(uint32_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #endif /* _MEGARAID_IOCTL_H_ */