^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* mac_esp.c: ESP front-end for Macintosh Quadra systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Adapted from jazz_esp.c and the old mac_esp.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * The pseudo DMA algorithm is based on the one used in NetBSD.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * See sys/arch/mac68k/obio/esp.c for some background information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2007-2008 Finn Thain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/scatterlist.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/nubus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/macints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/macintosh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/mac_via.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "esp_scsi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DRV_MODULE_NAME "mac_esp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PFX DRV_MODULE_NAME ": "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define DRV_VERSION "1.000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define DRV_MODULE_RELDATE "Sept 15, 2007"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MAC_ESP_IO_BASE 0x50F00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MAC_ESP_REGS_QUADRA (MAC_ESP_IO_BASE + 0x10000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MAC_ESP_REGS_QUADRA2 (MAC_ESP_IO_BASE + 0xF000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define MAC_ESP_REGS_QUADRA3 (MAC_ESP_IO_BASE + 0x18000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define MAC_ESP_REGS_SPACING 0x402
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MAC_ESP_PDMA_REG 0xF9800024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define MAC_ESP_PDMA_REG_SPACING 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MAC_ESP_PDMA_IO_OFFSET 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define esp_read8(REG) mac_esp_read8(esp, REG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct mac_esp_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct esp *esp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) void __iomem *pdma_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) void __iomem *pdma_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static struct esp *esp_chips[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static DEFINE_SPINLOCK(esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MAC_ESP_GET_PRIV(esp) ((struct mac_esp_priv *) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) dev_get_drvdata((esp)->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static inline void mac_esp_write8(struct esp *esp, u8 val, unsigned long reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) nubus_writeb(val, esp->regs + reg * 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static inline u8 mac_esp_read8(struct esp *esp, unsigned long reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return nubus_readb(esp->regs + reg * 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void mac_esp_reset_dma(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* Nothing to do. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static void mac_esp_dma_drain(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Nothing to do. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void mac_esp_dma_invalidate(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* Nothing to do. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int mac_esp_dma_error(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return esp->send_cmd_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static inline int mac_esp_wait_for_empty_fifo(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int i = 500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (!(esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) udelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) } while (--i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) printk(KERN_ERR PFX "FIFO is not empty (sreg %02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) esp_read8(ESP_STATUS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) esp->send_cmd_error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static inline int mac_esp_wait_for_dreq(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int i = 500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (mep->pdma_regs == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (via2_scsi_drq_pending())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (nubus_readl(mep->pdma_regs) & 0x200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) udelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) } while (--i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) printk(KERN_ERR PFX "PDMA timeout (sreg %02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) esp_read8(ESP_STATUS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) esp->send_cmd_error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define MAC_ESP_PDMA_LOOP(operands) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) asm volatile ( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) " tstw %1 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) " jbeq 20f \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) "1: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) "2: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) "3: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) "4: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) "5: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) "6: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) "7: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) "8: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) "9: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) "10: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) "11: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) "12: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) "13: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) "14: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) "15: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) "16: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) " subqw #1,%1 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) " jbne 1b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) "20: tstw %2 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) " jbeq 30f \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) "21: movew " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) " subqw #1,%2 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) " jbne 21b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) "30: tstw %3 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) " jbeq 40f \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) "31: moveb " operands " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) "32: nop \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) "40: \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) " \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) " .section __ex_table,\"a\" \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) " .align 4 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) " .long 1b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) " .long 2b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) " .long 3b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) " .long 4b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) " .long 5b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) " .long 6b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) " .long 7b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) " .long 8b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) " .long 9b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) " .long 10b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) " .long 11b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) " .long 12b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) " .long 13b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) " .long 14b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) " .long 15b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) " .long 16b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) " .long 21b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) " .long 31b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) " .long 32b,40b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) " .previous \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) : "+a" (addr), "+r" (count32), "+r" (count2) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) : "g" (count1), "a" (mep->pdma_io))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static void mac_esp_send_pdma_cmd(struct esp *esp, u32 addr, u32 esp_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u32 dma_count, int write, u8 cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct mac_esp_priv *mep = MAC_ESP_GET_PRIV(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) esp->send_cmd_error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (!write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) esp_write8((esp_count >> 0) & 0xFF, ESP_TCLOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) esp_write8((esp_count >> 8) & 0xFF, ESP_TCMED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) scsi_esp_cmd(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) unsigned int count32 = esp_count >> 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) unsigned int count2 = (esp_count & 0x1F) >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) unsigned int count1 = esp_count & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) unsigned int start_addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (mac_esp_wait_for_dreq(esp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (write) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) MAC_ESP_PDMA_LOOP("%4@,%0@+");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) esp_count -= addr - start_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) unsigned int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) MAC_ESP_PDMA_LOOP("%0@+,%4@");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (mac_esp_wait_for_empty_fifo(esp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) n = (esp_read8(ESP_TCMED) << 8) + esp_read8(ESP_TCLOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) addr = start_addr + esp_count - n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) esp_count = n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) } while (esp_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static int mac_esp_irq_pending(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (esp_read8(ESP_STATUS) & ESP_STAT_INTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) static u32 mac_esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return dma_len > 0xFFFF ? 0xFFFF : dma_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) static irqreturn_t mac_scsi_esp_intr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) int got_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * This is an edge triggered IRQ, so we have to be careful to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * avoid missing a transition when it is shared by two ESP devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) got_intr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (esp_chips[0] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) (mac_esp_read8(esp_chips[0], ESP_STATUS) & ESP_STAT_INTR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) (void)scsi_esp_intr(irq, esp_chips[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) got_intr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (esp_chips[1] &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) (mac_esp_read8(esp_chips[1], ESP_STATUS) & ESP_STAT_INTR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) (void)scsi_esp_intr(irq, esp_chips[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) got_intr = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) } while (got_intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static struct esp_driver_ops mac_esp_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .esp_write8 = mac_esp_write8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .esp_read8 = mac_esp_read8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .irq_pending = mac_esp_irq_pending,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .dma_length_limit = mac_esp_dma_length_limit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .reset_dma = mac_esp_reset_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) .dma_drain = mac_esp_dma_drain,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) .dma_invalidate = mac_esp_dma_invalidate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) .send_dma_cmd = mac_esp_send_pdma_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .dma_error = mac_esp_dma_error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static int esp_mac_probe(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct scsi_host_template *tpnt = &scsi_esp_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct Scsi_Host *host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct esp *esp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct mac_esp_priv *mep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (!MACH_IS_MAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (dev->id > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) host = scsi_host_alloc(tpnt, sizeof(struct esp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (!host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) host->max_id = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) host->dma_boundary = PAGE_SIZE - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) esp = shost_priv(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) esp->host = host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) esp->dev = &dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) esp->command_block = kzalloc(16, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (!esp->command_block)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) goto fail_unlink;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) esp->command_block_dma = (dma_addr_t)esp->command_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) esp->scsi_id = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) host->this_id = esp->scsi_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) esp->scsi_id_mask = 1 << esp->scsi_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) mep = kzalloc(sizeof(struct mac_esp_priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (!mep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) goto fail_free_command_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) mep->esp = esp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) platform_set_drvdata(dev, mep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) switch (macintosh_config->scsi_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) case MAC_SCSI_QUADRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) esp->cfreq = 16500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) mep->pdma_regs = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) case MAC_SCSI_QUADRA2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) esp->cfreq = 25000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) esp->regs = (void __iomem *)(MAC_ESP_REGS_QUADRA2 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) dev->id * MAC_ESP_REGS_SPACING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) mep->pdma_io = esp->regs + MAC_ESP_PDMA_IO_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) mep->pdma_regs = (void __iomem *)(MAC_ESP_PDMA_REG +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) dev->id * MAC_ESP_PDMA_REG_SPACING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) nubus_writel(0x1d1, mep->pdma_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) case MAC_SCSI_QUADRA3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /* These quadras have a real DMA controller (the PSC) but we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * don't know how to drive it so we must use PIO instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) esp->cfreq = 25000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) esp->regs = (void __iomem *)MAC_ESP_REGS_QUADRA3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) mep->pdma_io = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) mep->pdma_regs = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) esp->fifo_reg = esp->regs + ESP_FDATA * 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) esp->ops = &mac_esp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) esp->flags = ESP_FLAG_NO_DMA_MAP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (mep->pdma_io == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) printk(KERN_INFO PFX "using PIO for controller %d\n", dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) esp_write8(0, ESP_TCLOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) esp_write8(0, ESP_TCMED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) esp->flags |= ESP_FLAG_DISABLE_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) mac_esp_ops.send_dma_cmd = esp_send_pio_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) printk(KERN_INFO PFX "using PDMA for controller %d\n", dev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) host->irq = IRQ_MAC_SCSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* The request_irq() call is intended to succeed for the first device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * and fail for the second device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) err = request_irq(host->irq, mac_scsi_esp_intr, 0, "ESP", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) spin_lock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (err < 0 && esp_chips[!dev->id] == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) spin_unlock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) goto fail_free_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) esp_chips[dev->id] = esp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) spin_unlock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) err = scsi_esp_register(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) goto fail_free_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) fail_free_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) spin_lock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) esp_chips[dev->id] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (esp_chips[!dev->id] == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) spin_unlock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) free_irq(host->irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) spin_unlock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) fail_free_priv:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) kfree(mep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) fail_free_command_block:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) kfree(esp->command_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) fail_unlink:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) scsi_host_put(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static int esp_mac_remove(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct mac_esp_priv *mep = platform_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct esp *esp = mep->esp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) unsigned int irq = esp->host->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) scsi_esp_unregister(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) spin_lock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) esp_chips[dev->id] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (esp_chips[!dev->id] == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) spin_unlock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) free_irq(irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) spin_unlock(&esp_chips_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) kfree(mep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) kfree(esp->command_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) scsi_host_put(esp->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) static struct platform_driver esp_mac_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .probe = esp_mac_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .remove = esp_mac_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .name = DRV_MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) module_platform_driver(esp_mac_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) MODULE_DESCRIPTION("Mac ESP SCSI driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) MODULE_AUTHOR("Finn Thain");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) MODULE_VERSION(DRV_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) MODULE_ALIAS("platform:" DRV_MODULE_NAME);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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