^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*******************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is part of the Emulex Linux Device Driver for *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Fibre Channel Host Bus Adapters. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2004-2016 Emulex. All rights reserved. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * EMULEX and SLI are trademarks of Emulex. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * www.broadcom.com *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Portions Copyright (C) 2004-2005 Christoph Hellwig *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This program is free software; you can redistribute it and/or *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * modify it under the terms of version 2 of the GNU General *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Public License as published by the Free Software Foundation. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * This program is distributed in the hope that it will be useful. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * TO BE LEGALLY INVALID. See the GNU General Public License for *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * more details, a copy of which can be found in the file COPYING *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * included with this package. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *******************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/idr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/kthread.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/aer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/miscdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/crash_dump.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/cpuhotplug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <scsi/scsi_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <scsi/scsi_transport_fc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <scsi/scsi_tcq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <scsi/fc/fc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include "lpfc_hw4.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include "lpfc_hw.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include "lpfc_sli.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include "lpfc_sli4.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include "lpfc_nl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include "lpfc_disc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include "lpfc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include "lpfc_scsi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include "lpfc_nvme.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include "lpfc_logmsg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include "lpfc_crtn.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include "lpfc_vport.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include "lpfc_version.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include "lpfc_ids.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static enum cpuhp_state lpfc_cpuhp_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Used when mapping IRQ vectors in a driver centric manner */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static uint32_t lpfc_present_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static void lpfc_cpuhp_add(struct lpfc_hba *phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int lpfc_post_rcv_buf(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int lpfc_sli4_queue_verify(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int lpfc_setup_endian_order(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static void lpfc_free_els_sgl_list(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static void lpfc_init_sgl_list(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int lpfc_init_active_sgl_array(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static void lpfc_free_active_sgl(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static void lpfc_sli4_disable_intr(struct lpfc_hba *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static struct scsi_transport_template *lpfc_transport_template = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static DEFINE_IDR(lpfc_hba_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define LPFC_NVMET_BUF_POST 254
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * lpfc_config_port_prep - Perform lpfc initialization prior to config port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * mailbox command. It retrieves the revision information from the HBA and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * collects the Vital Product Data (VPD) about the HBA for preparing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * configuration of the HBA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Return codes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * 0 - success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * -ERESTART - requests the SLI layer to reset the HBA and try again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * Any other value - indicates an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) lpfc_config_port_prep(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) lpfc_vpd_t *vp = &phba->vpd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int i = 0, rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MAILBOX_t *mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) char *lpfc_vpd_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) uint16_t offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static char licensed[56] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) "key unlock for use with gnu public licensed code only\0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int init_key = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) mb = &pmb->u.mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) phba->link_state = LPFC_INIT_MBX_CMDS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (lpfc_is_LC_HBA(phba->pcidev->device)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (init_key) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) uint32_t *ptext = (uint32_t *) licensed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) *ptext = cpu_to_be32(*ptext);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) init_key = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) lpfc_read_nv(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) memset((char*)mb->un.varRDnvp.rsvd3, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) sizeof (mb->un.varRDnvp.rsvd3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) sizeof (licensed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) "0324 Config Port initialization "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) "error, mbxCmd x%x READ_NVPARM, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) "mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) mb->mbxCommand, mb->mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return -ERESTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) sizeof(phba->wwnn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) sizeof(phba->wwpn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * Clear all option bits except LPFC_SLI3_BG_ENABLED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * which was already set in lpfc_get_cfgparam()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* Setup and issue mailbox READ REV command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) lpfc_read_rev(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) "0439 Adapter failed to init, mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) "READ_REV, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) mb->mbxCommand, mb->mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) mempool_free( pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return -ERESTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * The value of rr must be 1 since the driver set the cv field to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * This setting requires the FW to set all revision fields.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (mb->un.varRdRev.rr == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) vp->rev.rBit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) "0440 Adapter failed to init, READ_REV has "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) "missing revision information.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return -ERESTART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Save information as VPD data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) vp->rev.rBit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) vp->rev.biuRev = mb->un.varRdRev.biuRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) vp->rev.smRev = mb->un.varRdRev.smRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) vp->rev.endecRev = mb->un.varRdRev.endecRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* If the sli feature level is less then 9, we must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * tear down all RPIs and VPIs on link down if NPIV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (vp->rev.feaLevelHigh < 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (lpfc_is_LC_HBA(phba->pcidev->device))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) sizeof (phba->RandomData));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Get adapter VPD information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (!lpfc_vpd_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) goto out_free_mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) "0441 VPD not present on adapter, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) mb->mbxCommand, mb->mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) mb->un.varDmp.word_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* dump mem may return a zero when finished or we got a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * mailbox error, either way we are done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (mb->un.varDmp.word_cnt == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) i = mb->un.varDmp.word_cnt * sizeof(uint32_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (offset + i > DMP_VPD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) i = DMP_VPD_SIZE - offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) lpfc_vpd_data + offset, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) offset += i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) } while (offset < DMP_VPD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) kfree(lpfc_vpd_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) out_free_mbox:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * @pmboxq: pointer to the driver internal queue element for mailbox command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * This is the completion handler for driver's configuring asynchronous event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * mailbox command to the device. If the mailbox command returns successfully,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * it will set internal async event support flag to 1; otherwise, it will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * set internal async event support flag to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) phba->temp_sensor_support = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) phba->temp_sensor_support = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) mempool_free(pmboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * @pmboxq: pointer to the driver internal queue element for mailbox command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * This is the completion handler for dump mailbox command for getting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * wake up parameters. When this command complete, the response contain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * Option rom version of the HBA. This function translate the version number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * into a human readable string and store it in OptionROMVersion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct prog_id *prg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) uint32_t prog_id_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) char dist = ' ';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* character array used for decoding dist type. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) char dist_char[] = "nabx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) mempool_free(pmboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) prg = (struct prog_id *) &prog_id_word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* word 7 contain option rom version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) prog_id_word = pmboxq->u.mb.un.varWords[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* Decode the Option rom version word to a readable string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (prg->dist < 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) dist = dist_char[prg->dist];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if ((prg->dist == 3) && (prg->num == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) prg->ver, prg->rev, prg->lev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) prg->ver, prg->rev, prg->lev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) dist, prg->num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) mempool_free(pmboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * cfg_soft_wwnn, cfg_soft_wwpn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * @vport: pointer to lpfc vport data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * None.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) lpfc_update_vport_wwn(struct lpfc_vport *vport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) uint8_t vvvl = vport->fc_sparam.cmn.valid_vendor_ver_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) u32 *fawwpn_key = (u32 *)&vport->fc_sparam.un.vendorVersion[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* If the soft name exists then update it using the service params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (vport->phba->cfg_soft_wwnn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) u64_to_wwn(vport->phba->cfg_soft_wwnn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) vport->fc_sparam.nodeName.u.wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (vport->phba->cfg_soft_wwpn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u64_to_wwn(vport->phba->cfg_soft_wwpn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) vport->fc_sparam.portName.u.wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * If the name is empty or there exists a soft name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * then copy the service params name, otherwise use the fc name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (vport->fc_nodename.u.wwn[0] == 0 || vport->phba->cfg_soft_wwnn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) sizeof(struct lpfc_name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) sizeof(struct lpfc_name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * If the port name has changed, then set the Param changes flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * to unreg the login
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (vport->fc_portname.u.wwn[0] != 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) sizeof(struct lpfc_name)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) vport->vport_flag |= FAWWPN_PARAM_CHG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (vport->fc_portname.u.wwn[0] == 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) vport->phba->cfg_soft_wwpn ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) vport->vport_flag & FAWWPN_SET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) sizeof(struct lpfc_name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) vport->vport_flag &= ~FAWWPN_SET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (vvvl == 1 && cpu_to_be32(*fawwpn_key) == FAPWWN_KEY_VENDOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) vport->vport_flag |= FAWWPN_SET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) sizeof(struct lpfc_name));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * lpfc_config_port_post - Perform lpfc initialization after config port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * This routine will do LPFC initialization after the CONFIG_PORT mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * command call. It performs all internal resource and state setups on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * port: post IOCB buffers, enable appropriate host interrupt attentions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * ELS ring timers, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * 0 - success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * Any other value - error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) lpfc_config_port_post(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) MAILBOX_t *mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) struct lpfc_dmabuf *mp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) uint32_t status, timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * If the Config port completed correctly the HBA is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * over heated any more.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (phba->over_temp_state == HBA_OVER_TEMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) phba->over_temp_state = HBA_NORMAL_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) mb = &pmb->u.mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* Get login parameters for NID. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) rc = lpfc_read_sparam(phba, pmb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) pmb->vport = vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) "0448 Adapter failed init, mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) "READ_SPARM mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) mb->mbxCommand, mb->mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) mp = (struct lpfc_dmabuf *)pmb->ctx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) lpfc_mbuf_free(phba, mp->virt, mp->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) kfree(mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) mp = (struct lpfc_dmabuf *)pmb->ctx_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) lpfc_mbuf_free(phba, mp->virt, mp->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) kfree(mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) pmb->ctx_buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) lpfc_update_vport_wwn(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /* Update the fc_host data structures with new wwn. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) fc_host_max_npiv_vports(shost) = phba->max_vpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /* If no serial number in VPD data, use low 6 bytes of WWNN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /* This should be consolidated into parse_vpd ? - mr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (phba->SerialNumber[0] == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) uint8_t *outptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) outptr = &vport->fc_nodename.u.s.IEEE[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) for (i = 0; i < 12; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) status = *outptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) j = ((status & 0xf0) >> 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (j <= 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) phba->SerialNumber[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) (char)((uint8_t) 0x30 + (uint8_t) j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) phba->SerialNumber[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) i++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) j = (status & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (j <= 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) phba->SerialNumber[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) (char)((uint8_t) 0x30 + (uint8_t) j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) phba->SerialNumber[i] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) lpfc_read_config(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) pmb->vport = vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) "0453 Adapter failed to init, mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) "READ_CONFIG, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) mb->mbxCommand, mb->mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) mempool_free( pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* Check if the port is disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) lpfc_sli_read_link_ste(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* Reset the DFT_HBA_Q_DEPTH to the max xri */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) "3359 HBA queue depth changed from %d to %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) phba->cfg_hba_queue_depth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) mb->un.varRdConfig.max_xri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) phba->lmt = mb->un.varRdConfig.lmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /* Get the default values for Model Name and Description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) phba->link_state = LPFC_LINK_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) /* Only process IOCBs on ELS ring till hba_state is READY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* Post receive buffers for desired rings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (phba->sli_rev != 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) lpfc_post_rcv_buf(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * Configure HBA MSI-X attention conditions to messages if MSI-X mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (phba->intr_type == MSIX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) rc = lpfc_config_msi(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) "0352 Config MSI mailbox command "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) "failed, mbxCmd x%x, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) pmb->u.mb.mbxCommand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) pmb->u.mb.mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /* Initialize ERATT handling flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) phba->hba_flag &= ~HBA_ERATT_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* Enable appropriate host interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (lpfc_readl(phba->HCregaddr, &status)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (psli->num_rings > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) status |= HC_R0INT_ENA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (psli->num_rings > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) status |= HC_R1INT_ENA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (psli->num_rings > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) status |= HC_R2INT_ENA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (psli->num_rings > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) status |= HC_R3INT_ENA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) (phba->cfg_poll & DISABLE_FCP_RING_INT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) status &= ~(HC_R0INT_ENA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) writel(status, phba->HCregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) readl(phba->HCregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) /* Set up ring-0 (ELS) timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) timeout = phba->fc_ratov * 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) mod_timer(&vport->els_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) jiffies + msecs_to_jiffies(1000 * timeout));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) /* Set up heart beat (HB) timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) phba->hb_outstanding = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) phba->last_completion_time = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /* Set up error attention (ERATT) polling timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) mod_timer(&phba->eratt_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (phba->hba_flag & LINK_DISABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) "2598 Adapter Link is disabled.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) lpfc_down_link(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) "2599 Adapter failed to issue DOWN_LINK"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) " mbox command rc 0x%x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* MBOX buffer will be freed in mbox compl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) lpfc_config_async(phba, pmb, LPFC_ELS_RING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) pmb->mbox_cmpl = lpfc_config_async_cmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) pmb->vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) "0456 Adapter failed to issue "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) "ASYNCEVT_ENABLE mbox status x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) /* Get Option rom version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) lpfc_dump_wakeup_param(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) pmb->vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) "0435 Adapter failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) "to get Option ROM version status x%x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) * lpfc_hba_init_link - Initialize the FC link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) * This routine will issue the INIT_LINK mailbox command call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * It is available to other drivers through the lpfc_hba data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) * structure for use as a delayed link up mechanism with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * module parameter lpfc_suppress_link_up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * 0 - success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) * Any other value - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) * @fc_topology: desired fc topology.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * This routine will issue the INIT_LINK mailbox command call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) * It is available to other drivers through the lpfc_hba data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) * structure for use as a delayed link up mechanism with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) * module parameter lpfc_suppress_link_up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) * 0 - success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * Any other value - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) uint32_t flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) MAILBOX_t *mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) mb = &pmb->u.mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) pmb->vport = vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) !(phba->lmt & LMT_1Gb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) !(phba->lmt & LMT_2Gb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) !(phba->lmt & LMT_4Gb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) !(phba->lmt & LMT_8Gb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) !(phba->lmt & LMT_10Gb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) !(phba->lmt & LMT_16Gb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) !(phba->lmt & LMT_32Gb)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) !(phba->lmt & LMT_64Gb))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /* Reset link speed to auto */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) "1302 Invalid speed for this board:%d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) "Reset link speed to auto.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) phba->cfg_link_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (phba->sli_rev < LPFC_SLI_REV4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) lpfc_set_loopback_flag(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) rc = lpfc_sli_issue_mbox(phba, pmb, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) "0498 Adapter failed to init, mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) "INIT_LINK, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) mb->mbxCommand, mb->mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (phba->sli_rev <= LPFC_SLI_REV3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) /* Clear all interrupt enable conditions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) writel(0, phba->HCregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) readl(phba->HCregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) /* Clear all pending interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) writel(0xffffffff, phba->HAregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) readl(phba->HAregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (rc != MBX_BUSY || flag == MBX_POLL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (flag == MBX_POLL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) * lpfc_hba_down_link - this routine downs the FC link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) * This routine will issue the DOWN_LINK mailbox command call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) * It is available to other drivers through the lpfc_hba data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) * structure for use to stop the link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * 0 - success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * Any other value - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) "0491 Adapter Link is disabled.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) lpfc_down_link(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) rc = lpfc_sli_issue_mbox(phba, pmb, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) "2522 Adapter failed to issue DOWN_LINK"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) " mbox command rc 0x%x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) if (flag == MBX_POLL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) * This routine will do LPFC uninitialization before the HBA is reset when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) * bringing down the SLI Layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) * 0 - success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) * Any other value - error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) lpfc_hba_down_prep(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) if (phba->sli_rev <= LPFC_SLI_REV3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) /* Disable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) writel(0, phba->HCregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) readl(phba->HCregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (phba->pport->load_flag & FC_UNLOADING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) lpfc_cleanup_discovery_resources(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) if (vports != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) for (i = 0; i <= phba->max_vports &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) vports[i] != NULL; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) lpfc_cleanup_discovery_resources(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) * rspiocb which got deferred
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) * This routine will cleanup completed slow path events after HBA is reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) * when bringing down the SLI Layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) * void.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) struct lpfc_iocbq *rspiocbq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) struct hbq_dmabuf *dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) struct lpfc_cq_event *cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) phba->hba_flag &= ~HBA_SP_QUEUE_EVT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) /* Get the response iocb from the head of work queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) list_remove_head(&phba->sli4_hba.sp_queue_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) cq_event, struct lpfc_cq_event, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) case CQE_CODE_COMPL_WQE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) rspiocbq = container_of(cq_event, struct lpfc_iocbq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) cq_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) lpfc_sli_release_iocbq(phba, rspiocbq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) case CQE_CODE_RECEIVE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) case CQE_CODE_RECEIVE_V1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) dmabuf = container_of(cq_event, struct hbq_dmabuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) cq_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) lpfc_in_buf_free(phba, &dmabuf->dbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) * This routine will cleanup posted ELS buffers after the HBA is reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) * when bringing down the SLI Layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) * void.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) lpfc_hba_free_post_buf(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct lpfc_sli_ring *pring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) struct lpfc_dmabuf *mp, *next_mp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) LIST_HEAD(buflist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) lpfc_sli_hbqbuf_free_all(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) /* Cleanup preposted buffers on the ELS ring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) pring = &psli->sli3_ring[LPFC_ELS_RING];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) list_splice_init(&pring->postbufq, &buflist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) list_for_each_entry_safe(mp, next_mp, &buflist, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) list_del(&mp->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) lpfc_mbuf_free(phba, mp->virt, mp->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) kfree(mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) pring->postbufq_cnt -= count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) * This routine will cleanup the txcmplq after the HBA is reset when bringing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) * down the SLI Layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) * void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) struct lpfc_queue *qp = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) struct lpfc_sli_ring *pring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) LIST_HEAD(completions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) struct lpfc_iocbq *piocb, *next_iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (phba->sli_rev != LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) for (i = 0; i < psli->num_rings; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) pring = &psli->sli3_ring[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) /* At this point in time the HBA is either reset or DOA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) * Nothing should be on txcmplq as it will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) * NEVER complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) list_splice_init(&pring->txcmplq, &completions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) pring->txcmplq_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) lpfc_sli_abort_iocb_ring(phba, pring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) /* Cancel all the IOCBs from the completions list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) lpfc_sli_cancel_iocbs(phba, &completions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) pring = qp->pring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) if (!pring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) spin_lock_irq(&pring->ring_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) list_for_each_entry_safe(piocb, next_iocb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) &pring->txcmplq, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) list_splice_init(&pring->txcmplq, &completions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) pring->txcmplq_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) spin_unlock_irq(&pring->ring_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) lpfc_sli_abort_iocb_ring(phba, pring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) /* Cancel all the IOCBs from the completions list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) lpfc_sli_cancel_iocbs(phba, &completions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) * This routine will do uninitialization after the HBA is reset when bring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) * down the SLI Layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) * 0 - success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) * Any other value - error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) lpfc_hba_down_post_s3(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) lpfc_hba_free_post_buf(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) lpfc_hba_clean_txcmplq(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * This routine will do uninitialization after the HBA is reset when bring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * down the SLI Layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) * 0 - success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * Any other value - error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) lpfc_hba_down_post_s4(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) struct lpfc_io_buf *psb, *psb_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) struct lpfc_async_xchg_ctx *ctxp, *ctxp_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) LIST_HEAD(aborts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) LIST_HEAD(nvme_aborts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) LIST_HEAD(nvmet_aborts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) struct lpfc_sglq *sglq_entry = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) int cnt, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) lpfc_sli_hbqbuf_free_all(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) lpfc_hba_clean_txcmplq(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) /* At this point in time the HBA is either reset or DOA. Either
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) * on the lpfc_els_sgl_list so that it can either be freed if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) * driver is unloading or reposted if the driver is restarting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * the port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) spin_lock_irq(&phba->hbalock); /* required for lpfc_els_sgl_list and */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) /* scsl_buf_list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) /* sgl_list_lock required because worker thread uses this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) * list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) spin_lock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) list_for_each_entry(sglq_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) sglq_entry->state = SGL_FREED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) &phba->sli4_hba.lpfc_els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) spin_unlock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) /* abts_xxxx_buf_list_lock required because worker thread uses this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) * list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) qp = &phba->sli4_hba.hdwq[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) spin_lock(&qp->abts_io_buf_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) list_splice_init(&qp->lpfc_abts_io_buf_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) &aborts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) list_for_each_entry_safe(psb, psb_next, &aborts, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) psb->pCmd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) psb->status = IOSTAT_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) spin_lock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) qp->put_io_bufs += qp->abts_scsi_io_bufs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) qp->put_io_bufs += qp->abts_nvme_io_bufs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) qp->abts_scsi_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) qp->abts_nvme_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) spin_unlock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) spin_unlock(&qp->abts_io_buf_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) &nvmet_aborts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) lpfc_sli4_free_sp_events(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) * lpfc_hba_down_post - Wrapper func for hba down post routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) * This routine wraps the actual SLI3 or SLI4 routine for performing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) * uninitialization after the HBA is reset when bring down the SLI Layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) * 0 - success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) * Any other value - error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) lpfc_hba_down_post(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) return (*phba->lpfc_hba_down_post)(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) * lpfc_hb_timeout - The HBA-timer timeout handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) * @t: timer context used to obtain the pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) * This is the HBA-timer timeout handler registered to the lpfc driver. When
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) * this timer fires, a HBA timeout event shall be posted to the lpfc driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) * work-port-events bitmap and the worker thread is notified. This timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) * event will be used by the worker thread to invoke the actual timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) * be performed in the timeout handler and the HBA timeout event bit shall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) * be cleared by the worker thread after it has taken the event bitmap out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) lpfc_hb_timeout(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) struct lpfc_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) uint32_t tmo_posted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) phba = from_timer(phba, t, hb_tmofunc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) /* Check for heart beat timeout conditions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (!tmo_posted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) phba->pport->work_port_events |= WORKER_HB_TMO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) /* Tell the worker thread there is work to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) if (!tmo_posted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) lpfc_worker_wake_up(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) * lpfc_rrq_timeout - The RRQ-timer timeout handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) * @t: timer context used to obtain the pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) * This is the RRQ-timer timeout handler registered to the lpfc driver. When
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) * work-port-events bitmap and the worker thread is notified. This timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) * event will be used by the worker thread to invoke the actual timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) * handler routine, lpfc_rrq_handler. Any periodical operations will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) * be performed in the timeout handler and the RRQ timeout event bit shall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) * be cleared by the worker thread after it has taken the event bitmap out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) lpfc_rrq_timeout(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) struct lpfc_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) phba = from_timer(phba, t, rrq_tmr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) if (!(phba->pport->load_flag & FC_UNLOADING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) phba->hba_flag |= HBA_RRQ_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) phba->hba_flag &= ~HBA_RRQ_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) if (!(phba->pport->load_flag & FC_UNLOADING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) lpfc_worker_wake_up(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) * @pmboxq: pointer to the driver internal queue element for mailbox command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) * This is the callback function to the lpfc heart-beat mailbox command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) * If configured, the lpfc driver issues the heart-beat mailbox command to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) * heart-beat mailbox command is issued, the driver shall set up heart-beat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) * heart-beat outstanding state. Once the mailbox command comes back and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) * no error conditions detected, the heart-beat mailbox command timer is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) * state is cleared for the next heart-beat. If the timer expired with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) * heart-beat outstanding state set, the driver will put the HBA offline.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) unsigned long drvr_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) spin_lock_irqsave(&phba->hbalock, drvr_flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) phba->hb_outstanding = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) /* Check and reset heart-beat timer is necessary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) mempool_free(pmboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) !(phba->link_state == LPFC_HBA_ERROR) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) !(phba->pport->load_flag & FC_UNLOADING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) * lpfc_idle_stat_delay_work - idle_stat tracking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) * This routine tracks per-cq idle_stat and determines polling decisions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) * Return codes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) * None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) lpfc_idle_stat_delay_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) struct lpfc_hba *phba = container_of(to_delayed_work(work),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) struct lpfc_hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) idle_stat_delay_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) struct lpfc_queue *cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) struct lpfc_sli4_hdw_queue *hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) struct lpfc_idle_stat *idle_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) u32 i, idle_percent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) u64 wall, wall_idle, diff_wall, diff_idle, busy_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) if (phba->pport->load_flag & FC_UNLOADING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) if (phba->link_state == LPFC_HBA_ERROR ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) phba->pport->fc_flag & FC_OFFLINE_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) goto requeue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) for_each_present_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) cq = hdwq->io_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) /* Skip if we've already handled this cq's primary CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) if (cq->chann != i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) idle_stat = &phba->sli4_hba.idle_stat[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) /* get_cpu_idle_time returns values as running counters. Thus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) * to know the amount for this period, the prior counter values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) * need to be subtracted from the current counter values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) * From there, the idle time stat can be calculated as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) * percentage of 100 - the sum of the other consumption times.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) wall_idle = get_cpu_idle_time(i, &wall, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) diff_idle = wall_idle - idle_stat->prev_idle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) diff_wall = wall - idle_stat->prev_wall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) if (diff_wall <= diff_idle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) busy_time = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) busy_time = diff_wall - diff_idle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) idle_percent = div64_u64(100 * busy_time, diff_wall);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) idle_percent = 100 - idle_percent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) if (idle_percent < 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) cq->poll_mode = LPFC_QUEUE_WORK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) cq->poll_mode = LPFC_IRQ_POLL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) idle_stat->prev_idle = wall_idle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) idle_stat->prev_wall = wall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) requeue:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) schedule_delayed_work(&phba->idle_stat_delay_work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) lpfc_hb_eq_delay_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) struct lpfc_hba *phba = container_of(to_delayed_work(work),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) struct lpfc_hba, eq_delay_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) struct lpfc_eq_intr_info *eqi, *eqi_new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) struct lpfc_queue *eq, *eq_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) unsigned char *ena_delay = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) uint32_t usdelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) if (phba->link_state == LPFC_HBA_ERROR ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) phba->pport->fc_flag & FC_OFFLINE_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) goto requeue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) if (!ena_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) goto requeue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) for (i = 0; i < phba->cfg_irq_chann; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) /* Get the EQ corresponding to the IRQ vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) eq = phba->sli4_hba.hba_eq_hdl[i].eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) if (!eq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) eq->q_flag &= ~HBA_EQ_DELAY_CHK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) ena_delay[eq->last_cpu] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) for_each_present_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) if (ena_delay[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) usdelay = LPFC_MAX_AUTO_EQ_DELAY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) usdelay = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) eqi->icnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) if (unlikely(eq->last_cpu != i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) eq->last_cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) list_move_tail(&eq->cpu_list, &eqi_new->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) if (usdelay != eq->q_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) usdelay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) kfree(ena_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) requeue:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) queue_delayed_work(phba->wq, &phba->eq_delay_work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) * For each heartbeat, this routine does some heuristic methods to adjust
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) * XRI distribution. The goal is to fully utilize free XRIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) u32 hwq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) hwq_count = phba->cfg_hdw_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) for (i = 0; i < hwq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) /* Adjust XRIs in private pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) lpfc_adjust_pvt_pool_count(phba, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) /* Adjust high watermark */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) lpfc_adjust_high_watermark(phba, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) #ifdef LPFC_MXP_STAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) /* Snapshot pbl, pvt and busy count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) lpfc_snapshot_mxp(phba, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) * lpfc_hb_timeout_handler - The HBA-timer timeout handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) * This is the actual HBA-timer timeout handler to be invoked by the worker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) * thread whenever the HBA timer fired and HBA-timeout event posted. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) * handler performs any periodic operations needed for the device. If such
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) * periodic event has already been attended to either in the interrupt handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) * or by processing slow-ring or fast-ring events within the HBA-timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) * the timer for the next timeout period. If lpfc heart-beat mailbox command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) * is configured and there is no heart-beat mailbox command outstanding, a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) * heart-beat mailbox is issued and timer set properly. Otherwise, if there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) * has been a heart-beat mailbox command outstanding, the HBA shall be put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) * to offline.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) lpfc_hb_timeout_handler(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) LPFC_MBOXQ_t *pmboxq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) struct lpfc_dmabuf *buf_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) int retval, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) LIST_HEAD(completions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) if (phba->cfg_xri_rebalancing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) /* Multi-XRI pools handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) lpfc_hb_mxp_handler(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) if (vports != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) lpfc_rcv_seq_check_edtov(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) lpfc_fdmi_change_check(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) if ((phba->link_state == LPFC_HBA_ERROR) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) (phba->pport->load_flag & FC_UNLOADING) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) (phba->pport->fc_flag & FC_OFFLINE_MODE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) spin_lock_irq(&phba->pport->work_port_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) if (time_after(phba->last_completion_time +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) jiffies)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) spin_unlock_irq(&phba->pport->work_port_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (!phba->hb_outstanding)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) spin_unlock_irq(&phba->pport->work_port_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) if (phba->elsbuf_cnt &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) list_splice_init(&phba->elsbuf, &completions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) phba->elsbuf_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) phba->elsbuf_prev_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) while (!list_empty(&completions)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) list_remove_head(&completions, buf_ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) struct lpfc_dmabuf, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) kfree(buf_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) /* If there is no heart beat outstanding, issue a heartbeat command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) if (phba->cfg_enable_hba_heartbeat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) if (!phba->hb_outstanding) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) (list_empty(&psli->mboxq))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) pmboxq = mempool_alloc(phba->mbox_mem_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) if (!pmboxq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) msecs_to_jiffies(1000 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) LPFC_HB_MBOX_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) lpfc_heart_beat(phba, pmboxq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) pmboxq->vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) retval = lpfc_sli_issue_mbox(phba, pmboxq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) if (retval != MBX_BUSY &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) retval != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) mempool_free(pmboxq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) msecs_to_jiffies(1000 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) LPFC_HB_MBOX_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) phba->skipped_hb = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) phba->hb_outstanding = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) } else if (time_before_eq(phba->last_completion_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) phba->skipped_hb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) "2857 Last completion time not "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) " updated in %d ms\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) jiffies_to_msecs(jiffies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) - phba->last_completion_time));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) phba->skipped_hb = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) * If heart beat timeout called with hb_outstanding set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) * we need to give the hb mailbox cmd a chance to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) * complete or TMO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) "0459 Adapter heartbeat still out"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) "standing:last compl time was %d ms.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) jiffies_to_msecs(jiffies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) - phba->last_completion_time));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) msecs_to_jiffies(1000 * LPFC_HB_MBOX_TIMEOUT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) mod_timer(&phba->hb_tmofunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) jiffies +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) * This routine is called to bring the HBA offline when HBA hardware error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) * other than Port Error 6 has been detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) lpfc_offline_eratt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) psli->sli_flag &= ~LPFC_SLI_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) lpfc_reset_barrier(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) lpfc_sli_brdreset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) lpfc_hba_down_post(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) lpfc_sli_brdready(phba, HS_MBRDY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) * This routine is called to bring a SLI4 HBA offline when HBA hardware error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) * other than Port Error 6 has been detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) lpfc_sli_flush_io_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) lpfc_hba_down_post(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) * This routine is invoked to handle the deferred HBA hardware error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) * conditions. This type of error is indicated by HBA by setting ER1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) * and another ER bit in the host status register. The driver will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) * wait until the ER1 bit clears before handling the error condition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) uint32_t old_host_status = phba->work_hs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) /* If the pci channel is offline, ignore possible errors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) * since we cannot communicate with the pci card anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) if (pci_channel_offline(phba->pcidev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) phba->hba_flag &= ~DEFER_ERATT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) "0479 Deferred Adapter Hardware Error "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) "Data: x%x x%x x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) phba->work_hs, phba->work_status[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) phba->work_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) psli->sli_flag &= ~LPFC_SLI_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) * Firmware stops when it triggred erratt. That could cause the I/Os
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) * SCSI layer retry it after re-establishing link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) lpfc_sli_abort_fcp_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) * There was a firmware error. Take the hba offline and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) * attempt to restart it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) lpfc_offline_prep(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) /* Wait for the ER1 bit to clear.*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) while (phba->work_hs & HS_FFER1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) msleep(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) phba->work_hs = UNPLUG_ERR ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) /* If driver is unloading let the worker thread continue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) if (phba->pport->load_flag & FC_UNLOADING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) phba->work_hs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) * This is to ptrotect against a race condition in which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) * first write to the host attention register clear the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) * host status register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) phba->work_hs = old_host_status & ~HS_FFER1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) phba->hba_flag &= ~DEFER_ERATT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) struct lpfc_board_event_header board_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) board_event.event_type = FC_REG_BOARD_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) board_event.subcategory = LPFC_EVENT_PORTINTERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) shost = lpfc_shost_from_vport(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) sizeof(board_event),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) (char *) &board_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) LPFC_NL_VENDOR_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) * This routine is invoked to handle the following HBA hardware error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) * conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) * 1 - HBA error attention interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) * 2 - DMA ring index out of range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) * 3 - Mailbox command came back as unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) lpfc_handle_eratt_s3(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) uint32_t event_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) unsigned long temperature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) struct temp_event temp_event_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) /* If the pci channel is offline, ignore possible errors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) * since we cannot communicate with the pci card anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) if (pci_channel_offline(phba->pcidev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) phba->hba_flag &= ~DEFER_ERATT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) /* If resets are disabled then leave the HBA alone and return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) if (!phba->cfg_enable_hba_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) /* Send an internal error event to mgmt application */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) lpfc_board_errevt_to_mgmt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) if (phba->hba_flag & DEFER_ERATT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) lpfc_handle_deferred_eratt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) if (phba->work_hs & HS_FFER6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) /* Re-establishing Link */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) "1301 Re-establishing Link "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) "Data: x%x x%x x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) phba->work_hs, phba->work_status[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) phba->work_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) if (phba->work_hs & HS_FFER8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) /* Device Zeroization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) "2861 Host Authentication device "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) "zeroization Data:x%x x%x x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) phba->work_hs, phba->work_status[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) phba->work_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) psli->sli_flag &= ~LPFC_SLI_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) * Firmware stops when it triggled erratt with HS_FFER6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) * That could cause the I/Os dropped by the firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) * Error iocb (I/O) on txcmplq and let the SCSI layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) * retry it after re-establishing link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) lpfc_sli_abort_fcp_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) * There was a firmware error. Take the hba offline and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) * attempt to restart it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) if (lpfc_online(phba) == 0) { /* Initialize the HBA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) } else if (phba->work_hs & HS_CRIT_TEMP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) temp_event_data.event_code = LPFC_CRIT_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) temp_event_data.data = (uint32_t)temperature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) "0406 Adapter maximum temperature exceeded "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) "(%ld), taking this port offline "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) "Data: x%x x%x x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) temperature, phba->work_hs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) phba->work_status[0], phba->work_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) shost = lpfc_shost_from_vport(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) sizeof(temp_event_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) (char *) &temp_event_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) SCSI_NL_VID_TYPE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) | PCI_VENDOR_ID_EMULEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) phba->over_temp_state = HBA_OVER_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) lpfc_offline_eratt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) /* The if clause above forces this code path when the status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) * failure is a value other than FFER6. Do not call the offline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) * twice. This is the adapter hardware error path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) "0457 Adapter Hardware Error "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) "Data: x%x x%x x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) phba->work_hs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) phba->work_status[0], phba->work_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) event_data = FC_REG_DUMP_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) sizeof(event_data), (char *) &event_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) lpfc_offline_eratt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) * @mbx_action: flag for mailbox shutdown action.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) * @en_rn_msg: send reset/port recovery message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) * This routine is invoked to perform an SLI4 port PCI function reset in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) * response to port status register polling attention. It waits for port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) * status register (ERR, RDY, RN) bits before proceeding with function reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) * During this process, interrupt vectors are freed and later requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) * for handling possible port resource change.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) bool en_rn_msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) uint32_t intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) LPFC_SLI_INTF_IF_TYPE_2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) * On error status condition, driver need to wait for port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) * ready before performing reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) rc = lpfc_sli4_pdev_status_reg_wait(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) /* need reset: attempt for port recovery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) if (en_rn_msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) "2887 Reset Needed: Attempting Port "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) "Recovery...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) lpfc_offline_prep(phba, mbx_action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) lpfc_sli_flush_io_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) /* release interrupt for possible resource change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) lpfc_sli4_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) rc = lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) "6309 Failed to restart board\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) /* request and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) if (intr_mode == LPFC_INTR_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) "3175 Failed to enable interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) phba->intr_mode = intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) rc = lpfc_online(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) if (rc == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) * This routine is invoked to handle the SLI4 HBA hardware error attention
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) * conditions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) lpfc_handle_eratt_s4(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) uint32_t event_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) uint32_t if_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) struct lpfc_register portstat_reg = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) uint32_t reg_err1, reg_err2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) uint32_t uerrlo_reg, uemasklo_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) bool en_rn_msg = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) struct temp_event temp_event_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) struct lpfc_register portsmphr_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) int rc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) /* If the pci channel is offline, ignore possible errors, since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) * we cannot communicate with the pci card anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) if (pci_channel_offline(phba->pcidev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) "3166 pci channel is offline\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) lpfc_sli4_offline_eratt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) pci_rd_rc1 = lpfc_readl(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) phba->sli4_hba.u.if_type0.UERRLOregaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) &uerrlo_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) pci_rd_rc2 = lpfc_readl(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) &uemasklo_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) /* consider PCI bus read error as pci_channel_offline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) lpfc_sli4_offline_eratt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) "7623 Checking UE recoverable");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) &portsmphr_reg.word0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) smphr_port_status = bf_get(lpfc_port_smphr_port_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) &portsmphr_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) LPFC_PORT_SEM_UE_RECOVERABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) /*Sleep for 1Sec, before checking SEMAPHORE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) msleep(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) "4827 smphr_port_status x%x : Waited %dSec",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) smphr_port_status, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) /* Recoverable UE, reset the HBA device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) LPFC_PORT_SEM_UE_RECOVERABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) for (i = 0; i < 20; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) msleep(1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) &portsmphr_reg.word0) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) (LPFC_POST_STAGE_PORT_READY ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) bf_get(lpfc_port_smphr_port_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) &portsmphr_reg))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) rc = lpfc_sli4_port_sta_fn_reset(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) LPFC_MBX_NO_WAIT, en_rn_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) if (rc == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) "4215 Failed to recover UE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) "7624 Firmware not ready: Failing UE recovery,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) " waited %dSec", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) pci_rd_rc1 = lpfc_readl(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) phba->sli4_hba.u.if_type2.STATUSregaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) &portstat_reg.word0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) /* consider PCI bus read error as pci_channel_offline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) if (pci_rd_rc1 == -EIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) "3151 PCI bus read access failure: x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) lpfc_sli4_offline_eratt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) "2889 Port Overtemperature event, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) "taking port offline Data: x%x x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) reg_err1, reg_err2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) temp_event_data.event_code = LPFC_CRIT_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) temp_event_data.data = 0xFFFFFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) shost = lpfc_shost_from_vport(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) sizeof(temp_event_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) (char *)&temp_event_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) SCSI_NL_VID_TYPE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) | PCI_VENDOR_ID_EMULEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) phba->over_temp_state = HBA_OVER_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) lpfc_sli4_offline_eratt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) "3143 Port Down: Firmware Update "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) "Detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) en_rn_msg = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) "3144 Port Down: Debug Dump\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) "3145 Port Down: Provisioning\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) /* If resets are disabled then leave the HBA alone and return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) if (!phba->cfg_enable_hba_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) /* Check port status register for function reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) en_rn_msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) if (rc == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) /* don't report event on forced debug dump */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) /* fall through for not able to recover */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) "3152 Unrecoverable error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) case LPFC_SLI_INTF_IF_TYPE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) "3123 Report dump event to upper layer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) /* Send an internal error event to mgmt application */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) lpfc_board_errevt_to_mgmt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) event_data = FC_REG_DUMP_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) sizeof(event_data), (char *) &event_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) * lpfc_handle_eratt - Wrapper func for handling hba error attention
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) * @phba: pointer to lpfc HBA data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) * This routine wraps the actual SLI3 or SLI4 hba error attention handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) * routine from the API jump table function pointer from the lpfc_hba struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) * 0 - success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) * Any other value - error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) lpfc_handle_eratt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) (*phba->lpfc_handle_eratt)(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) * lpfc_handle_latt - The HBA link event handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) * This routine is invoked from the worker thread to handle a HBA host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) * attention link event. SLI3 only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) lpfc_handle_latt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) volatile uint32_t control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) struct lpfc_dmabuf *mp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) rc = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) goto lpfc_handle_latt_err_exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) if (!mp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) rc = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) goto lpfc_handle_latt_free_pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) if (!mp->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) rc = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) goto lpfc_handle_latt_free_mp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) /* Cleanup any outstanding ELS commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) lpfc_els_flush_all_cmd(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) psli->slistat.link_event++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) lpfc_read_topology(phba, pmb, mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) pmb->vport = vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) /* Block ELS IOCBs until we have processed this mbox command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) if (rc == MBX_NOT_FINISHED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) rc = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) goto lpfc_handle_latt_free_mbuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) /* Clear Link Attention in HA REG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) writel(HA_LATT, phba->HAregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) readl(phba->HAregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) lpfc_handle_latt_free_mbuf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) lpfc_mbuf_free(phba, mp->virt, mp->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) lpfc_handle_latt_free_mp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) kfree(mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) lpfc_handle_latt_free_pmb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) lpfc_handle_latt_err_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) /* Enable Link attention interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) psli->sli_flag |= LPFC_PROCESS_LA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) control = readl(phba->HCregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) control |= HC_LAINT_ENA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) writel(control, phba->HCregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) readl(phba->HCregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) /* Clear Link Attention in HA REG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) writel(HA_LATT, phba->HAregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) readl(phba->HAregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) lpfc_linkdown(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) * lpfc_parse_vpd - Parse VPD (Vital Product Data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) * @vpd: pointer to the vital product data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) * @len: length of the vital product data in bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) * This routine parses the Vital Product Data (VPD). The VPD is treated as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) * an array of characters. In this routine, the ModelName, ProgramType, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) * ModelDesc, etc. fields of the phba data structure will be populated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) * 0 - pointer to the VPD passed in is NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) * 1 - success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) uint8_t lenlo, lenhi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) int Length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) int finished = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) int index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) if (!vpd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) /* Vital Product */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) "0455 Vital Product Data: x%x x%x x%x x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) (uint32_t) vpd[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) while (!finished && (index < (len - 4))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) switch (vpd[index]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) case 0x82:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) case 0x91:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) lenlo = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) lenhi = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) i = ((((unsigned short)lenhi) << 8) + lenlo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) index += i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) case 0x90:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) lenlo = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) lenhi = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) Length = ((((unsigned short)lenhi) << 8) + lenlo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) if (Length > len - index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) Length = len - index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) while (Length > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) /* Look for Serial Number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) index += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) i = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) Length -= (3+i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) while(i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) phba->SerialNumber[j++] = vpd[index++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) if (j == 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) phba->SerialNumber[j] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) phba->vpd_flag |= VPD_MODEL_DESC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) index += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) i = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) Length -= (3+i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) while(i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) phba->ModelDesc[j++] = vpd[index++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) if (j == 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) phba->ModelDesc[j] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) phba->vpd_flag |= VPD_MODEL_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) index += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) i = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) Length -= (3+i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) while(i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) phba->ModelName[j++] = vpd[index++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) if (j == 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) phba->ModelName[j] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) phba->vpd_flag |= VPD_PROGRAM_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) index += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) i = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) Length -= (3+i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) while(i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) phba->ProgramType[j++] = vpd[index++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) if (j == 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) phba->ProgramType[j] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) phba->vpd_flag |= VPD_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) index += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) i = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) Length -= (3+i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) while(i--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) if ((phba->sli_rev == LPFC_SLI_REV4) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) (phba->sli4_hba.pport_name_sta ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) LPFC_SLI4_PPNAME_GET)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) phba->Port[j++] = vpd[index++];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) if (j == 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) if ((phba->sli_rev != LPFC_SLI_REV4) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) (phba->sli4_hba.pport_name_sta ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) LPFC_SLI4_PPNAME_NON))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) phba->Port[j] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) index += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) i = vpd[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) index += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) index += i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) Length -= (3 + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) finished = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) case 0x78:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) finished = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) index ++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) return(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) * @mdp: pointer to the data structure to hold the derived model name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) * @descp: pointer to the data structure to hold the derived description.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) * This routine retrieves HBA's description based on its registered PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) * ID. The @descp passed into this function points to an array of 256 chars. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) * shall be returned with the model name, maximum speed, and the host bus type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) * The @mdp passed into this function points to an array of 80 chars. When the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) * function returns, the @mdp will be filled with the model name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) lpfc_vpd_t *vp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) uint16_t dev_id = phba->pcidev->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) int max_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) int GE = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) int oneConnect = 0; /* default is not a oneConnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) char *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) char *function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) } m = {"<Unknown>", "", ""};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) if (mdp && mdp[0] != '\0'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) && descp && descp[0] != '\0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) if (phba->lmt & LMT_64Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) max_speed = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) else if (phba->lmt & LMT_32Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) max_speed = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) else if (phba->lmt & LMT_16Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) max_speed = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) else if (phba->lmt & LMT_10Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) max_speed = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) else if (phba->lmt & LMT_8Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) max_speed = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) else if (phba->lmt & LMT_4Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) max_speed = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) else if (phba->lmt & LMT_2Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) max_speed = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) else if (phba->lmt & LMT_1Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) max_speed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) max_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) vp = &phba->vpd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) switch (dev_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) case PCI_DEVICE_ID_FIREFLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) m = (typeof(m)){"LP6000", "PCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) case PCI_DEVICE_ID_SUPERFLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) m = (typeof(m)){"LP7000", "PCI", ""};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) m = (typeof(m)){"LP7000E", "PCI", ""};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) m.function = "Obsolete, Unsupported Fibre Channel Adapter";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) case PCI_DEVICE_ID_DRAGONFLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) m = (typeof(m)){"LP8000", "PCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) case PCI_DEVICE_ID_CENTAUR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) m = (typeof(m)){"LP9002", "PCI", ""};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) m = (typeof(m)){"LP9000", "PCI", ""};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) m.function = "Obsolete, Unsupported Fibre Channel Adapter";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) case PCI_DEVICE_ID_RFLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) m = (typeof(m)){"LP952", "PCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) case PCI_DEVICE_ID_PEGASUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) m = (typeof(m)){"LP9802", "PCI-X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) case PCI_DEVICE_ID_THOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) m = (typeof(m)){"LP10000", "PCI-X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) case PCI_DEVICE_ID_VIPER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) m = (typeof(m)){"LPX1000", "PCI-X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) case PCI_DEVICE_ID_PFLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) m = (typeof(m)){"LP982", "PCI-X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) case PCI_DEVICE_ID_TFLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) m = (typeof(m)){"LP1050", "PCI-X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) case PCI_DEVICE_ID_HELIOS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) m = (typeof(m)){"LP11000", "PCI-X2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) case PCI_DEVICE_ID_HELIOS_SCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) m = (typeof(m)){"LP11000-SP", "PCI-X2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) case PCI_DEVICE_ID_HELIOS_DCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) m = (typeof(m)){"LP11002-SP", "PCI-X2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) case PCI_DEVICE_ID_NEPTUNE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) m = (typeof(m)){"LPe1000", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) case PCI_DEVICE_ID_NEPTUNE_SCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) m = (typeof(m)){"LPe1000-SP", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) case PCI_DEVICE_ID_NEPTUNE_DCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) m = (typeof(m)){"LPe1002-SP", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) case PCI_DEVICE_ID_BMID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) case PCI_DEVICE_ID_BSMB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) m = (typeof(m)){"LP111", "PCI-X2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) case PCI_DEVICE_ID_ZEPHYR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) case PCI_DEVICE_ID_ZEPHYR_SCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) case PCI_DEVICE_ID_ZEPHYR_DCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) GE = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) case PCI_DEVICE_ID_ZMID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) case PCI_DEVICE_ID_ZSMB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) case PCI_DEVICE_ID_LP101:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) m = (typeof(m)){"LP101", "PCI-X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) case PCI_DEVICE_ID_LP10000S:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) m = (typeof(m)){"LP10000-S", "PCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) case PCI_DEVICE_ID_LP11000S:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) m = (typeof(m)){"LP11000-S", "PCI-X2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) case PCI_DEVICE_ID_LPE11000S:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) m = (typeof(m)){"LPe11000-S", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) case PCI_DEVICE_ID_SAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) case PCI_DEVICE_ID_SAT_MID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) case PCI_DEVICE_ID_SAT_SMB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) case PCI_DEVICE_ID_SAT_DCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) case PCI_DEVICE_ID_SAT_SCSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) case PCI_DEVICE_ID_SAT_S:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) case PCI_DEVICE_ID_HORNET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) m = (typeof(m)){"LP21000", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) "Obsolete, Unsupported FCoE Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) GE = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) case PCI_DEVICE_ID_PROTEUS_VF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) m = (typeof(m)){"LPev12000", "PCIe IOV",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) case PCI_DEVICE_ID_PROTEUS_PF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) m = (typeof(m)){"LPev12000", "PCIe IOV",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) case PCI_DEVICE_ID_PROTEUS_S:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) case PCI_DEVICE_ID_TIGERSHARK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) oneConnect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) m = (typeof(m)){"OCe10100", "PCIe", "FCoE"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) case PCI_DEVICE_ID_TOMCAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) oneConnect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) m = (typeof(m)){"OCe11100", "PCIe", "FCoE"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) case PCI_DEVICE_ID_FALCON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) "EmulexSecure Fibre"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) case PCI_DEVICE_ID_BALIUS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) case PCI_DEVICE_ID_LANCER_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) case PCI_DEVICE_ID_LANCER_FC_VF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) m = (typeof(m)){"LPe16000", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) "Obsolete, Unsupported Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) case PCI_DEVICE_ID_LANCER_FCOE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) oneConnect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) m = (typeof(m)){"OCe15100", "PCIe", "FCoE"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) case PCI_DEVICE_ID_LANCER_FCOE_VF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) oneConnect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) m = (typeof(m)){"OCe15100", "PCIe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) "Obsolete, Unsupported FCoE"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) case PCI_DEVICE_ID_LANCER_G6_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) case PCI_DEVICE_ID_LANCER_G7_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) case PCI_DEVICE_ID_SKYHAWK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) case PCI_DEVICE_ID_SKYHAWK_VF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) oneConnect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) m = (typeof(m)){"OCe14000", "PCIe", "FCoE"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) m = (typeof(m)){"Unknown", "", ""};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) if (mdp && mdp[0] == '\0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) snprintf(mdp, 79,"%s", m.name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) * oneConnect hba requires special processing, they are all initiators
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) * and we put the port number on the end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) if (descp && descp[0] == '\0') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) if (oneConnect)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) snprintf(descp, 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) "Emulex OneConnect %s, %s Initiator %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) m.name, m.function,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) phba->Port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) else if (max_speed == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) snprintf(descp, 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) "Emulex %s %s %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) m.name, m.bus, m.function);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) snprintf(descp, 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) "Emulex %s %d%s %s %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) m.name, max_speed, (GE) ? "GE" : "Gb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) m.bus, m.function);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) * lpfc_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) * @pring: pointer to a IOCB ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) * @cnt: the number of IOCBs to be posted to the IOCB ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) * This routine posts a given number of IOCBs with the associated DMA buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) * descriptors specified by the cnt argument to the given IOCB ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) * The number of IOCBs NOT able to be posted to the IOCB ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) IOCB_t *icmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) struct lpfc_iocbq *iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) struct lpfc_dmabuf *mp1, *mp2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) cnt += pring->missbufcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) /* While there are buffers to post */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) while (cnt > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) /* Allocate buffer for command iocb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) iocb = lpfc_sli_get_iocbq(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) if (iocb == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) pring->missbufcnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) icmd = &iocb->iocb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) /* 2 buffers can be posted per command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) /* Allocate buffer to post */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) if (mp1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) if (!mp1 || !mp1->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) kfree(mp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) lpfc_sli_release_iocbq(phba, iocb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) pring->missbufcnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) INIT_LIST_HEAD(&mp1->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) /* Allocate buffer to post */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) if (cnt > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) if (mp2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) &mp2->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) if (!mp2 || !mp2->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) kfree(mp2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) kfree(mp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) lpfc_sli_release_iocbq(phba, iocb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) pring->missbufcnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) INIT_LIST_HEAD(&mp2->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) mp2 = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) icmd->ulpBdeCount = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) if (mp2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) icmd->ulpBdeCount = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) icmd->ulpLe = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) IOCB_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) kfree(mp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) if (mp2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) kfree(mp2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) lpfc_sli_release_iocbq(phba, iocb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) pring->missbufcnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) lpfc_sli_ringpostbuf_put(phba, pring, mp1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) if (mp2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) lpfc_sli_ringpostbuf_put(phba, pring, mp2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) pring->missbufcnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) * This routine posts initial receive IOCB buffers to the ELS ring. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) * set to 64 IOCBs. SLI3 only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) * 0 - success (currently always success)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) lpfc_post_rcv_buf(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) /* Ring 0, ELS / CT buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) lpfc_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) /* Ring 2 - FCP no buffers needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) * lpfc_sha_init - Set up initial array of hash table entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) * @HashResultPointer: pointer to an array as hash table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) * This routine sets up the initial values to the array of hash table entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) * for the LC HBAs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) lpfc_sha_init(uint32_t * HashResultPointer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) HashResultPointer[0] = 0x67452301;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) HashResultPointer[1] = 0xEFCDAB89;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) HashResultPointer[2] = 0x98BADCFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) HashResultPointer[3] = 0x10325476;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) HashResultPointer[4] = 0xC3D2E1F0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) * lpfc_sha_iterate - Iterate initial hash table with the working hash table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) * @HashResultPointer: pointer to an initial/result hash table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) * @HashWorkingPointer: pointer to an working hash table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) * This routine iterates an initial hash table pointed by @HashResultPointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) * with the values from the working hash table pointeed by @HashWorkingPointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) * The results are putting back to the initial hash table, returned through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) * the @HashResultPointer as the result hash table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) int t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) uint32_t TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) uint32_t A, B, C, D, E;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) t = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) HashWorkingPointer[t] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) S(1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) 8] ^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) } while (++t <= 79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) t = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) A = HashResultPointer[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) B = HashResultPointer[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) C = HashResultPointer[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) D = HashResultPointer[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) E = HashResultPointer[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) if (t < 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) } else if (t < 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) } else if (t < 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) TEMP = (B ^ C ^ D) + 0xCA62C1D6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) TEMP += S(5, A) + E + HashWorkingPointer[t];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) E = D;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) D = C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) C = S(30, B);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) B = A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) A = TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) } while (++t <= 79);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) HashResultPointer[0] += A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) HashResultPointer[1] += B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) HashResultPointer[2] += C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) HashResultPointer[3] += D;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) HashResultPointer[4] += E;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) * @RandomChallenge: pointer to the entry of host challenge random number array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) * @HashWorking: pointer to the entry of the working hash array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) * This routine calculates the working hash array referred by @HashWorking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) * from the challenge random numbers associated with the host, referred by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) * @RandomChallenge. The result is put into the entry of the working hash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) * array and returned by reference through @HashWorking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) *HashWorking = (*RandomChallenge ^ *HashWorking);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) * lpfc_hba_init - Perform special handling for LC HBA initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) * @hbainit: pointer to an array of unsigned 32-bit integers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) * This routine performs the special handling for LC HBA initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) int t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) uint32_t *HashWorking;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) uint32_t *pwwnn = (uint32_t *) phba->wwnn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) if (!HashWorking)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) HashWorking[0] = HashWorking[78] = *pwwnn++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) HashWorking[1] = HashWorking[79] = *pwwnn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) for (t = 0; t < 7; t++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) lpfc_sha_init(hbainit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) lpfc_sha_iterate(hbainit, HashWorking);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) kfree(HashWorking);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) * lpfc_cleanup - Performs vport cleanups before deleting a vport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) * @vport: pointer to a virtual N_Port data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) * This routine performs the necessary cleanups before deleting the @vport.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) * It invokes the discovery state machine to perform necessary state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) * transitions and to release the ndlps associated with the @vport. Note,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) * the physical port is treated as @vport 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) lpfc_cleanup(struct lpfc_vport *vport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) struct lpfc_hba *phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) struct lpfc_nodelist *ndlp, *next_ndlp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) if (phba->link_state > LPFC_LINK_DOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) lpfc_port_link_failure(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) if (!NLP_CHK_NODE_ACT(ndlp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) ndlp = lpfc_enable_node(vport, ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) NLP_STE_UNUSED_NODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) if (!ndlp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) spin_lock_irq(&phba->ndlp_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) NLP_SET_FREE_REQ(ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) spin_unlock_irq(&phba->ndlp_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) /* Trigger the release of the ndlp memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) lpfc_nlp_put(ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) spin_lock_irq(&phba->ndlp_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) if (NLP_CHK_FREE_REQ(ndlp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) /* The ndlp should not be in memory free mode already */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) spin_unlock_irq(&phba->ndlp_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) /* Indicate request for freeing ndlp memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) NLP_SET_FREE_REQ(ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) spin_unlock_irq(&phba->ndlp_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) if (vport->port_type != LPFC_PHYSICAL_PORT &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) ndlp->nlp_DID == Fabric_DID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) /* Just free up ndlp with Fabric_DID for vports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) lpfc_nlp_put(ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) /* take care of nodes in unused state before the state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) * machine taking action.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) if (ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) lpfc_nlp_put(ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) if (ndlp->nlp_type & NLP_FABRIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) lpfc_disc_state_machine(vport, ndlp, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) NLP_EVT_DEVICE_RECOVERY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) lpfc_disc_state_machine(vport, ndlp, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) NLP_EVT_DEVICE_RM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) /* At this point, ALL ndlp's should be gone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) * because of the previous NLP_EVT_DEVICE_RM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) * Lets wait for this to happen, if needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) while (!list_empty(&vport->fc_nodes)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) if (i++ > 3000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) lpfc_printf_vlog(vport, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) "0233 Nodelist not empty\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) list_for_each_entry_safe(ndlp, next_ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) &vport->fc_nodes, nlp_listp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) lpfc_printf_vlog(ndlp->vport, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) "0282 did:x%x ndlp:x%px "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) "usgmap:x%x refcnt:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) ndlp->nlp_DID, (void *)ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) ndlp->nlp_usg_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) kref_read(&ndlp->kref));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) /* Wait for any activity on ndlps to settle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) lpfc_cleanup_vports_rrqs(vport, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) * lpfc_stop_vport_timers - Stop all the timers associated with a vport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) * @vport: pointer to a virtual N_Port data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) * This routine stops all the timers associated with a @vport. This function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) * is invoked before disabling or deleting a @vport. Note that the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) * port is treated as @vport 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) lpfc_stop_vport_timers(struct lpfc_vport *vport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) del_timer_sync(&vport->els_tmofunc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) del_timer_sync(&vport->delayed_disc_tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) lpfc_can_disctmo(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) * caller of this routine should already hold the host lock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) /* Clear pending FCF rediscovery wait flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) /* Now, try to stop the timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) del_timer(&phba->fcf.redisc_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) * checks whether the FCF rediscovery wait timer is pending with the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) * lock held before proceeding with disabling the timer and clearing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) * wait timer pendig flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) /* FCF rediscovery timer already fired or stopped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) /* Clear failover in progress flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) * This routine stops all the timers associated with a HBA. This function is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) * invoked before either putting a HBA offline or unloading the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) lpfc_stop_hba_timers(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) if (phba->pport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) lpfc_stop_vport_timers(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) cancel_delayed_work_sync(&phba->eq_delay_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) cancel_delayed_work_sync(&phba->idle_stat_delay_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) del_timer_sync(&phba->sli.mbox_tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) del_timer_sync(&phba->fabric_block_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) del_timer_sync(&phba->eratt_poll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) del_timer_sync(&phba->hb_tmofunc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) if (phba->sli_rev == LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) del_timer_sync(&phba->rrq_tmr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) phba->hba_flag &= ~HBA_RRQ_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) phba->hb_outstanding = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) switch (phba->pci_dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) /* Stop any LightPulse device specific driver timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) del_timer_sync(&phba->fcp_poll_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) /* Stop any OneConnect device specific driver timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) "0297 Invalid device group (x%x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) phba->pci_dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) * @mbx_action: flag for mailbox no wait action.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) * This routine marks a HBA's management interface as blocked. Once the HBA's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) * management interface is marked as blocked, all the user space access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) * the HBA, whether they are from sysfs interface or libdfc interface will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) * all be blocked. The HBA is set to block the management interface when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) * driver prepares the HBA interface for online or offline.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) uint8_t actcmd = MBX_HEARTBEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) unsigned long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) spin_lock_irqsave(&phba->hbalock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) spin_unlock_irqrestore(&phba->hbalock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) if (mbx_action == LPFC_MBX_NO_WAIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) spin_lock_irqsave(&phba->hbalock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) if (phba->sli.mbox_active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) /* Determine how long we might wait for the active mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) * command to be gracefully completed by firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) phba->sli.mbox_active) * 1000) + jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) spin_unlock_irqrestore(&phba->hbalock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) /* Wait for the outstnading mailbox command to complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) while (phba->sli.mbox_active) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) /* Check active mailbox complete status every 2ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) msleep(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) if (time_after(jiffies, timeout)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) "2813 Mgmt IO is Blocked %x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) "- mbox cmd %x still active\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) phba->sli.sli_flag, actcmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) * lpfc_sli4_node_prep - Assign RPIs for active nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) * Allocate RPIs for all active remote nodes. This is needed whenever
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) * an SLI4 adapter is reset and the driver is not unloading. Its purpose
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) * is to fixup the temporary rpi assignments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) lpfc_sli4_node_prep(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) struct lpfc_nodelist *ndlp, *next_ndlp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) int i, rpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) if (phba->sli_rev != LPFC_SLI_REV4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) if (vports == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) if (vports[i]->load_flag & FC_UNLOADING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) list_for_each_entry_safe(ndlp, next_ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) &vports[i]->fc_nodes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) nlp_listp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) if (!NLP_CHK_NODE_ACT(ndlp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) rpi = lpfc_sli4_alloc_rpi(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) if (rpi == LPFC_RPI_ALLOC_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) spin_lock_irqsave(&phba->ndlp_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) NLP_CLR_NODE_ACT(ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) spin_unlock_irqrestore(&phba->ndlp_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) ndlp->nlp_rpi = rpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) lpfc_printf_vlog(ndlp->vport, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) LOG_NODE | LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) "0009 Assign RPI x%x to ndlp x%px "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) "DID:x%06x flg:x%x map:x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) ndlp->nlp_rpi, ndlp, ndlp->nlp_DID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) ndlp->nlp_flag, ndlp->nlp_usg_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) * lpfc_create_expedite_pool - create expedite pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) * to expedite pool. Mark them as expedite.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) struct lpfc_io_buf *lpfc_ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) struct lpfc_io_buf *lpfc_ncmd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) struct lpfc_epd_pool *epd_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) epd_pool = &phba->epd_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) qp = &phba->sli4_hba.hdwq[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) spin_lock_init(&epd_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) spin_lock(&epd_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) INIT_LIST_HEAD(&epd_pool->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) &qp->lpfc_io_buf_list_put, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) lpfc_ncmd->expedite = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) qp->put_io_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) epd_pool->count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) if (epd_pool->count >= XRI_BATCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) spin_unlock(&epd_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) * lpfc_destroy_expedite_pool - destroy expedite pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) * of HWQ 0. Clear the mark.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) struct lpfc_io_buf *lpfc_ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) struct lpfc_io_buf *lpfc_ncmd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) struct lpfc_epd_pool *epd_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) epd_pool = &phba->epd_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) qp = &phba->sli4_hba.hdwq[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) spin_lock(&epd_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) &epd_pool->list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) list_move_tail(&lpfc_ncmd->list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) &qp->lpfc_io_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) lpfc_ncmd->flags = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) qp->put_io_bufs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) epd_pool->count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) spin_unlock(&epd_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) * lpfc_create_multixri_pools - create multi-XRI pools
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) * This routine initialize public, private per HWQ. Then, move XRIs from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) * lpfc_io_buf_list_put to public pool. High and low watermark are also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) * Initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) void lpfc_create_multixri_pools(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) u32 i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) u32 hwq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) u32 count_per_hwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) struct lpfc_io_buf *lpfc_ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) struct lpfc_io_buf *lpfc_ncmd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) struct lpfc_multixri_pool *multixri_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) struct lpfc_pbl_pool *pbl_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) struct lpfc_pvt_pool *pvt_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) phba->sli4_hba.io_xri_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) lpfc_create_expedite_pool(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) hwq_count = phba->cfg_hdw_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) for (i = 0; i < hwq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) if (!multixri_pool) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) "1238 Failed to allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) "multixri_pool\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) lpfc_destroy_expedite_pool(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) while (j < i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) qp = &phba->sli4_hba.hdwq[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) kfree(qp->p_multixri_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) phba->cfg_xri_rebalancing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) qp = &phba->sli4_hba.hdwq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) qp->p_multixri_pool = multixri_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) multixri_pool->xri_limit = count_per_hwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) multixri_pool->rrb_next_hwqid = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) /* Deal with public free xri pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) pbl_pool = &multixri_pool->pbl_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) spin_lock_init(&pbl_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) spin_lock(&pbl_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) INIT_LIST_HEAD(&pbl_pool->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) &qp->lpfc_io_buf_list_put, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) qp->put_io_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) pbl_pool->count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) pbl_pool->count, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) spin_unlock(&pbl_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) /* Deal with private free xri pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) pvt_pool = &multixri_pool->pvt_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) pvt_pool->low_watermark = XRI_BATCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) spin_lock_init(&pvt_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) spin_lock_irqsave(&pvt_pool->lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) INIT_LIST_HEAD(&pvt_pool->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) pvt_pool->count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) spin_unlock_irqrestore(&pvt_pool->lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) * lpfc_destroy_multixri_pools - destroy multi-XRI pools
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) u32 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) u32 hwq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) struct lpfc_io_buf *lpfc_ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) struct lpfc_io_buf *lpfc_ncmd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) struct lpfc_multixri_pool *multixri_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) struct lpfc_pbl_pool *pbl_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) struct lpfc_pvt_pool *pvt_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) lpfc_destroy_expedite_pool(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) if (!(phba->pport->load_flag & FC_UNLOADING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) lpfc_sli_flush_io_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) hwq_count = phba->cfg_hdw_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) for (i = 0; i < hwq_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) qp = &phba->sli4_hba.hdwq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) multixri_pool = qp->p_multixri_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) if (!multixri_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) qp->p_multixri_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) /* Deal with public free xri pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) pbl_pool = &multixri_pool->pbl_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) spin_lock(&pbl_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) pbl_pool->count, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) &pbl_pool->list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) list_move_tail(&lpfc_ncmd->list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) &qp->lpfc_io_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) qp->put_io_bufs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) pbl_pool->count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) INIT_LIST_HEAD(&pbl_pool->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) pbl_pool->count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) spin_unlock(&pbl_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) /* Deal with private free xri pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) pvt_pool = &multixri_pool->pvt_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) spin_lock(&pvt_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) pvt_pool->count, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) &pvt_pool->list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) list_move_tail(&lpfc_ncmd->list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) &qp->lpfc_io_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) qp->put_io_bufs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) pvt_pool->count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) INIT_LIST_HEAD(&pvt_pool->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) pvt_pool->count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) spin_unlock(&pvt_pool->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) kfree(multixri_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) * lpfc_online - Initialize and bring a HBA online
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) * This routine initializes the HBA and brings a HBA online. During this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) * process, the management interface is blocked to prevent user space access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) * to the HBA interfering with the driver initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) * 1 - failed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) lpfc_online(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) struct lpfc_vport *vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) int i, error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) bool vpis_cleared = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) if (!phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) if (!(vport->fc_flag & FC_OFFLINE_MODE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) "0458 Bring Adapter online\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) if (phba->sli_rev == LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) if (!phba->sli4_hba.max_cfg_param.vpi_used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) vpis_cleared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) /* Reestablish the local initiator port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) * The offline process destroyed the previous lport.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) !phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) error = lpfc_nvme_create_localport(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) "6132 NVME restore reg failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) "on nvmei error x%x\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) lpfc_sli_queue_init(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) if (vports != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) shost = lpfc_shost_from_vport(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) vports[i]->fc_flag &= ~FC_OFFLINE_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) if (phba->sli_rev == LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) if ((vpis_cleared) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) (vports[i]->port_type !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) LPFC_PHYSICAL_PORT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) vports[i]->vpi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) if (phba->cfg_xri_rebalancing)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) lpfc_create_multixri_pools(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) lpfc_cpuhp_add(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) * This routine marks a HBA's management interface as not blocked. Once the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) * HBA's management interface is marked as not blocked, all the user space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) * access to the HBA, whether they are from sysfs interface or libdfc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) * interface will be allowed. The HBA is set to block the management interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) * when the driver prepares the HBA interface for online or offline and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) * set to unblock the management interface afterwards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) unsigned long iflag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) spin_lock_irqsave(&phba->hbalock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) spin_unlock_irqrestore(&phba->hbalock, iflag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) * lpfc_offline_prep - Prepare a HBA to be brought offline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) * @mbx_action: flag for mailbox shutdown action.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) * This routine is invoked to prepare a HBA to be brought offline. It performs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) * unregistration login to all the nodes on all vports and flushes the mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) * queue to make it ready to be brought offline.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) struct lpfc_nodelist *ndlp, *next_ndlp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) if (vport->fc_flag & FC_OFFLINE_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) lpfc_block_mgmt_io(phba, mbx_action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) lpfc_linkdown(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) /* Issue an unreg_login to all nodes on all vports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) if (vports != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) if (vports[i]->load_flag & FC_UNLOADING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) shost = lpfc_shost_from_vport(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506) vports[i]->fc_flag &= ~FC_VFI_REGISTERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) shost = lpfc_shost_from_vport(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) list_for_each_entry_safe(ndlp, next_ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) &vports[i]->fc_nodes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) nlp_listp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) if ((!NLP_CHK_NODE_ACT(ndlp)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) ndlp->nlp_state == NLP_STE_UNUSED_NODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) /* Driver must assume RPI is invalid for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) * any unused or inactive node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) if (ndlp->nlp_type & NLP_FABRIC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) lpfc_disc_state_machine(vports[i], ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) NULL, NLP_EVT_DEVICE_RECOVERY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) lpfc_disc_state_machine(vports[i], ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) NULL, NLP_EVT_DEVICE_RM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) ndlp->nlp_flag &= ~NLP_NPR_ADISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) * Whenever an SLI4 port goes offline, free the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) * RPI. Get a new RPI when the adapter port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) * comes back online.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) if (phba->sli_rev == LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) lpfc_printf_vlog(ndlp->vport, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538) LOG_NODE | LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) "0011 Free RPI x%x on "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) "ndlp:x%px did x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) "usgmap:x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) ndlp->nlp_rpi, ndlp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) ndlp->nlp_DID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) ndlp->nlp_usg_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) lpfc_unreg_rpi(vports[i], ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) if (phba->wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) flush_workqueue(phba->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) * lpfc_offline - Bring a HBA offline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) * This routine actually brings a HBA offline. It stops all the timers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) * associated with the HBA, brings down the SLI layer, and eventually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) * marks the HBA as in offline state for the upper layer protocol.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) lpfc_offline(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) if (phba->pport->fc_flag & FC_OFFLINE_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) /* stop port and all timers associated with this hba */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) lpfc_stop_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) /* Tear down the local and target port registrations. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) * nvme transports need to cleanup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) lpfc_nvmet_destroy_targetport(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) lpfc_nvme_destroy_localport(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) if (vports != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) lpfc_stop_vport_timers(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) "0460 Bring Adapter offline\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) /* Bring down the SLI Layer and cleanup. The HBA is offline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) lpfc_sli_hba_down(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) phba->work_ha = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) if (vports != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) shost = lpfc_shost_from_vport(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) vports[i]->work_port_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) vports[i]->fc_flag |= FC_OFFLINE_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) __lpfc_cpuhp_remove(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) if (phba->cfg_xri_rebalancing)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) lpfc_destroy_multixri_pools(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) * This routine is to free all the SCSI buffers and IOCBs from the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) * list back to kernel. It is called from lpfc_pci_remove_one to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) * the internal resources before the device is removed from the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) lpfc_scsi_free(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) struct lpfc_io_buf *sb, *sb_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) /* Release all the lpfc_scsi_bufs maintained by this host. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) spin_lock(&phba->scsi_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) list_del(&sb->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) sb->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) kfree(sb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) phba->total_scsi_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) spin_unlock(&phba->scsi_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) spin_lock(&phba->scsi_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) list_del(&sb->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) sb->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) kfree(sb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) phba->total_scsi_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) spin_unlock(&phba->scsi_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) * This routine is to free all the IO buffers and IOCBs from the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) * list back to kernel. It is called from lpfc_pci_remove_one to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) * the internal resources before the device is removed from the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) lpfc_io_free(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) qp = &phba->sli4_hba.hdwq[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) /* Release all the lpfc_nvme_bufs maintained by this host. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) spin_lock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) &qp->lpfc_io_buf_list_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) list_del(&lpfc_ncmd->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) qp->put_io_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) dma_pool_free(phba->lpfc_sg_dma_buf_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) lpfc_ncmd->data, lpfc_ncmd->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) if (phba->cfg_xpsgl && !phba->nvmet_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) kfree(lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) qp->total_io_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) spin_unlock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) spin_lock(&qp->io_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) &qp->lpfc_io_buf_list_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) list_del(&lpfc_ncmd->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) qp->get_io_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) dma_pool_free(phba->lpfc_sg_dma_buf_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) lpfc_ncmd->data, lpfc_ncmd->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) if (phba->cfg_xpsgl && !phba->nvmet_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) kfree(lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) qp->total_io_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) spin_unlock(&qp->io_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) * This routine first calculates the sizes of the current els and allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) * scsi sgl lists, and then goes through all sgls to updates the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) * XRIs assigned due to port function reset. During port initialization, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) * current els and allocated scsi sgl lists are 0s.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) * 0 - successful (for now, it always returns 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) uint16_t i, lxri, xri_cnt, els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) LIST_HEAD(els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) * update on pci function's els xri-sgl list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) /* els xri-sgl expanded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) "3157 ELS xri-sgl count increased from "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) "%d to %d\n", phba->sli4_hba.els_xri_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) els_xri_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) /* allocate the additional els sgls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) for (i = 0; i < xri_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) if (sglq_entry == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) "2562 Failure to allocate an "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) "ELS sgl entry:%d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) sglq_entry->buff_type = GEN_BUFF_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) &sglq_entry->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) if (sglq_entry->virt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) kfree(sglq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) "2563 Failure to allocate an "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) "ELS mbuf:%d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) sglq_entry->sgl = sglq_entry->virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) sglq_entry->state = SGL_FREED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) list_add_tail(&sglq_entry->list, &els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) spin_lock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) list_splice_init(&els_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) &phba->sli4_hba.lpfc_els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) spin_unlock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) /* els xri-sgl shrinked */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) "3158 ELS xri-sgl count decreased from "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) "%d to %d\n", phba->sli4_hba.els_xri_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) els_xri_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) spin_lock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) &els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) /* release extra els sgls from list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) for (i = 0; i < xri_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) list_remove_head(&els_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) sglq_entry, struct lpfc_sglq, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) if (sglq_entry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) __lpfc_mbuf_free(phba, sglq_entry->virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) sglq_entry->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) kfree(sglq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) list_splice_init(&els_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) &phba->sli4_hba.lpfc_els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) spin_unlock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) "3163 ELS xri-sgl count unchanged: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) els_xri_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) phba->sli4_hba.els_xri_cnt = els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) /* update xris to els sgls on the list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) sglq_entry = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) sglq_entry_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) list_for_each_entry_safe(sglq_entry, sglq_entry_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) &phba->sli4_hba.lpfc_els_sgl_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) lxri = lpfc_sli4_next_xritag(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) if (lxri == NO_XRI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) "2400 Failed to allocate xri for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) "ELS sgl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) sglq_entry->sli4_lxritag = lxri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) out_free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) lpfc_free_els_sgl_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) * This routine first calculates the sizes of the current els and allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) * scsi sgl lists, and then goes through all sgls to updates the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) * XRIs assigned due to port function reset. During port initialization, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) * current els and allocated scsi sgl lists are 0s.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) * 0 - successful (for now, it always returns 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) uint16_t i, lxri, xri_cnt, els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) uint16_t nvmet_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) LIST_HEAD(nvmet_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) * update on pci function's nvmet xri-sgl list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) /* els xri-sgl expanded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) "6302 NVMET xri-sgl cnt grew from %d to %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) /* allocate the additional nvmet sgls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) for (i = 0; i < xri_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) if (sglq_entry == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) "6303 Failure to allocate an "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876) "NVMET sgl entry:%d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) sglq_entry->buff_type = NVMET_BUFF_TYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) &sglq_entry->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) if (sglq_entry->virt == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) kfree(sglq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) "6304 Failure to allocate an "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) "NVMET buf:%d\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) sglq_entry->sgl = sglq_entry->virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) memset(sglq_entry->sgl, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) phba->cfg_sg_dma_buf_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) sglq_entry->state = SGL_FREED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) spin_lock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) list_splice_init(&nvmet_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) &phba->sli4_hba.lpfc_nvmet_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) spin_unlock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) /* nvmet xri-sgl shrunk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) "6305 NVMET xri-sgl count decreased from "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) nvmet_xri_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) spin_lock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) &nvmet_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) /* release extra nvmet sgls from list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) for (i = 0; i < xri_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) list_remove_head(&nvmet_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) sglq_entry, struct lpfc_sglq, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) if (sglq_entry) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920) lpfc_nvmet_buf_free(phba, sglq_entry->virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) sglq_entry->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) kfree(sglq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) list_splice_init(&nvmet_sgl_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) &phba->sli4_hba.lpfc_nvmet_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927) spin_unlock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) "6306 NVMET xri-sgl count unchanged: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) nvmet_xri_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935) /* update xris to nvmet sgls on the list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) sglq_entry = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) sglq_entry_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) list_for_each_entry_safe(sglq_entry, sglq_entry_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) lxri = lpfc_sli4_next_xritag(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) if (lxri == NO_XRI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) "6307 Failed to allocate xri for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945) "NVMET sgl\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) sglq_entry->sli4_lxritag = lxri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) out_free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) lpfc_free_nvmet_sgl_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) LIST_HEAD(blist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) struct lpfc_io_buf *lpfc_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) struct lpfc_io_buf *iobufp, *prev_iobufp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) int idx, cnt, xri, inserted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970) qp = &phba->sli4_hba.hdwq[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) spin_lock_irq(&qp->io_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) spin_lock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) /* Take everything off the get and put lists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975) list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) list_splice(&qp->lpfc_io_buf_list_put, &blist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978) INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) cnt += qp->get_io_bufs + qp->put_io_bufs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) qp->get_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) qp->put_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) qp->total_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983) spin_unlock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984) spin_unlock_irq(&qp->io_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) * Take IO buffers off blist and put on cbuf sorted by XRI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) * This is because POST_SGL takes a sequential range of XRIs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) * to post to the firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) for (idx = 0; idx < cnt; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) if (!lpfc_cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) if (idx == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997) list_add_tail(&lpfc_cmd->list, cbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) xri = lpfc_cmd->cur_iocbq.sli4_xritag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001) inserted = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) prev_iobufp = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) list_for_each_entry(iobufp, cbuf, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) if (xri < iobufp->cur_iocbq.sli4_xritag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) if (prev_iobufp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) list_add(&lpfc_cmd->list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) &prev_iobufp->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) list_add(&lpfc_cmd->list, cbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010) inserted = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) prev_iobufp = iobufp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) if (!inserted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016) list_add_tail(&lpfc_cmd->list, cbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) struct lpfc_io_buf *lpfc_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) int idx, cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) qp = phba->sli4_hba.hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030) while (!list_empty(cbuf)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032) list_remove_head(cbuf, lpfc_cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) struct lpfc_io_buf, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034) if (!lpfc_cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) qp = &phba->sli4_hba.hdwq[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) lpfc_cmd->hdwq_no = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) lpfc_cmd->hdwq = qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) lpfc_cmd->cur_iocbq.wqe_cmpl = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) lpfc_cmd->cur_iocbq.iocb_cmpl = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) spin_lock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043) list_add_tail(&lpfc_cmd->list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) &qp->lpfc_io_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) qp->put_io_bufs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) qp->total_io_bufs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047) spin_unlock(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) return cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) * This routine first calculates the sizes of the current els and allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) * scsi sgl lists, and then goes through all sgls to updates the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) * XRIs assigned due to port function reset. During port initialization, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060) * current els and allocated scsi sgl lists are 0s.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) * 0 - successful (for now, it always returns 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) uint16_t i, lxri, els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) uint16_t io_xri_cnt, io_xri_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) LIST_HEAD(io_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072) int rc, cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075) * update on pci function's allocated nvme xri-sgl list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) /* maximum number of xris available for nvme buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) phba->sli4_hba.io_xri_max = io_xri_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) "6074 Current allocated XRI sgl count:%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) "maximum XRI count:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086) phba->sli4_hba.io_xri_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) phba->sli4_hba.io_xri_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089) cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) /* max nvme xri shrunk below the allocated nvme buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093) io_xri_cnt = phba->sli4_hba.io_xri_cnt -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) phba->sli4_hba.io_xri_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) /* release the extra allocated nvme buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) for (i = 0; i < io_xri_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) list_remove_head(&io_sgl_list, lpfc_ncmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) struct lpfc_io_buf, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) if (lpfc_ncmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) dma_pool_free(phba->lpfc_sg_dma_buf_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) lpfc_ncmd->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) lpfc_ncmd->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) kfree(lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106) phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) /* update xris associated to remaining allocated nvme buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110) lpfc_ncmd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) lpfc_ncmd_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) phba->sli4_hba.io_xri_cnt = cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) &io_sgl_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) lxri = lpfc_sli4_next_xritag(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) if (lxri == NO_XRI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) "6075 Failed to allocate xri for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) "nvme buffer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125) lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127) cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130) out_free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131) lpfc_io_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) * @phba: Pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138) * @num_to_alloc: The requested number of buffers to allocate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) * This routine allocates nvme buffers for device with SLI-4 interface spec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141) * the nvme buffer contains all the necessary information needed to initiate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) * an I/O. After allocating up to @num_to_allocate IO buffers and put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) * them on a list, it post them to the port by using SGL block post.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) * Return codes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) * int - number of IO buffers that were allocated and posted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) * 0 = failure, less than num_to_alloc is a partial failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150) lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) struct lpfc_io_buf *lpfc_ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) struct lpfc_iocbq *pwqeq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) uint16_t iotag, lxri = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155) int bcnt, num_posted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) LIST_HEAD(prep_nblist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) LIST_HEAD(post_nblist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) LIST_HEAD(nvme_nblist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) phba->sli4_hba.io_xri_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162) lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) if (!lpfc_ncmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) * Get memory from the pci pool to map the virt space to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167) * pci bus space for an I/O. The DMA buffer includes the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) * number of SGE's necessary to support the sg_tablesize.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170) lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171) GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) &lpfc_ncmd->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) if (!lpfc_ncmd->data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) kfree(lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) if (phba->cfg_xpsgl && !phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179) INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) * 4K Page alignment is CRITICAL to BlockGuard, double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) * check to be sure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) (((unsigned long)(lpfc_ncmd->data) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187) (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) "3369 Memory alignment err: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) "addr=%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) (unsigned long)lpfc_ncmd->data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) dma_pool_free(phba->lpfc_sg_dma_buf_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) lpfc_ncmd->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) lpfc_ncmd->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) kfree(lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) lxri = lpfc_sli4_next_xritag(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) if (lxri == NO_XRI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) dma_pool_free(phba->lpfc_sg_dma_buf_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) lpfc_ncmd->data, lpfc_ncmd->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) kfree(lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210) pwqeq = &lpfc_ncmd->cur_iocbq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) iotag = lpfc_sli_next_iotag(phba, pwqeq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214) if (iotag == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) dma_pool_free(phba->lpfc_sg_dma_buf_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216) lpfc_ncmd->data, lpfc_ncmd->dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) kfree(lpfc_ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) "6121 Failed to allocate IOTAG for"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) " XRI:0x%x\n", lxri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221) lpfc_sli4_free_xri(phba, lxri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) pwqeq->sli4_lxritag = lxri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226) pwqeq->context1 = lpfc_ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) /* Initialize local short-hand pointers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229) lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231) lpfc_ncmd->cur_iocbq.context1 = lpfc_ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) spin_lock_init(&lpfc_ncmd->buf_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234) /* add the nvme buffer to a post list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) list_add_tail(&lpfc_ncmd->list, &post_nblist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) phba->sli4_hba.io_xri_cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238) lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) "6114 Allocate %d out of %d requested new NVME "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) "buffers\n", bcnt, num_to_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242) /* post the list of nvme buffer sgls to port if available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) if (!list_empty(&post_nblist))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244) num_posted = lpfc_sli4_post_io_sgl_list(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) phba, &post_nblist, bcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247) num_posted = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249) return num_posted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252) static uint64_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253) lpfc_get_wwpn(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) uint64_t wwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) LPFC_MBOXQ_t *mboxq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) MAILBOX_t *mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260) mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) if (!mboxq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263) return (uint64_t)-1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265) /* First get WWN of HBA instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266) lpfc_read_nv(phba, mboxq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267) rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270) "6019 Mailbox failed , mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) "READ_NV, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) bf_get(lpfc_mqe_command, &mboxq->u.mqe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273) bf_get(lpfc_mqe_status, &mboxq->u.mqe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275) return (uint64_t) -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277) mb = &mboxq->u.mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278) memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279) /* wwn is WWPN of HBA instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281) if (phba->sli_rev == LPFC_SLI_REV4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) return be64_to_cpu(wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) return rol64(wwn, 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288) * lpfc_create_port - Create an FC port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) * @instance: a unique integer ID to this FC port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) * @dev: pointer to the device data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) * This routine creates a FC port for the upper layer protocol. The FC port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) * can be created on top of either a physical port or a virtual port provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295) * by the HBA. This routine also allocates a SCSI host data structure (shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) * and associates the FC port created before adding the shost into the SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297) * layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) * @vport - pointer to the virtual N_Port data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) * NULL - port create failed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303) struct lpfc_vport *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) struct lpfc_vport *vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) struct Scsi_Host *shost = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308) struct scsi_host_template *template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) int error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311) uint64_t wwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312) bool use_no_reset_hba = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) if (lpfc_no_hba_reset_cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316) if (phba->sli_rev < LPFC_SLI_REV4 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317) dev == &phba->pcidev->dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) /* Reset the port first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320) rc = lpfc_sli_chipset_init(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) wwn = lpfc_get_wwpn(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328) if (wwn == lpfc_no_hba_reset[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331) "6020 Setting use_no_reset port=%llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332) wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333) use_no_reset_hba = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) /* Seed template for SCSI host registration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339) if (dev == &phba->pcidev->dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) template = &phba->port_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343) /* Seed physical port template */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344) memcpy(template, &lpfc_template, sizeof(*template));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) if (use_no_reset_hba) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347) /* template is for a no reset SCSI Host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348) template->max_sectors = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349) template->eh_host_reset_handler = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352) /* Template for all vports this physical port creates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) memcpy(&phba->vport_template, &lpfc_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354) sizeof(*template));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355) phba->vport_template.max_sectors = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) phba->vport_template.shost_attrs = lpfc_vport_attrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) phba->vport_template.eh_bus_reset_handler = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358) phba->vport_template.eh_host_reset_handler = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) phba->vport_template.vendor_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) /* Initialize the host templates with updated value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362) if (phba->sli_rev == LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363) template->sg_tablesize = phba->cfg_scsi_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) phba->vport_template.sg_tablesize =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) phba->cfg_scsi_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) template->sg_tablesize = phba->cfg_sg_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368) phba->vport_template.sg_tablesize =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369) phba->cfg_sg_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) /* NVMET is for physical port only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374) memcpy(template, &lpfc_template_nvme,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) sizeof(*template));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378) template = &phba->vport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) shost = scsi_host_alloc(template, sizeof(struct lpfc_vport));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382) if (!shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385) vport = (struct lpfc_vport *) shost->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386) vport->phba = phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387) vport->load_flag |= FC_LOADING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388) vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389) vport->fc_rscn_flush = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390) lpfc_get_vport_cfgparam(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392) /* Adjust value in vport */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393) vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395) shost->unique_id = instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396) shost->max_id = LPFC_MAX_TARGET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397) shost->max_lun = vport->cfg_max_luns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398) shost->this_id = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) shost->max_cmd_len = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401) if (phba->sli_rev == LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) if (!phba->cfg_fcp_mq_threshold ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406) shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) phba->cfg_fcp_mq_threshold);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409) shost->dma_boundary =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412) if (phba->cfg_xpsgl && !phba->nvmet_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413) shost->sg_tablesize = LPFC_MAX_SG_TABLESIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415) shost->sg_tablesize = phba->cfg_scsi_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) /* SLI-3 has a limited number of hardware queues (3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) * thus there is only one for FCP processing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420) shost->nr_hw_queues = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423) * Set initial can_queue value since 0 is no longer supported and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) * scsi_add_host will fail. This will be adjusted later based on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) * max xri value determined in hba setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) shost->can_queue = phba->cfg_hba_queue_depth - 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) if (dev != &phba->pcidev->dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429) shost->transportt = lpfc_vport_transport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430) vport->port_type = LPFC_NPIV_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) shost->transportt = lpfc_transport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433) vport->port_type = LPFC_PHYSICAL_PORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436) lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437) "9081 CreatePort TMPLATE type %x TBLsize %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438) "SEGcnt %d/%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439) vport->port_type, shost->sg_tablesize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442) /* Initialize all internally managed lists. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443) INIT_LIST_HEAD(&vport->fc_nodes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444) INIT_LIST_HEAD(&vport->rcv_buffer_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) spin_lock_init(&vport->work_port_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447) timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451) timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453) if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) lpfc_setup_bg(phba, shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456) error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) goto out_put_shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) spin_lock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461) list_add_tail(&vport->listentry, &phba->port_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) spin_unlock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) return vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465) out_put_shost:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466) scsi_host_put(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) * destroy_port - destroy an FC port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) * @vport: pointer to an lpfc virtual N_Port data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475) * This routine destroys a FC port from the upper layer protocol. All the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) * resources associated with the port are released.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479) destroy_port(struct lpfc_vport *vport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) struct lpfc_hba *phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) lpfc_debugfs_terminate(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485) fc_remove_host(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486) scsi_remove_host(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488) spin_lock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489) list_del_init(&vport->listentry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) spin_unlock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492) lpfc_cleanup(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497) * lpfc_get_instance - Get a unique integer ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) * This routine allocates a unique integer ID from lpfc_hba_index pool. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) * uses the kernel idr facility to perform the task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) * Return codes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) * instance - a unique integer ID allocated as the new instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504) * -1 - lpfc get instance failed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507) lpfc_get_instance(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511) ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512) return ret < 0 ? -1 : ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517) * @shost: pointer to SCSI host data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518) * @time: elapsed time of the scan in jiffies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) * This routine is called by the SCSI layer with a SCSI host to determine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521) * whether the scan host is finished.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523) * Note: there is no scan_start function as adapter initialization will have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524) * asynchronously kicked off the link initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527) * 0 - SCSI host scan is not over yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) * 1 - SCSI host scan is over.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533) struct lpfc_hba *phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) int stat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538) if (vport->load_flag & FC_UNLOADING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539) stat = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540) goto finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542) if (time >= msecs_to_jiffies(30 * 1000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) "0461 Scanning longer than 30 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545) "seconds. Continuing initialization\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546) stat = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547) goto finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549) if (time >= msecs_to_jiffies(15 * 1000) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) phba->link_state <= LPFC_LINK_DOWN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552) "0465 Link down longer than 15 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553) "seconds. Continuing initialization\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) stat = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555) goto finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) if (vport->port_state != LPFC_VPORT_READY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) goto finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) if (vport->num_disc_nodes || vport->fc_prli_sent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561) goto finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562) if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4563) goto finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4564) if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4565) goto finished;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4567) stat = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4569) finished:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4570) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4571) return stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4574) static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4575) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4576) struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4577) struct lpfc_hba *phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4579) fc_host_supported_speeds(shost) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4580) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4581) * Avoid reporting supported link speed for FCoE as it can't be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4582) * controlled via FCoE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4583) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4584) if (phba->hba_flag & HBA_FCOE_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4585) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4587) if (phba->lmt & LMT_128Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4588) fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4589) if (phba->lmt & LMT_64Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4590) fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4591) if (phba->lmt & LMT_32Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4592) fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4593) if (phba->lmt & LMT_16Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4594) fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4595) if (phba->lmt & LMT_10Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4596) fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4597) if (phba->lmt & LMT_8Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4598) fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4599) if (phba->lmt & LMT_4Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4600) fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4601) if (phba->lmt & LMT_2Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4602) fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4603) if (phba->lmt & LMT_1Gb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4604) fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4607) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4608) * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4609) * @shost: pointer to SCSI host data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4610) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4611) * This routine initializes a given SCSI host attributes on a FC port. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4612) * SCSI host can be either on top of a physical port or a virtual port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4613) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4614) void lpfc_host_attrib_init(struct Scsi_Host *shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4615) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4616) struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4617) struct lpfc_hba *phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4618) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4619) * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4620) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4622) fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4623) fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4624) fc_host_supported_classes(shost) = FC_COS_CLASS3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4626) memset(fc_host_supported_fc4s(shost), 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4627) sizeof(fc_host_supported_fc4s(shost)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4628) fc_host_supported_fc4s(shost)[2] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4629) fc_host_supported_fc4s(shost)[7] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4631) lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4632) sizeof fc_host_symbolic_name(shost));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4634) lpfc_host_supported_speeds_set(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4636) fc_host_maxframe_size(shost) =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4637) (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4638) (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4640) fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4642) /* This value is also unchanging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4643) memset(fc_host_active_fc4s(shost), 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4644) sizeof(fc_host_active_fc4s(shost)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4645) fc_host_active_fc4s(shost)[2] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4646) fc_host_active_fc4s(shost)[7] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4648) fc_host_max_npiv_vports(shost) = phba->max_vpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4649) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4650) vport->load_flag &= ~FC_LOADING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4651) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4654) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4655) * lpfc_stop_port_s3 - Stop SLI3 device port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4656) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4657) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4658) * This routine is invoked to stop an SLI3 device port, it stops the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4659) * from generating interrupts and stops the device driver's timers for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4660) * device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4661) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4662) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4663) lpfc_stop_port_s3(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4664) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4665) /* Clear all interrupt enable conditions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4666) writel(0, phba->HCregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4667) readl(phba->HCregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4668) /* Clear all pending interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4669) writel(0xffffffff, phba->HAregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4670) readl(phba->HAregaddr); /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4672) /* Reset some HBA SLI setup states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4673) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4674) phba->pport->work_port_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4677) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4678) * lpfc_stop_port_s4 - Stop SLI4 device port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4679) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4680) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4681) * This routine is invoked to stop an SLI4 device port, it stops the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4682) * from generating interrupts and stops the device driver's timers for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4683) * device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4684) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4685) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4686) lpfc_stop_port_s4(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4688) /* Reset some HBA SLI4 setup states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4689) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4690) if (phba->pport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4691) phba->pport->work_port_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4692) phba->sli4_hba.intr_enable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4695) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4696) * lpfc_stop_port - Wrapper function for stopping hba port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4697) * @phba: Pointer to HBA context object.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4698) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4699) * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4700) * the API jump table function pointer from the lpfc_hba struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4701) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4702) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4703) lpfc_stop_port(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4704) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4705) phba->lpfc_stop_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4707) if (phba->wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4708) flush_workqueue(phba->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4711) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4712) * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4713) * @phba: Pointer to hba for which this call is being executed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4714) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4715) * This routine starts the timer waiting for the FCF rediscovery to complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4716) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4717) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4718) lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4719) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4720) unsigned long fcf_redisc_wait_tmo =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4721) (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4722) /* Start fcf rediscovery wait period timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4723) mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4724) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4725) /* Allow action to new fcf asynchronous event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4726) phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4727) /* Mark the FCF rediscovery pending state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4728) phba->fcf.fcf_flag |= FCF_REDISC_PEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4729) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4732) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4733) * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4734) * @t: Timer context used to obtain the pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4735) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4736) * This routine is invoked when waiting for FCF table rediscover has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4737) * timed out. If new FCF record(s) has (have) been discovered during the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4738) * wait period, a new FCF event shall be added to the FCOE async event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4739) * list, and then worker thread shall be waked up for processing from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4740) * worker thread context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4741) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4742) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4743) lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4744) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4745) struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4747) /* Don't send FCF rediscovery event if timer cancelled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4748) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4749) if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4750) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4751) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4753) /* Clear FCF rediscovery timer pending flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4754) phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4755) /* FCF rediscovery event to worker thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4756) phba->fcf.fcf_flag |= FCF_REDISC_EVT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4757) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4758) lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4759) "2776 FCF rediscover quiescent timer expired\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4760) /* wake up worker thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4761) lpfc_worker_wake_up(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4764) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4765) * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4766) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4767) * @acqe_link: pointer to the async link completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4768) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4769) * This routine is to parse the SLI4 link-attention link fault code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4770) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4771) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4772) lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4773) struct lpfc_acqe_link *acqe_link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4774) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4775) switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4776) case LPFC_ASYNC_LINK_FAULT_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4777) case LPFC_ASYNC_LINK_FAULT_LOCAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4778) case LPFC_ASYNC_LINK_FAULT_REMOTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4779) case LPFC_ASYNC_LINK_FAULT_LR_LRR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4780) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4781) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4782) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4783) "0398 Unknown link fault code: x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4784) bf_get(lpfc_acqe_link_fault, acqe_link));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4785) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4789) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4790) * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4791) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4792) * @acqe_link: pointer to the async link completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4793) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4794) * This routine is to parse the SLI4 link attention type and translate it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4795) * into the base driver's link attention type coding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4796) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4797) * Return: Link attention type in terms of base driver's coding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4798) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4799) static uint8_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4800) lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4801) struct lpfc_acqe_link *acqe_link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4802) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4803) uint8_t att_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4805) switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4806) case LPFC_ASYNC_LINK_STATUS_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4807) case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4808) att_type = LPFC_ATT_LINK_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4809) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4810) case LPFC_ASYNC_LINK_STATUS_UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4811) /* Ignore physical link up events - wait for logical link up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4812) att_type = LPFC_ATT_RESERVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4813) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4814) case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4815) att_type = LPFC_ATT_LINK_UP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4816) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4817) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4818) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4819) "0399 Invalid link attention type: x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4820) bf_get(lpfc_acqe_link_status, acqe_link));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4821) att_type = LPFC_ATT_RESERVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4822) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4824) return att_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4827) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4828) * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4829) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4830) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4831) * This routine is to get an SLI3 FC port's link speed in Mbps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4832) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4833) * Return: link speed in terms of Mbps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4834) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4835) uint32_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4836) lpfc_sli_port_speed_get(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4837) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4838) uint32_t link_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4840) if (!lpfc_is_link_up(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4841) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4843) if (phba->sli_rev <= LPFC_SLI_REV3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4844) switch (phba->fc_linkspeed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4845) case LPFC_LINK_SPEED_1GHZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4846) link_speed = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4847) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4848) case LPFC_LINK_SPEED_2GHZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4849) link_speed = 2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4850) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4851) case LPFC_LINK_SPEED_4GHZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4852) link_speed = 4000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4853) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4854) case LPFC_LINK_SPEED_8GHZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4855) link_speed = 8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4856) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4857) case LPFC_LINK_SPEED_10GHZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4858) link_speed = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4859) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4860) case LPFC_LINK_SPEED_16GHZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4861) link_speed = 16000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4862) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4863) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4864) link_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4866) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4867) if (phba->sli4_hba.link_state.logical_speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4868) link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4869) phba->sli4_hba.link_state.logical_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4870) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4871) link_speed = phba->sli4_hba.link_state.speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4873) return link_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4876) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4877) * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4878) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4879) * @evt_code: asynchronous event code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4880) * @speed_code: asynchronous event link speed code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4881) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4882) * This routine is to parse the giving SLI4 async event link speed code into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4883) * value of Mbps for the link speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4884) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4885) * Return: link speed in terms of Mbps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4886) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4887) static uint32_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4888) lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4889) uint8_t speed_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4890) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4891) uint32_t port_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4893) switch (evt_code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4894) case LPFC_TRAILER_CODE_LINK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4895) switch (speed_code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4896) case LPFC_ASYNC_LINK_SPEED_ZERO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4897) port_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4898) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4899) case LPFC_ASYNC_LINK_SPEED_10MBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4900) port_speed = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4901) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4902) case LPFC_ASYNC_LINK_SPEED_100MBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4903) port_speed = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4904) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4905) case LPFC_ASYNC_LINK_SPEED_1GBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4906) port_speed = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4907) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4908) case LPFC_ASYNC_LINK_SPEED_10GBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4909) port_speed = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4910) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4911) case LPFC_ASYNC_LINK_SPEED_20GBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4912) port_speed = 20000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4913) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4914) case LPFC_ASYNC_LINK_SPEED_25GBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4915) port_speed = 25000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4916) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4917) case LPFC_ASYNC_LINK_SPEED_40GBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4918) port_speed = 40000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4919) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4920) case LPFC_ASYNC_LINK_SPEED_100GBPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4921) port_speed = 100000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4922) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4923) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4924) port_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4926) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4927) case LPFC_TRAILER_CODE_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4928) switch (speed_code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4929) case LPFC_FC_LA_SPEED_UNKNOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4930) port_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4931) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4932) case LPFC_FC_LA_SPEED_1G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4933) port_speed = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4934) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4935) case LPFC_FC_LA_SPEED_2G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4936) port_speed = 2000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4937) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4938) case LPFC_FC_LA_SPEED_4G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4939) port_speed = 4000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4940) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4941) case LPFC_FC_LA_SPEED_8G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4942) port_speed = 8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4943) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4944) case LPFC_FC_LA_SPEED_10G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4945) port_speed = 10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4946) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4947) case LPFC_FC_LA_SPEED_16G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4948) port_speed = 16000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4949) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4950) case LPFC_FC_LA_SPEED_32G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4951) port_speed = 32000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4952) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4953) case LPFC_FC_LA_SPEED_64G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4954) port_speed = 64000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4955) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4956) case LPFC_FC_LA_SPEED_128G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4957) port_speed = 128000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4958) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4959) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4960) port_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4962) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4963) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4964) port_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4966) return port_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4967) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4969) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4970) * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4971) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4972) * @acqe_link: pointer to the async link completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4973) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4974) * This routine is to handle the SLI4 asynchronous FCoE link event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4975) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4976) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4977) lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4978) struct lpfc_acqe_link *acqe_link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4979) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4980) struct lpfc_dmabuf *mp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4981) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4982) MAILBOX_t *mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4983) struct lpfc_mbx_read_top *la;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4984) uint8_t att_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4985) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4987) att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4988) if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4989) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4990) phba->fcoe_eventtag = acqe_link->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4991) pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4992) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4993) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4994) "0395 The mboxq allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4995) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4997) mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4998) if (!mp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4999) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5000) "0396 The lpfc_dmabuf allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5001) goto out_free_pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5003) mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5004) if (!mp->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5005) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5006) "0397 The mbuf allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5007) goto out_free_dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5008) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5010) /* Cleanup any outstanding ELS commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5011) lpfc_els_flush_all_cmd(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5013) /* Block ELS IOCBs until we have done process link event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5014) phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5016) /* Update link event statistics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5017) phba->sli.slistat.link_event++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5019) /* Create lpfc_handle_latt mailbox command from link ACQE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5020) lpfc_read_topology(phba, pmb, mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5021) pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5022) pmb->vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5024) /* Keep the link status for extra SLI4 state machine reference */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5025) phba->sli4_hba.link_state.speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5026) lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5027) bf_get(lpfc_acqe_link_speed, acqe_link));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5028) phba->sli4_hba.link_state.duplex =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5029) bf_get(lpfc_acqe_link_duplex, acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5030) phba->sli4_hba.link_state.status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5031) bf_get(lpfc_acqe_link_status, acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5032) phba->sli4_hba.link_state.type =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5033) bf_get(lpfc_acqe_link_type, acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5034) phba->sli4_hba.link_state.number =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5035) bf_get(lpfc_acqe_link_number, acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5036) phba->sli4_hba.link_state.fault =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5037) bf_get(lpfc_acqe_link_fault, acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5038) phba->sli4_hba.link_state.logical_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5039) bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5041) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5042) "2900 Async FC/FCoE Link event - Speed:%dGBit "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5043) "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5044) "Logical speed:%dMbps Fault:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5045) phba->sli4_hba.link_state.speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5046) phba->sli4_hba.link_state.topology,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5047) phba->sli4_hba.link_state.status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5048) phba->sli4_hba.link_state.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5049) phba->sli4_hba.link_state.number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5050) phba->sli4_hba.link_state.logical_speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5051) phba->sli4_hba.link_state.fault);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5052) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5053) * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5054) * topology info. Note: Optional for non FC-AL ports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5055) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5056) if (!(phba->hba_flag & HBA_FCOE_MODE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5057) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5058) if (rc == MBX_NOT_FINISHED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5059) goto out_free_dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5060) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5061) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5062) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5063) * For FCoE Mode: fill in all the topology information we need and call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5064) * the READ_TOPOLOGY completion routine to continue without actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5065) * sending the READ_TOPOLOGY mailbox command to the port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5066) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5067) /* Initialize completion status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5068) mb = &pmb->u.mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5069) mb->mbxStatus = MBX_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5071) /* Parse port fault information field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5072) lpfc_sli4_parse_latt_fault(phba, acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5074) /* Parse and translate link attention fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5075) la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5076) la->eventTag = acqe_link->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5077) bf_set(lpfc_mbx_read_top_att_type, la, att_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5078) bf_set(lpfc_mbx_read_top_link_spd, la,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5079) (bf_get(lpfc_acqe_link_speed, acqe_link)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5081) /* Fake the the following irrelvant fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5082) bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5083) bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5084) bf_set(lpfc_mbx_read_top_il, la, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5085) bf_set(lpfc_mbx_read_top_pb, la, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5086) bf_set(lpfc_mbx_read_top_fa, la, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5087) bf_set(lpfc_mbx_read_top_mm, la, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5089) /* Invoke the lpfc_handle_latt mailbox command callback function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5090) lpfc_mbx_cmpl_read_topology(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5092) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5094) out_free_dmabuf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5095) kfree(mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5096) out_free_pmb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5097) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5098) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5100) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5101) * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5102) * topology.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5103) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5104) * @speed_code: asynchronous event link speed code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5105) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5106) * This routine is to parse the giving SLI4 async event link speed code into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5107) * value of Read topology link speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5109) * Return: link speed in terms of Read topology.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5110) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5111) static uint8_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5112) lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5114) uint8_t port_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5116) switch (speed_code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5117) case LPFC_FC_LA_SPEED_1G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5118) port_speed = LPFC_LINK_SPEED_1GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5119) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5120) case LPFC_FC_LA_SPEED_2G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5121) port_speed = LPFC_LINK_SPEED_2GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5122) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5123) case LPFC_FC_LA_SPEED_4G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5124) port_speed = LPFC_LINK_SPEED_4GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5125) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5126) case LPFC_FC_LA_SPEED_8G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5127) port_speed = LPFC_LINK_SPEED_8GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5128) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5129) case LPFC_FC_LA_SPEED_16G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5130) port_speed = LPFC_LINK_SPEED_16GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5131) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5132) case LPFC_FC_LA_SPEED_32G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5133) port_speed = LPFC_LINK_SPEED_32GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5134) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5135) case LPFC_FC_LA_SPEED_64G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5136) port_speed = LPFC_LINK_SPEED_64GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5137) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5138) case LPFC_FC_LA_SPEED_128G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5139) port_speed = LPFC_LINK_SPEED_128GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5140) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5141) case LPFC_FC_LA_SPEED_256G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5142) port_speed = LPFC_LINK_SPEED_256GHZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5143) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5144) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5145) port_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5146) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5149) return port_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5152) #define trunk_link_status(__idx)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5153) bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5154) ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5155) "Link up" : "Link down") : "NA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5156) /* Did port __idx reported an error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5157) #define trunk_port_fault(__idx)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5158) bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5159) (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5161) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5162) lpfc_update_trunk_link_status(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5163) struct lpfc_acqe_fc_la *acqe_fc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5165) uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5166) uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5168) phba->sli4_hba.link_state.speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5169) lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5170) bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5172) phba->sli4_hba.link_state.logical_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5173) bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5174) /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5175) phba->fc_linkspeed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5176) lpfc_async_link_speed_to_read_top(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5177) phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5178) bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5180) if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5181) phba->trunk_link.link0.state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5182) bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5183) ? LPFC_LINK_UP : LPFC_LINK_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5184) phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5186) if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5187) phba->trunk_link.link1.state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5188) bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5189) ? LPFC_LINK_UP : LPFC_LINK_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5190) phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5192) if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5193) phba->trunk_link.link2.state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5194) bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5195) ? LPFC_LINK_UP : LPFC_LINK_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5196) phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5198) if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5199) phba->trunk_link.link3.state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5200) bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5201) ? LPFC_LINK_UP : LPFC_LINK_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5202) phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5205) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5206) "2910 Async FC Trunking Event - Speed:%d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5207) "\tLogical speed:%d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5208) "port0: %s port1: %s port2: %s port3: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5209) phba->sli4_hba.link_state.speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5210) phba->sli4_hba.link_state.logical_speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5211) trunk_link_status(0), trunk_link_status(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5212) trunk_link_status(2), trunk_link_status(3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5214) if (port_fault)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5215) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5216) "3202 trunk error:0x%x (%s) seen on port0:%s "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5217) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5218) * SLI-4: We have only 0xA error codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5219) * defined as of now. print an appropriate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5220) * message in case driver needs to be updated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5221) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5222) "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5223) "UNDEFINED. update driver." : trunk_errmsg[err],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5224) trunk_port_fault(0), trunk_port_fault(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5225) trunk_port_fault(2), trunk_port_fault(3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5229) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5230) * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5231) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5232) * @acqe_fc: pointer to the async fc completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5233) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5234) * This routine is to handle the SLI4 asynchronous FC event. It will simply log
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5235) * that the event was received and then issue a read_topology mailbox command so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5236) * that the rest of the driver will treat it the same as SLI3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5237) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5238) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5239) lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5240) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5241) struct lpfc_dmabuf *mp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5242) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5243) MAILBOX_t *mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5244) struct lpfc_mbx_read_top *la;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5245) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5247) if (bf_get(lpfc_trailer_type, acqe_fc) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5248) LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5249) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5250) "2895 Non FC link Event detected.(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5251) bf_get(lpfc_trailer_type, acqe_fc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5252) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5255) if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5256) LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5257) lpfc_update_trunk_link_status(phba, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5258) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5261) /* Keep the link status for extra SLI4 state machine reference */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5262) phba->sli4_hba.link_state.speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5263) lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5264) bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5265) phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5266) phba->sli4_hba.link_state.topology =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5267) bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5268) phba->sli4_hba.link_state.status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5269) bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5270) phba->sli4_hba.link_state.type =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5271) bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5272) phba->sli4_hba.link_state.number =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5273) bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5274) phba->sli4_hba.link_state.fault =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5275) bf_get(lpfc_acqe_link_fault, acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5277) if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5278) LPFC_FC_LA_TYPE_LINK_DOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5279) phba->sli4_hba.link_state.logical_speed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5280) else if (!phba->sli4_hba.conf_trunk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5281) phba->sli4_hba.link_state.logical_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5282) bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5284) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5285) "2896 Async FC event - Speed:%dGBaud Topology:x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5286) "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5287) "%dMbps Fault:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5288) phba->sli4_hba.link_state.speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5289) phba->sli4_hba.link_state.topology,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5290) phba->sli4_hba.link_state.status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5291) phba->sli4_hba.link_state.type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5292) phba->sli4_hba.link_state.number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5293) phba->sli4_hba.link_state.logical_speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5294) phba->sli4_hba.link_state.fault);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5295) pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5296) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5297) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5298) "2897 The mboxq allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5299) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5301) mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5302) if (!mp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5303) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5304) "2898 The lpfc_dmabuf allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5305) goto out_free_pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5307) mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5308) if (!mp->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5309) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5310) "2899 The mbuf allocation failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5311) goto out_free_dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5314) /* Cleanup any outstanding ELS commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5315) lpfc_els_flush_all_cmd(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5317) /* Block ELS IOCBs until we have done process link event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5318) phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5320) /* Update link event statistics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5321) phba->sli.slistat.link_event++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5323) /* Create lpfc_handle_latt mailbox command from link ACQE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5324) lpfc_read_topology(phba, pmb, mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5325) pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5326) pmb->vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5328) if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5329) phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5331) switch (phba->sli4_hba.link_state.status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5332) case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5333) phba->link_flag |= LS_MDS_LINK_DOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5335) case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5336) phba->link_flag |= LS_MDS_LOOPBACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5337) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5338) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5342) /* Initialize completion status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5343) mb = &pmb->u.mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5344) mb->mbxStatus = MBX_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5346) /* Parse port fault information field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5347) lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5349) /* Parse and translate link attention fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5350) la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5351) la->eventTag = acqe_fc->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5353) if (phba->sli4_hba.link_state.status ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5354) LPFC_FC_LA_TYPE_UNEXP_WWPN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5355) bf_set(lpfc_mbx_read_top_att_type, la,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5356) LPFC_FC_LA_TYPE_UNEXP_WWPN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5357) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5358) bf_set(lpfc_mbx_read_top_att_type, la,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5359) LPFC_FC_LA_TYPE_LINK_DOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5361) /* Invoke the mailbox command callback function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5362) lpfc_mbx_cmpl_read_topology(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5364) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5367) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5368) if (rc == MBX_NOT_FINISHED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5369) goto out_free_dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5370) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5372) out_free_dmabuf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5373) kfree(mp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5374) out_free_pmb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5375) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5378) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5379) * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5380) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5381) * @acqe_sli: pointer to the async SLI completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5382) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5383) * This routine is to handle the SLI4 asynchronous SLI events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5384) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5385) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5386) lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5388) char port_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5389) char message[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5390) uint8_t status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5391) uint8_t evt_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5392) uint8_t operational = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5393) struct temp_event temp_event_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5394) struct lpfc_acqe_misconfigured_event *misconfigured;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5395) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5396) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5397) int rc, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5399) evt_type = bf_get(lpfc_trailer_type, acqe_sli);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5401) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5402) "2901 Async SLI event - Type:%d, Event Data: x%08x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5403) "x%08x x%08x x%08x\n", evt_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5404) acqe_sli->event_data1, acqe_sli->event_data2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5405) acqe_sli->reserved, acqe_sli->trailer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5407) port_name = phba->Port[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5408) if (port_name == 0x00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5409) port_name = '?'; /* get port name is empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5411) switch (evt_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5412) case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5413) temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5414) temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5415) temp_event_data.data = (uint32_t)acqe_sli->event_data1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5417) lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5418) "3190 Over Temperature:%d Celsius- Port Name %c\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5419) acqe_sli->event_data1, port_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5421) phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5422) shost = lpfc_shost_from_vport(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5423) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5424) sizeof(temp_event_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5425) (char *)&temp_event_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5426) SCSI_NL_VID_TYPE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5427) | PCI_VENDOR_ID_EMULEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5428) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5429) case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5430) temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5431) temp_event_data.event_code = LPFC_NORMAL_TEMP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5432) temp_event_data.data = (uint32_t)acqe_sli->event_data1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5434) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5435) "3191 Normal Temperature:%d Celsius - Port Name %c\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5436) acqe_sli->event_data1, port_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5438) shost = lpfc_shost_from_vport(phba->pport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5439) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5440) sizeof(temp_event_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5441) (char *)&temp_event_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5442) SCSI_NL_VID_TYPE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5443) | PCI_VENDOR_ID_EMULEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5444) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5445) case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5446) misconfigured = (struct lpfc_acqe_misconfigured_event *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5447) &acqe_sli->event_data1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5449) /* fetch the status for this port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5450) switch (phba->sli4_hba.lnk_info.lnk_no) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5451) case LPFC_LINK_NUMBER_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5452) status = bf_get(lpfc_sli_misconfigured_port0_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5453) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5454) operational = bf_get(lpfc_sli_misconfigured_port0_op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5455) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5456) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5457) case LPFC_LINK_NUMBER_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5458) status = bf_get(lpfc_sli_misconfigured_port1_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5459) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5460) operational = bf_get(lpfc_sli_misconfigured_port1_op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5461) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5462) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5463) case LPFC_LINK_NUMBER_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5464) status = bf_get(lpfc_sli_misconfigured_port2_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5465) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5466) operational = bf_get(lpfc_sli_misconfigured_port2_op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5467) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5468) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5469) case LPFC_LINK_NUMBER_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5470) status = bf_get(lpfc_sli_misconfigured_port3_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5471) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5472) operational = bf_get(lpfc_sli_misconfigured_port3_op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5473) &misconfigured->theEvent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5474) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5475) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5476) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5477) "3296 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5478) "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5479) "event: Invalid link %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5480) phba->sli4_hba.lnk_info.lnk_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5481) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5484) /* Skip if optic state unchanged */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5485) if (phba->sli4_hba.lnk_info.optic_state == status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5486) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5488) switch (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5489) case LPFC_SLI_EVENT_STATUS_VALID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5490) sprintf(message, "Physical Link is functional");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5491) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5492) case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5493) sprintf(message, "Optics faulted/incorrectly "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5494) "installed/not installed - Reseat optics, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5495) "if issue not resolved, replace.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5496) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5497) case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5498) sprintf(message,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5499) "Optics of two types installed - Remove one "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5500) "optic or install matching pair of optics.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5501) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5502) case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5503) sprintf(message, "Incompatible optics - Replace with "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5504) "compatible optics for card to function.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5505) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5506) case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5507) sprintf(message, "Unqualified optics - Replace with "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5508) "Avago optics for Warranty and Technical "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5509) "Support - Link is%s operational",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5510) (operational) ? " not" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5511) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5512) case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5513) sprintf(message, "Uncertified optics - Replace with "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5514) "Avago-certified optics to enable link "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5515) "operation - Link is%s operational",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5516) (operational) ? " not" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5517) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5518) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5519) /* firmware is reporting a status we don't know about */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5520) sprintf(message, "Unknown event status x%02x", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5521) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5524) /* Issue READ_CONFIG mbox command to refresh supported speeds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5525) rc = lpfc_sli4_read_config(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5526) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5527) phba->lmt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5528) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5529) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5530) "3194 Unable to retrieve supported "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5531) "speeds, rc = 0x%x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5533) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5534) if (vports != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5535) for (i = 0; i <= phba->max_vports && vports[i] != NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5536) i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5537) shost = lpfc_shost_from_vport(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5538) lpfc_host_supported_speeds_set(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5541) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5543) phba->sli4_hba.lnk_info.optic_state = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5544) lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5545) "3176 Port Name %c %s\n", port_name, message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5546) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5547) case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5548) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5549) "3192 Remote DPort Test Initiated - "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5550) "Event Data1:x%08x Event Data2: x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5551) acqe_sli->event_data1, acqe_sli->event_data2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5552) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5553) case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5554) /* Misconfigured WWN. Reports that the SLI Port is configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5555) * to use FA-WWN, but the attached device doesn’t support it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5556) * No driver action is required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5557) * Event Data1 - N.A, Event Data2 - N.A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5558) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5559) lpfc_log_msg(phba, KERN_WARNING, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5560) "2699 Misconfigured FA-WWN - Attached device does "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5561) "not support FA-WWN\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5562) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5563) case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5564) /* EEPROM failure. No driver action is required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5565) lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5566) "2518 EEPROM failure - "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5567) "Event Data1: x%08x Event Data2: x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5568) acqe_sli->event_data1, acqe_sli->event_data2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5569) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5570) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5571) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5572) "3193 Unrecognized SLI event, type: 0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5573) evt_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5574) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5578) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5579) * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5580) * @vport: pointer to vport data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5581) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5582) * This routine is to perform Clear Virtual Link (CVL) on a vport in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5583) * response to a CVL event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5584) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5585) * Return the pointer to the ndlp with the vport if successful, otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5586) * return NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5587) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5588) static struct lpfc_nodelist *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5589) lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5591) struct lpfc_nodelist *ndlp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5592) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5593) struct lpfc_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5595) if (!vport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5596) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5597) phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5598) if (!phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5599) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5600) ndlp = lpfc_findnode_did(vport, Fabric_DID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5601) if (!ndlp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5602) /* Cannot find existing Fabric ndlp, so allocate a new one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5603) ndlp = lpfc_nlp_init(vport, Fabric_DID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5604) if (!ndlp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5605) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5606) /* Set the node type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5607) ndlp->nlp_type |= NLP_FABRIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5608) /* Put ndlp onto node list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5609) lpfc_enqueue_node(vport, ndlp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5610) } else if (!NLP_CHK_NODE_ACT(ndlp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5611) /* re-setup ndlp without removing from node list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5612) ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_UNUSED_NODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5613) if (!ndlp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5614) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5616) if ((phba->pport->port_state < LPFC_FLOGI) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5617) (phba->pport->port_state != LPFC_VPORT_FAILED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5618) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5619) /* If virtual link is not yet instantiated ignore CVL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5620) if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5621) && (vport->port_state != LPFC_VPORT_FAILED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5622) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5623) shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5624) if (!shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5625) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5626) lpfc_linkdown_port(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5627) lpfc_cleanup_pending_mbox(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5628) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5629) vport->fc_flag |= FC_VPORT_CVL_RCVD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5630) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5632) return ndlp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5635) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5636) * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5637) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5638) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5639) * This routine is to perform Clear Virtual Link (CVL) on all vports in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5640) * response to a FCF dead event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5641) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5642) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5643) lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5644) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5645) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5646) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5648) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5649) if (vports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5650) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5651) lpfc_sli4_perform_vport_cvl(vports[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5652) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5655) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5656) * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5657) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5658) * @acqe_fip: pointer to the async fcoe completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5659) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5660) * This routine is to handle the SLI4 asynchronous fcoe event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5661) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5662) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5663) lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5664) struct lpfc_acqe_fip *acqe_fip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5665) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5666) uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5667) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5668) struct lpfc_vport *vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5669) struct lpfc_nodelist *ndlp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5670) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5671) int active_vlink_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5672) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5673) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5675) phba->fc_eventTag = acqe_fip->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5676) phba->fcoe_eventtag = acqe_fip->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5677) switch (event_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5678) case LPFC_FIP_EVENT_TYPE_NEW_FCF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5679) case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5680) if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5681) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5682) "2546 New FCF event, evt_tag:x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5683) "index:x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5684) acqe_fip->event_tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5685) acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5686) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5687) lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5688) LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5689) "2788 FCF param modified event, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5690) "evt_tag:x%x, index:x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5691) acqe_fip->event_tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5692) acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5693) if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5694) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5695) * During period of FCF discovery, read the FCF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5696) * table record indexed by the event to update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5697) * FCF roundrobin failover eligible FCF bmask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5698) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5699) lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5700) LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5701) "2779 Read FCF (x%x) for updating "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5702) "roundrobin FCF failover bmask\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5703) acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5704) rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5707) /* If the FCF discovery is in progress, do nothing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5708) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5709) if (phba->hba_flag & FCF_TS_INPROG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5710) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5711) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5713) /* If fast FCF failover rescan event is pending, do nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5714) if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5715) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5716) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5719) /* If the FCF has been in discovered state, do nothing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5720) if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5721) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5722) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5724) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5726) /* Otherwise, scan the entire FCF table and re-discover SAN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5727) lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5728) "2770 Start FCF table scan per async FCF "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5729) "event, evt_tag:x%x, index:x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5730) acqe_fip->event_tag, acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5731) rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5732) LPFC_FCOE_FCF_GET_FIRST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5733) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5734) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5735) "2547 Issue FCF scan read FCF mailbox "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5736) "command failed (x%x)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5737) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5739) case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5740) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5741) "2548 FCF Table full count 0x%x tag 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5742) bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5743) acqe_fip->event_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5744) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5746) case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5747) phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5748) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5749) "2549 FCF (x%x) disconnected from network, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5750) "tag:x%x\n", acqe_fip->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5751) acqe_fip->event_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5752) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5753) * If we are in the middle of FCF failover process, clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5754) * the corresponding FCF bit in the roundrobin bitmap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5755) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5756) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5757) if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5758) (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5759) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5760) /* Update FLOGI FCF failover eligible FCF bmask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5761) lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5762) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5764) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5766) /* If the event is not for currently used fcf do nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5767) if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5768) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5770) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5771) * Otherwise, request the port to rediscover the entire FCF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5772) * table for a fast recovery from case that the current FCF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5773) * is no longer valid as we are not in the middle of FCF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5774) * failover process already.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5775) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5776) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5777) /* Mark the fast failover process in progress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5778) phba->fcf.fcf_flag |= FCF_DEAD_DISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5779) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5781) lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5782) "2771 Start FCF fast failover process due to "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5783) "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5784) "\n", acqe_fip->event_tag, acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5785) rc = lpfc_sli4_redisc_fcf_table(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5786) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5787) lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5788) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5789) "2772 Issue FCF rediscover mailbox "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5790) "command failed, fail through to FCF "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5791) "dead event\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5792) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5793) phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5794) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5795) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5796) * Last resort will fail over by treating this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5797) * as a link down to FCF registration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5798) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5799) lpfc_sli4_fcf_dead_failthrough(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5800) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5801) /* Reset FCF roundrobin bmask for new discovery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5802) lpfc_sli4_clear_fcf_rr_bmask(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5803) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5804) * Handling fast FCF failover to a DEAD FCF event is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5805) * considered equalivant to receiving CVL to all vports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5806) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5807) lpfc_sli4_perform_all_vport_cvl(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5809) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5810) case LPFC_FIP_EVENT_TYPE_CVL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5811) phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5812) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5813) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5814) "2718 Clear Virtual Link Received for VPI 0x%x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5815) " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5817) vport = lpfc_find_vport_by_vpid(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5818) acqe_fip->index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5819) ndlp = lpfc_sli4_perform_vport_cvl(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5820) if (!ndlp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5821) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5822) active_vlink_present = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5824) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5825) if (vports) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5826) for (i = 0; i <= phba->max_vports && vports[i] != NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5827) i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5828) if ((!(vports[i]->fc_flag &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5829) FC_VPORT_CVL_RCVD)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5830) (vports[i]->port_state > LPFC_FDISC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5831) active_vlink_present = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5832) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5835) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5836) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5838) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5839) * Don't re-instantiate if vport is marked for deletion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5840) * If we are here first then vport_delete is going to wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5841) * for discovery to complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5842) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5843) if (!(vport->load_flag & FC_UNLOADING) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5844) active_vlink_present) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5845) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5846) * If there are other active VLinks present,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5847) * re-instantiate the Vlink using FDISC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5848) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5849) mod_timer(&ndlp->nlp_delayfunc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5850) jiffies + msecs_to_jiffies(1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5851) shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5852) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5853) ndlp->nlp_flag |= NLP_DELAY_TMO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5854) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5855) ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5856) vport->port_state = LPFC_FDISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5857) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5858) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5859) * Otherwise, we request port to rediscover
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5860) * the entire FCF table for a fast recovery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5861) * from possible case that the current FCF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5862) * is no longer valid if we are not already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5863) * in the FCF failover process.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5864) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5865) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5866) if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5867) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5868) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5870) /* Mark the fast failover process in progress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5871) phba->fcf.fcf_flag |= FCF_ACVL_DISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5872) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5873) lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5874) LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5875) "2773 Start FCF failover per CVL, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5876) "evt_tag:x%x\n", acqe_fip->event_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5877) rc = lpfc_sli4_redisc_fcf_table(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5878) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5879) lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5880) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5881) "2774 Issue FCF rediscover "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5882) "mailbox command failed, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5883) "through to CVL event\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5884) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5885) phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5886) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5887) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5888) * Last resort will be re-try on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5889) * the current registered FCF entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5890) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5891) lpfc_retry_pport_discovery(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5892) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5893) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5894) * Reset FCF roundrobin bmask for new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5895) * discovery.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5896) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5897) lpfc_sli4_clear_fcf_rr_bmask(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5899) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5900) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5901) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5902) "0288 Unknown FCoE event type 0x%x event tag "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5903) "0x%x\n", event_type, acqe_fip->event_tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5904) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5908) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5909) * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5910) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5911) * @acqe_dcbx: pointer to the async dcbx completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5912) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5913) * This routine is to handle the SLI4 asynchronous dcbx event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5914) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5915) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5916) lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5917) struct lpfc_acqe_dcbx *acqe_dcbx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5918) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5919) phba->fc_eventTag = acqe_dcbx->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5920) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5921) "0290 The SLI4 DCBX asynchronous event is not "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5922) "handled yet\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5925) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5926) * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5927) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5928) * @acqe_grp5: pointer to the async grp5 completion queue entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5929) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5930) * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5931) * is an asynchronous notified of a logical link speed change. The Port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5932) * reports the logical link speed in units of 10Mbps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5933) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5934) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5935) lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5936) struct lpfc_acqe_grp5 *acqe_grp5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5937) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5938) uint16_t prev_ll_spd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5940) phba->fc_eventTag = acqe_grp5->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5941) phba->fcoe_eventtag = acqe_grp5->event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5942) prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5943) phba->sli4_hba.link_state.logical_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5944) (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5945) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5946) "2789 GRP5 Async Event: Updating logical link speed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5947) "from %dMbps to %dMbps\n", prev_ll_spd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5948) phba->sli4_hba.link_state.logical_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5951) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5952) * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5953) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5954) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5955) * This routine is invoked by the worker thread to process all the pending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5956) * SLI4 asynchronous events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5957) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5958) void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5959) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5960) struct lpfc_cq_event *cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5961) unsigned long iflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5963) /* First, declare the async event has been handled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5964) spin_lock_irqsave(&phba->hbalock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5965) phba->hba_flag &= ~ASYNC_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5966) spin_unlock_irqrestore(&phba->hbalock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5968) /* Now, handle all the async events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5969) spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5970) while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5971) list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5972) cq_event, struct lpfc_cq_event, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5973) spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5974) iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5976) /* Process the asynchronous event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5977) switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5978) case LPFC_TRAILER_CODE_LINK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5979) lpfc_sli4_async_link_evt(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5980) &cq_event->cqe.acqe_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5981) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5982) case LPFC_TRAILER_CODE_FCOE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5983) lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5984) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5985) case LPFC_TRAILER_CODE_DCBX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5986) lpfc_sli4_async_dcbx_evt(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5987) &cq_event->cqe.acqe_dcbx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5988) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5989) case LPFC_TRAILER_CODE_GRP5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5990) lpfc_sli4_async_grp5_evt(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5991) &cq_event->cqe.acqe_grp5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5992) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5993) case LPFC_TRAILER_CODE_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5994) lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5995) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5996) case LPFC_TRAILER_CODE_SLI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5997) lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5998) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5999) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6000) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6001) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6002) "1804 Invalid asynchronous event code: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6003) "x%x\n", bf_get(lpfc_trailer_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6004) &cq_event->cqe.mcqe_cmpl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6005) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6008) /* Free the completion event processed to the free pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6009) lpfc_sli4_cq_event_release(phba, cq_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6010) spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6012) spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6013) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6015) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6016) * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6017) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6018) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6019) * This routine is invoked by the worker thread to process FCF table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6020) * rediscovery pending completion event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6021) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6022) void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6024) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6026) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6027) /* Clear FCF rediscovery timeout event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6028) phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6029) /* Clear driver fast failover FCF record flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6030) phba->fcf.failover_rec.flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6031) /* Set state for FCF fast failover */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6032) phba->fcf.fcf_flag |= FCF_REDISC_FOV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6033) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6035) /* Scan FCF table from the first entry to re-discover SAN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6036) lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6037) "2777 Start post-quiescent FCF table scan\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6038) rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6039) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6040) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6041) "2747 Issue FCF scan read FCF mailbox "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6042) "command failed 0x%x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6043) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6045) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6046) * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6047) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6048) * @dev_grp: The HBA PCI-Device group number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6049) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6050) * This routine is invoked to set up the per HBA PCI-Device group function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6051) * API jump table entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6052) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6053) * Return: 0 if success, otherwise -ENODEV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6054) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6055) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6056) lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6057) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6058) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6060) /* Set up lpfc PCI-device group */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6061) phba->pci_dev_grp = dev_grp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6063) /* The LPFC_PCI_DEV_OC uses SLI4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6064) if (dev_grp == LPFC_PCI_DEV_OC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6065) phba->sli_rev = LPFC_SLI_REV4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6067) /* Set up device INIT API function jump table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6068) rc = lpfc_init_api_table_setup(phba, dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6069) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6070) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6071) /* Set up SCSI API function jump table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6072) rc = lpfc_scsi_api_table_setup(phba, dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6073) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6074) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6075) /* Set up SLI API function jump table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6076) rc = lpfc_sli_api_table_setup(phba, dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6077) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6078) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6079) /* Set up MBOX API function jump table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6080) rc = lpfc_mbox_api_table_setup(phba, dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6081) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6082) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6084) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6085) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6087) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6088) * lpfc_log_intr_mode - Log the active interrupt mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6089) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6090) * @intr_mode: active interrupt mode adopted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6091) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6092) * This routine it invoked to log the currently used active interrupt mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6093) * to the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6094) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6095) static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6096) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6097) switch (intr_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6098) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6099) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6100) "0470 Enable INTx interrupt mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6101) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6102) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6103) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6104) "0481 Enabled MSI interrupt mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6105) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6106) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6107) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6108) "0480 Enabled MSI-X interrupt mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6109) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6110) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6111) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6112) "0482 Illegal interrupt mode.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6113) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6115) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6118) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6119) * lpfc_enable_pci_dev - Enable a generic PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6120) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6121) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6122) * This routine is invoked to enable the PCI device that is common to all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6123) * PCI devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6124) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6125) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6126) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6127) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6128) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6129) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6130) lpfc_enable_pci_dev(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6132) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6134) /* Obtain PCI device reference */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6135) if (!phba->pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6136) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6137) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6138) pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6139) /* Enable PCI device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6140) if (pci_enable_device_mem(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6141) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6142) /* Request PCI resource for the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6143) if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6144) goto out_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6145) /* Set up device as PCI master and save state for EEH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6146) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6147) pci_try_set_mwi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6148) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6150) /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6151) if (pci_is_pcie(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6152) pdev->needs_freset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6154) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6156) out_disable_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6157) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6158) out_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6159) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6160) "1401 Failed to enable pci device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6161) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6164) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6165) * lpfc_disable_pci_dev - Disable a generic PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6166) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6167) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6168) * This routine is invoked to disable the PCI device that is common to all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6169) * PCI devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6170) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6171) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6172) lpfc_disable_pci_dev(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6174) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6176) /* Obtain PCI device reference */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6177) if (!phba->pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6178) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6179) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6180) pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6181) /* Release PCI resource and disable PCI device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6182) pci_release_mem_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6183) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6185) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6188) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6189) * lpfc_reset_hba - Reset a hba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6190) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6191) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6192) * This routine is invoked to reset a hba device. It brings the HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6193) * offline, performs a board restart, and then brings the board back
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6194) * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6195) * on outstanding mailbox commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6196) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6197) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6198) lpfc_reset_hba(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6200) /* If resets are disabled then set error state and return. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6201) if (!phba->cfg_enable_hba_reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6202) phba->link_state = LPFC_HBA_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6203) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6205) if (phba->sli.sli_flag & LPFC_SLI_ACTIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6206) lpfc_offline_prep(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6207) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6208) lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6209) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6210) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6211) lpfc_online(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6212) lpfc_unblock_mgmt_io(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6215) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6216) * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6217) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6218) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6219) * This function enables the PCI SR-IOV virtual functions to a physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6220) * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6221) * enable the number of virtual functions to the physical function. As
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6222) * not all devices support SR-IOV, the return code from the pci_enable_sriov()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6223) * API call does not considered as an error condition for most of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6224) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6225) uint16_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6226) lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6228) struct pci_dev *pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6229) uint16_t nr_virtfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6230) int pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6232) pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6233) if (pos == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6234) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6236) pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6237) return nr_virtfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6240) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6241) * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6242) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6243) * @nr_vfn: number of virtual functions to be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6245) * This function enables the PCI SR-IOV virtual functions to a physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6246) * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6247) * enable the number of virtual functions to the physical function. As
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6248) * not all devices support SR-IOV, the return code from the pci_enable_sriov()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6249) * API call does not considered as an error condition for most of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6250) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6251) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6252) lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6254) struct pci_dev *pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6255) uint16_t max_nr_vfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6256) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6258) max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6259) if (nr_vfn > max_nr_vfn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6260) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6261) "3057 Requested vfs (%d) greater than "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6262) "supported vfs (%d)", nr_vfn, max_nr_vfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6263) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6266) rc = pci_enable_sriov(pdev, nr_vfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6267) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6268) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6269) "2806 Failed to enable sriov on this device "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6270) "with vfn number nr_vf:%d, rc:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6271) nr_vfn, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6272) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6273) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6274) "2807 Successful enable sriov on this device "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6275) "with vfn number nr_vf:%d\n", nr_vfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6276) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6279) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6280) * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6281) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6282) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6283) * This routine is invoked to set up the driver internal resources before the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6284) * device specific resource setup to support the HBA device it attached to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6285) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6286) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6287) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6288) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6289) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6290) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6291) lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6293) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6295) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6296) * Driver resources common to all SLI revisions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6297) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6298) atomic_set(&phba->fast_event_count, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6299) atomic_set(&phba->dbg_log_idx, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6300) atomic_set(&phba->dbg_log_cnt, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6301) atomic_set(&phba->dbg_log_dmping, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6302) spin_lock_init(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6304) /* Initialize ndlp management spinlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6305) spin_lock_init(&phba->ndlp_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6307) /* Initialize port_list spinlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6308) spin_lock_init(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6309) INIT_LIST_HEAD(&phba->port_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6311) INIT_LIST_HEAD(&phba->work_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6312) init_waitqueue_head(&phba->wait_4_mlo_m_q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6314) /* Initialize the wait queue head for the kernel thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6315) init_waitqueue_head(&phba->work_waitq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6317) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6318) "1403 Protocols supported %s %s %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6319) ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6320) "SCSI" : " "),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6321) ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6322) "NVME" : " "),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6323) (phba->nvmet_support ? "NVMET" : " "));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6325) /* Initialize the IO buffer list used by driver for SLI3 SCSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6326) spin_lock_init(&phba->scsi_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6327) INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6328) spin_lock_init(&phba->scsi_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6329) INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6331) /* Initialize the fabric iocb list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6332) INIT_LIST_HEAD(&phba->fabric_iocb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6334) /* Initialize list to save ELS buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6335) INIT_LIST_HEAD(&phba->elsbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6337) /* Initialize FCF connection rec list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6338) INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6340) /* Initialize OAS configuration list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6341) spin_lock_init(&phba->devicelock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6342) INIT_LIST_HEAD(&phba->luns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6344) /* MBOX heartbeat timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6345) timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6346) /* Fabric block timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6347) timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6348) /* EA polling mode timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6349) timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6350) /* Heartbeat timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6351) timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6353) INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6355) INIT_DELAYED_WORK(&phba->idle_stat_delay_work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6356) lpfc_idle_stat_delay_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6358) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6361) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6362) * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6363) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6364) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6365) * This routine is invoked to set up the driver internal resources specific to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6366) * support the SLI-3 HBA device it attached to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6367) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6368) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6369) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6370) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6371) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6372) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6373) lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6375) int rc, entry_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6377) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6378) * Initialize timers used by driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6381) /* FCP polling mode timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6382) timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6384) /* Host attention work mask setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6385) phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6386) phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6388) /* Get all the module params for configuring this host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6389) lpfc_get_cfgparam(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6390) /* Set up phase-1 common device driver resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6392) rc = lpfc_setup_driver_resource_phase1(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6393) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6394) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6396) if (phba->pcidev->device == PCI_DEVICE_ID_HORNET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6397) phba->menlo_flag |= HBA_MENLO_SUPPORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6398) /* check for menlo minimum sg count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6399) if (phba->cfg_sg_seg_cnt < LPFC_DEFAULT_MENLO_SG_SEG_CNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6400) phba->cfg_sg_seg_cnt = LPFC_DEFAULT_MENLO_SG_SEG_CNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6403) if (!phba->sli.sli3_ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6404) phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6405) sizeof(struct lpfc_sli_ring),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6406) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6407) if (!phba->sli.sli3_ring)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6408) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6410) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6411) * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6412) * used to create the sg_dma_buf_pool must be dynamically calculated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6413) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6415) if (phba->sli_rev == LPFC_SLI_REV4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6416) entry_sz = sizeof(struct sli4_sge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6417) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6418) entry_sz = sizeof(struct ulp_bde64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6420) /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6421) if (phba->cfg_enable_bg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6422) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6423) * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6424) * the FCP rsp, and a BDE for each. Sice we have no control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6425) * over how many protection data segments the SCSI Layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6426) * will hand us (ie: there could be one for every block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6427) * in the IO), we just allocate enough BDEs to accomidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6428) * our max amount and we need to limit lpfc_sg_seg_cnt to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6429) * minimize the risk of running out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6430) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6431) phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6432) sizeof(struct fcp_rsp) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6433) (LPFC_MAX_SG_SEG_CNT * entry_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6435) if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6436) phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6438) /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6439) phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6440) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6441) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6442) * The scsi_buf for a regular I/O will hold the FCP cmnd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6443) * the FCP rsp, a BDE for each, and a BDE for up to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6444) * cfg_sg_seg_cnt data segments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6445) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6446) phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6447) sizeof(struct fcp_rsp) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6448) ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6450) /* Total BDEs in BPL for scsi_sg_list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6451) phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6454) lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6455) "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6456) phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6457) phba->cfg_total_seg_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6459) phba->max_vpi = LPFC_MAX_VPI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6460) /* This will be set to correct value after config_port mbox */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6461) phba->max_vports = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6463) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6464) * Initialize the SLI Layer to run with lpfc HBAs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6466) lpfc_sli_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6467) lpfc_sli_queue_init(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6469) /* Allocate device driver memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6470) if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6471) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6473) phba->lpfc_sg_dma_buf_pool =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6474) dma_pool_create("lpfc_sg_dma_buf_pool",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6475) &phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6476) BPL_ALIGN_SZ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6478) if (!phba->lpfc_sg_dma_buf_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6479) goto fail_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6481) phba->lpfc_cmd_rsp_buf_pool =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6482) dma_pool_create("lpfc_cmd_rsp_buf_pool",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6483) &phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6484) sizeof(struct fcp_cmnd) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6485) sizeof(struct fcp_rsp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6486) BPL_ALIGN_SZ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6488) if (!phba->lpfc_cmd_rsp_buf_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6489) goto fail_free_dma_buf_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6491) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6492) * Enable sr-iov virtual functions if supported and configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6493) * through the module parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6494) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6495) if (phba->cfg_sriov_nr_virtfn > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6496) rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6497) phba->cfg_sriov_nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6498) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6499) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6500) "2808 Requested number of SR-IOV "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6501) "virtual functions (%d) is not "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6502) "supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6503) phba->cfg_sriov_nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6504) phba->cfg_sriov_nr_virtfn = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6508) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6510) fail_free_dma_buf_pool:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6511) dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6512) phba->lpfc_sg_dma_buf_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6513) fail_free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6514) lpfc_mem_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6515) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6518) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6519) * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6520) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6521) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6522) * This routine is invoked to unset the driver internal resources set up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6523) * specific for supporting the SLI-3 HBA device it attached to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6524) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6525) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6526) lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6528) /* Free device driver memory allocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6529) lpfc_mem_free_all(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6531) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6534) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6535) * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6536) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6537) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6538) * This routine is invoked to set up the driver internal resources specific to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6539) * support the SLI-4 HBA device it attached to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6540) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6541) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6542) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6543) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6544) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6545) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6546) lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6547) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6548) LPFC_MBOXQ_t *mboxq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6549) MAILBOX_t *mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6550) int rc, i, max_buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6551) int longs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6552) int extra;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6553) uint64_t wwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6554) u32 if_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6555) u32 if_fam;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6557) phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6558) phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6559) phba->sli4_hba.curr_disp_cpu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6561) /* Get all the module params for configuring this host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6562) lpfc_get_cfgparam(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6564) /* Set up phase-1 common device driver resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6565) rc = lpfc_setup_driver_resource_phase1(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6566) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6567) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6569) /* Before proceed, wait for POST done and device ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6570) rc = lpfc_sli4_post_status_check(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6571) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6572) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6574) /* Allocate all driver workqueues here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6576) /* The lpfc_wq workqueue for deferred irq use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6577) phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6579) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6580) * Initialize timers used by driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6581) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6583) timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6585) /* FCF rediscover timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6586) timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6588) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6589) * Control structure for handling external multi-buffer mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6590) * command pass-through.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6591) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6592) memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6593) sizeof(struct lpfc_mbox_ext_buf_ctx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6594) INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6596) phba->max_vpi = LPFC_MAX_VPI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6598) /* This will be set to correct value after the read_config mbox */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6599) phba->max_vports = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6601) /* Program the default value of vlan_id and fc_map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6602) phba->valid_vlan = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6603) phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6604) phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6605) phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6607) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6608) * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6609) * we will associate a new ring, for each EQ/CQ/WQ tuple.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6610) * The WQ create will allocate the ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6611) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6613) /* Initialize buffer queue management fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6614) INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6615) phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6616) phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6618) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6619) * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6620) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6621) /* Initialize the Abort buffer list used by driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6622) spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6623) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6625) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6626) /* Initialize the Abort nvme buffer list used by driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6627) spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6628) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6629) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6630) spin_lock_init(&phba->sli4_hba.t_active_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6631) INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6634) /* This abort list used by worker thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6635) spin_lock_init(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6636) spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6637) spin_lock_init(&phba->sli4_hba.asynce_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6638) spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6640) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6641) * Initialize driver internal slow-path work queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6642) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6644) /* Driver internel slow-path CQ Event pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6645) INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6646) /* Response IOCB work queue list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6647) INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6648) /* Asynchronous event CQ Event work queue list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6649) INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6650) /* Slow-path XRI aborted CQ Event work queue list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6651) INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6652) /* Receive queue CQ Event work queue list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6653) INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6655) /* Initialize extent block lists. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6656) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6657) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6658) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6659) INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6661) /* Initialize mboxq lists. If the early init routines fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6662) * these lists need to be correctly initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6663) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6664) INIT_LIST_HEAD(&phba->sli.mboxq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6665) INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6667) /* initialize optic_state to 0xFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6668) phba->sli4_hba.lnk_info.optic_state = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6670) /* Allocate device driver memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6671) rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6672) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6673) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6675) /* IF Type 2 ports get initialized now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6676) if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6677) LPFC_SLI_INTF_IF_TYPE_2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6678) rc = lpfc_pci_function_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6679) if (unlikely(rc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6680) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6681) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6683) phba->temp_sensor_support = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6686) /* Create the bootstrap mailbox command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6687) rc = lpfc_create_bootstrap_mbox(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6688) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6689) goto out_free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6691) /* Set up the host's endian order with the device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6692) rc = lpfc_setup_endian_order(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6693) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6694) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6696) /* Set up the hba's configuration parameters. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6697) rc = lpfc_sli4_read_config(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6698) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6699) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6700) rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6701) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6702) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6704) /* IF Type 0 ports get initialized now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6705) if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6706) LPFC_SLI_INTF_IF_TYPE_0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6707) rc = lpfc_pci_function_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6708) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6709) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6712) mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6713) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6714) if (!mboxq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6715) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6716) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6719) /* Check for NVMET being configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6720) phba->nvmet_support = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6721) if (lpfc_enable_nvmet_cnt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6723) /* First get WWN of HBA instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6724) lpfc_read_nv(phba, mboxq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6725) rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6726) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6727) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6728) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6729) "6016 Mailbox failed , mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6730) "READ_NV, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6731) bf_get(lpfc_mqe_command, &mboxq->u.mqe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6732) bf_get(lpfc_mqe_status, &mboxq->u.mqe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6733) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6734) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6735) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6737) mb = &mboxq->u.mb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6738) memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6739) sizeof(uint64_t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6740) wwn = cpu_to_be64(wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6741) phba->sli4_hba.wwnn.u.name = wwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6742) memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6743) sizeof(uint64_t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6744) /* wwn is WWPN of HBA instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6745) wwn = cpu_to_be64(wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6746) phba->sli4_hba.wwpn.u.name = wwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6748) /* Check to see if it matches any module parameter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6749) for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6750) if (wwn == lpfc_enable_nvmet[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6751) #if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6752) if (lpfc_nvmet_mem_alloc(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6753) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6755) phba->nvmet_support = 1; /* a match */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6757) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6758) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6759) "6017 NVME Target %016llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6760) wwn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6761) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6762) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6763) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6764) "6021 Can't enable NVME Target."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6765) " NVME_TARGET_FC infrastructure"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6766) " is not in kernel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6767) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6768) /* Not supported for NVMET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6769) phba->cfg_xri_rebalancing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6770) if (phba->irq_chann_mode == NHT_MODE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6771) phba->cfg_irq_chann =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6772) phba->sli4_hba.num_present_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6773) phba->cfg_hdw_queue =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6774) phba->sli4_hba.num_present_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6775) phba->irq_chann_mode = NORMAL_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6777) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6782) lpfc_nvme_mod_param_dep(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6784) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6785) * Get sli4 parameters that override parameters from Port capabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6786) * If this call fails, it isn't critical unless the SLI4 parameters come
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6787) * back in conflict.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6788) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6789) rc = lpfc_get_sli4_parameters(phba, mboxq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6790) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6791) if_type = bf_get(lpfc_sli_intf_if_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6792) &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6793) if_fam = bf_get(lpfc_sli_intf_sli_family,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6794) &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6795) if (phba->sli4_hba.extents_in_use &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6796) phba->sli4_hba.rpi_hdrs_in_use) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6797) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6798) "2999 Unsupported SLI4 Parameters "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6799) "Extents and RPI headers enabled.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6800) if (if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6801) if_fam == LPFC_SLI_INTF_FAMILY_BE2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6802) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6803) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6804) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6807) if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6808) if_fam == LPFC_SLI_INTF_FAMILY_BE2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6809) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6810) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6811) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6815) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6816) * 1 for cmd, 1 for rsp, NVME adds an extra one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6817) * for boundary conditions in its max_sgl_segment template.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6818) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6819) extra = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6820) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6821) extra++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6823) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6824) * It doesn't matter what family our adapter is in, we are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6825) * limited to 2 Pages, 512 SGEs, for our SGL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6826) * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6827) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6828) max_buf_size = (2 * SLI4_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6830) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6831) * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6832) * used to create the sg_dma_buf_pool must be calculated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6833) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6834) if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6835) /* Both cfg_enable_bg and cfg_external_dif code paths */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6837) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6838) * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6839) * the FCP rsp, and a SGE. Sice we have no control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6840) * over how many protection segments the SCSI Layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6841) * will hand us (ie: there could be one for every block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6842) * in the IO), just allocate enough SGEs to accomidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6843) * our max amount and we need to limit lpfc_sg_seg_cnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6844) * to minimize the risk of running out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6845) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6846) phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6847) sizeof(struct fcp_rsp) + max_buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6849) /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6850) phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6852) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6853) * If supporting DIF, reduce the seg count for scsi to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6854) * allow room for the DIF sges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6855) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6856) if (phba->cfg_enable_bg &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6857) phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6858) phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6859) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6860) phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6862) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6863) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6864) * The scsi_buf for a regular I/O holds the FCP cmnd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6865) * the FCP rsp, a SGE for each, and a SGE for up to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6866) * cfg_sg_seg_cnt data segments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6867) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6868) phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6869) sizeof(struct fcp_rsp) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6870) ((phba->cfg_sg_seg_cnt + extra) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6871) sizeof(struct sli4_sge));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6873) /* Total SGEs for scsi_sg_list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6874) phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6875) phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6877) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6878) * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6879) * need to post 1 page for the SGL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6880) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6883) if (phba->cfg_xpsgl && !phba->nvmet_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6884) phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6885) else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6886) phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6887) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6888) phba->cfg_sg_dma_buf_size =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6889) SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6891) phba->border_sge_num = phba->cfg_sg_dma_buf_size /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6892) sizeof(struct sli4_sge);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6894) /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6895) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6896) if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6897) lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6898) "6300 Reducing NVME sg segment "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6899) "cnt to %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6900) LPFC_MAX_NVME_SEG_CNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6901) phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6902) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6903) phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6906) lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6907) "9087 sg_seg_cnt:%d dmabuf_size:%d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6908) "total:%d scsi:%d nvme:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6909) phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6910) phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6911) phba->cfg_nvme_seg_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6913) if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6914) i = phba->cfg_sg_dma_buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6915) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6916) i = SLI4_PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6918) phba->lpfc_sg_dma_buf_pool =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6919) dma_pool_create("lpfc_sg_dma_buf_pool",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6920) &phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6921) phba->cfg_sg_dma_buf_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6922) i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6923) if (!phba->lpfc_sg_dma_buf_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6924) goto out_free_bsmbx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6926) phba->lpfc_cmd_rsp_buf_pool =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6927) dma_pool_create("lpfc_cmd_rsp_buf_pool",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6928) &phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6929) sizeof(struct fcp_cmnd) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6930) sizeof(struct fcp_rsp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6931) i, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6932) if (!phba->lpfc_cmd_rsp_buf_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6933) goto out_free_sg_dma_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6935) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6937) /* Verify OAS is supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6938) lpfc_sli4_oas_verify(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6940) /* Verify RAS support on adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6941) lpfc_sli4_ras_init(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6943) /* Verify all the SLI4 queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6944) rc = lpfc_sli4_queue_verify(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6945) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6946) goto out_free_cmd_rsp_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6948) /* Create driver internal CQE event pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6949) rc = lpfc_sli4_cq_event_pool_create(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6950) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6951) goto out_free_cmd_rsp_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6953) /* Initialize sgl lists per host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6954) lpfc_init_sgl_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6956) /* Allocate and initialize active sgl array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6957) rc = lpfc_init_active_sgl_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6958) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6959) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6960) "1430 Failed to initialize sgl list.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6961) goto out_destroy_cq_event_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6963) rc = lpfc_sli4_init_rpi_hdrs(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6964) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6965) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6966) "1432 Failed to initialize rpi headers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6967) goto out_free_active_sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6970) /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6971) longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6972) phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6973) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6974) if (!phba->fcf.fcf_rr_bmask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6975) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6976) "2759 Failed allocate memory for FCF round "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6977) "robin failover bmask\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6978) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6979) goto out_remove_rpi_hdrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6982) phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6983) sizeof(struct lpfc_hba_eq_hdl),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6984) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6985) if (!phba->sli4_hba.hba_eq_hdl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6986) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6987) "2572 Failed allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6988) "fast-path per-EQ handle array\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6989) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6990) goto out_free_fcf_rr_bmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6991) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6993) phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6994) sizeof(struct lpfc_vector_map_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6995) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6996) if (!phba->sli4_hba.cpu_map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6997) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6998) "3327 Failed allocate memory for msi-x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6999) "interrupt vector mapping\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7000) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7001) goto out_free_hba_eq_hdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7004) phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7005) if (!phba->sli4_hba.eq_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7006) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7007) "3321 Failed allocation for per_cpu stats\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7008) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7009) goto out_free_hba_cpu_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7010) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7012) phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7013) sizeof(*phba->sli4_hba.idle_stat),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7014) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7015) if (!phba->sli4_hba.idle_stat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7016) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7017) "3390 Failed allocation for idle_stat\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7018) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7019) goto out_free_hba_eq_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7022) #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7023) phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7024) if (!phba->sli4_hba.c_stat) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7025) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7026) "3332 Failed allocating per cpu hdwq stats\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7027) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7028) goto out_free_hba_idle_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7029) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7030) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7032) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7033) * Enable sr-iov virtual functions if supported and configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7034) * through the module parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7035) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7036) if (phba->cfg_sriov_nr_virtfn > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7037) rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7038) phba->cfg_sriov_nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7039) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7040) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7041) "3020 Requested number of SR-IOV "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7042) "virtual functions (%d) is not "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7043) "supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7044) phba->cfg_sriov_nr_virtfn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7045) phba->cfg_sriov_nr_virtfn = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7049) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7051) #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7052) out_free_hba_idle_stat:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7053) kfree(phba->sli4_hba.idle_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7054) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7055) out_free_hba_eq_info:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7056) free_percpu(phba->sli4_hba.eq_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7057) out_free_hba_cpu_map:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7058) kfree(phba->sli4_hba.cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7059) out_free_hba_eq_hdl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7060) kfree(phba->sli4_hba.hba_eq_hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7061) out_free_fcf_rr_bmask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7062) kfree(phba->fcf.fcf_rr_bmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7063) out_remove_rpi_hdrs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7064) lpfc_sli4_remove_rpi_hdrs(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7065) out_free_active_sgl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7066) lpfc_free_active_sgl(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7067) out_destroy_cq_event_pool:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7068) lpfc_sli4_cq_event_pool_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7069) out_free_cmd_rsp_buf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7070) dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7071) phba->lpfc_cmd_rsp_buf_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7072) out_free_sg_dma_buf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7073) dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7074) phba->lpfc_sg_dma_buf_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7075) out_free_bsmbx:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7076) lpfc_destroy_bootstrap_mbox(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7077) out_free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7078) lpfc_mem_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7079) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7080) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7082) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7083) * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7084) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7085) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7086) * This routine is invoked to unset the driver internal resources set up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7087) * specific for supporting the SLI-4 HBA device it attached to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7088) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7089) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7090) lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7091) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7092) struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7094) free_percpu(phba->sli4_hba.eq_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7095) #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7096) free_percpu(phba->sli4_hba.c_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7097) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7098) kfree(phba->sli4_hba.idle_stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7100) /* Free memory allocated for msi-x interrupt vector to CPU mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7101) kfree(phba->sli4_hba.cpu_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7102) phba->sli4_hba.num_possible_cpu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7103) phba->sli4_hba.num_present_cpu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7104) phba->sli4_hba.curr_disp_cpu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7105) cpumask_clear(&phba->sli4_hba.irq_aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7107) /* Free memory allocated for fast-path work queue handles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7108) kfree(phba->sli4_hba.hba_eq_hdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7110) /* Free the allocated rpi headers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7111) lpfc_sli4_remove_rpi_hdrs(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7112) lpfc_sli4_remove_rpis(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7114) /* Free eligible FCF index bmask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7115) kfree(phba->fcf.fcf_rr_bmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7117) /* Free the ELS sgl list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7118) lpfc_free_active_sgl(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7119) lpfc_free_els_sgl_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7120) lpfc_free_nvmet_sgl_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7122) /* Free the completion queue EQ event pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7123) lpfc_sli4_cq_event_release_all(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7124) lpfc_sli4_cq_event_pool_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7126) /* Release resource identifiers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7127) lpfc_sli4_dealloc_resource_identifiers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7129) /* Free the bsmbx region. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7130) lpfc_destroy_bootstrap_mbox(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7132) /* Free the SLI Layer memory with SLI4 HBAs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7133) lpfc_mem_free_all(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7135) /* Free the current connect table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7136) list_for_each_entry_safe(conn_entry, next_conn_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7137) &phba->fcf_conn_rec_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7138) list_del_init(&conn_entry->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7139) kfree(conn_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7142) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7145) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7146) * lpfc_init_api_table_setup - Set up init api function jump table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7147) * @phba: The hba struct for which this call is being executed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7148) * @dev_grp: The HBA PCI-Device group number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7149) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7150) * This routine sets up the device INIT interface API function jump table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7151) * in @phba struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7152) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7153) * Returns: 0 - success, -ENODEV - failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7154) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7155) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7156) lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7158) phba->lpfc_hba_init_link = lpfc_hba_init_link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7159) phba->lpfc_hba_down_link = lpfc_hba_down_link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7160) phba->lpfc_selective_reset = lpfc_selective_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7161) switch (dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7162) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7163) phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7164) phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7165) phba->lpfc_stop_port = lpfc_stop_port_s3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7166) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7167) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7168) phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7169) phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7170) phba->lpfc_stop_port = lpfc_stop_port_s4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7171) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7172) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7173) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7174) "1431 Invalid HBA PCI-device group: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7175) dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7176) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7177) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7179) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7182) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7183) * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7184) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7185) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7186) * This routine is invoked to set up the driver internal resources after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7187) * device specific resource setup to support the HBA device it attached to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7188) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7189) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7190) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7191) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7192) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7193) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7194) lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7196) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7198) /* Startup the kernel thread for this host adapter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7199) phba->worker_thread = kthread_run(lpfc_do_work, phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7200) "lpfc_worker_%d", phba->brd_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7201) if (IS_ERR(phba->worker_thread)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7202) error = PTR_ERR(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7203) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7209) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7210) * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7211) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7212) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7213) * This routine is invoked to unset the driver internal resources set up after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7214) * the device specific resource setup for supporting the HBA device it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7215) * attached to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7216) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7217) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7218) lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7220) if (phba->wq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7221) flush_workqueue(phba->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7222) destroy_workqueue(phba->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7223) phba->wq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7226) /* Stop kernel worker thread */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7227) if (phba->worker_thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7228) kthread_stop(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7231) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7232) * lpfc_free_iocb_list - Free iocb list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7233) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7234) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7235) * This routine is invoked to free the driver's IOCB list and memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7236) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7237) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7238) lpfc_free_iocb_list(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7240) struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7242) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7243) list_for_each_entry_safe(iocbq_entry, iocbq_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7244) &phba->lpfc_iocb_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7245) list_del(&iocbq_entry->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7246) kfree(iocbq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7247) phba->total_iocbq_bufs--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7249) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7251) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7254) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7255) * lpfc_init_iocb_list - Allocate and initialize iocb list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7256) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7257) * @iocb_count: number of requested iocbs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7258) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7259) * This routine is invoked to allocate and initizlize the driver's IOCB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7260) * list and set up the IOCB tag array accordingly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7261) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7262) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7263) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7264) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7265) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7266) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7267) lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7269) struct lpfc_iocbq *iocbq_entry = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7270) uint16_t iotag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7271) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7273) /* Initialize and populate the iocb list per host. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7274) INIT_LIST_HEAD(&phba->lpfc_iocb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7275) for (i = 0; i < iocb_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7276) iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7277) if (iocbq_entry == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7278) printk(KERN_ERR "%s: only allocated %d iocbs of "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7279) "expected %d count. Unloading driver.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7280) __func__, i, iocb_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7281) goto out_free_iocbq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7284) iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7285) if (iotag == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7286) kfree(iocbq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7287) printk(KERN_ERR "%s: failed to allocate IOTAG. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7288) "Unloading driver.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7289) goto out_free_iocbq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7291) iocbq_entry->sli4_lxritag = NO_XRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7292) iocbq_entry->sli4_xritag = NO_XRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7294) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7295) list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7296) phba->total_iocbq_bufs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7297) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7300) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7302) out_free_iocbq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7303) lpfc_free_iocb_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7305) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7308) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7309) * lpfc_free_sgl_list - Free a given sgl list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7310) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7311) * @sglq_list: pointer to the head of sgl list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7312) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7313) * This routine is invoked to free a give sgl list and memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7314) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7315) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7316) lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7318) struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7320) list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7321) list_del(&sglq_entry->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7322) lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7323) kfree(sglq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7327) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7328) * lpfc_free_els_sgl_list - Free els sgl list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7329) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7330) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7331) * This routine is invoked to free the driver's els sgl list and memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7332) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7333) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7334) lpfc_free_els_sgl_list(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7335) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7336) LIST_HEAD(sglq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7338) /* Retrieve all els sgls from driver list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7339) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7340) spin_lock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7341) list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7342) spin_unlock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7343) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7345) /* Now free the sgl list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7346) lpfc_free_sgl_list(phba, &sglq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7349) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7350) * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7351) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7352) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7353) * This routine is invoked to free the driver's nvmet sgl list and memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7354) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7355) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7356) lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7358) struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7359) LIST_HEAD(sglq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7361) /* Retrieve all nvmet sgls from driver list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7362) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7363) spin_lock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7364) list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7365) spin_unlock(&phba->sli4_hba.sgl_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7366) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7368) /* Now free the sgl list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7369) list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7370) list_del(&sglq_entry->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7371) lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7372) kfree(sglq_entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7375) /* Update the nvmet_xri_cnt to reflect no current sgls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7376) * The next initialization cycle sets the count and allocates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7377) * the sgls over again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7378) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7379) phba->sli4_hba.nvmet_xri_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7382) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7383) * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7384) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7385) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7386) * This routine is invoked to allocate the driver's active sgl memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7387) * This array will hold the sglq_entry's for active IOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7388) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7389) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7390) lpfc_init_active_sgl_array(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7392) int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7393) size = sizeof(struct lpfc_sglq *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7394) size *= phba->sli4_hba.max_cfg_param.max_xri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7396) phba->sli4_hba.lpfc_sglq_active_list =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7397) kzalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7398) if (!phba->sli4_hba.lpfc_sglq_active_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7399) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7400) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7403) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7404) * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7405) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7406) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7407) * This routine is invoked to walk through the array of active sglq entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7408) * and free all of the resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7409) * This is just a place holder for now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7410) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7411) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7412) lpfc_free_active_sgl(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7414) kfree(phba->sli4_hba.lpfc_sglq_active_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7417) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7418) * lpfc_init_sgl_list - Allocate and initialize sgl list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7419) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7420) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7421) * This routine is invoked to allocate and initizlize the driver's sgl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7422) * list and set up the sgl xritag tag array accordingly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7423) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7424) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7425) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7426) lpfc_init_sgl_list(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7428) /* Initialize and populate the sglq list per host/VF. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7429) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7430) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7431) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7432) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7434) /* els xri-sgl book keeping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7435) phba->sli4_hba.els_xri_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7437) /* nvme xri-buffer book keeping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7438) phba->sli4_hba.io_xri_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7441) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7442) * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7443) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7444) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7445) * This routine is invoked to post rpi header templates to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7446) * port for those SLI4 ports that do not support extents. This routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7447) * posts a PAGE_SIZE memory region to the port to hold up to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7448) * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7449) * and should be called only when interrupts are disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7450) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7451) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7452) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7453) * -ERROR - otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7454) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7455) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7456) lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7458) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7459) struct lpfc_rpi_hdr *rpi_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7461) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7462) if (!phba->sli4_hba.rpi_hdrs_in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7463) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7464) if (phba->sli4_hba.extents_in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7465) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7467) rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7468) if (!rpi_hdr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7469) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7470) "0391 Error during rpi post operation\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7471) lpfc_sli4_remove_rpis(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7472) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7475) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7478) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7479) * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7480) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7481) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7482) * This routine is invoked to allocate a single 4KB memory region to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7483) * support rpis and stores them in the phba. This single region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7484) * provides support for up to 64 rpis. The region is used globally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7485) * by the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7486) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7487) * Returns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7488) * A valid rpi hdr on success.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7489) * A NULL pointer on any failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7490) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7491) struct lpfc_rpi_hdr *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7492) lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7494) uint16_t rpi_limit, curr_rpi_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7495) struct lpfc_dmabuf *dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7496) struct lpfc_rpi_hdr *rpi_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7498) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7499) * If the SLI4 port supports extents, posting the rpi header isn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7500) * required. Set the expected maximum count and let the actual value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7501) * get set when extents are fully allocated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7502) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7503) if (!phba->sli4_hba.rpi_hdrs_in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7504) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7505) if (phba->sli4_hba.extents_in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7506) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7508) /* The limit on the logical index is just the max_rpi count. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7509) rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7511) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7512) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7513) * Establish the starting RPI in this header block. The starting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7514) * rpi is normalized to a zero base because the physical rpi is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7515) * port based.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7516) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7517) curr_rpi_range = phba->sli4_hba.next_rpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7518) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7520) /* Reached full RPI range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7521) if (curr_rpi_range == rpi_limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7522) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7524) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7525) * First allocate the protocol header region for the port. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7526) * port expects a 4KB DMA-mapped memory region that is 4K aligned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7527) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7528) dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7529) if (!dmabuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7530) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7532) dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7533) LPFC_HDR_TEMPLATE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7534) &dmabuf->phys, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7535) if (!dmabuf->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7536) rpi_hdr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7537) goto err_free_dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7540) if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7541) rpi_hdr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7542) goto err_free_coherent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7545) /* Save the rpi header data for cleanup later. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7546) rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7547) if (!rpi_hdr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7548) goto err_free_coherent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7550) rpi_hdr->dmabuf = dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7551) rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7552) rpi_hdr->page_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7553) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7555) /* The rpi_hdr stores the logical index only. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7556) rpi_hdr->start_rpi = curr_rpi_range;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7557) rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7558) list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7560) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7561) return rpi_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7563) err_free_coherent:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7564) dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7565) dmabuf->virt, dmabuf->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7566) err_free_dmabuf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7567) kfree(dmabuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7568) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7571) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7572) * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7573) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7574) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7575) * This routine is invoked to remove all memory resources allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7576) * to support rpis for SLI4 ports not supporting extents. This routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7577) * presumes the caller has released all rpis consumed by fabric or port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7578) * logins and is prepared to have the header pages removed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7579) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7580) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7581) lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7583) struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7585) if (!phba->sli4_hba.rpi_hdrs_in_use)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7586) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7588) list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7589) &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7590) list_del(&rpi_hdr->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7591) dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7592) rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7593) kfree(rpi_hdr->dmabuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7594) kfree(rpi_hdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7596) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7597) /* There are no rpis available to the port now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7598) phba->sli4_hba.next_rpi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7601) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7602) * lpfc_hba_alloc - Allocate driver hba data structure for a device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7603) * @pdev: pointer to pci device data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7604) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7605) * This routine is invoked to allocate the driver hba data structure for an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7606) * HBA device. If the allocation is successful, the phba reference to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7607) * PCI device data structure is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7608) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7609) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7610) * pointer to @phba - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7611) * NULL - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7612) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7613) static struct lpfc_hba *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7614) lpfc_hba_alloc(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7615) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7616) struct lpfc_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7618) /* Allocate memory for HBA structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7619) phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7620) if (!phba) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7621) dev_err(&pdev->dev, "failed to allocate hba struct\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7622) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7625) /* Set reference to PCI device in HBA structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7626) phba->pcidev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7628) /* Assign an unused board number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7629) phba->brd_no = lpfc_get_instance();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7630) if (phba->brd_no < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7631) kfree(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7632) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7634) phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7636) spin_lock_init(&phba->ct_ev_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7637) INIT_LIST_HEAD(&phba->ct_ev_waiters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7639) return phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7642) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7643) * lpfc_hba_free - Free driver hba data structure with a device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7644) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7645) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7646) * This routine is invoked to free the driver hba data structure with an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7647) * HBA device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7648) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7649) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7650) lpfc_hba_free(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7652) if (phba->sli_rev == LPFC_SLI_REV4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7653) kfree(phba->sli4_hba.hdwq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7655) /* Release the driver assigned board number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7656) idr_remove(&lpfc_hba_index, phba->brd_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7658) /* Free memory allocated with sli3 rings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7659) kfree(phba->sli.sli3_ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7660) phba->sli.sli3_ring = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7662) kfree(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7663) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7666) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7667) * lpfc_create_shost - Create hba physical port with associated scsi host.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7668) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7669) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7670) * This routine is invoked to create HBA physical port and associate a SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7671) * host with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7672) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7673) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7674) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7675) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7676) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7677) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7678) lpfc_create_shost(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7679) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7680) struct lpfc_vport *vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7681) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7683) /* Initialize HBA FC structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7684) phba->fc_edtov = FF_DEF_EDTOV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7685) phba->fc_ratov = FF_DEF_RATOV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7686) phba->fc_altov = FF_DEF_ALTOV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7687) phba->fc_arbtov = FF_DEF_ARBTOV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7689) atomic_set(&phba->sdev_cnt, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7690) vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7691) if (!vport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7692) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7694) shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7695) phba->pport = vport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7697) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7698) /* Only 1 vport (pport) will support NVME target */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7699) phba->targetport = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7700) phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7701) lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7702) "6076 NVME Target Found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7705) lpfc_debugfs_initialize(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7706) /* Put reference to SCSI host to driver's device private data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7707) pci_set_drvdata(phba->pcidev, shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7709) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7710) * At this point we are fully registered with PSA. In addition,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7711) * any initial discovery should be completed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7712) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7713) vport->load_flag |= FC_ALLOW_FDMI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7714) if (phba->cfg_enable_SmartSAN ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7715) (phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7717) /* Setup appropriate attribute masks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7718) vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7719) if (phba->cfg_enable_SmartSAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7720) vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7721) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7722) vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7724) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7727) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7728) * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7729) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7730) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7731) * This routine is invoked to destroy HBA physical port and the associated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7732) * SCSI host.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7733) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7734) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7735) lpfc_destroy_shost(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7736) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7737) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7739) /* Destroy physical port that associated with the SCSI host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7740) destroy_port(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7742) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7745) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7746) * lpfc_setup_bg - Setup Block guard structures and debug areas.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7747) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7748) * @shost: the shost to be used to detect Block guard settings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7749) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7750) * This routine sets up the local Block guard protocol settings for @shost.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7751) * This routine also allocates memory for debugging bg buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7752) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7753) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7754) lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7755) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7756) uint32_t old_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7757) uint32_t old_guard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7759) if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7760) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7761) "1478 Registering BlockGuard with the "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7762) "SCSI layer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7764) old_mask = phba->cfg_prot_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7765) old_guard = phba->cfg_prot_guard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7767) /* Only allow supported values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7768) phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7769) SHOST_DIX_TYPE0_PROTECTION |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7770) SHOST_DIX_TYPE1_PROTECTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7771) phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7772) SHOST_DIX_GUARD_CRC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7774) /* DIF Type 1 protection for profiles AST1/C1 is end to end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7775) if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7776) phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7778) if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7779) if ((old_mask != phba->cfg_prot_mask) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7780) (old_guard != phba->cfg_prot_guard))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7781) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7782) "1475 Registering BlockGuard with the "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7783) "SCSI layer: mask %d guard %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7784) phba->cfg_prot_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7785) phba->cfg_prot_guard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7787) scsi_host_set_prot(shost, phba->cfg_prot_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7788) scsi_host_set_guard(shost, phba->cfg_prot_guard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7789) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7790) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7791) "1479 Not Registering BlockGuard with the SCSI "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7792) "layer, Bad protection parameters: %d %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7793) old_mask, old_guard);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7797) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7798) * lpfc_post_init_setup - Perform necessary device post initialization setup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7799) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7800) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7801) * This routine is invoked to perform all the necessary post initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7802) * setup for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7803) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7804) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7805) lpfc_post_init_setup(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7806) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7807) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7808) struct lpfc_adapter_event_header adapter_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7810) /* Get the default values for Model Name and Description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7811) lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7813) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7814) * hba setup may have changed the hba_queue_depth so we need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7815) * adjust the value of can_queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7816) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7817) shost = pci_get_drvdata(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7818) shost->can_queue = phba->cfg_hba_queue_depth - 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7820) lpfc_host_attrib_init(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7822) if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7823) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7824) lpfc_poll_start_timer(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7825) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7828) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7829) "0428 Perform SCSI scan\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7830) /* Send board arrival event to upper layer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7831) adapter_event.event_type = FC_REG_ADAPTER_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7832) adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7833) fc_host_post_vendor_event(shost, fc_get_event_number(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7834) sizeof(adapter_event),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7835) (char *) &adapter_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7836) LPFC_NL_VENDOR_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7837) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7840) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7841) * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7842) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7843) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7844) * This routine is invoked to set up the PCI device memory space for device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7845) * with SLI-3 interface spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7846) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7847) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7848) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7849) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7850) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7851) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7852) lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7853) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7854) struct pci_dev *pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7855) unsigned long bar0map_len, bar2map_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7856) int i, hbq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7857) void *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7858) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7860) if (!pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7861) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7863) /* Set the device DMA mask size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7864) error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7865) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7866) error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7867) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7868) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7869) error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7871) /* Get the bus address of Bar0 and Bar2 and the number of bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7872) * required by each mapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7873) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7874) phba->pci_bar0_map = pci_resource_start(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7875) bar0map_len = pci_resource_len(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7877) phba->pci_bar2_map = pci_resource_start(pdev, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7878) bar2map_len = pci_resource_len(pdev, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7880) /* Map HBA SLIM to a kernel virtual address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7881) phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7882) if (!phba->slim_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7883) dev_printk(KERN_ERR, &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7884) "ioremap failed for SLIM memory.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7885) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7888) /* Map HBA Control Registers to a kernel virtual address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7889) phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7890) if (!phba->ctrl_regs_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7891) dev_printk(KERN_ERR, &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7892) "ioremap failed for HBA control registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7893) goto out_iounmap_slim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7896) /* Allocate memory for SLI-2 structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7897) phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7898) &phba->slim2p.phys, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7899) if (!phba->slim2p.virt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7900) goto out_iounmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7902) phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7903) phba->mbox_ext = (phba->slim2p.virt +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7904) offsetof(struct lpfc_sli2_slim, mbx_ext_words));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7905) phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7906) phba->IOCBs = (phba->slim2p.virt +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7907) offsetof(struct lpfc_sli2_slim, IOCBs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7909) phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7910) lpfc_sli_hbq_size(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7911) &phba->hbqslimp.phys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7912) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7913) if (!phba->hbqslimp.virt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7914) goto out_free_slim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7916) hbq_count = lpfc_sli_hbq_count();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7917) ptr = phba->hbqslimp.virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7918) for (i = 0; i < hbq_count; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7919) phba->hbqs[i].hbq_virt = ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7920) INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7921) ptr += (lpfc_hbq_defs[i]->entry_count *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7922) sizeof(struct lpfc_hbq_entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7924) phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7925) phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7927) memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7929) phba->MBslimaddr = phba->slim_memmap_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7930) phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7931) phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7932) phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7933) phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7935) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7937) out_free_slim:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7938) dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7939) phba->slim2p.virt, phba->slim2p.phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7940) out_iounmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7941) iounmap(phba->ctrl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7942) out_iounmap_slim:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7943) iounmap(phba->slim_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7944) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7945) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7948) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7949) * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7950) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7951) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7952) * This routine is invoked to unset the PCI device memory space for device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7953) * with SLI-3 interface spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7954) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7955) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7956) lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7957) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7958) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7960) /* Obtain PCI device reference */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7961) if (!phba->pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7962) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7963) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7964) pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7966) /* Free coherent DMA memory allocated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7967) dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7968) phba->hbqslimp.virt, phba->hbqslimp.phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7969) dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7970) phba->slim2p.virt, phba->slim2p.phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7972) /* I/O memory unmap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7973) iounmap(phba->ctrl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7974) iounmap(phba->slim_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7976) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7979) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7980) * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7981) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7982) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7983) * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7984) * done and check status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7985) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7986) * Return 0 if successful, otherwise -ENODEV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7987) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7988) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7989) lpfc_sli4_post_status_check(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7990) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7991) struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7992) struct lpfc_register reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7993) int i, port_error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7994) uint32_t if_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7996) memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7997) memset(®_data, 0, sizeof(reg_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7998) if (!phba->sli4_hba.PSMPHRregaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7999) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8001) /* Wait up to 30 seconds for the SLI Port POST done and ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8002) for (i = 0; i < 3000; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8003) if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8004) &portsmphr_reg.word0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8005) (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8006) /* Port has a fatal POST error, break out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8007) port_error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8008) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8009) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8010) if (LPFC_POST_STAGE_PORT_READY ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8011) bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8012) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8013) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8016) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8017) * If there was a port error during POST, then don't proceed with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8018) * other register reads as the data may not be valid. Just exit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8019) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8020) if (port_error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8021) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8022) "1408 Port Failed POST - portsmphr=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8023) "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8024) "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8025) portsmphr_reg.word0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8026) bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8027) bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8028) bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8029) bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8030) bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8031) bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8032) bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8033) bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8034) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8035) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8036) "2534 Device Info: SLIFamily=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8037) "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8038) "SLIHint_2=0x%x, FT=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8039) bf_get(lpfc_sli_intf_sli_family,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8040) &phba->sli4_hba.sli_intf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8041) bf_get(lpfc_sli_intf_slirev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8042) &phba->sli4_hba.sli_intf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8043) bf_get(lpfc_sli_intf_if_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8044) &phba->sli4_hba.sli_intf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8045) bf_get(lpfc_sli_intf_sli_hint1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8046) &phba->sli4_hba.sli_intf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8047) bf_get(lpfc_sli_intf_sli_hint2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8048) &phba->sli4_hba.sli_intf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8049) bf_get(lpfc_sli_intf_func_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8050) &phba->sli4_hba.sli_intf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8051) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8052) * Check for other Port errors during the initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8053) * process. Fail the load if the port did not come up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8054) * correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8055) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8056) if_type = bf_get(lpfc_sli_intf_if_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8057) &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8058) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8059) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8060) phba->sli4_hba.ue_mask_lo =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8061) readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8062) phba->sli4_hba.ue_mask_hi =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8063) readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8064) uerrlo_reg.word0 =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8065) readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8066) uerrhi_reg.word0 =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8067) readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8068) if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8069) (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8070) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8071) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8072) "1422 Unrecoverable Error "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8073) "Detected during POST "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8074) "uerr_lo_reg=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8075) "uerr_hi_reg=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8076) "ue_mask_lo_reg=0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8077) "ue_mask_hi_reg=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8078) uerrlo_reg.word0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8079) uerrhi_reg.word0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8080) phba->sli4_hba.ue_mask_lo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8081) phba->sli4_hba.ue_mask_hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8082) port_error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8084) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8085) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8086) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8087) /* Final checks. The port status should be clean. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8088) if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8089) ®_data.word0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8090) (bf_get(lpfc_sliport_status_err, ®_data) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8091) !bf_get(lpfc_sliport_status_rn, ®_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8092) phba->work_status[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8093) readl(phba->sli4_hba.u.if_type2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8094) ERR1regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8095) phba->work_status[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8096) readl(phba->sli4_hba.u.if_type2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8097) ERR2regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8098) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8099) "2888 Unrecoverable port error "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8100) "following POST: port status reg "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8101) "0x%x, port_smphr reg 0x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8102) "error 1=0x%x, error 2=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8103) reg_data.word0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8104) portsmphr_reg.word0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8105) phba->work_status[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8106) phba->work_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8107) port_error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8109) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8110) case LPFC_SLI_INTF_IF_TYPE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8111) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8112) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8115) return port_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8118) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8119) * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8120) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8121) * @if_type: The SLI4 interface type getting configured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8122) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8123) * This routine is invoked to set up SLI4 BAR0 PCI config space register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8124) * memory map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8125) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8126) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8127) lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8129) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8130) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8131) phba->sli4_hba.u.if_type0.UERRLOregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8132) phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8133) phba->sli4_hba.u.if_type0.UERRHIregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8134) phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8135) phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8136) phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8137) phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8138) phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8139) phba->sli4_hba.SLIINTFregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8140) phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8141) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8142) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8143) phba->sli4_hba.u.if_type2.EQDregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8144) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8145) LPFC_CTL_PORT_EQ_DELAY_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8146) phba->sli4_hba.u.if_type2.ERR1regaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8147) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8148) LPFC_CTL_PORT_ER1_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8149) phba->sli4_hba.u.if_type2.ERR2regaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8150) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8151) LPFC_CTL_PORT_ER2_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8152) phba->sli4_hba.u.if_type2.CTRLregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8153) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8154) LPFC_CTL_PORT_CTL_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8155) phba->sli4_hba.u.if_type2.STATUSregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8156) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8157) LPFC_CTL_PORT_STA_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8158) phba->sli4_hba.SLIINTFregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8159) phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8160) phba->sli4_hba.PSMPHRregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8161) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8162) LPFC_CTL_PORT_SEM_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8163) phba->sli4_hba.RQDBregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8164) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8165) LPFC_ULP0_RQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8166) phba->sli4_hba.WQDBregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8167) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8168) LPFC_ULP0_WQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8169) phba->sli4_hba.CQDBregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8170) phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8171) phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8172) phba->sli4_hba.MQDBregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8173) phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8174) phba->sli4_hba.BMBXregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8175) phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8176) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8177) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8178) phba->sli4_hba.u.if_type2.EQDregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8179) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8180) LPFC_CTL_PORT_EQ_DELAY_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8181) phba->sli4_hba.u.if_type2.ERR1regaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8182) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8183) LPFC_CTL_PORT_ER1_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8184) phba->sli4_hba.u.if_type2.ERR2regaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8185) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8186) LPFC_CTL_PORT_ER2_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8187) phba->sli4_hba.u.if_type2.CTRLregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8188) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8189) LPFC_CTL_PORT_CTL_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8190) phba->sli4_hba.u.if_type2.STATUSregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8191) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8192) LPFC_CTL_PORT_STA_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8193) phba->sli4_hba.PSMPHRregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8194) phba->sli4_hba.conf_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8195) LPFC_CTL_PORT_SEM_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8196) phba->sli4_hba.BMBXregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8197) phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8198) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8199) case LPFC_SLI_INTF_IF_TYPE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8200) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8201) dev_printk(KERN_ERR, &phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8202) "FATAL - unsupported SLI4 interface type - %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8203) if_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8204) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8208) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8209) * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8210) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8211) * @if_type: sli if type to operate on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8212) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8213) * This routine is invoked to set up SLI4 BAR1 register memory map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8214) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8215) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8216) lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8218) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8219) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8220) phba->sli4_hba.PSMPHRregaddr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8221) phba->sli4_hba.ctrl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8222) LPFC_SLIPORT_IF0_SMPHR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8223) phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8224) LPFC_HST_ISR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8225) phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8226) LPFC_HST_IMR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8227) phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8228) LPFC_HST_ISCR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8229) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8230) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8231) phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8232) LPFC_IF6_RQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8233) phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8234) LPFC_IF6_WQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8235) phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8236) LPFC_IF6_CQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8237) phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8238) LPFC_IF6_EQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8239) phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8240) LPFC_IF6_MQ_DOORBELL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8241) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8242) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8243) case LPFC_SLI_INTF_IF_TYPE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8244) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8245) dev_err(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8246) "FATAL - unsupported SLI4 interface type - %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8247) if_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8248) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8252) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8253) * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8254) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8255) * @vf: virtual function number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8256) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8257) * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8258) * based on the given viftual function number, @vf.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8259) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8260) * Return 0 if successful, otherwise -ENODEV.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8261) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8262) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8263) lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8265) if (vf > LPFC_VIR_FUNC_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8266) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8268) phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8269) vf * LPFC_VFR_PAGE_SIZE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8270) LPFC_ULP0_RQ_DOORBELL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8271) phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8272) vf * LPFC_VFR_PAGE_SIZE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8273) LPFC_ULP0_WQ_DOORBELL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8274) phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8275) vf * LPFC_VFR_PAGE_SIZE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8276) LPFC_EQCQ_DOORBELL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8277) phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8278) phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8279) vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8280) phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8281) vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8282) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8285) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8286) * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8287) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8288) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8289) * This routine is invoked to create the bootstrap mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8290) * region consistent with the SLI-4 interface spec. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8291) * routine allocates all memory necessary to communicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8292) * mailbox commands to the port and sets up all alignment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8293) * needs. No locks are expected to be held when calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8294) * this routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8295) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8296) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8297) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8298) * -ENOMEM - could not allocated memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8299) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8300) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8301) lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8302) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8303) uint32_t bmbx_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8304) struct lpfc_dmabuf *dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8305) struct dma_address *dma_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8306) uint32_t pa_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8307) uint64_t phys_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8309) dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8310) if (!dmabuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8311) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8313) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8314) * The bootstrap mailbox region is comprised of 2 parts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8315) * plus an alignment restriction of 16 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8316) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8317) bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8318) dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8319) &dmabuf->phys, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8320) if (!dmabuf->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8321) kfree(dmabuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8322) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8325) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8326) * Initialize the bootstrap mailbox pointers now so that the register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8327) * operations are simple later. The mailbox dma address is required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8328) * to be 16-byte aligned. Also align the virtual memory as each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8329) * maibox is copied into the bmbx mailbox region before issuing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8330) * command to the port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8332) phba->sli4_hba.bmbx.dmabuf = dmabuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8333) phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8335) phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8336) LPFC_ALIGN_16_BYTE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8337) phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8338) LPFC_ALIGN_16_BYTE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8340) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8341) * Set the high and low physical addresses now. The SLI4 alignment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8342) * requirement is 16 bytes and the mailbox is posted to the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8343) * as two 30-bit addresses. The other data is a bit marking whether
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8344) * the 30-bit address is the high or low address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8345) * Upcast bmbx aphys to 64bits so shift instruction compiles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8346) * clean on 32 bit machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8347) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8348) dma_address = &phba->sli4_hba.bmbx.dma_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8349) phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8350) pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8351) dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8352) LPFC_BMBX_BIT1_ADDR_HI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8354) pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8355) dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8356) LPFC_BMBX_BIT1_ADDR_LO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8357) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8360) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8361) * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8362) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8363) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8364) * This routine is invoked to teardown the bootstrap mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8365) * region and release all host resources. This routine requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8366) * the caller to ensure all mailbox commands recovered, no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8367) * additional mailbox comands are sent, and interrupts are disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8368) * before calling this routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8369) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8370) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8371) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8372) lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8374) dma_free_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8375) phba->sli4_hba.bmbx.bmbx_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8376) phba->sli4_hba.bmbx.dmabuf->virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8377) phba->sli4_hba.bmbx.dmabuf->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8379) kfree(phba->sli4_hba.bmbx.dmabuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8380) memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8383) static const char * const lpfc_topo_to_str[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8384) "Loop then P2P",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8385) "Loopback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8386) "P2P Only",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8387) "Unsupported",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8388) "Loop Only",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8389) "Unsupported",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8390) "P2P then Loop",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8391) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8393) #define LINK_FLAGS_DEF 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8394) #define LINK_FLAGS_P2P 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8395) #define LINK_FLAGS_LOOP 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8396) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8397) * lpfc_map_topology - Map the topology read from READ_CONFIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8398) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8399) * @rd_config: pointer to read config data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8400) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8401) * This routine is invoked to map the topology values as read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8402) * from the read config mailbox command. If the persistent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8403) * topology feature is supported, the firmware will provide the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8404) * saved topology information to be used in INIT_LINK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8405) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8406) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8407) lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8409) u8 ptv, tf, pt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8411) ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8412) tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8413) pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8415) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8416) "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8417) ptv, tf, pt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8418) if (!ptv) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8419) lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8420) "2019 FW does not support persistent topology "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8421) "Using driver parameter defined value [%s]",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8422) lpfc_topo_to_str[phba->cfg_topology]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8423) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8425) /* FW supports persistent topology - override module parameter value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8426) phba->hba_flag |= HBA_PERSISTENT_TOPO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8427) switch (phba->pcidev->device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8428) case PCI_DEVICE_ID_LANCER_G7_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8429) case PCI_DEVICE_ID_LANCER_G6_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8430) if (!tf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8431) phba->cfg_topology = ((pt == LINK_FLAGS_LOOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8432) ? FLAGS_TOPOLOGY_MODE_LOOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8433) : FLAGS_TOPOLOGY_MODE_PT_PT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8434) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8435) phba->hba_flag &= ~HBA_PERSISTENT_TOPO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8437) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8438) default: /* G5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8439) if (tf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8440) /* If topology failover set - pt is '0' or '1' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8441) phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8442) FLAGS_TOPOLOGY_MODE_LOOP_PT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8443) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8444) phba->cfg_topology = ((pt == LINK_FLAGS_P2P)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8445) ? FLAGS_TOPOLOGY_MODE_PT_PT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8446) : FLAGS_TOPOLOGY_MODE_LOOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8448) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8450) if (phba->hba_flag & HBA_PERSISTENT_TOPO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8451) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8452) "2020 Using persistent topology value [%s]",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8453) lpfc_topo_to_str[phba->cfg_topology]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8454) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8455) lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8456) "2021 Invalid topology values from FW "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8457) "Using driver parameter defined value [%s]",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8458) lpfc_topo_to_str[phba->cfg_topology]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8462) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8463) * lpfc_sli4_read_config - Get the config parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8464) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8465) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8466) * This routine is invoked to read the configuration parameters from the HBA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8467) * The configuration parameters are used to set the base and maximum values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8468) * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8469) * allocation for the port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8470) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8471) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8472) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8473) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8474) * -EIO - The mailbox failed to complete successfully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8475) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8476) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8477) lpfc_sli4_read_config(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8479) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8480) struct lpfc_mbx_read_config *rd_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8481) union lpfc_sli4_cfg_shdr *shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8482) uint32_t shdr_status, shdr_add_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8483) struct lpfc_mbx_get_func_cfg *get_func_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8484) struct lpfc_rsrc_desc_fcfcoe *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8485) char *pdesc_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8486) uint16_t forced_link_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8487) uint32_t if_type, qmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8488) int length, i, rc = 0, rc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8490) pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8491) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8492) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8493) "2011 Unable to allocate memory for issuing "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8494) "SLI_CONFIG_SPECIAL mailbox command\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8495) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8498) lpfc_read_config(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8500) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8501) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8502) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8503) "2012 Mailbox failed , mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8504) "READ_CONFIG, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8505) bf_get(lpfc_mqe_command, &pmb->u.mqe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8506) bf_get(lpfc_mqe_status, &pmb->u.mqe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8507) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8508) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8509) rd_config = &pmb->u.mqe.un.rd_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8510) if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8511) phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8512) phba->sli4_hba.lnk_info.lnk_tp =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8513) bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8514) phba->sli4_hba.lnk_info.lnk_no =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8515) bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8516) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8517) "3081 lnk_type:%d, lnk_numb:%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8518) phba->sli4_hba.lnk_info.lnk_tp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8519) phba->sli4_hba.lnk_info.lnk_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8520) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8521) lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8522) "3082 Mailbox (x%x) returned ldv:x0\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8523) bf_get(lpfc_mqe_command, &pmb->u.mqe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8524) if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8525) phba->bbcredit_support = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8526) phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8529) phba->sli4_hba.conf_trunk =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8530) bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8531) phba->sli4_hba.extents_in_use =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8532) bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8533) phba->sli4_hba.max_cfg_param.max_xri =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8534) bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8535) /* Reduce resource usage in kdump environment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8536) if (is_kdump_kernel() &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8537) phba->sli4_hba.max_cfg_param.max_xri > 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8538) phba->sli4_hba.max_cfg_param.max_xri = 512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8539) phba->sli4_hba.max_cfg_param.xri_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8540) bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8541) phba->sli4_hba.max_cfg_param.max_vpi =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8542) bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8543) /* Limit the max we support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8544) if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8545) phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8546) phba->sli4_hba.max_cfg_param.vpi_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8547) bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8548) phba->sli4_hba.max_cfg_param.max_rpi =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8549) bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8550) phba->sli4_hba.max_cfg_param.rpi_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8551) bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8552) phba->sli4_hba.max_cfg_param.max_vfi =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8553) bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8554) phba->sli4_hba.max_cfg_param.vfi_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8555) bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8556) phba->sli4_hba.max_cfg_param.max_fcfi =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8557) bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8558) phba->sli4_hba.max_cfg_param.max_eq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8559) bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8560) phba->sli4_hba.max_cfg_param.max_rq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8561) bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8562) phba->sli4_hba.max_cfg_param.max_wq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8563) bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8564) phba->sli4_hba.max_cfg_param.max_cq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8565) bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8566) phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8567) phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8568) phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8569) phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8570) phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8571) (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8572) phba->max_vports = phba->max_vpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8573) lpfc_map_topology(phba, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8574) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8575) "2003 cfg params Extents? %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8576) "XRI(B:%d M:%d), "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8577) "VPI(B:%d M:%d) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8578) "VFI(B:%d M:%d) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8579) "RPI(B:%d M:%d) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8580) "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8581) phba->sli4_hba.extents_in_use,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8582) phba->sli4_hba.max_cfg_param.xri_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8583) phba->sli4_hba.max_cfg_param.max_xri,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8584) phba->sli4_hba.max_cfg_param.vpi_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8585) phba->sli4_hba.max_cfg_param.max_vpi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8586) phba->sli4_hba.max_cfg_param.vfi_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8587) phba->sli4_hba.max_cfg_param.max_vfi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8588) phba->sli4_hba.max_cfg_param.rpi_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8589) phba->sli4_hba.max_cfg_param.max_rpi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8590) phba->sli4_hba.max_cfg_param.max_fcfi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8591) phba->sli4_hba.max_cfg_param.max_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8592) phba->sli4_hba.max_cfg_param.max_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8593) phba->sli4_hba.max_cfg_param.max_wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8594) phba->sli4_hba.max_cfg_param.max_rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8595) phba->lmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8597) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8598) * Calculate queue resources based on how
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8599) * many WQ/CQ/EQs are available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8600) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8601) qmin = phba->sli4_hba.max_cfg_param.max_wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8602) if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8603) qmin = phba->sli4_hba.max_cfg_param.max_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8604) if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8605) qmin = phba->sli4_hba.max_cfg_param.max_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8606) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8607) * Whats left after this can go toward NVME / FCP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8608) * The minus 4 accounts for ELS, NVME LS, MBOX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8609) * plus one extra. When configured for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8610) * NVMET, FCP io channel WQs are not created.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8611) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8612) qmin -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8614) /* Check to see if there is enough for NVME */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8615) if ((phba->cfg_irq_chann > qmin) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8616) (phba->cfg_hdw_queue > qmin)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8617) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8618) "2005 Reducing Queues - "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8619) "FW resource limitation: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8620) "WQ %d CQ %d EQ %d: min %d: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8621) "IRQ %d HDWQ %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8622) phba->sli4_hba.max_cfg_param.max_wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8623) phba->sli4_hba.max_cfg_param.max_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8624) phba->sli4_hba.max_cfg_param.max_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8625) qmin, phba->cfg_irq_chann,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8626) phba->cfg_hdw_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8628) if (phba->cfg_irq_chann > qmin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8629) phba->cfg_irq_chann = qmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8630) if (phba->cfg_hdw_queue > qmin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8631) phba->cfg_hdw_queue = qmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8635) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8636) goto read_cfg_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8638) /* Update link speed if forced link speed is supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8639) if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8640) if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8641) forced_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8642) bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8643) if (forced_link_speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8644) phba->hba_flag |= HBA_FORCED_LINK_SPEED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8646) switch (forced_link_speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8647) case LINK_SPEED_1G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8648) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8649) LPFC_USER_LINK_SPEED_1G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8650) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8651) case LINK_SPEED_2G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8652) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8653) LPFC_USER_LINK_SPEED_2G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8654) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8655) case LINK_SPEED_4G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8656) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8657) LPFC_USER_LINK_SPEED_4G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8658) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8659) case LINK_SPEED_8G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8660) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8661) LPFC_USER_LINK_SPEED_8G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8662) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8663) case LINK_SPEED_10G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8664) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8665) LPFC_USER_LINK_SPEED_10G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8666) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8667) case LINK_SPEED_16G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8668) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8669) LPFC_USER_LINK_SPEED_16G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8670) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8671) case LINK_SPEED_32G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8672) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8673) LPFC_USER_LINK_SPEED_32G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8674) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8675) case LINK_SPEED_64G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8676) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8677) LPFC_USER_LINK_SPEED_64G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8678) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8679) case 0xffff:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8680) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8681) LPFC_USER_LINK_SPEED_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8682) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8683) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8684) lpfc_printf_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8685) LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8686) "0047 Unrecognized link "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8687) "speed : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8688) forced_link_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8689) phba->cfg_link_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8690) LPFC_USER_LINK_SPEED_AUTO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8695) /* Reset the DFT_HBA_Q_DEPTH to the max xri */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8696) length = phba->sli4_hba.max_cfg_param.max_xri -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8697) lpfc_sli4_get_els_iocb_cnt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8698) if (phba->cfg_hba_queue_depth > length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8699) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8700) "3361 HBA queue depth changed from %d to %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8701) phba->cfg_hba_queue_depth, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8702) phba->cfg_hba_queue_depth = length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8705) if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8706) LPFC_SLI_INTF_IF_TYPE_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8707) goto read_cfg_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8709) /* get the pf# and vf# for SLI4 if_type 2 port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8710) length = (sizeof(struct lpfc_mbx_get_func_cfg) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8711) sizeof(struct lpfc_sli4_cfg_mhdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8712) lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8713) LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8714) length, LPFC_SLI4_MBX_EMBED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8716) rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8717) shdr = (union lpfc_sli4_cfg_shdr *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8718) &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8719) shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8720) shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8721) if (rc2 || shdr_status || shdr_add_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8722) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8723) "3026 Mailbox failed , mbxCmd x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8724) "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8725) bf_get(lpfc_mqe_command, &pmb->u.mqe),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8726) bf_get(lpfc_mqe_status, &pmb->u.mqe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8727) goto read_cfg_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8730) /* search for fc_fcoe resrouce descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8731) get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8733) pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8734) desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8735) length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8736) if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8737) length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8738) else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8739) goto read_cfg_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8741) for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8742) desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8743) if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8744) bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8745) phba->sli4_hba.iov.pf_number =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8746) bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8747) phba->sli4_hba.iov.vf_number =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8748) bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8749) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8753) if (i < LPFC_RSRC_DESC_MAX_NUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8754) lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8755) "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8756) "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8757) phba->sli4_hba.iov.vf_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8758) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8759) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8760) "3028 GET_FUNCTION_CONFIG: failed to find "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8761) "Resource Descriptor:x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8762) LPFC_RSRC_DESC_TYPE_FCFCOE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8764) read_cfg_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8765) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8766) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8769) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8770) * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8771) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8772) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8773) * This routine is invoked to setup the port-side endian order when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8774) * the port if_type is 0. This routine has no function for other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8775) * if_types.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8776) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8777) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8778) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8779) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8780) * -EIO - The mailbox failed to complete successfully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8781) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8782) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8783) lpfc_setup_endian_order(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8784) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8785) LPFC_MBOXQ_t *mboxq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8786) uint32_t if_type, rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8787) uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8788) HOST_ENDIAN_HIGH_WORD1};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8790) if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8791) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8792) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8793) mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8794) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8795) if (!mboxq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8796) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8797) "0492 Unable to allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8798) "issuing SLI_CONFIG_SPECIAL mailbox "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8799) "command\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8800) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8803) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8804) * The SLI4_CONFIG_SPECIAL mailbox command requires the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8805) * two words to contain special data values and no other data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8806) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8807) memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8808) memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8809) rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8810) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8811) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8812) "0493 SLI_CONFIG_SPECIAL mailbox "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8813) "failed with status x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8814) rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8815) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8817) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8818) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8819) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8820) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8821) case LPFC_SLI_INTF_IF_TYPE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8822) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8823) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8825) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8828) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8829) * lpfc_sli4_queue_verify - Verify and update EQ counts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8830) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8831) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8832) * This routine is invoked to check the user settable queue counts for EQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8833) * After this routine is called the counts will be set to valid values that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8834) * adhere to the constraints of the system's interrupt vectors and the port's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8835) * queue resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8836) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8837) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8838) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8839) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8840) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8841) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8842) lpfc_sli4_queue_verify(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8843) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8844) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8845) * Sanity check for configured queue parameters against the run-time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8846) * device parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8847) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8849) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8850) if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8851) phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8852) if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8853) phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8856) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8857) "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8858) phba->cfg_hdw_queue, phba->cfg_irq_chann,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8859) phba->cfg_nvmet_mrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8861) /* Get EQ depth from module parameter, fake the default for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8862) phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8863) phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8865) /* Get CQ depth from module parameter, fake the default for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8866) phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8867) phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8868) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8871) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8872) lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8874) struct lpfc_queue *qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8875) u32 wqesize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8876) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8878) cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8879) /* Create Fast Path IO CQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8880) if (phba->enab_exp_wqcq_pages)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8881) /* Increase the CQ size when WQEs contain an embedded cdb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8882) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8883) phba->sli4_hba.cq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8884) LPFC_CQE_EXP_COUNT, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8886) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8887) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8888) phba->sli4_hba.cq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8889) phba->sli4_hba.cq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8890) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8891) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8892) "0499 Failed allocate fast-path IO CQ (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8893) idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8894) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8896) qdesc->qe_valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8897) qdesc->hdwq = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8898) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8899) phba->sli4_hba.hdwq[idx].io_cq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8901) /* Create Fast Path IO WQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8902) if (phba->enab_exp_wqcq_pages) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8903) /* Increase the WQ size when WQEs contain an embedded cdb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8904) wqesize = (phba->fcp_embed_io) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8905) LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8906) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8907) wqesize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8908) LPFC_WQE_EXP_COUNT, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8909) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8910) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8911) phba->sli4_hba.wq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8912) phba->sli4_hba.wq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8914) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8915) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8916) "0503 Failed allocate fast-path IO WQ (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8917) idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8918) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8920) qdesc->hdwq = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8921) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8922) phba->sli4_hba.hdwq[idx].io_wq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8923) list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8924) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8927) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8928) * lpfc_sli4_queue_create - Create all the SLI4 queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8929) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8930) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8931) * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8932) * operation. For each SLI4 queue type, the parameters such as queue entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8933) * count (queue depth) shall be taken from the module parameter. For now,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8934) * we just use some constant number as place holder.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8935) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8936) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8937) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8938) * -ENOMEM - No availble memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8939) * -EIO - The mailbox failed to complete successfully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8940) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8941) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8942) lpfc_sli4_queue_create(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8943) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8944) struct lpfc_queue *qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8945) int idx, cpu, eqcpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8946) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8947) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8948) struct lpfc_vector_map_info *eqcpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8949) struct lpfc_eq_intr_info *eqi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8951) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8952) * Create HBA Record arrays.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8953) * Both NVME and FCP will share that same vectors / EQs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8954) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8955) phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8956) phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8957) phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8958) phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8959) phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8960) phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8961) phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8962) phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8963) phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8964) phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8966) if (!phba->sli4_hba.hdwq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8967) phba->sli4_hba.hdwq = kcalloc(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8968) phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8969) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8970) if (!phba->sli4_hba.hdwq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8971) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8972) "6427 Failed allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8973) "fast-path Hardware Queue array\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8974) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8975) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8976) /* Prepare hardware queues to take IO buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8977) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8978) qp = &phba->sli4_hba.hdwq[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8979) spin_lock_init(&qp->io_buf_list_get_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8980) spin_lock_init(&qp->io_buf_list_put_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8981) INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8982) INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8983) qp->get_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8984) qp->put_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8985) qp->total_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8986) spin_lock_init(&qp->abts_io_buf_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8987) INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8988) qp->abts_scsi_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8989) qp->abts_nvme_io_bufs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8990) INIT_LIST_HEAD(&qp->sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8991) INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8992) spin_lock_init(&qp->hdwq_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8993) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8996) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8997) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8998) phba->sli4_hba.nvmet_cqset = kcalloc(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8999) phba->cfg_nvmet_mrq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9000) sizeof(struct lpfc_queue *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9001) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9002) if (!phba->sli4_hba.nvmet_cqset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9003) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9004) "3121 Fail allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9005) "fast-path CQ set array\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9006) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9008) phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9009) phba->cfg_nvmet_mrq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9010) sizeof(struct lpfc_queue *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9011) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9012) if (!phba->sli4_hba.nvmet_mrq_hdr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9013) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9014) "3122 Fail allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9015) "fast-path RQ set hdr array\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9016) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9017) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9018) phba->sli4_hba.nvmet_mrq_data = kcalloc(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9019) phba->cfg_nvmet_mrq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9020) sizeof(struct lpfc_queue *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9021) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9022) if (!phba->sli4_hba.nvmet_mrq_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9023) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9024) "3124 Fail allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9025) "fast-path RQ set data array\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9026) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9027) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9029) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9031) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9033) /* Create HBA Event Queues (EQs) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9034) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9035) /* We only want to create 1 EQ per vector, even though
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9036) * multiple CPUs might be using that vector. so only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9037) * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9038) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9039) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9040) if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9041) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9043) /* Get a ptr to the Hardware Queue associated with this CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9044) qp = &phba->sli4_hba.hdwq[cpup->hdwq];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9046) /* Allocate an EQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9047) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9048) phba->sli4_hba.eq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9049) phba->sli4_hba.eq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9050) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9051) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9052) "0497 Failed allocate EQ (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9053) cpup->hdwq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9054) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9055) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9056) qdesc->qe_valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9057) qdesc->hdwq = cpup->hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9058) qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9059) qdesc->last_cpu = qdesc->chann;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9061) /* Save the allocated EQ in the Hardware Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9062) qp->hba_eq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9064) eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9065) list_add(&qdesc->cpu_list, &eqi->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9068) /* Now we need to populate the other Hardware Queues, that share
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9069) * an IRQ vector, with the associated EQ ptr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9070) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9071) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9072) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9074) /* Check for EQ already allocated in previous loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9075) if (cpup->flag & LPFC_CPU_FIRST_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9076) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9078) /* Check for multiple CPUs per hdwq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9079) qp = &phba->sli4_hba.hdwq[cpup->hdwq];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9080) if (qp->hba_eq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9081) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9083) /* We need to share an EQ for this hdwq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9084) eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9085) eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9086) qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9087) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9089) /* Allocate IO Path SLI4 CQ/WQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9090) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9091) if (lpfc_alloc_io_wq_cq(phba, idx))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9092) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9093) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9095) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9096) for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9097) cpu = lpfc_find_cpu_handle(phba, idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9098) LPFC_FIND_BY_HDWQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9099) qdesc = lpfc_sli4_queue_alloc(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9100) LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9101) phba->sli4_hba.cq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9102) phba->sli4_hba.cq_ecount,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9103) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9104) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9105) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9106) "3142 Failed allocate NVME "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9107) "CQ Set (%d)\n", idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9108) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9110) qdesc->qe_valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9111) qdesc->hdwq = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9112) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9113) phba->sli4_hba.nvmet_cqset[idx] = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9118) * Create Slow Path Completion Queues (CQs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9119) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9121) cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9122) /* Create slow-path Mailbox Command Complete Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9123) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9124) phba->sli4_hba.cq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9125) phba->sli4_hba.cq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9126) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9127) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9128) "0500 Failed allocate slow-path mailbox CQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9129) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9131) qdesc->qe_valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9132) phba->sli4_hba.mbx_cq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9134) /* Create slow-path ELS Complete Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9135) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9136) phba->sli4_hba.cq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9137) phba->sli4_hba.cq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9138) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9139) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9140) "0501 Failed allocate slow-path ELS CQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9141) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9143) qdesc->qe_valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9144) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9145) phba->sli4_hba.els_cq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9148) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9149) * Create Slow Path Work Queues (WQs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9150) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9152) /* Create Mailbox Command Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9154) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9155) phba->sli4_hba.mq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9156) phba->sli4_hba.mq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9157) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9158) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9159) "0505 Failed allocate slow-path MQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9160) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9162) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9163) phba->sli4_hba.mbx_wq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9166) * Create ELS Work Queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9167) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9169) /* Create slow-path ELS Work Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9170) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9171) phba->sli4_hba.wq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9172) phba->sli4_hba.wq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9173) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9174) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9175) "0504 Failed allocate slow-path ELS WQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9176) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9178) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9179) phba->sli4_hba.els_wq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9180) list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9182) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9183) /* Create NVME LS Complete Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9184) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9185) phba->sli4_hba.cq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9186) phba->sli4_hba.cq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9187) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9188) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9189) "6079 Failed allocate NVME LS CQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9190) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9192) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9193) qdesc->qe_valid = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9194) phba->sli4_hba.nvmels_cq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9196) /* Create NVME LS Work Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9197) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9198) phba->sli4_hba.wq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9199) phba->sli4_hba.wq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9200) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9201) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9202) "6080 Failed allocate NVME LS WQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9203) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9205) qdesc->chann = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9206) phba->sli4_hba.nvmels_wq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9207) list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9211) * Create Receive Queue (RQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9212) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9214) /* Create Receive Queue for header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9215) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9216) phba->sli4_hba.rq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9217) phba->sli4_hba.rq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9218) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9219) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9220) "0506 Failed allocate receive HRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9221) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9223) phba->sli4_hba.hdr_rq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9225) /* Create Receive Queue for data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9226) qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9227) phba->sli4_hba.rq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9228) phba->sli4_hba.rq_ecount, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9229) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9230) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9231) "0507 Failed allocate receive DRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9232) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9234) phba->sli4_hba.dat_rq = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9236) if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9237) phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9238) for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9239) cpu = lpfc_find_cpu_handle(phba, idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9240) LPFC_FIND_BY_HDWQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9241) /* Create NVMET Receive Queue for header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9242) qdesc = lpfc_sli4_queue_alloc(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9243) LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9244) phba->sli4_hba.rq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9245) LPFC_NVMET_RQE_DEF_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9246) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9247) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9248) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9249) "3146 Failed allocate "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9250) "receive HRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9251) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9253) qdesc->hdwq = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9254) phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9256) /* Only needed for header of RQ pair */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9257) qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9258) GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9259) cpu_to_node(cpu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9260) if (qdesc->rqbp == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9261) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9262) "6131 Failed allocate "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9263) "Header RQBP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9264) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9267) /* Put list in known state in case driver load fails. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9268) INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9270) /* Create NVMET Receive Queue for data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9271) qdesc = lpfc_sli4_queue_alloc(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9272) LPFC_DEFAULT_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9273) phba->sli4_hba.rq_esize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9274) LPFC_NVMET_RQE_DEF_COUNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9275) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9276) if (!qdesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9277) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9278) "3156 Failed allocate "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9279) "receive DRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9280) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9282) qdesc->hdwq = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9283) phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9287) /* Clear NVME stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9288) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9289) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9290) memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9291) sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9295) /* Clear SCSI stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9296) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9297) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9298) memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9299) sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9303) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9305) out_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9306) lpfc_sli4_queue_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9307) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9310) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9311) __lpfc_sli4_release_queue(struct lpfc_queue **qp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9313) if (*qp != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9314) lpfc_sli4_queue_free(*qp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9315) *qp = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9319) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9320) lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9322) int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9324) if (*qs == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9325) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9327) for (idx = 0; idx < max; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9328) __lpfc_sli4_release_queue(&(*qs)[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9330) kfree(*qs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9331) *qs = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9334) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9335) lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9337) struct lpfc_sli4_hdw_queue *hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9338) struct lpfc_queue *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9339) uint32_t idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9341) hdwq = phba->sli4_hba.hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9343) /* Loop thru all Hardware Queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9344) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9345) /* Free the CQ/WQ corresponding to the Hardware Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9346) lpfc_sli4_queue_free(hdwq[idx].io_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9347) lpfc_sli4_queue_free(hdwq[idx].io_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9348) hdwq[idx].hba_eq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9349) hdwq[idx].io_cq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9350) hdwq[idx].io_wq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9351) if (phba->cfg_xpsgl && !phba->nvmet_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9352) lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9353) lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9355) /* Loop thru all IRQ vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9356) for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9357) /* Free the EQ corresponding to the IRQ vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9358) eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9359) lpfc_sli4_queue_free(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9360) phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9364) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9365) * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9366) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9367) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9368) * This routine is invoked to release all the SLI4 queues with the FCoE HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9369) * operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9370) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9371) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9372) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9373) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9374) * -EIO - The mailbox failed to complete successfully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9375) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9376) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9377) lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9379) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9380) * Set FREE_INIT before beginning to free the queues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9381) * Wait until the users of queues to acknowledge to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9382) * release queues by clearing FREE_WAIT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9383) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9384) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9385) phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9386) while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9387) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9388) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9389) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9391) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9393) lpfc_sli4_cleanup_poll_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9395) /* Release HBA eqs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9396) if (phba->sli4_hba.hdwq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9397) lpfc_sli4_release_hdwq(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9399) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9400) lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9401) phba->cfg_nvmet_mrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9403) lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9404) phba->cfg_nvmet_mrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9405) lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9406) phba->cfg_nvmet_mrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9409) /* Release mailbox command work queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9410) __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9412) /* Release ELS work queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9413) __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9415) /* Release ELS work queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9416) __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9418) /* Release unsolicited receive queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9419) __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9420) __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9422) /* Release ELS complete queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9423) __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9425) /* Release NVME LS complete queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9426) __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9428) /* Release mailbox command complete queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9429) __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9431) /* Everything on this list has been freed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9432) INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9434) /* Done with freeing the queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9435) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9436) phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9437) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9440) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9441) lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9443) struct lpfc_rqb *rqbp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9444) struct lpfc_dmabuf *h_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9445) struct rqb_dmabuf *rqb_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9447) rqbp = rq->rqbp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9448) while (!list_empty(&rqbp->rqb_buffer_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9449) list_remove_head(&rqbp->rqb_buffer_list, h_buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9450) struct lpfc_dmabuf, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9452) rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9453) (rqbp->rqb_free_buffer)(phba, rqb_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9454) rqbp->buffer_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9456) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9459) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9460) lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9461) struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9462) int qidx, uint32_t qtype)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9464) struct lpfc_sli_ring *pring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9465) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9467) if (!eq || !cq || !wq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9468) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9469) "6085 Fast-path %s (%d) not allocated\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9470) ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9471) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9474) /* create the Cq first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9475) rc = lpfc_cq_create(phba, cq, eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9476) (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9477) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9478) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9479) "6086 Failed setup of CQ (%d), rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9480) qidx, (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9481) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9484) if (qtype != LPFC_MBOX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9485) /* Setup cq_map for fast lookup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9486) if (cq_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9487) *cq_map = cq->queue_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9489) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9490) "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9491) qidx, cq->queue_id, qidx, eq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9493) /* create the wq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9494) rc = lpfc_wq_create(phba, wq, cq, qtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9495) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9496) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9497) "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9498) qidx, (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9499) /* no need to tear down cq - caller will do so */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9500) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9503) /* Bind this CQ/WQ to the NVME ring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9504) pring = wq->pring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9505) pring->sli.sli4.wqp = (void *)wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9506) cq->pring = pring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9508) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9509) "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9510) qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9511) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9512) rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9513) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9514) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9515) "0539 Failed setup of slow-path MQ: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9516) "rc = 0x%x\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9517) /* no need to tear down cq - caller will do so */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9518) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9521) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9522) "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9523) phba->sli4_hba.mbx_wq->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9524) phba->sli4_hba.mbx_cq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9527) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9530) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9531) * lpfc_setup_cq_lookup - Setup the CQ lookup table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9532) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9533) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9534) * This routine will populate the cq_lookup table by all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9535) * available CQ queue_id's.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9536) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9537) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9538) lpfc_setup_cq_lookup(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9540) struct lpfc_queue *eq, *childq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9541) int qidx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9543) memset(phba->sli4_hba.cq_lookup, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9544) (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9545) /* Loop thru all IRQ vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9546) for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9547) /* Get the EQ corresponding to the IRQ vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9548) eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9549) if (!eq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9550) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9551) /* Loop through all CQs associated with that EQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9552) list_for_each_entry(childq, &eq->child_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9553) if (childq->queue_id > phba->sli4_hba.cq_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9554) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9555) if (childq->subtype == LPFC_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9556) phba->sli4_hba.cq_lookup[childq->queue_id] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9557) childq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9562) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9563) * lpfc_sli4_queue_setup - Set up all the SLI4 queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9564) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9565) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9566) * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9567) * operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9568) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9569) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9570) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9571) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9572) * -EIO - The mailbox failed to complete successfully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9573) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9574) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9575) lpfc_sli4_queue_setup(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9576) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9577) uint32_t shdr_status, shdr_add_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9578) union lpfc_sli4_cfg_shdr *shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9579) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9580) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9581) LPFC_MBOXQ_t *mboxq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9582) int qidx, cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9583) uint32_t length, usdelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9584) int rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9586) /* Check for dual-ULP support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9587) mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9588) if (!mboxq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9589) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9590) "3249 Unable to allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9591) "QUERY_FW_CFG mailbox command\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9592) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9594) length = (sizeof(struct lpfc_mbx_query_fw_config) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9595) sizeof(struct lpfc_sli4_cfg_mhdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9596) lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9597) LPFC_MBOX_OPCODE_QUERY_FW_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9598) length, LPFC_SLI4_MBX_EMBED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9600) rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9602) shdr = (union lpfc_sli4_cfg_shdr *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9603) &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9604) shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9605) shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9606) if (shdr_status || shdr_add_status || rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9607) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9608) "3250 QUERY_FW_CFG mailbox failed with status "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9609) "x%x add_status x%x, mbx status x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9610) shdr_status, shdr_add_status, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9611) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9612) rc = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9613) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9616) phba->sli4_hba.fw_func_mode =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9617) mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9618) phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9619) phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9620) phba->sli4_hba.physical_port =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9621) mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9622) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9623) "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9624) "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9625) phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9627) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9629) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9630) * Set up HBA Event Queues (EQs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9631) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9632) qp = phba->sli4_hba.hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9634) /* Set up HBA event queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9635) if (!qp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9636) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9637) "3147 Fast-path EQs not allocated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9638) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9639) goto out_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9642) /* Loop thru all IRQ vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9643) for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9644) /* Create HBA Event Queues (EQs) in order */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9645) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9646) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9648) /* Look for the CPU thats using that vector with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9649) * LPFC_CPU_FIRST_IRQ set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9650) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9651) if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9652) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9653) if (qidx != cpup->eq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9654) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9656) /* Create an EQ for that vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9657) rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9658) phba->cfg_fcp_imax);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9659) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9660) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9661) "0523 Failed setup of fast-path"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9662) " EQ (%d), rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9663) cpup->eq, (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9664) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9667) /* Save the EQ for that vector in the hba_eq_hdl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9668) phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9669) qp[cpup->hdwq].hba_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9671) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9672) "2584 HBA EQ setup: queue[%d]-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9673) cpup->eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9674) qp[cpup->hdwq].hba_eq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9678) /* Loop thru all Hardware Queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9679) for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9680) cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9681) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9683) /* Create the CQ/WQ corresponding to the Hardware Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9684) rc = lpfc_create_wq_cq(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9685) phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9686) qp[qidx].io_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9687) qp[qidx].io_wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9688) &phba->sli4_hba.hdwq[qidx].io_cq_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9689) qidx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9690) LPFC_IO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9691) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9692) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9693) "0535 Failed to setup fastpath "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9694) "IO WQ/CQ (%d), rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9695) qidx, (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9696) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9700) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9701) * Set up Slow Path Complete Queues (CQs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9702) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9704) /* Set up slow-path MBOX CQ/MQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9706) if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9707) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9708) "0528 %s not allocated\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9709) phba->sli4_hba.mbx_cq ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9710) "Mailbox WQ" : "Mailbox CQ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9711) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9712) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9715) rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9716) phba->sli4_hba.mbx_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9717) phba->sli4_hba.mbx_wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9718) NULL, 0, LPFC_MBOX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9719) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9720) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9721) "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9722) (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9723) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9725) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9726) if (!phba->sli4_hba.nvmet_cqset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9727) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9728) "3165 Fast-path NVME CQ Set "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9729) "array not allocated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9730) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9731) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9733) if (phba->cfg_nvmet_mrq > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9734) rc = lpfc_cq_create_set(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9735) phba->sli4_hba.nvmet_cqset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9736) qp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9737) LPFC_WCQ, LPFC_NVMET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9738) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9739) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9740) "3164 Failed setup of NVME CQ "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9741) "Set, rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9742) (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9743) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9745) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9746) /* Set up NVMET Receive Complete Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9747) rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9748) qp[0].hba_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9749) LPFC_WCQ, LPFC_NVMET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9750) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9751) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9752) "6089 Failed setup NVMET CQ: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9753) "rc = 0x%x\n", (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9754) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9756) phba->sli4_hba.nvmet_cqset[0]->chann = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9758) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9759) "6090 NVMET CQ setup: cq-id=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9760) "parent eq-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9761) phba->sli4_hba.nvmet_cqset[0]->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9762) qp[0].hba_eq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9766) /* Set up slow-path ELS WQ/CQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9767) if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9768) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9769) "0530 ELS %s not allocated\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9770) phba->sli4_hba.els_cq ? "WQ" : "CQ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9771) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9772) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9774) rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9775) phba->sli4_hba.els_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9776) phba->sli4_hba.els_wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9777) NULL, 0, LPFC_ELS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9778) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9779) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9780) "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9781) (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9782) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9784) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9785) "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9786) phba->sli4_hba.els_wq->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9787) phba->sli4_hba.els_cq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9789) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9790) /* Set up NVME LS Complete Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9791) if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9792) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9793) "6091 LS %s not allocated\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9794) phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9795) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9796) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9798) rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9799) phba->sli4_hba.nvmels_cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9800) phba->sli4_hba.nvmels_wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9801) NULL, 0, LPFC_NVME_LS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9802) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9803) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9804) "0526 Failed setup of NVVME LS WQ/CQ: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9805) "rc = 0x%x\n", (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9806) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9809) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9810) "6096 ELS WQ setup: wq-id=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9811) "parent cq-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9812) phba->sli4_hba.nvmels_wq->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9813) phba->sli4_hba.nvmels_cq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9816) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9817) * Create NVMET Receive Queue (RQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9818) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9819) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9820) if ((!phba->sli4_hba.nvmet_cqset) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9821) (!phba->sli4_hba.nvmet_mrq_hdr) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9822) (!phba->sli4_hba.nvmet_mrq_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9823) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9824) "6130 MRQ CQ Queues not "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9825) "allocated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9826) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9827) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9829) if (phba->cfg_nvmet_mrq > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9830) rc = lpfc_mrq_create(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9831) phba->sli4_hba.nvmet_mrq_hdr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9832) phba->sli4_hba.nvmet_mrq_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9833) phba->sli4_hba.nvmet_cqset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9834) LPFC_NVMET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9835) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9836) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9837) "6098 Failed setup of NVMET "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9838) "MRQ: rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9839) (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9840) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9843) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9844) rc = lpfc_rq_create(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9845) phba->sli4_hba.nvmet_mrq_hdr[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9846) phba->sli4_hba.nvmet_mrq_data[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9847) phba->sli4_hba.nvmet_cqset[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9848) LPFC_NVMET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9849) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9850) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9851) "6057 Failed setup of NVMET "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9852) "Receive Queue: rc = 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9853) (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9854) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9857) lpfc_printf_log(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9858) phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9859) "6099 NVMET RQ setup: hdr-rq-id=%d, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9860) "dat-rq-id=%d parent cq-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9861) phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9862) phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9863) phba->sli4_hba.nvmet_cqset[0]->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9868) if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9869) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9870) "0540 Receive Queue not allocated\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9871) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9872) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9875) rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9876) phba->sli4_hba.els_cq, LPFC_USOL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9877) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9878) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9879) "0541 Failed setup of Receive Queue: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9880) "rc = 0x%x\n", (uint32_t)rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9881) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9882) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9884) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9885) "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9886) "parent cq-id=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9887) phba->sli4_hba.hdr_rq->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9888) phba->sli4_hba.dat_rq->queue_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9889) phba->sli4_hba.els_cq->queue_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9891) if (phba->cfg_fcp_imax)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9892) usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9893) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9894) usdelay = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9896) for (qidx = 0; qidx < phba->cfg_irq_chann;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9897) qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9898) lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9899) usdelay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9901) if (phba->sli4_hba.cq_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9902) kfree(phba->sli4_hba.cq_lookup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9903) phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9904) sizeof(struct lpfc_queue *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9905) if (!phba->sli4_hba.cq_lookup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9906) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9907) "0549 Failed setup of CQ Lookup table: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9908) "size 0x%x\n", phba->sli4_hba.cq_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9909) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9910) goto out_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9912) lpfc_setup_cq_lookup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9914) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9916) out_destroy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9917) lpfc_sli4_queue_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9918) out_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9919) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9922) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9923) * lpfc_sli4_queue_unset - Unset all the SLI4 queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9924) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9925) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9926) * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9927) * operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9928) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9929) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9930) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9931) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9932) * -EIO - The mailbox failed to complete successfully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9933) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9934) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9935) lpfc_sli4_queue_unset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9937) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9938) struct lpfc_queue *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9939) int qidx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9941) /* Unset mailbox command work queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9942) if (phba->sli4_hba.mbx_wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9943) lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9945) /* Unset NVME LS work queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9946) if (phba->sli4_hba.nvmels_wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9947) lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9949) /* Unset ELS work queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9950) if (phba->sli4_hba.els_wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9951) lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9953) /* Unset unsolicited receive queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9954) if (phba->sli4_hba.hdr_rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9955) lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9956) phba->sli4_hba.dat_rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9958) /* Unset mailbox command complete queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9959) if (phba->sli4_hba.mbx_cq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9960) lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9962) /* Unset ELS complete queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9963) if (phba->sli4_hba.els_cq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9964) lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9966) /* Unset NVME LS complete queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9967) if (phba->sli4_hba.nvmels_cq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9968) lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9970) if (phba->nvmet_support) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9971) /* Unset NVMET MRQ queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9972) if (phba->sli4_hba.nvmet_mrq_hdr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9973) for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9974) lpfc_rq_destroy(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9975) phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9976) phba->sli4_hba.nvmet_mrq_hdr[qidx],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9977) phba->sli4_hba.nvmet_mrq_data[qidx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9980) /* Unset NVMET CQ Set complete queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9981) if (phba->sli4_hba.nvmet_cqset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9982) for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9983) lpfc_cq_destroy(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9984) phba, phba->sli4_hba.nvmet_cqset[qidx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9988) /* Unset fast-path SLI4 queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9989) if (phba->sli4_hba.hdwq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9990) /* Loop thru all Hardware Queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9991) for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9992) /* Destroy the CQ/WQ corresponding to Hardware Queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9993) qp = &phba->sli4_hba.hdwq[qidx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9994) lpfc_wq_destroy(phba, qp->io_wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9995) lpfc_cq_destroy(phba, qp->io_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9997) /* Loop thru all IRQ vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9998) for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9999) /* Destroy the EQ corresponding to the IRQ vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10000) eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10001) lpfc_eq_destroy(phba, eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10003) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10005) kfree(phba->sli4_hba.cq_lookup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10006) phba->sli4_hba.cq_lookup = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10007) phba->sli4_hba.cq_max = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10008) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10010) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10011) * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10012) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10013) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10014) * This routine is invoked to allocate and set up a pool of completion queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10015) * events. The body of the completion queue event is a completion queue entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10016) * CQE. For now, this pool is used for the interrupt service routine to queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10017) * the following HBA completion queue events for the worker thread to process:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10018) * - Mailbox asynchronous events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10019) * - Receive queue completion unsolicited events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10020) * Later, this can be used for all the slow-path events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10021) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10022) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10023) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10024) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10025) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10026) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10027) lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10028) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10029) struct lpfc_cq_event *cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10030) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10032) for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10033) cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10034) if (!cq_event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10035) goto out_pool_create_fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10036) list_add_tail(&cq_event->list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10037) &phba->sli4_hba.sp_cqe_event_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10039) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10041) out_pool_create_fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10042) lpfc_sli4_cq_event_pool_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10043) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10044) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10046) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10047) * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10048) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10049) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10050) * This routine is invoked to free the pool of completion queue events at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10051) * driver unload time. Note that, it is the responsibility of the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10052) * cleanup routine to free all the outstanding completion-queue events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10053) * allocated from this pool back into the pool before invoking this routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10054) * to destroy the pool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10055) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10056) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10057) lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10058) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10059) struct lpfc_cq_event *cq_event, *next_cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10061) list_for_each_entry_safe(cq_event, next_cq_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10062) &phba->sli4_hba.sp_cqe_event_pool, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10063) list_del(&cq_event->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10064) kfree(cq_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10065) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10068) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10069) * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10070) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10071) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10072) * This routine is the lock free version of the API invoked to allocate a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10073) * completion-queue event from the free pool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10074) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10075) * Return: Pointer to the newly allocated completion-queue event if successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10076) * NULL otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10077) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10078) struct lpfc_cq_event *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10079) __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10080) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10081) struct lpfc_cq_event *cq_event = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10083) list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10084) struct lpfc_cq_event, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10085) return cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10086) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10088) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10089) * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10090) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10091) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10092) * This routine is the lock version of the API invoked to allocate a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10093) * completion-queue event from the free pool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10094) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10095) * Return: Pointer to the newly allocated completion-queue event if successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10096) * NULL otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10097) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10098) struct lpfc_cq_event *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10099) lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10101) struct lpfc_cq_event *cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10102) unsigned long iflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10104) spin_lock_irqsave(&phba->hbalock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10105) cq_event = __lpfc_sli4_cq_event_alloc(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10106) spin_unlock_irqrestore(&phba->hbalock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10107) return cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10110) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10111) * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10112) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10113) * @cq_event: pointer to the completion queue event to be freed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10114) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10115) * This routine is the lock free version of the API invoked to release a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10116) * completion-queue event back into the free pool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10117) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10118) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10119) __lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10120) struct lpfc_cq_event *cq_event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10122) list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10125) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10126) * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10127) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10128) * @cq_event: pointer to the completion queue event to be freed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10129) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10130) * This routine is the lock version of the API invoked to release a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10131) * completion-queue event back into the free pool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10132) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10133) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10134) lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10135) struct lpfc_cq_event *cq_event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10137) unsigned long iflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10138) spin_lock_irqsave(&phba->hbalock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10139) __lpfc_sli4_cq_event_release(phba, cq_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10140) spin_unlock_irqrestore(&phba->hbalock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10143) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10144) * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10145) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10146) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10147) * This routine is to free all the pending completion-queue events to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10148) * back into the free pool for device reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10149) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10150) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10151) lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10153) LIST_HEAD(cq_event_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10154) struct lpfc_cq_event *cq_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10155) unsigned long iflags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10157) /* Retrieve all the pending WCQEs from pending WCQE lists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10159) /* Pending ELS XRI abort events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10160) spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10161) list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10162) &cq_event_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10163) spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10165) /* Pending asynnc events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10166) spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10167) list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10168) &cq_event_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10169) spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10171) while (!list_empty(&cq_event_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10172) list_remove_head(&cq_event_list, cq_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10173) struct lpfc_cq_event, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10174) lpfc_sli4_cq_event_release(phba, cq_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10178) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10179) * lpfc_pci_function_reset - Reset pci function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10180) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10181) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10182) * This routine is invoked to request a PCI function reset. It will destroys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10183) * all resources assigned to the PCI function which originates this request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10184) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10185) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10186) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10187) * -ENOMEM - No available memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10188) * -EIO - The mailbox failed to complete successfully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10189) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10190) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10191) lpfc_pci_function_reset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10193) LPFC_MBOXQ_t *mboxq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10194) uint32_t rc = 0, if_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10195) uint32_t shdr_status, shdr_add_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10196) uint32_t rdy_chk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10197) uint32_t port_reset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10198) union lpfc_sli4_cfg_shdr *shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10199) struct lpfc_register reg_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10200) uint16_t devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10202) if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10203) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10204) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10205) mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10206) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10207) if (!mboxq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10208) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10209) "0494 Unable to allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10210) "issuing SLI_FUNCTION_RESET mailbox "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10211) "command\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10212) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10215) /* Setup PCI function reset mailbox-ioctl command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10216) lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10217) LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10218) LPFC_SLI4_MBX_EMBED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10219) rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10220) shdr = (union lpfc_sli4_cfg_shdr *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10221) &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10222) shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10223) shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10224) &shdr->response);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10225) mempool_free(mboxq, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10226) if (shdr_status || shdr_add_status || rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10227) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10228) "0495 SLI_FUNCTION_RESET mailbox "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10229) "failed with status x%x add_status x%x,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10230) " mbx status x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10231) shdr_status, shdr_add_status, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10232) rc = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10234) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10235) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10236) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10237) wait:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10238) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10239) * Poll the Port Status Register and wait for RDY for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10240) * up to 30 seconds. If the port doesn't respond, treat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10241) * it as an error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10242) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10243) for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10244) if (lpfc_readl(phba->sli4_hba.u.if_type2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10245) STATUSregaddr, ®_data.word0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10246) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10247) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10249) if (bf_get(lpfc_sliport_status_rdy, ®_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10250) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10251) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10254) if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10255) phba->work_status[0] = readl(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10256) phba->sli4_hba.u.if_type2.ERR1regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10257) phba->work_status[1] = readl(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10258) phba->sli4_hba.u.if_type2.ERR2regaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10259) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10260) "2890 Port not ready, port status reg "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10261) "0x%x error 1=0x%x, error 2=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10262) reg_data.word0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10263) phba->work_status[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10264) phba->work_status[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10265) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10266) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10269) if (!port_reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10270) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10271) * Reset the port now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10273) reg_data.word0 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10274) bf_set(lpfc_sliport_ctrl_end, ®_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10275) LPFC_SLIPORT_LITTLE_ENDIAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10276) bf_set(lpfc_sliport_ctrl_ip, ®_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10277) LPFC_SLIPORT_INIT_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10278) writel(reg_data.word0, phba->sli4_hba.u.if_type2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10279) CTRLregaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10280) /* flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10281) pci_read_config_word(phba->pcidev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10282) PCI_DEVICE_ID, &devid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10284) port_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10285) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10286) goto wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10287) } else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10288) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10289) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10291) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10293) case LPFC_SLI_INTF_IF_TYPE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10294) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10295) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10298) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10299) /* Catch the not-ready port failure after a port reset. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10300) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10301) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10302) "3317 HBA not functional: IP Reset Failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10303) "try: echo fw_reset > board_mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10304) rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10307) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10310) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10311) * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10312) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10313) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10314) * This routine is invoked to set up the PCI device memory space for device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10315) * with SLI-4 interface spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10316) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10317) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10318) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10319) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10320) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10321) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10322) lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10324) struct pci_dev *pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10325) unsigned long bar0map_len, bar1map_len, bar2map_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10326) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10327) uint32_t if_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10329) if (!pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10330) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10332) /* Set the device DMA mask size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10333) error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10334) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10335) error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10336) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10337) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10339) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10340) * The BARs and register set definitions and offset locations are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10341) * dependent on the if_type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10342) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10343) if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10344) &phba->sli4_hba.sli_intf.word0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10345) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10348) /* There is no SLI3 failback for SLI4 devices. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10349) if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10350) LPFC_SLI_INTF_VALID) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10351) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10352) "2894 SLI_INTF reg contents invalid "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10353) "sli_intf reg 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10354) phba->sli4_hba.sli_intf.word0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10355) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10358) if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10359) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10360) * Get the bus address of SLI4 device Bar regions and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10361) * number of bytes required by each mapping. The mapping of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10362) * particular PCI BARs regions is dependent on the type of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10363) * SLI4 device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10365) if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10366) phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10367) bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10369) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10370) * Map SLI4 PCI Config Space Register base to a kernel virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10371) * addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10373) phba->sli4_hba.conf_regs_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10374) ioremap(phba->pci_bar0_map, bar0map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10375) if (!phba->sli4_hba.conf_regs_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10376) dev_printk(KERN_ERR, &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10377) "ioremap failed for SLI4 PCI config "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10378) "registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10379) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10381) phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10382) /* Set up BAR0 PCI config space register memory map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10383) lpfc_sli4_bar0_register_memmap(phba, if_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10384) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10385) phba->pci_bar0_map = pci_resource_start(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10386) bar0map_len = pci_resource_len(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10387) if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10388) dev_printk(KERN_ERR, &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10389) "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10390) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10392) phba->sli4_hba.conf_regs_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10393) ioremap(phba->pci_bar0_map, bar0map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10394) if (!phba->sli4_hba.conf_regs_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10395) dev_printk(KERN_ERR, &pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10396) "ioremap failed for SLI4 PCI config "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10397) "registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10398) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10400) lpfc_sli4_bar0_register_memmap(phba, if_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10403) if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10404) if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10405) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10406) * Map SLI4 if type 0 HBA Control Register base to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10407) * kernel virtual address and setup the registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10408) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10409) phba->pci_bar1_map = pci_resource_start(pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10410) PCI_64BIT_BAR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10411) bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10412) phba->sli4_hba.ctrl_regs_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10413) ioremap(phba->pci_bar1_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10414) bar1map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10415) if (!phba->sli4_hba.ctrl_regs_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10416) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10417) "ioremap failed for SLI4 HBA "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10418) "control registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10419) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10420) goto out_iounmap_conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10422) phba->pci_bar2_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10423) phba->sli4_hba.ctrl_regs_memmap_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10424) lpfc_sli4_bar1_register_memmap(phba, if_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10425) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10426) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10427) goto out_iounmap_conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10431) if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10432) (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10433) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10434) * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10435) * virtual address and setup the registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10437) phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10438) bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10439) phba->sli4_hba.drbl_regs_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10440) ioremap(phba->pci_bar1_map, bar1map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10441) if (!phba->sli4_hba.drbl_regs_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10442) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10443) "ioremap failed for SLI4 HBA doorbell registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10444) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10445) goto out_iounmap_conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10447) phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10448) lpfc_sli4_bar1_register_memmap(phba, if_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10451) if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10452) if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10453) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10454) * Map SLI4 if type 0 HBA Doorbell Register base to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10455) * a kernel virtual address and setup the registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10456) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10457) phba->pci_bar2_map = pci_resource_start(pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10458) PCI_64BIT_BAR4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10459) bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10460) phba->sli4_hba.drbl_regs_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10461) ioremap(phba->pci_bar2_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10462) bar2map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10463) if (!phba->sli4_hba.drbl_regs_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10464) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10465) "ioremap failed for SLI4 HBA"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10466) " doorbell registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10467) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10468) goto out_iounmap_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10470) phba->pci_bar4_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10471) phba->sli4_hba.drbl_regs_memmap_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10472) error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10473) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10474) goto out_iounmap_all;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10475) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10476) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10477) goto out_iounmap_all;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10481) if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10482) pci_resource_start(pdev, PCI_64BIT_BAR4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10483) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10484) * Map SLI4 if type 6 HBA DPP Register base to a kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10485) * virtual address and setup the registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10486) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10487) phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10488) bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10489) phba->sli4_hba.dpp_regs_memmap_p =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10490) ioremap(phba->pci_bar2_map, bar2map_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10491) if (!phba->sli4_hba.dpp_regs_memmap_p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10492) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10493) "ioremap failed for SLI4 HBA dpp registers.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10494) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10495) goto out_iounmap_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10497) phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10500) /* Set up the EQ/CQ register handeling functions now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10501) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10502) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10503) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10504) phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10505) phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10506) phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10507) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10508) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10509) phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10510) phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10511) phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10512) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10513) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10514) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10517) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10519) out_iounmap_all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10520) iounmap(phba->sli4_hba.drbl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10521) out_iounmap_ctrl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10522) iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10523) out_iounmap_conf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10524) iounmap(phba->sli4_hba.conf_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10526) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10529) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10530) * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10531) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10532) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10533) * This routine is invoked to unset the PCI device memory space for device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10534) * with SLI-4 interface spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10535) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10536) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10537) lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10539) uint32_t if_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10540) if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10542) switch (if_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10543) case LPFC_SLI_INTF_IF_TYPE_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10544) iounmap(phba->sli4_hba.drbl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10545) iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10546) iounmap(phba->sli4_hba.conf_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10547) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10548) case LPFC_SLI_INTF_IF_TYPE_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10549) iounmap(phba->sli4_hba.conf_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10550) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10551) case LPFC_SLI_INTF_IF_TYPE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10552) iounmap(phba->sli4_hba.drbl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10553) iounmap(phba->sli4_hba.conf_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10554) if (phba->sli4_hba.dpp_regs_memmap_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10555) iounmap(phba->sli4_hba.dpp_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10556) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10557) case LPFC_SLI_INTF_IF_TYPE_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10558) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10559) dev_printk(KERN_ERR, &phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10560) "FATAL - unsupported SLI4 interface type - %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10561) if_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10562) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10566) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10567) * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10568) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10569) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10570) * This routine is invoked to enable the MSI-X interrupt vectors to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10571) * with SLI-3 interface specs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10572) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10573) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10574) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10575) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10576) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10577) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10578) lpfc_sli_enable_msix(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10579) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10580) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10581) LPFC_MBOXQ_t *pmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10583) /* Set up MSI-X multi-message vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10584) rc = pci_alloc_irq_vectors(phba->pcidev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10585) LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10586) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10587) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10588) "0420 PCI enable MSI-X failed (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10589) goto vec_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10592) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10593) * Assign MSI-X vectors to interrupt handlers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10594) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10596) /* vector-0 is associated to slow-path handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10597) rc = request_irq(pci_irq_vector(phba->pcidev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10598) &lpfc_sli_sp_intr_handler, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10599) LPFC_SP_DRIVER_HANDLER_NAME, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10600) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10601) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10602) "0421 MSI-X slow-path request_irq failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10603) "(%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10604) goto msi_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10607) /* vector-1 is associated to fast-path handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10608) rc = request_irq(pci_irq_vector(phba->pcidev, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10609) &lpfc_sli_fp_intr_handler, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10610) LPFC_FP_DRIVER_HANDLER_NAME, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10612) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10613) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10614) "0429 MSI-X fast-path request_irq failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10615) "(%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10616) goto irq_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10619) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10620) * Configure HBA MSI-X attention conditions to messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10622) pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10624) if (!pmb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10625) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10626) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10627) "0474 Unable to allocate memory for issuing "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10628) "MBOX_CONFIG_MSI command\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10629) goto mem_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10631) rc = lpfc_config_msi(phba, pmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10632) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10633) goto mbx_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10634) rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10635) if (rc != MBX_SUCCESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10636) lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10637) "0351 Config MSI mailbox command failed, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10638) "mbxCmd x%x, mbxStatus x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10639) pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10640) goto mbx_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10643) /* Free memory allocated for mailbox command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10644) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10645) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10647) mbx_fail_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10648) /* Free memory allocated for mailbox command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10649) mempool_free(pmb, phba->mbox_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10651) mem_fail_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10652) /* free the irq already requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10653) free_irq(pci_irq_vector(phba->pcidev, 1), phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10655) irq_fail_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10656) /* free the irq already requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10657) free_irq(pci_irq_vector(phba->pcidev, 0), phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10659) msi_fail_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10660) /* Unconfigure MSI-X capability structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10661) pci_free_irq_vectors(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10663) vec_fail_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10664) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10667) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10668) * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10669) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10670) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10671) * This routine is invoked to enable the MSI interrupt mode to device with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10672) * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10673) * enable the MSI vector. The device driver is responsible for calling the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10674) * request_irq() to register MSI vector with a interrupt the handler, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10675) * is done in this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10676) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10677) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10678) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10679) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10680) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10681) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10682) lpfc_sli_enable_msi(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10684) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10686) rc = pci_enable_msi(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10687) if (!rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10688) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10689) "0462 PCI enable MSI mode success.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10690) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10691) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10692) "0471 PCI enable MSI mode failed (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10693) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10696) rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10697) 0, LPFC_DRIVER_NAME, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10698) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10699) pci_disable_msi(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10700) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10701) "0478 MSI request_irq failed (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10703) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10706) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10707) * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10708) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10709) * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10710) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10711) * This routine is invoked to enable device interrupt and associate driver's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10712) * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10713) * spec. Depends on the interrupt mode configured to the driver, the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10714) * will try to fallback from the configured interrupt mode to an interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10715) * mode which is supported by the platform, kernel, and device in the order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10716) * of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10717) * MSI-X -> MSI -> IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10718) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10719) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10720) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10721) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10722) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10723) static uint32_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10724) lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10725) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10726) uint32_t intr_mode = LPFC_INTR_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10727) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10729) if (cfg_mode == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10730) /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10731) retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10732) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10733) /* Now, try to enable MSI-X interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10734) retval = lpfc_sli_enable_msix(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10735) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10736) /* Indicate initialization to MSI-X mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10737) phba->intr_type = MSIX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10738) intr_mode = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10741) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10743) /* Fallback to MSI if MSI-X initialization failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10744) if (cfg_mode >= 1 && phba->intr_type == NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10745) retval = lpfc_sli_enable_msi(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10746) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10747) /* Indicate initialization to MSI mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10748) phba->intr_type = MSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10749) intr_mode = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10753) /* Fallback to INTx if both MSI-X/MSI initalization failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10754) if (phba->intr_type == NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10755) retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10756) IRQF_SHARED, LPFC_DRIVER_NAME, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10757) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10758) /* Indicate initialization to INTx mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10759) phba->intr_type = INTx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10760) intr_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10763) return intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10766) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10767) * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10768) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10769) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10770) * This routine is invoked to disable device interrupt and disassociate the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10771) * driver's interrupt handler(s) from interrupt vector(s) to device with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10772) * SLI-3 interface spec. Depending on the interrupt mode, the driver will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10773) * release the interrupt vector(s) for the message signaled interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10774) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10775) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10776) lpfc_sli_disable_intr(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10777) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10778) int nr_irqs, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10780) if (phba->intr_type == MSIX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10781) nr_irqs = LPFC_MSIX_VECTORS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10782) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10783) nr_irqs = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10785) for (i = 0; i < nr_irqs; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10786) free_irq(pci_irq_vector(phba->pcidev, i), phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10787) pci_free_irq_vectors(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10789) /* Reset interrupt management states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10790) phba->intr_type = NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10791) phba->sli.slistat.sli_intr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10794) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10795) * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10796) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10797) * @id: EQ vector index or Hardware Queue index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10798) * @match: LPFC_FIND_BY_EQ = match by EQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10799) * LPFC_FIND_BY_HDWQ = match by Hardware Queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10800) * Return the CPU that matches the selection criteria
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10801) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10802) static uint16_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10803) lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10805) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10806) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10808) /* Loop through all CPUs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10809) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10810) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10812) /* If we are matching by EQ, there may be multiple CPUs using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10813) * using the same vector, so select the one with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10814) * LPFC_CPU_FIRST_IRQ set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10815) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10816) if ((match == LPFC_FIND_BY_EQ) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10817) (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10818) (cpup->eq == id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10819) return cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10821) /* If matching by HDWQ, select the first CPU that matches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10822) if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10823) return cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10825) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10828) #ifdef CONFIG_X86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10829) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10830) * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10831) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10832) * @cpu: CPU map index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10833) * @phys_id: CPU package physical id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10834) * @core_id: CPU core id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10835) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10836) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10837) lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10838) uint16_t phys_id, uint16_t core_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10840) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10841) int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10843) for_each_present_cpu(idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10844) cpup = &phba->sli4_hba.cpu_map[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10845) /* Does the cpup match the one we are looking for */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10846) if ((cpup->phys_id == phys_id) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10847) (cpup->core_id == core_id) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10848) (cpu != idx))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10849) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10850) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10851) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10853) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10855) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10856) * lpfc_assign_eq_map_info - Assigns eq for vector_map structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10857) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10858) * @eqidx: index for eq and irq vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10859) * @flag: flags to set for vector_map structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10860) * @cpu: cpu used to index vector_map structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10861) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10862) * The routine assigns eq info into vector_map structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10863) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10864) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10865) lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10866) unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10867) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10868) struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10869) struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10871) cpup->eq = eqidx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10872) cpup->flag |= flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10874) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10875) "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10876) cpu, eqhdl->irq, cpup->eq, cpup->flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10879) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10880) * lpfc_cpu_map_array_init - Initialize cpu_map structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10881) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10882) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10883) * The routine initializes the cpu_map array structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10884) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10885) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10886) lpfc_cpu_map_array_init(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10888) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10889) struct lpfc_eq_intr_info *eqi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10890) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10892) for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10893) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10894) cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10895) cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10896) cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10897) cpup->eq = LPFC_VECTOR_MAP_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10898) cpup->flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10899) eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10900) INIT_LIST_HEAD(&eqi->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10901) eqi->icnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10905) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10906) * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10907) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10908) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10909) * The routine initializes the hba_eq_hdl array structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10910) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10911) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10912) lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10913) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10914) struct lpfc_hba_eq_hdl *eqhdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10915) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10917) for (i = 0; i < phba->cfg_irq_chann; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10918) eqhdl = lpfc_get_eq_hdl(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10919) eqhdl->irq = LPFC_VECTOR_MAP_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10920) eqhdl->phba = phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10921) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10924) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10925) * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10926) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10927) * @vectors: number of msix vectors allocated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10928) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10929) * The routine will figure out the CPU affinity assignment for every
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10930) * MSI-X vector allocated for the HBA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10931) * In addition, the CPU to IO channel mapping will be calculated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10932) * and the phba->sli4_hba.cpu_map array will reflect this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10933) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10934) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10935) lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10937) int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10938) int max_phys_id, min_phys_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10939) int max_core_id, min_core_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10940) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10941) struct lpfc_vector_map_info *new_cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10942) #ifdef CONFIG_X86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10943) struct cpuinfo_x86 *cpuinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10944) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10945) #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10946) struct lpfc_hdwq_stat *c_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10947) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10949) max_phys_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10950) min_phys_id = LPFC_VECTOR_MAP_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10951) max_core_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10952) min_core_id = LPFC_VECTOR_MAP_EMPTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10954) /* Update CPU map with physical id and core id of each CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10955) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10956) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10957) #ifdef CONFIG_X86
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10958) cpuinfo = &cpu_data(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10959) cpup->phys_id = cpuinfo->phys_proc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10960) cpup->core_id = cpuinfo->cpu_core_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10961) if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10962) cpup->flag |= LPFC_CPU_MAP_HYPER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10963) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10964) /* No distinction between CPUs for other platforms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10965) cpup->phys_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10966) cpup->core_id = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10967) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10969) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10970) "3328 CPU %d physid %d coreid %d flag x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10971) cpu, cpup->phys_id, cpup->core_id, cpup->flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10973) if (cpup->phys_id > max_phys_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10974) max_phys_id = cpup->phys_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10975) if (cpup->phys_id < min_phys_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10976) min_phys_id = cpup->phys_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10978) if (cpup->core_id > max_core_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10979) max_core_id = cpup->core_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10980) if (cpup->core_id < min_core_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10981) min_core_id = cpup->core_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10984) /* After looking at each irq vector assigned to this pcidev, its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10985) * possible to see that not ALL CPUs have been accounted for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10986) * Next we will set any unassigned (unaffinitized) cpu map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10987) * entries to a IRQ on the same phys_id.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10988) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10989) first_cpu = cpumask_first(cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10990) start_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10992) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10993) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10995) /* Is this CPU entry unassigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10996) if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10997) /* Mark CPU as IRQ not assigned by the kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10998) cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11000) /* If so, find a new_cpup thats on the the SAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11001) * phys_id as cpup. start_cpu will start where we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11002) * left off so all unassigned entries don't get assgined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11003) * the IRQ of the first entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11004) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11005) new_cpu = start_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11006) for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11007) new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11008) if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11009) (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11010) (new_cpup->phys_id == cpup->phys_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11011) goto found_same;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11012) new_cpu = cpumask_next(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11013) new_cpu, cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11014) if (new_cpu == nr_cpumask_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11015) new_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11017) /* At this point, we leave the CPU as unassigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11018) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11019) found_same:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11020) /* We found a matching phys_id, so copy the IRQ info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11021) cpup->eq = new_cpup->eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11023) /* Bump start_cpu to the next slot to minmize the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11024) * chance of having multiple unassigned CPU entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11025) * selecting the same IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11026) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11027) start_cpu = cpumask_next(new_cpu, cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11028) if (start_cpu == nr_cpumask_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11029) start_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11031) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11032) "3337 Set Affinity: CPU %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11033) "eq %d from peer cpu %d same "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11034) "phys_id (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11035) cpu, cpup->eq, new_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11036) cpup->phys_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11040) /* Set any unassigned cpu map entries to a IRQ on any phys_id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11041) start_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11043) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11044) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11046) /* Is this entry unassigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11047) if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11048) /* Mark it as IRQ not assigned by the kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11049) cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11051) /* If so, find a new_cpup thats on ANY phys_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11052) * as the cpup. start_cpu will start where we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11053) * left off so all unassigned entries don't get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11054) * assigned the IRQ of the first entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11055) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11056) new_cpu = start_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11057) for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11058) new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11059) if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11060) (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11061) goto found_any;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11062) new_cpu = cpumask_next(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11063) new_cpu, cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11064) if (new_cpu == nr_cpumask_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11065) new_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11067) /* We should never leave an entry unassigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11068) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11069) "3339 Set Affinity: CPU %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11070) "eq %d UNASSIGNED\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11071) cpup->hdwq, cpup->eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11072) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11073) found_any:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11074) /* We found an available entry, copy the IRQ info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11075) cpup->eq = new_cpup->eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11077) /* Bump start_cpu to the next slot to minmize the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11078) * chance of having multiple unassigned CPU entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11079) * selecting the same IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11080) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11081) start_cpu = cpumask_next(new_cpu, cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11082) if (start_cpu == nr_cpumask_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11083) start_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11085) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11086) "3338 Set Affinity: CPU %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11087) "eq %d from peer cpu %d (%d/%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11088) cpu, cpup->eq, new_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11089) new_cpup->phys_id, new_cpup->core_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11090) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11093) /* Assign hdwq indices that are unique across all cpus in the map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11094) * that are also FIRST_CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11095) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11096) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11097) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11098) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11100) /* Only FIRST IRQs get a hdwq index assignment. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11101) if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11102) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11104) /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11105) cpup->hdwq = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11106) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11107) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11108) "3333 Set Affinity: CPU %d (phys %d core %d): "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11109) "hdwq %d eq %d flg x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11110) cpu, cpup->phys_id, cpup->core_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11111) cpup->hdwq, cpup->eq, cpup->flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11113) /* Associate a hdwq with each cpu_map entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11114) * This will be 1 to 1 - hdwq to cpu, unless there are less
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11115) * hardware queues then CPUs. For that case we will just round-robin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11116) * the available hardware queues as they get assigned to CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11117) * The next_idx is the idx from the FIRST_CPU loop above to account
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11118) * for irq_chann < hdwq. The idx is used for round-robin assignments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11119) * and needs to start at 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11121) next_idx = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11122) start_cpu = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11123) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11124) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11125) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11127) /* FIRST cpus are already mapped. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11128) if (cpup->flag & LPFC_CPU_FIRST_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11129) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11131) /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11132) * of the unassigned cpus to the next idx so that all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11133) * hdw queues are fully utilized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11134) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11135) if (next_idx < phba->cfg_hdw_queue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11136) cpup->hdwq = next_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11137) next_idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11138) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11141) /* Not a First CPU and all hdw_queues are used. Reuse a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11142) * Hardware Queue for another CPU, so be smart about it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11143) * and pick one that has its IRQ/EQ mapped to the same phys_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11144) * (CPU package) and core_id.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11145) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11146) new_cpu = start_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11147) for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11148) new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11149) if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11150) new_cpup->phys_id == cpup->phys_id &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11151) new_cpup->core_id == cpup->core_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11152) goto found_hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11154) new_cpu = cpumask_next(new_cpu, cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11155) if (new_cpu == nr_cpumask_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11156) new_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11159) /* If we can't match both phys_id and core_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11160) * settle for just a phys_id match.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11162) new_cpu = start_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11163) for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11164) new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11165) if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11166) new_cpup->phys_id == cpup->phys_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11167) goto found_hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11169) new_cpu = cpumask_next(new_cpu, cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11170) if (new_cpu == nr_cpumask_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11171) new_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11174) /* Otherwise just round robin on cfg_hdw_queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11175) cpup->hdwq = idx % phba->cfg_hdw_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11176) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11177) goto logit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11178) found_hdwq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11179) /* We found an available entry, copy the IRQ info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11180) start_cpu = cpumask_next(new_cpu, cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11181) if (start_cpu == nr_cpumask_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11182) start_cpu = first_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11183) cpup->hdwq = new_cpup->hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11184) logit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11185) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11186) "3335 Set Affinity: CPU %d (phys %d core %d): "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11187) "hdwq %d eq %d flg x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11188) cpu, cpup->phys_id, cpup->core_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11189) cpup->hdwq, cpup->eq, cpup->flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11192) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11193) * Initialize the cpu_map slots for not-present cpus in case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11194) * a cpu is hot-added. Perform a simple hdwq round robin assignment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11196) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11197) for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11198) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11199) #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11200) c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11201) c_stat->hdwq_no = cpup->hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11202) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11203) if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11204) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11206) cpup->hdwq = idx++ % phba->cfg_hdw_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11207) #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11208) c_stat->hdwq_no = cpup->hdwq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11209) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11210) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11211) "3340 Set Affinity: not present "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11212) "CPU %d hdwq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11213) cpu, cpup->hdwq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11216) /* The cpu_map array will be used later during initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11217) * when EQ / CQ / WQs are allocated and configured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11219) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11222) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11223) * lpfc_cpuhp_get_eq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11224) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11225) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11226) * @cpu: cpu going offline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11227) * @eqlist: eq list to append to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11229) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11230) lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11231) struct list_head *eqlist)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11233) const struct cpumask *maskp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11234) struct lpfc_queue *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11235) struct cpumask *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11236) u16 idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11238) tmp = kzalloc(cpumask_size(), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11239) if (!tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11240) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11242) for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11243) maskp = pci_irq_get_affinity(phba->pcidev, idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11244) if (!maskp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11245) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11246) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11247) * if irq is not affinitized to the cpu going
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11248) * then we don't need to poll the eq attached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11249) * to it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11250) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11251) if (!cpumask_and(tmp, maskp, cpumask_of(cpu)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11252) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11253) /* get the cpus that are online and are affini-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11254) * tized to this irq vector. If the count is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11255) * more than 1 then cpuhp is not going to shut-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11256) * down this vector. Since this cpu has not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11257) * gone offline yet, we need >1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11258) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11259) cpumask_and(tmp, maskp, cpu_online_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11260) if (cpumask_weight(tmp) > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11261) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11263) /* Now that we have an irq to shutdown, get the eq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11264) * mapped to this irq. Note: multiple hdwq's in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11265) * the software can share an eq, but eventually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11266) * only eq will be mapped to this vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11268) eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11269) list_add(&eq->_poll_list, eqlist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11271) kfree(tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11272) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11275) static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11277) if (phba->sli_rev != LPFC_SLI_REV4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11278) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11280) cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11281) &phba->cpuhp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11283) * unregistering the instance doesn't stop the polling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11284) * timer. Wait for the poll timer to retire.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11285) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11286) synchronize_rcu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11287) del_timer_sync(&phba->cpuhp_poll_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11290) static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11292) if (phba->pport->fc_flag & FC_OFFLINE_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11293) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11295) __lpfc_cpuhp_remove(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11298) static void lpfc_cpuhp_add(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11300) if (phba->sli_rev != LPFC_SLI_REV4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11301) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11303) rcu_read_lock();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11305) if (!list_empty(&phba->poll_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11306) mod_timer(&phba->cpuhp_poll_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11307) jiffies + msecs_to_jiffies(LPFC_POLL_HB));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11309) rcu_read_unlock();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11311) cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11312) &phba->cpuhp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11315) static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11317) if (phba->pport->load_flag & FC_UNLOADING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11318) *retval = -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11319) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11322) if (phba->sli_rev != LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11323) *retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11324) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11327) /* proceed with the hotplug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11328) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11331) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11332) * lpfc_irq_set_aff - set IRQ affinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11333) * @eqhdl: EQ handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11334) * @cpu: cpu to set affinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11335) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11336) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11337) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11338) lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11340) cpumask_clear(&eqhdl->aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11341) cpumask_set_cpu(cpu, &eqhdl->aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11342) irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11343) irq_set_affinity_hint(eqhdl->irq, &eqhdl->aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11346) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11347) * lpfc_irq_clear_aff - clear IRQ affinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11348) * @eqhdl: EQ handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11349) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11350) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11351) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11352) lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11354) cpumask_clear(&eqhdl->aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11355) irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11358) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11359) * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11360) * @phba: pointer to HBA context object.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11361) * @cpu: cpu going offline/online
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11362) * @offline: true, cpu is going offline. false, cpu is coming online.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11363) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11364) * If cpu is going offline, we'll try our best effort to find the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11365) * online cpu on the phba's original_mask and migrate all offlining IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11366) * affinities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11367) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11368) * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11369) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11370) * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11371) * PCI_IRQ_AFFINITY to auto-manage IRQ affinity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11372) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11373) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11374) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11375) lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11377) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11378) struct cpumask *aff_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11379) unsigned int cpu_select, cpu_next, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11380) const struct cpumask *orig_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11382) if (phba->irq_chann_mode == NORMAL_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11383) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11385) orig_mask = &phba->sli4_hba.irq_aff_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11387) if (!cpumask_test_cpu(cpu, orig_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11388) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11390) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11392) if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11393) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11395) if (offline) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11396) /* Find next online CPU on original mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11397) cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11398) cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11400) /* Found a valid CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11401) if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11402) /* Go through each eqhdl and ensure offlining
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11403) * cpu aff_mask is migrated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11404) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11405) for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11406) aff_mask = lpfc_get_aff_mask(idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11408) /* Migrate affinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11409) if (cpumask_test_cpu(cpu, aff_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11410) lpfc_irq_set_aff(lpfc_get_eq_hdl(idx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11411) cpu_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11413) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11414) /* Rely on irqbalance if no online CPUs left on NUMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11415) for (idx = 0; idx < phba->cfg_irq_chann; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11416) lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11418) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11419) /* Migrate affinity back to this CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11420) lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11424) static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11426) struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11427) struct lpfc_queue *eq, *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11428) LIST_HEAD(eqlist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11429) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11431) if (!phba) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11432) WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11433) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11436) if (__lpfc_cpuhp_checks(phba, &retval))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11437) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11439) lpfc_irq_rebalance(phba, cpu, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11441) retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11442) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11443) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11445) /* start polling on these eq's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11446) list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11447) list_del_init(&eq->_poll_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11448) lpfc_sli4_start_polling(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11451) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11454) static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11456) struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11457) struct lpfc_queue *eq, *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11458) unsigned int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11459) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11461) if (!phba) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11462) WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11463) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11466) if (__lpfc_cpuhp_checks(phba, &retval))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11467) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11469) lpfc_irq_rebalance(phba, cpu, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11471) list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11472) n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11473) if (n == cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11474) lpfc_sli4_stop_polling(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11477) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11480) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11481) * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11482) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11483) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11484) * This routine is invoked to enable the MSI-X interrupt vectors to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11485) * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11486) * to cpus on the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11487) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11488) * When cfg_irq_numa is enabled, the adapter will only allocate vectors for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11489) * the number of cpus on the same numa node as this adapter. The vectors are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11490) * allocated without requesting OS affinity mapping. A vector will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11491) * allocated and assigned to each online and offline cpu. If the cpu is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11492) * online, then affinity will be set to that cpu. If the cpu is offline, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11493) * affinity will be set to the nearest peer cpu within the numa node that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11494) * online. If there are no online cpus within the numa node, affinity is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11495) * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11496) * is consistent with the way cpu online/offline is handled when cfg_irq_numa is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11497) * configured.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11498) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11499) * If numa mode is not enabled and there is more than 1 vector allocated, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11500) * the driver relies on the managed irq interface where the OS assigns vector to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11501) * cpu affinity. The driver will then use that affinity mapping to setup its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11502) * cpu mapping table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11503) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11504) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11505) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11506) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11507) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11508) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11509) lpfc_sli4_enable_msix(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11510) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11511) int vectors, rc, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11512) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11513) const struct cpumask *aff_mask = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11514) unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11515) struct lpfc_vector_map_info *cpup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11516) struct lpfc_hba_eq_hdl *eqhdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11517) const struct cpumask *maskp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11518) unsigned int flags = PCI_IRQ_MSIX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11520) /* Set up MSI-X multi-message vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11521) vectors = phba->cfg_irq_chann;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11523) if (phba->irq_chann_mode != NORMAL_MODE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11524) aff_mask = &phba->sli4_hba.irq_aff_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11526) if (aff_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11527) cpu_cnt = cpumask_weight(aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11528) vectors = min(phba->cfg_irq_chann, cpu_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11530) /* cpu: iterates over aff_mask including offline or online
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11531) * cpu_select: iterates over online aff_mask to set affinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11532) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11533) cpu = cpumask_first(aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11534) cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11535) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11536) flags |= PCI_IRQ_AFFINITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11539) rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11540) if (rc < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11541) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11542) "0484 PCI enable MSI-X failed (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11543) goto vec_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11545) vectors = rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11547) /* Assign MSI-X vectors to interrupt handlers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11548) for (index = 0; index < vectors; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11549) eqhdl = lpfc_get_eq_hdl(index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11550) name = eqhdl->handler_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11551) memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11552) snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11553) LPFC_DRIVER_HANDLER_NAME"%d", index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11555) eqhdl->idx = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11556) rc = request_irq(pci_irq_vector(phba->pcidev, index),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11557) &lpfc_sli4_hba_intr_handler, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11558) name, eqhdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11559) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11560) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11561) "0486 MSI-X fast-path (%d) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11562) "request_irq failed (%d)\n", index, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11563) goto cfg_fail_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11566) eqhdl->irq = pci_irq_vector(phba->pcidev, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11568) if (aff_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11569) /* If found a neighboring online cpu, set affinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11570) if (cpu_select < nr_cpu_ids)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11571) lpfc_irq_set_aff(eqhdl, cpu_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11573) /* Assign EQ to cpu_map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11574) lpfc_assign_eq_map_info(phba, index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11575) LPFC_CPU_FIRST_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11576) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11578) /* Iterate to next offline or online cpu in aff_mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11579) cpu = cpumask_next(cpu, aff_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11581) /* Find next online cpu in aff_mask to set affinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11582) cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11583) } else if (vectors == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11584) cpu = cpumask_first(cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11585) lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11586) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11587) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11588) maskp = pci_irq_get_affinity(phba->pcidev, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11590) /* Loop through all CPUs associated with vector index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11591) for_each_cpu_and(cpu, maskp, cpu_present_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11592) cpup = &phba->sli4_hba.cpu_map[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11594) /* If this is the first CPU thats assigned to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11595) * this vector, set LPFC_CPU_FIRST_IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11596) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11597) * With certain platforms its possible that irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11598) * vectors are affinitized to all the cpu's.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11599) * This can result in each cpu_map.eq to be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11600) * to the last vector, resulting in overwrite
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11601) * of all the previous cpu_map.eq. Ensure that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11602) * each vector receives a place in cpu_map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11603) * Later call to lpfc_cpu_affinity_check will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11604) * ensure we are nicely balanced out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11605) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11606) if (cpup->eq != LPFC_VECTOR_MAP_EMPTY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11607) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11608) lpfc_assign_eq_map_info(phba, index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11609) LPFC_CPU_FIRST_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11610) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11611) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11616) if (vectors != phba->cfg_irq_chann) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11617) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11618) "3238 Reducing IO channels to match number of "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11619) "MSI-X vectors, requested %d got %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11620) phba->cfg_irq_chann, vectors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11621) if (phba->cfg_irq_chann > vectors)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11622) phba->cfg_irq_chann = vectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11625) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11627) cfg_fail_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11628) /* free the irq already requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11629) for (--index; index >= 0; index--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11630) eqhdl = lpfc_get_eq_hdl(index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11631) lpfc_irq_clear_aff(eqhdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11632) irq_set_affinity_hint(eqhdl->irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11633) free_irq(eqhdl->irq, eqhdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11636) /* Unconfigure MSI-X capability structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11637) pci_free_irq_vectors(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11639) vec_fail_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11640) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11643) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11644) * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11645) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11646) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11647) * This routine is invoked to enable the MSI interrupt mode to device with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11648) * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11649) * called to enable the MSI vector. The device driver is responsible for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11650) * calling the request_irq() to register MSI vector with a interrupt the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11651) * handler, which is done in this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11652) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11653) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11654) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11655) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11656) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11657) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11658) lpfc_sli4_enable_msi(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11659) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11660) int rc, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11661) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11662) struct lpfc_hba_eq_hdl *eqhdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11664) rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11665) PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11666) if (rc > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11667) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11668) "0487 PCI enable MSI mode success.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11669) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11670) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11671) "0488 PCI enable MSI mode failed (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11672) return rc ? rc : -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11675) rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11676) 0, LPFC_DRIVER_NAME, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11677) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11678) pci_free_irq_vectors(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11679) lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11680) "0490 MSI request_irq failed (%d)\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11681) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11684) eqhdl = lpfc_get_eq_hdl(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11685) eqhdl->irq = pci_irq_vector(phba->pcidev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11687) cpu = cpumask_first(cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11688) lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11690) for (index = 0; index < phba->cfg_irq_chann; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11691) eqhdl = lpfc_get_eq_hdl(index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11692) eqhdl->idx = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11695) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11698) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11699) * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11700) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11701) * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11702) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11703) * This routine is invoked to enable device interrupt and associate driver's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11704) * interrupt handler(s) to interrupt vector(s) to device with SLI-4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11705) * interface spec. Depends on the interrupt mode configured to the driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11706) * the driver will try to fallback from the configured interrupt mode to an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11707) * interrupt mode which is supported by the platform, kernel, and device in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11708) * the order of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11709) * MSI-X -> MSI -> IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11710) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11711) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11712) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11713) * other values - error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11714) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11715) static uint32_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11716) lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11717) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11718) uint32_t intr_mode = LPFC_INTR_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11719) int retval, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11721) if (cfg_mode == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11722) /* Preparation before conf_msi mbox cmd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11723) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11724) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11725) /* Now, try to enable MSI-X interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11726) retval = lpfc_sli4_enable_msix(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11727) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11728) /* Indicate initialization to MSI-X mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11729) phba->intr_type = MSIX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11730) intr_mode = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11735) /* Fallback to MSI if MSI-X initialization failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11736) if (cfg_mode >= 1 && phba->intr_type == NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11737) retval = lpfc_sli4_enable_msi(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11738) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11739) /* Indicate initialization to MSI mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11740) phba->intr_type = MSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11741) intr_mode = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11745) /* Fallback to INTx if both MSI-X/MSI initalization failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11746) if (phba->intr_type == NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11747) retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11748) IRQF_SHARED, LPFC_DRIVER_NAME, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11749) if (!retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11750) struct lpfc_hba_eq_hdl *eqhdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11751) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11753) /* Indicate initialization to INTx mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11754) phba->intr_type = INTx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11755) intr_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11757) eqhdl = lpfc_get_eq_hdl(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11758) eqhdl->irq = pci_irq_vector(phba->pcidev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11760) cpu = cpumask_first(cpu_present_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11761) lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11762) cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11763) for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11764) eqhdl = lpfc_get_eq_hdl(idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11765) eqhdl->idx = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11769) return intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11772) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11773) * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11774) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11775) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11776) * This routine is invoked to disable device interrupt and disassociate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11777) * the driver's interrupt handler(s) from interrupt vector(s) to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11778) * with SLI-4 interface spec. Depending on the interrupt mode, the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11779) * will release the interrupt vector(s) for the message signaled interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11780) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11781) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11782) lpfc_sli4_disable_intr(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11783) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11784) /* Disable the currently initialized interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11785) if (phba->intr_type == MSIX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11786) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11787) struct lpfc_hba_eq_hdl *eqhdl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11789) /* Free up MSI-X multi-message vectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11790) for (index = 0; index < phba->cfg_irq_chann; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11791) eqhdl = lpfc_get_eq_hdl(index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11792) lpfc_irq_clear_aff(eqhdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11793) irq_set_affinity_hint(eqhdl->irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11794) free_irq(eqhdl->irq, eqhdl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11796) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11797) free_irq(phba->pcidev->irq, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11800) pci_free_irq_vectors(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11802) /* Reset interrupt management states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11803) phba->intr_type = NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11804) phba->sli.slistat.sli_intr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11807) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11808) * lpfc_unset_hba - Unset SLI3 hba device initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11809) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11810) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11811) * This routine is invoked to unset the HBA device initialization steps to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11812) * a device with SLI-3 interface spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11813) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11814) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11815) lpfc_unset_hba(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11816) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11817) struct lpfc_vport *vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11818) struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11820) spin_lock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11821) vport->load_flag |= FC_UNLOADING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11822) spin_unlock_irq(shost->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11824) kfree(phba->vpi_bmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11825) kfree(phba->vpi_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11827) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11829) phba->pport->work_port_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11831) lpfc_sli_hba_down(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11833) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11835) lpfc_sli_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11837) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11840) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11841) * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11842) * @phba: Pointer to HBA context object.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11843) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11844) * This function is called in the SLI4 code path to wait for completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11845) * of device's XRIs exchange busy. It will check the XRI exchange busy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11846) * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11847) * that, it will check the XRI exchange busy on outstanding FCP and ELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11848) * I/Os every 30 seconds, log error message, and wait forever. Only when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11849) * all XRI exchange busy complete, the driver unload shall proceed with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11850) * invoking the function reset ioctl mailbox command to the CNA and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11851) * the rest of the driver unload resource release.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11852) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11853) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11854) lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11855) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11856) struct lpfc_sli4_hdw_queue *qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11857) int idx, ccnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11858) int wait_time = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11859) int io_xri_cmpl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11860) int nvmet_xri_cmpl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11861) int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11863) /* Driver just aborted IOs during the hba_unset process. Pause
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11864) * here to give the HBA time to complete the IO and get entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11865) * into the abts lists.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11866) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11867) msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11869) /* Wait for NVME pending IO to flush back to transport. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11870) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11871) lpfc_nvme_wait_for_io_drain(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11873) ccnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11874) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11875) qp = &phba->sli4_hba.hdwq[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11876) io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11877) if (!io_xri_cmpl) /* if list is NOT empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11878) ccnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11880) if (ccnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11881) io_xri_cmpl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11883) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11884) nvmet_xri_cmpl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11885) list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11888) while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11889) if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11890) if (!nvmet_xri_cmpl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11891) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11892) "6424 NVMET XRI exchange busy "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11893) "wait time: %d seconds.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11894) wait_time/1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11895) if (!io_xri_cmpl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11896) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11897) "6100 IO XRI exchange busy "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11898) "wait time: %d seconds.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11899) wait_time/1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11900) if (!els_xri_cmpl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11901) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11902) "2878 ELS XRI exchange busy "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11903) "wait time: %d seconds.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11904) wait_time/1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11905) msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11906) wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11907) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11908) msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11909) wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11910) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11912) ccnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11913) for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11914) qp = &phba->sli4_hba.hdwq[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11915) io_xri_cmpl = list_empty(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11916) &qp->lpfc_abts_io_buf_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11917) if (!io_xri_cmpl) /* if list is NOT empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11918) ccnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11920) if (ccnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11921) io_xri_cmpl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11923) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11924) nvmet_xri_cmpl = list_empty(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11925) &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11927) els_xri_cmpl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11928) list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11933) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11934) * lpfc_sli4_hba_unset - Unset the fcoe hba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11935) * @phba: Pointer to HBA context object.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11936) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11937) * This function is called in the SLI4 code path to reset the HBA's FCoE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11938) * function. The caller is not required to hold any lock. This routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11939) * issues PCI function reset mailbox command to reset the FCoE function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11940) * At the end of the function, it calls lpfc_hba_down_post function to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11941) * free any pending commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11942) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11943) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11944) lpfc_sli4_hba_unset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11945) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11946) int wait_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11947) LPFC_MBOXQ_t *mboxq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11948) struct pci_dev *pdev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11950) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11951) if (phba->pport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11952) phba->sli4_hba.intr_enable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11954) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11955) * Gracefully wait out the potential current outstanding asynchronous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11956) * mailbox command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11957) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11959) /* First, block any pending async mailbox command from posted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11960) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11961) phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11962) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11963) /* Now, trying to wait it out if we can */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11964) while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11965) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11966) if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11967) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11969) /* Forcefully release the outstanding mailbox command if timed out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11970) if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11971) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11972) mboxq = phba->sli.mbox_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11973) mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11974) __lpfc_mbox_cmpl_put(phba, mboxq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11975) phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11976) phba->sli.mbox_active = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11977) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11980) /* Abort all iocbs associated with the hba */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11981) lpfc_sli_hba_iocb_abort(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11983) /* Wait for completion of device XRI exchange busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11984) lpfc_sli4_xri_exchange_busy_wait(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11986) /* per-phba callback de-registration for hotplug event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11987) if (phba->pport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11988) lpfc_cpuhp_remove(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11990) /* Disable PCI subsystem interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11991) lpfc_sli4_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11993) /* Disable SR-IOV if enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11994) if (phba->cfg_sriov_nr_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11995) pci_disable_sriov(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11997) /* Stop kthread signal shall trigger work_done one more time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11998) kthread_stop(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12000) /* Disable FW logging to host memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12001) lpfc_ras_stop_fwlog(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12003) /* Unset the queues shared with the hardware then release all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12004) * allocated resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12005) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12006) lpfc_sli4_queue_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12007) lpfc_sli4_queue_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12009) /* Reset SLI4 HBA FCoE function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12010) lpfc_pci_function_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12012) /* Free RAS DMA memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12013) if (phba->ras_fwlog.ras_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12014) lpfc_sli4_ras_dma_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12016) /* Stop the SLI4 device port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12017) if (phba->pport)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12018) phba->pport->work_port_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12019) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12021) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12022) * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12023) * @phba: Pointer to HBA context object.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12024) * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12025) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12026) * This function is called in the SLI4 code path to read the port's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12027) * sli4 capabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12028) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12029) * This function may be be called from any context that can block-wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12030) * for the completion. The expectation is that this routine is called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12031) * typically from probe_one or from the online routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12032) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12033) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12034) lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12035) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12036) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12037) struct lpfc_mqe *mqe = &mboxq->u.mqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12038) struct lpfc_pc_sli4_params *sli4_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12039) uint32_t mbox_tmo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12040) int length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12041) bool exp_wqcq_pages = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12042) struct lpfc_sli4_parameters *mbx_sli4_parameters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12044) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12045) * By default, the driver assumes the SLI4 port requires RPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12046) * header postings. The SLI4_PARAM response will correct this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12047) * assumption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12048) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12049) phba->sli4_hba.rpi_hdrs_in_use = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12051) /* Read the port's SLI4 Config Parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12052) length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12053) sizeof(struct lpfc_sli4_cfg_mhdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12054) lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12055) LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12056) length, LPFC_SLI4_MBX_EMBED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12057) if (!phba->sli4_hba.intr_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12058) rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12059) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12060) mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12061) rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12063) if (unlikely(rc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12064) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12065) sli4_params = &phba->sli4_hba.pc_sli4_params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12066) mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12067) sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12068) sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12069) sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12070) sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12071) mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12072) sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12073) mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12074) if (bf_get(cfg_phwq, mbx_sli4_parameters))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12075) phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12076) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12077) phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12078) sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12079) sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12080) mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12081) sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12082) sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12083) sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12084) sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12085) sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12086) sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12087) sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12088) sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12089) sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12090) sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12091) sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12092) mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12093) sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12094) sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12095) mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12096) phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12097) phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12099) /* Check for Extended Pre-Registered SGL support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12100) phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12102) /* Check for firmware nvme support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12103) rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12104) bf_get(cfg_xib, mbx_sli4_parameters));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12106) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12107) /* Save this to indicate the Firmware supports NVME */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12108) sli4_params->nvme = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12110) /* Firmware NVME support, check driver FC4 NVME support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12111) if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12112) lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12113) "6133 Disabling NVME support: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12114) "FC4 type not supported: x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12115) phba->cfg_enable_fc4_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12116) goto fcponly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12118) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12119) /* No firmware NVME support, check driver FC4 NVME support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12120) sli4_params->nvme = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12121) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12122) lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12123) "6101 Disabling NVME support: Not "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12124) "supported by firmware (%d %d) x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12125) bf_get(cfg_nvme, mbx_sli4_parameters),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12126) bf_get(cfg_xib, mbx_sli4_parameters),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12127) phba->cfg_enable_fc4_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12128) fcponly:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12129) phba->nvme_support = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12130) phba->nvmet_support = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12131) phba->cfg_nvmet_mrq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12132) phba->cfg_nvme_seg_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12134) /* If no FC4 type support, move to just SCSI support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12135) if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12136) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12137) phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12141) /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12142) * accommodate 512K and 1M IOs in a single nvme buf.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12144) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12145) phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12147) /* Only embed PBDE for if_type 6, PBDE support requires xib be set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12148) if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12149) LPFC_SLI_INTF_IF_TYPE_6) || (!bf_get(cfg_xib, mbx_sli4_parameters)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12150) phba->cfg_enable_pbde = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12152) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12153) * To support Suppress Response feature we must satisfy 3 conditions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12154) * lpfc_suppress_rsp module parameter must be set (default).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12155) * In SLI4-Parameters Descriptor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12156) * Extended Inline Buffers (XIB) must be supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12157) * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12158) * (double negative).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12159) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12160) if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12161) !(bf_get(cfg_nosr, mbx_sli4_parameters)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12162) phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12163) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12164) phba->cfg_suppress_rsp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12166) if (bf_get(cfg_eqdr, mbx_sli4_parameters))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12167) phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12169) /* Make sure that sge_supp_len can be handled by the driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12170) if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12171) sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12173) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12174) * Check whether the adapter supports an embedded copy of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12175) * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12176) * to use this option, 128-byte WQEs must be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12178) if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12179) phba->fcp_embed_io = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12180) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12181) phba->fcp_embed_io = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12183) lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12184) "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12185) bf_get(cfg_xib, mbx_sli4_parameters),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12186) phba->cfg_enable_pbde,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12187) phba->fcp_embed_io, phba->nvme_support,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12188) phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12190) if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12191) LPFC_SLI_INTF_IF_TYPE_2) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12192) (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12193) LPFC_SLI_INTF_FAMILY_LNCR_A0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12194) exp_wqcq_pages = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12196) if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12197) (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12198) exp_wqcq_pages &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12199) (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12200) phba->enab_exp_wqcq_pages = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12201) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12202) phba->enab_exp_wqcq_pages = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12204) * Check if the SLI port supports MDS Diagnostics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12206) if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12207) phba->mds_diags_support = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12208) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12209) phba->mds_diags_support = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12211) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12212) * Check if the SLI port supports NSLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12214) if (bf_get(cfg_nsler, mbx_sli4_parameters))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12215) phba->nsler = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12216) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12217) phba->nsler = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12219) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12222) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12223) * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12224) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12225) * @pid: pointer to PCI device identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12226) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12227) * This routine is to be called to attach a device with SLI-3 interface spec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12228) * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12229) * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12230) * information of the device and driver to see if the driver state that it can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12231) * support this kind of device. If the match is successful, the driver core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12232) * invokes this routine. If this routine determines it can claim the HBA, it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12233) * does all the initialization that it needs to do to handle the HBA properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12234) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12235) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12236) * 0 - driver can claim the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12237) * negative value - driver can not claim the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12238) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12239) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12240) lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12242) struct lpfc_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12243) struct lpfc_vport *vport = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12244) struct Scsi_Host *shost = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12245) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12246) uint32_t cfg_mode, intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12248) /* Allocate memory for HBA structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12249) phba = lpfc_hba_alloc(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12250) if (!phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12251) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12253) /* Perform generic PCI device enabling operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12254) error = lpfc_enable_pci_dev(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12255) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12256) goto out_free_phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12258) /* Set up SLI API function jump table for PCI-device group-0 HBAs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12259) error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12260) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12261) goto out_disable_pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12263) /* Set up SLI-3 specific device PCI memory space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12264) error = lpfc_sli_pci_mem_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12265) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12266) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12267) "1402 Failed to set up pci memory space.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12268) goto out_disable_pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12271) /* Set up SLI-3 specific device driver resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12272) error = lpfc_sli_driver_resource_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12273) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12274) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12275) "1404 Failed to set up driver resource.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12276) goto out_unset_pci_mem_s3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12279) /* Initialize and populate the iocb list per host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12281) error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12282) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12283) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12284) "1405 Failed to initialize iocb list.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12285) goto out_unset_driver_resource_s3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12288) /* Set up common device driver resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12289) error = lpfc_setup_driver_resource_phase2(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12290) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12291) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12292) "1406 Failed to set up driver resource.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12293) goto out_free_iocb_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12296) /* Get the default values for Model Name and Description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12297) lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12299) /* Create SCSI host to the physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12300) error = lpfc_create_shost(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12301) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12302) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12303) "1407 Failed to create scsi host.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12304) goto out_unset_driver_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12307) /* Configure sysfs attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12308) vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12309) error = lpfc_alloc_sysfs_attr(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12310) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12311) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12312) "1476 Failed to allocate sysfs attr\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12313) goto out_destroy_shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12316) shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12317) /* Now, trying to enable interrupt and bring up the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12318) cfg_mode = phba->cfg_use_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12319) while (true) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12320) /* Put device to a known state before enabling interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12321) lpfc_stop_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12322) /* Configure and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12323) intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12324) if (intr_mode == LPFC_INTR_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12325) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12326) "0431 Failed to enable interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12327) error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12328) goto out_free_sysfs_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12330) /* SLI-3 HBA setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12331) if (lpfc_sli_hba_setup(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12332) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12333) "1477 Failed to set up hba\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12334) error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12335) goto out_remove_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12338) /* Wait 50ms for the interrupts of previous mailbox commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12339) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12340) /* Check active interrupts on message signaled interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12341) if (intr_mode == 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12342) phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12343) /* Log the current active interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12344) phba->intr_mode = intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12345) lpfc_log_intr_mode(phba, intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12346) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12347) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12348) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12349) "0447 Configure interrupt mode (%d) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12350) "failed active interrupt test.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12351) intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12352) /* Disable the current interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12353) lpfc_sli_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12354) /* Try next level of interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12355) cfg_mode = --intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12359) /* Perform post initialization setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12360) lpfc_post_init_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12362) /* Check if there are static vports to be created. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12363) lpfc_create_static_vport(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12365) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12367) out_remove_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12368) lpfc_unset_hba(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12369) out_free_sysfs_attr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12370) lpfc_free_sysfs_attr(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12371) out_destroy_shost:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12372) lpfc_destroy_shost(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12373) out_unset_driver_resource:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12374) lpfc_unset_driver_resource_phase2(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12375) out_free_iocb_list:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12376) lpfc_free_iocb_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12377) out_unset_driver_resource_s3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12378) lpfc_sli_driver_resource_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12379) out_unset_pci_mem_s3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12380) lpfc_sli_pci_mem_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12381) out_disable_pci_dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12382) lpfc_disable_pci_dev(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12383) if (shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12384) scsi_host_put(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12385) out_free_phba:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12386) lpfc_hba_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12387) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12390) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12391) * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12392) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12393) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12394) * This routine is to be called to disattach a device with SLI-3 interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12395) * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12396) * removed from PCI bus, it performs all the necessary cleanup for the HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12397) * device to be removed from the PCI subsystem properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12398) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12399) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12400) lpfc_pci_remove_one_s3(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12402) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12403) struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12404) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12405) struct lpfc_hba *phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12406) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12408) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12409) vport->load_flag |= FC_UNLOADING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12410) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12412) lpfc_free_sysfs_attr(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12414) /* Release all the vports against this physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12415) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12416) if (vports != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12417) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12418) if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12419) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12420) fc_vport_terminate(vports[i]->fc_vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12422) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12424) /* Remove FC host and then SCSI host with the physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12425) fc_remove_host(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12426) scsi_remove_host(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12428) lpfc_cleanup(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12431) * Bring down the SLI Layer. This step disable all interrupts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12432) * clears the rings, discards all mailbox commands, and resets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12433) * the HBA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12434) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12436) /* HBA interrupt will be disabled after this call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12437) lpfc_sli_hba_down(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12438) /* Stop kthread signal shall trigger work_done one more time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12439) kthread_stop(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12440) /* Final cleanup of txcmplq and reset the HBA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12441) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12443) kfree(phba->vpi_bmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12444) kfree(phba->vpi_ids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12446) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12447) spin_lock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12448) list_del_init(&vport->listentry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12449) spin_unlock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12451) lpfc_debugfs_terminate(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12453) /* Disable SR-IOV if enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12454) if (phba->cfg_sriov_nr_virtfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12455) pci_disable_sriov(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12457) /* Disable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12458) lpfc_sli_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12460) scsi_host_put(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12462) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12463) * Call scsi_free before mem_free since scsi bufs are released to their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12464) * corresponding pools here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12466) lpfc_scsi_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12467) lpfc_free_iocb_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12469) lpfc_mem_free_all(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12471) dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12472) phba->hbqslimp.virt, phba->hbqslimp.phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12474) /* Free resources associated with SLI2 interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12475) dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12476) phba->slim2p.virt, phba->slim2p.phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12478) /* unmap adapter SLIM and Control Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12479) iounmap(phba->ctrl_regs_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12480) iounmap(phba->slim_memmap_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12482) lpfc_hba_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12484) pci_release_mem_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12485) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12488) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12489) * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12490) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12491) * @msg: power management message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12492) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12493) * This routine is to be called from the kernel's PCI subsystem to support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12494) * system Power Management (PM) to device with SLI-3 interface spec. When
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12495) * PM invokes this method, it quiesces the device by stopping the driver's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12496) * worker thread for the device, turning off device's interrupt and DMA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12497) * and bring the device offline. Note that as the driver implements the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12498) * minimum PM requirements to a power-aware driver's PM support for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12499) * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12500) * to the suspend() method call will be treated as SUSPEND and the driver will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12501) * fully reinitialize its device during resume() method call, the driver will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12502) * set device to PCI_D3hot state in PCI config space instead of setting it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12503) * according to the @msg provided by the PM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12504) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12505) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12506) * 0 - driver suspended the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12507) * Error otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12508) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12509) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12510) lpfc_pci_suspend_one_s3(struct pci_dev *pdev, pm_message_t msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12511) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12512) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12513) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12515) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12516) "0473 PCI device Power Management suspend.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12518) /* Bring down the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12519) lpfc_offline_prep(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12520) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12521) kthread_stop(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12523) /* Disable interrupt from device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12524) lpfc_sli_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12526) /* Save device state to PCI config space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12527) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12528) pci_set_power_state(pdev, PCI_D3hot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12530) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12533) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12534) * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12535) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12536) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12537) * This routine is to be called from the kernel's PCI subsystem to support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12538) * system Power Management (PM) to device with SLI-3 interface spec. When PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12539) * invokes this method, it restores the device's PCI config space state and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12540) * fully reinitializes the device and brings it online. Note that as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12541) * driver implements the minimum PM requirements to a power-aware driver's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12542) * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12543) * FREEZE) to the suspend() method call will be treated as SUSPEND and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12544) * driver will fully reinitialize its device during resume() method call,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12545) * the device will be set to PCI_D0 directly in PCI config space before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12546) * restoring the state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12547) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12548) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12549) * 0 - driver suspended the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12550) * Error otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12551) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12552) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12553) lpfc_pci_resume_one_s3(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12555) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12556) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12557) uint32_t intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12558) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12560) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12561) "0452 PCI device Power Management resume.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12563) /* Restore device state from PCI config space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12564) pci_set_power_state(pdev, PCI_D0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12565) pci_restore_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12567) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12568) * As the new kernel behavior of pci_restore_state() API call clears
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12569) * device saved_state flag, need to save the restored state again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12570) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12571) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12573) if (pdev->is_busmaster)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12574) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12576) /* Startup the kernel thread for this host adapter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12577) phba->worker_thread = kthread_run(lpfc_do_work, phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12578) "lpfc_worker_%d", phba->brd_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12579) if (IS_ERR(phba->worker_thread)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12580) error = PTR_ERR(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12581) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12582) "0434 PM resume failed to start worker "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12583) "thread: error=x%x.\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12584) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12585) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12587) /* Configure and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12588) intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12589) if (intr_mode == LPFC_INTR_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12590) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12591) "0430 PM resume Failed to enable interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12592) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12593) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12594) phba->intr_mode = intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12596) /* Restart HBA and bring it online */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12597) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12598) lpfc_online(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12600) /* Log the current active interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12601) lpfc_log_intr_mode(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12603) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12606) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12607) * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12608) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12609) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12610) * This routine is called to prepare the SLI3 device for PCI slot recover. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12611) * aborts all the outstanding SCSI I/Os to the pci device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12612) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12613) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12614) lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12615) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12616) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12617) "2723 PCI channel I/O abort preparing for recovery\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12619) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12620) * There may be errored I/Os through HBA, abort all I/Os on txcmplq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12621) * and let the SCSI mid-layer to retry them to recover.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12622) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12623) lpfc_sli_abort_fcp_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12626) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12627) * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12628) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12629) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12630) * This routine is called to prepare the SLI3 device for PCI slot reset. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12631) * disables the device interrupt and pci device, and aborts the internal FCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12632) * pending I/Os.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12633) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12634) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12635) lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12636) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12637) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12638) "2710 PCI channel disable preparing for reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12640) /* Block any management I/Os to the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12641) lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12643) /* Block all SCSI devices' I/Os on the host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12644) lpfc_scsi_dev_block(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12646) /* Flush all driver's outstanding SCSI I/Os as we are to reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12647) lpfc_sli_flush_io_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12649) /* stop all timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12650) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12652) /* Disable interrupt and pci device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12653) lpfc_sli_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12654) pci_disable_device(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12655) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12657) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12658) * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12659) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12660) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12661) * This routine is called to prepare the SLI3 device for PCI slot permanently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12662) * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12663) * pending I/Os.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12664) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12665) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12666) lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12667) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12668) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12669) "2711 PCI channel permanent disable for failure\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12670) /* Block all SCSI devices' I/Os on the host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12671) lpfc_scsi_dev_block(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12673) /* stop all timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12674) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12676) /* Clean up all driver's outstanding SCSI I/Os */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12677) lpfc_sli_flush_io_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12680) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12681) * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12682) * @pdev: pointer to PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12683) * @state: the current PCI connection state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12684) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12685) * This routine is called from the PCI subsystem for I/O error handling to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12686) * device with SLI-3 interface spec. This function is called by the PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12687) * subsystem after a PCI bus error affecting this device has been detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12688) * When this function is invoked, it will need to stop all the I/Os and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12689) * interrupt(s) to the device. Once that is done, it will return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12690) * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12691) * as desired.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12692) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12693) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12694) * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12695) * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12696) * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12697) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12698) static pci_ers_result_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12699) lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12701) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12702) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12704) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12705) case pci_channel_io_normal:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12706) /* Non-fatal error, prepare for recovery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12707) lpfc_sli_prep_dev_for_recover(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12708) return PCI_ERS_RESULT_CAN_RECOVER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12709) case pci_channel_io_frozen:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12710) /* Fatal error, prepare for slot reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12711) lpfc_sli_prep_dev_for_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12712) return PCI_ERS_RESULT_NEED_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12713) case pci_channel_io_perm_failure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12714) /* Permanent failure, prepare for device down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12715) lpfc_sli_prep_dev_for_perm_failure(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12716) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12717) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12718) /* Unknown state, prepare and request slot reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12719) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12720) "0472 Unknown PCI error state: x%x\n", state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12721) lpfc_sli_prep_dev_for_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12722) return PCI_ERS_RESULT_NEED_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12726) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12727) * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12728) * @pdev: pointer to PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12729) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12730) * This routine is called from the PCI subsystem for error handling to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12731) * device with SLI-3 interface spec. This is called after PCI bus has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12732) * reset to restart the PCI card from scratch, as if from a cold-boot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12733) * During the PCI subsystem error recovery, after driver returns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12734) * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12735) * recovery and then call this routine before calling the .resume method
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12736) * to recover the device. This function will initialize the HBA device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12737) * enable the interrupt, but it will just put the HBA to offline state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12738) * without passing any I/O traffic.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12739) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12740) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12741) * PCI_ERS_RESULT_RECOVERED - the device has been recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12742) * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12743) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12744) static pci_ers_result_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12745) lpfc_io_slot_reset_s3(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12747) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12748) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12749) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12750) uint32_t intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12752) dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12753) if (pci_enable_device_mem(pdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12754) printk(KERN_ERR "lpfc: Cannot re-enable "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12755) "PCI device after reset.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12756) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12759) pci_restore_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12761) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12762) * As the new kernel behavior of pci_restore_state() API call clears
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12763) * device saved_state flag, need to save the restored state again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12764) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12765) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12767) if (pdev->is_busmaster)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12768) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12770) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12771) psli->sli_flag &= ~LPFC_SLI_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12772) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12774) /* Configure and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12775) intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12776) if (intr_mode == LPFC_INTR_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12777) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12778) "0427 Cannot re-enable interrupt after "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12779) "slot reset.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12780) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12781) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12782) phba->intr_mode = intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12784) /* Take device offline, it will perform cleanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12785) lpfc_offline_prep(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12786) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12787) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12789) /* Log the current active interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12790) lpfc_log_intr_mode(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12792) return PCI_ERS_RESULT_RECOVERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12795) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12796) * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12797) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12798) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12799) * This routine is called from the PCI subsystem for error handling to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12800) * with SLI-3 interface spec. It is called when kernel error recovery tells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12801) * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12802) * error recovery. After this call, traffic can start to flow from this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12803) * again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12804) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12805) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12806) lpfc_io_resume_s3(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12807) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12808) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12809) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12811) /* Bring device online, it will be no-op for non-fatal error resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12812) lpfc_online(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12815) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12816) * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12817) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12818) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12819) * returns the number of ELS/CT IOCBs to reserve
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12820) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12821) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12822) lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12823) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12824) int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12826) if (phba->sli_rev == LPFC_SLI_REV4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12827) if (max_xri <= 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12828) return 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12829) else if (max_xri <= 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12830) return 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12831) else if (max_xri <= 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12832) return 50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12833) else if (max_xri <= 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12834) return 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12835) else if (max_xri <= 1536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12836) return 150;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12837) else if (max_xri <= 2048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12838) return 200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12839) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12840) return 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12841) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12842) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12845) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12846) * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12847) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12848) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12849) * returns the number of ELS/CT + NVMET IOCBs to reserve
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12850) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12851) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12852) lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12853) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12854) int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12856) if (phba->nvmet_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12857) max_xri += LPFC_NVMET_BUF_POST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12858) return max_xri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12862) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12863) lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12864) uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12865) const struct firmware *fw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12866) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12867) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12869) /* Three cases: (1) FW was not supported on the detected adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12870) * (2) FW update has been locked out administratively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12871) * (3) Some other error during FW update.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12872) * In each case, an unmaskable message is written to the console
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12873) * for admin diagnosis.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12874) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12875) if (offset == ADD_STATUS_FW_NOT_SUPPORTED ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12876) (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G6_FC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12877) magic_number != MAGIC_NUMBER_G6) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12878) (phba->pcidev->device == PCI_DEVICE_ID_LANCER_G7_FC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12879) magic_number != MAGIC_NUMBER_G7)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12880) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12881) "3030 This firmware version is not supported on"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12882) " this HBA model. Device:%x Magic:%x Type:%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12883) "ID:%x Size %d %zd\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12884) phba->pcidev->device, magic_number, ftype, fid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12885) fsize, fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12886) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12887) } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12888) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12889) "3021 Firmware downloads have been prohibited "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12890) "by a system configuration setting on "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12891) "Device:%x Magic:%x Type:%x ID:%x Size %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12892) "%zd\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12893) phba->pcidev->device, magic_number, ftype, fid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12894) fsize, fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12895) rc = -EACCES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12896) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12897) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12898) "3022 FW Download failed. Add Status x%x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12899) "Device:%x Magic:%x Type:%x ID:%x Size %d "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12900) "%zd\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12901) offset, phba->pcidev->device, magic_number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12902) ftype, fid, fsize, fw->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12903) rc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12905) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12908) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12909) * lpfc_write_firmware - attempt to write a firmware image to the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12910) * @fw: pointer to firmware image returned from request_firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12911) * @context: pointer to firmware image returned from request_firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12912) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12913) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12914) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12915) lpfc_write_firmware(const struct firmware *fw, void *context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12916) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12917) struct lpfc_hba *phba = (struct lpfc_hba *)context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12918) char fwrev[FW_REV_STR_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12919) struct lpfc_grp_hdr *image;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12920) struct list_head dma_buffer_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12921) int i, rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12922) struct lpfc_dmabuf *dmabuf, *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12923) uint32_t offset = 0, temp_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12924) uint32_t magic_number, ftype, fid, fsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12926) /* It can be null in no-wait mode, sanity check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12927) if (!fw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12928) rc = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12929) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12931) image = (struct lpfc_grp_hdr *)fw->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12933) magic_number = be32_to_cpu(image->magic_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12934) ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12935) fid = bf_get_be32(lpfc_grp_hdr_id, image);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12936) fsize = be32_to_cpu(image->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12938) INIT_LIST_HEAD(&dma_buffer_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12939) lpfc_decode_firmware_rev(phba, fwrev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12940) if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12941) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12942) "3023 Updating Firmware, Current Version:%s "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12943) "New Version:%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12944) fwrev, image->revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12945) for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12946) dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12947) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12948) if (!dmabuf) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12949) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12950) goto release_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12952) dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12953) SLI4_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12954) &dmabuf->phys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12955) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12956) if (!dmabuf->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12957) kfree(dmabuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12958) rc = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12959) goto release_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12960) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12961) list_add_tail(&dmabuf->list, &dma_buffer_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12963) while (offset < fw->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12964) temp_offset = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12965) list_for_each_entry(dmabuf, &dma_buffer_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12966) if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12967) memcpy(dmabuf->virt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12968) fw->data + temp_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12969) fw->size - temp_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12970) temp_offset = fw->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12971) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12973) memcpy(dmabuf->virt, fw->data + temp_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12974) SLI4_PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12975) temp_offset += SLI4_PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12976) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12977) rc = lpfc_wr_object(phba, &dma_buffer_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12978) (fw->size - offset), &offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12979) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12980) rc = lpfc_log_write_firmware_error(phba, offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12981) magic_number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12982) ftype,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12983) fid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12984) fsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12985) fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12986) goto release_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12988) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12989) rc = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12990) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12991) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12992) "3029 Skipped Firmware update, Current "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12993) "Version:%s New Version:%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12994) fwrev, image->revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12996) release_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12997) list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12998) list_del(&dmabuf->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12999) dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13000) dmabuf->virt, dmabuf->phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13001) kfree(dmabuf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13003) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13004) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13005) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13006) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13007) "3062 Firmware update error, status %d.\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13008) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13009) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13010) "3024 Firmware update success: size %d.\n", rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13013) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13014) * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13015) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13016) * @fw_upgrade: which firmware to update.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13017) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13018) * This routine is called to perform Linux generic firmware upgrade on device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13019) * that supports such feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13020) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13021) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13022) lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13023) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13024) uint8_t file_name[ELX_MODEL_NAME_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13025) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13026) const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13028) /* Only supported on SLI4 interface type 2 for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13029) if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13030) LPFC_SLI_INTF_IF_TYPE_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13031) return -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13033) snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13035) if (fw_upgrade == INT_FW_UPGRADE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13036) ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_HOTPLUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13037) file_name, &phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13038) GFP_KERNEL, (void *)phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13039) lpfc_write_firmware);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13040) } else if (fw_upgrade == RUN_FW_UPGRADE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13041) ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13042) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13043) lpfc_write_firmware(fw, (void *)phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13044) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13045) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13048) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13049) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13051) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13052) * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13053) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13054) * @pid: pointer to PCI device identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13055) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13056) * This routine is called from the kernel's PCI subsystem to device with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13057) * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13058) * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13059) * information of the device and driver to see if the driver state that it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13060) * can support this kind of device. If the match is successful, the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13061) * core invokes this routine. If this routine determines it can claim the HBA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13062) * it does all the initialization that it needs to do to handle the HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13063) * properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13064) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13065) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13066) * 0 - driver can claim the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13067) * negative value - driver can not claim the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13068) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13069) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13070) lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13071) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13072) struct lpfc_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13073) struct lpfc_vport *vport = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13074) struct Scsi_Host *shost = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13075) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13076) uint32_t cfg_mode, intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13078) /* Allocate memory for HBA structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13079) phba = lpfc_hba_alloc(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13080) if (!phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13081) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13083) INIT_LIST_HEAD(&phba->poll_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13085) /* Perform generic PCI device enabling operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13086) error = lpfc_enable_pci_dev(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13087) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13088) goto out_free_phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13090) /* Set up SLI API function jump table for PCI-device group-1 HBAs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13091) error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13092) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13093) goto out_disable_pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13095) /* Set up SLI-4 specific device PCI memory space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13096) error = lpfc_sli4_pci_mem_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13097) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13098) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13099) "1410 Failed to set up pci memory space.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13100) goto out_disable_pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13103) /* Set up SLI-4 Specific device driver resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13104) error = lpfc_sli4_driver_resource_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13105) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13106) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13107) "1412 Failed to set up driver resource.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13108) goto out_unset_pci_mem_s4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13111) INIT_LIST_HEAD(&phba->active_rrq_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13112) INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13114) /* Set up common device driver resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13115) error = lpfc_setup_driver_resource_phase2(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13116) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13117) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13118) "1414 Failed to set up driver resource.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13119) goto out_unset_driver_resource_s4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13122) /* Get the default values for Model Name and Description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13123) lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13125) /* Now, trying to enable interrupt and bring up the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13126) cfg_mode = phba->cfg_use_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13128) /* Put device to a known state before enabling interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13129) phba->pport = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13130) lpfc_stop_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13132) /* Init cpu_map array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13133) lpfc_cpu_map_array_init(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13135) /* Init hba_eq_hdl array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13136) lpfc_hba_eq_hdl_array_init(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13138) /* Configure and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13139) intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13140) if (intr_mode == LPFC_INTR_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13141) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13142) "0426 Failed to enable interrupt.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13143) error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13144) goto out_unset_driver_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13146) /* Default to single EQ for non-MSI-X */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13147) if (phba->intr_type != MSIX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13148) phba->cfg_irq_chann = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13149) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13150) if (phba->nvmet_support)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13151) phba->cfg_nvmet_mrq = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13154) lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13156) /* Create SCSI host to the physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13157) error = lpfc_create_shost(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13158) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13159) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13160) "1415 Failed to create scsi host.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13161) goto out_disable_intr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13163) vport = phba->pport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13164) shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13166) /* Configure sysfs attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13167) error = lpfc_alloc_sysfs_attr(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13168) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13169) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13170) "1416 Failed to allocate sysfs attr\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13171) goto out_destroy_shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13174) /* Set up SLI-4 HBA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13175) if (lpfc_sli4_hba_setup(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13176) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13177) "1421 Failed to set up hba\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13178) error = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13179) goto out_free_sysfs_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13182) /* Log the current active interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13183) phba->intr_mode = intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13184) lpfc_log_intr_mode(phba, intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13186) /* Perform post initialization setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13187) lpfc_post_init_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13189) /* NVME support in FW earlier in the driver load corrects the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13190) * FC4 type making a check for nvme_support unnecessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13192) if (phba->nvmet_support == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13193) if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13194) /* Create NVME binding with nvme_fc_transport. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13195) * ensures the vport is initialized. If the localport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13196) * create fails, it should not unload the driver to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13197) * support field issues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13199) error = lpfc_nvme_create_localport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13200) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13201) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13202) "6004 NVME registration "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13203) "failed, error x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13204) error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13209) /* check for firmware upgrade or downgrade */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13210) if (phba->cfg_request_firmware_upgrade)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13211) lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13213) /* Check if there are static vports to be created. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13214) lpfc_create_static_vport(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13216) /* Enable RAS FW log support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13217) lpfc_sli4_ras_setup(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13219) timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13220) cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13222) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13224) out_free_sysfs_attr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13225) lpfc_free_sysfs_attr(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13226) out_destroy_shost:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13227) lpfc_destroy_shost(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13228) out_disable_intr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13229) lpfc_sli4_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13230) out_unset_driver_resource:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13231) lpfc_unset_driver_resource_phase2(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13232) out_unset_driver_resource_s4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13233) lpfc_sli4_driver_resource_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13234) out_unset_pci_mem_s4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13235) lpfc_sli4_pci_mem_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13236) out_disable_pci_dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13237) lpfc_disable_pci_dev(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13238) if (shost)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13239) scsi_host_put(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13240) out_free_phba:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13241) lpfc_hba_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13242) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13245) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13246) * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13247) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13248) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13249) * This routine is called from the kernel's PCI subsystem to device with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13250) * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13251) * removed from PCI bus, it performs all the necessary cleanup for the HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13252) * device to be removed from the PCI subsystem properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13253) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13254) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13255) lpfc_pci_remove_one_s4(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13257) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13258) struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13259) struct lpfc_vport **vports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13260) struct lpfc_hba *phba = vport->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13261) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13263) /* Mark the device unloading flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13264) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13265) vport->load_flag |= FC_UNLOADING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13266) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13268) /* Free the HBA sysfs attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13269) lpfc_free_sysfs_attr(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13271) /* Release all the vports against this physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13272) vports = lpfc_create_vport_work_array(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13273) if (vports != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13274) for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13275) if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13276) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13277) fc_vport_terminate(vports[i]->fc_vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13279) lpfc_destroy_vport_work_array(phba, vports);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13281) /* Remove FC host and then SCSI host with the physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13282) fc_remove_host(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13283) scsi_remove_host(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13285) /* Perform ndlp cleanup on the physical port. The nvme and nvmet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13286) * localports are destroyed after to cleanup all transport memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13287) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13288) lpfc_cleanup(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13289) lpfc_nvmet_destroy_targetport(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13290) lpfc_nvme_destroy_localport(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13292) /* De-allocate multi-XRI pools */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13293) if (phba->cfg_xri_rebalancing)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13294) lpfc_destroy_multixri_pools(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13296) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13297) * Bring down the SLI Layer. This step disables all interrupts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13298) * clears the rings, discards all mailbox commands, and resets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13299) * the HBA FCoE function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13301) lpfc_debugfs_terminate(vport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13303) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13304) spin_lock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13305) list_del_init(&vport->listentry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13306) spin_unlock_irq(&phba->port_list_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13308) /* Perform scsi free before driver resource_unset since scsi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13309) * buffers are released to their corresponding pools here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13311) lpfc_io_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13312) lpfc_free_iocb_list(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13313) lpfc_sli4_hba_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13315) lpfc_unset_driver_resource_phase2(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13316) lpfc_sli4_driver_resource_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13318) /* Unmap adapter Control and Doorbell registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13319) lpfc_sli4_pci_mem_unset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13321) /* Release PCI resources and disable device's PCI function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13322) scsi_host_put(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13323) lpfc_disable_pci_dev(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13325) /* Finally, free the driver's device data structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13326) lpfc_hba_free(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13328) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13331) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13332) * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13333) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13334) * @msg: power management message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13335) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13336) * This routine is called from the kernel's PCI subsystem to support system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13337) * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13338) * this method, it quiesces the device by stopping the driver's worker
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13339) * thread for the device, turning off device's interrupt and DMA, and bring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13340) * the device offline. Note that as the driver implements the minimum PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13341) * requirements to a power-aware driver's PM support for suspend/resume -- all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13342) * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13343) * method call will be treated as SUSPEND and the driver will fully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13344) * reinitialize its device during resume() method call, the driver will set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13345) * device to PCI_D3hot state in PCI config space instead of setting it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13346) * according to the @msg provided by the PM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13347) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13348) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13349) * 0 - driver suspended the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13350) * Error otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13351) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13352) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13353) lpfc_pci_suspend_one_s4(struct pci_dev *pdev, pm_message_t msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13355) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13356) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13358) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13359) "2843 PCI device Power Management suspend.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13361) /* Bring down the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13362) lpfc_offline_prep(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13363) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13364) kthread_stop(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13366) /* Disable interrupt from device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13367) lpfc_sli4_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13368) lpfc_sli4_queue_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13370) /* Save device state to PCI config space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13371) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13372) pci_set_power_state(pdev, PCI_D3hot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13374) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13377) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13378) * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13379) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13380) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13381) * This routine is called from the kernel's PCI subsystem to support system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13382) * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13383) * this method, it restores the device's PCI config space state and fully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13384) * reinitializes the device and brings it online. Note that as the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13385) * implements the minimum PM requirements to a power-aware driver's PM for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13386) * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13387) * to the suspend() method call will be treated as SUSPEND and the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13388) * will fully reinitialize its device during resume() method call, the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13389) * will be set to PCI_D0 directly in PCI config space before restoring the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13390) * state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13391) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13392) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13393) * 0 - driver suspended the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13394) * Error otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13395) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13396) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13397) lpfc_pci_resume_one_s4(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13399) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13400) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13401) uint32_t intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13402) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13404) lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13405) "0292 PCI device Power Management resume.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13407) /* Restore device state from PCI config space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13408) pci_set_power_state(pdev, PCI_D0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13409) pci_restore_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13411) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13412) * As the new kernel behavior of pci_restore_state() API call clears
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13413) * device saved_state flag, need to save the restored state again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13414) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13415) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13417) if (pdev->is_busmaster)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13418) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13420) /* Startup the kernel thread for this host adapter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13421) phba->worker_thread = kthread_run(lpfc_do_work, phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13422) "lpfc_worker_%d", phba->brd_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13423) if (IS_ERR(phba->worker_thread)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13424) error = PTR_ERR(phba->worker_thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13425) lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13426) "0293 PM resume failed to start worker "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13427) "thread: error=x%x.\n", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13428) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13431) /* Configure and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13432) intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13433) if (intr_mode == LPFC_INTR_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13434) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13435) "0294 PM resume Failed to enable interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13436) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13437) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13438) phba->intr_mode = intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13440) /* Restart HBA and bring it online */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13441) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13442) lpfc_online(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13444) /* Log the current active interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13445) lpfc_log_intr_mode(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13447) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13450) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13451) * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13452) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13453) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13454) * This routine is called to prepare the SLI4 device for PCI slot recover. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13455) * aborts all the outstanding SCSI I/Os to the pci device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13456) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13457) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13458) lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13460) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13461) "2828 PCI channel I/O abort preparing for recovery\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13462) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13463) * There may be errored I/Os through HBA, abort all I/Os on txcmplq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13464) * and let the SCSI mid-layer to retry them to recover.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13466) lpfc_sli_abort_fcp_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13469) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13470) * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13471) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13472) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13473) * This routine is called to prepare the SLI4 device for PCI slot reset. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13474) * disables the device interrupt and pci device, and aborts the internal FCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13475) * pending I/Os.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13476) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13477) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13478) lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13480) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13481) "2826 PCI channel disable preparing for reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13483) /* Block any management I/Os to the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13484) lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13486) /* Block all SCSI devices' I/Os on the host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13487) lpfc_scsi_dev_block(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13489) /* Flush all driver's outstanding I/Os as we are to reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13490) lpfc_sli_flush_io_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13492) /* stop all timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13493) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13495) /* Disable interrupt and pci device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13496) lpfc_sli4_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13497) lpfc_sli4_queue_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13498) pci_disable_device(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13501) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13502) * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13503) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13504) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13505) * This routine is called to prepare the SLI4 device for PCI slot permanently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13506) * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13507) * pending I/Os.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13508) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13509) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13510) lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13511) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13512) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13513) "2827 PCI channel permanent disable for failure\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13515) /* Block all SCSI devices' I/Os on the host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13516) lpfc_scsi_dev_block(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13518) /* stop all timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13519) lpfc_stop_hba_timers(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13521) /* Clean up all driver's outstanding I/Os */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13522) lpfc_sli_flush_io_rings(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13525) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13526) * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13527) * @pdev: pointer to PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13528) * @state: the current PCI connection state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13529) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13530) * This routine is called from the PCI subsystem for error handling to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13531) * with SLI-4 interface spec. This function is called by the PCI subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13532) * after a PCI bus error affecting this device has been detected. When this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13533) * function is invoked, it will need to stop all the I/Os and interrupt(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13534) * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13535) * for the PCI subsystem to perform proper recovery as desired.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13536) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13537) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13538) * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13539) * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13540) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13541) static pci_ers_result_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13542) lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13543) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13544) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13545) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13547) switch (state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13548) case pci_channel_io_normal:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13549) /* Non-fatal error, prepare for recovery */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13550) lpfc_sli4_prep_dev_for_recover(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13551) return PCI_ERS_RESULT_CAN_RECOVER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13552) case pci_channel_io_frozen:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13553) /* Fatal error, prepare for slot reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13554) lpfc_sli4_prep_dev_for_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13555) return PCI_ERS_RESULT_NEED_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13556) case pci_channel_io_perm_failure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13557) /* Permanent failure, prepare for device down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13558) lpfc_sli4_prep_dev_for_perm_failure(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13559) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13560) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13561) /* Unknown state, prepare and request slot reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13562) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13563) "2825 Unknown PCI error state: x%x\n", state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13564) lpfc_sli4_prep_dev_for_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13565) return PCI_ERS_RESULT_NEED_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13569) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13570) * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13571) * @pdev: pointer to PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13572) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13573) * This routine is called from the PCI subsystem for error handling to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13574) * with SLI-4 interface spec. It is called after PCI bus has been reset to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13575) * restart the PCI card from scratch, as if from a cold-boot. During the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13576) * PCI subsystem error recovery, after the driver returns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13577) * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13578) * recovery and then call this routine before calling the .resume method to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13579) * recover the device. This function will initialize the HBA device, enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13580) * the interrupt, but it will just put the HBA to offline state without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13581) * passing any I/O traffic.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13582) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13583) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13584) * PCI_ERS_RESULT_RECOVERED - the device has been recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13585) * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13586) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13587) static pci_ers_result_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13588) lpfc_io_slot_reset_s4(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13589) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13590) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13591) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13592) struct lpfc_sli *psli = &phba->sli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13593) uint32_t intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13595) dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13596) if (pci_enable_device_mem(pdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13597) printk(KERN_ERR "lpfc: Cannot re-enable "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13598) "PCI device after reset.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13599) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13602) pci_restore_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13604) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13605) * As the new kernel behavior of pci_restore_state() API call clears
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13606) * device saved_state flag, need to save the restored state again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13607) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13608) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13610) if (pdev->is_busmaster)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13611) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13613) spin_lock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13614) psli->sli_flag &= ~LPFC_SLI_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13615) spin_unlock_irq(&phba->hbalock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13617) /* Configure and enable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13618) intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13619) if (intr_mode == LPFC_INTR_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13620) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13621) "2824 Cannot re-enable interrupt after "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13622) "slot reset.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13623) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13624) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13625) phba->intr_mode = intr_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13627) /* Log the current active interrupt mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13628) lpfc_log_intr_mode(phba, phba->intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13630) return PCI_ERS_RESULT_RECOVERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13633) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13634) * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13635) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13636) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13637) * This routine is called from the PCI subsystem for error handling to device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13638) * with SLI-4 interface spec. It is called when kernel error recovery tells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13639) * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13640) * error recovery. After this call, traffic can start to flow from this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13641) * again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13642) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13643) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13644) lpfc_io_resume_s4(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13645) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13646) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13647) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13649) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13650) * In case of slot reset, as function reset is performed through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13651) * mailbox command which needs DMA to be enabled, this operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13652) * has to be moved to the io resume phase. Taking device offline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13653) * will perform the necessary cleanup.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13654) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13655) if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13656) /* Perform device reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13657) lpfc_offline_prep(phba, LPFC_MBX_WAIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13658) lpfc_offline(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13659) lpfc_sli_brdrestart(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13660) /* Bring the device back online */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13661) lpfc_online(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13665) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13666) * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13667) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13668) * @pid: pointer to PCI device identifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13669) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13670) * This routine is to be registered to the kernel's PCI subsystem. When an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13671) * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13672) * at PCI device-specific information of the device and driver to see if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13673) * driver state that it can support this kind of device. If the match is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13674) * successful, the driver core invokes this routine. This routine dispatches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13675) * the action to the proper SLI-3 or SLI-4 device probing routine, which will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13676) * do all the initialization that it needs to do to handle the HBA device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13677) * properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13678) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13679) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13680) * 0 - driver can claim the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13681) * negative value - driver can not claim the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13682) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13683) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13684) lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13685) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13686) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13687) struct lpfc_sli_intf intf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13689) if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13690) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13692) if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13693) (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13694) rc = lpfc_pci_probe_one_s4(pdev, pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13695) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13696) rc = lpfc_pci_probe_one_s3(pdev, pid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13698) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13701) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13702) * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13703) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13704) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13705) * This routine is to be registered to the kernel's PCI subsystem. When an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13706) * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13707) * This routine dispatches the action to the proper SLI-3 or SLI-4 device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13708) * remove routine, which will perform all the necessary cleanup for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13709) * device to be removed from the PCI subsystem properly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13710) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13711) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13712) lpfc_pci_remove_one(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13713) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13714) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13715) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13717) switch (phba->pci_dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13718) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13719) lpfc_pci_remove_one_s3(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13720) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13721) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13722) lpfc_pci_remove_one_s4(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13723) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13724) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13725) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13726) "1424 Invalid PCI device group: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13727) phba->pci_dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13728) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13730) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13733) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13734) * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13735) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13736) * @msg: power management message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13737) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13738) * This routine is to be registered to the kernel's PCI subsystem to support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13739) * system Power Management (PM). When PM invokes this method, it dispatches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13740) * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13741) * suspend the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13742) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13743) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13744) * 0 - driver suspended the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13745) * Error otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13746) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13747) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13748) lpfc_pci_suspend_one(struct pci_dev *pdev, pm_message_t msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13749) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13750) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13751) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13752) int rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13754) switch (phba->pci_dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13755) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13756) rc = lpfc_pci_suspend_one_s3(pdev, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13757) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13758) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13759) rc = lpfc_pci_suspend_one_s4(pdev, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13760) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13761) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13762) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13763) "1425 Invalid PCI device group: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13764) phba->pci_dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13765) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13767) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13770) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13771) * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13772) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13773) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13774) * This routine is to be registered to the kernel's PCI subsystem to support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13775) * system Power Management (PM). When PM invokes this method, it dispatches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13776) * the action to the proper SLI-3 or SLI-4 device resume routine, which will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13777) * resume the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13778) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13779) * Return code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13780) * 0 - driver suspended the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13781) * Error otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13782) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13783) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13784) lpfc_pci_resume_one(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13786) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13787) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13788) int rc = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13790) switch (phba->pci_dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13791) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13792) rc = lpfc_pci_resume_one_s3(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13793) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13794) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13795) rc = lpfc_pci_resume_one_s4(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13796) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13797) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13798) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13799) "1426 Invalid PCI device group: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13800) phba->pci_dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13801) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13803) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13806) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13807) * lpfc_io_error_detected - lpfc method for handling PCI I/O error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13808) * @pdev: pointer to PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13809) * @state: the current PCI connection state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13810) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13811) * This routine is registered to the PCI subsystem for error handling. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13812) * function is called by the PCI subsystem after a PCI bus error affecting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13813) * this device has been detected. When this routine is invoked, it dispatches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13814) * the action to the proper SLI-3 or SLI-4 device error detected handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13815) * routine, which will perform the proper error detected operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13816) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13817) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13818) * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13819) * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13820) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13821) static pci_ers_result_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13822) lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13823) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13824) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13825) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13826) pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13828) switch (phba->pci_dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13829) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13830) rc = lpfc_io_error_detected_s3(pdev, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13831) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13832) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13833) rc = lpfc_io_error_detected_s4(pdev, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13834) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13835) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13836) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13837) "1427 Invalid PCI device group: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13838) phba->pci_dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13839) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13841) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13844) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13845) * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13846) * @pdev: pointer to PCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13847) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13848) * This routine is registered to the PCI subsystem for error handling. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13849) * function is called after PCI bus has been reset to restart the PCI card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13850) * from scratch, as if from a cold-boot. When this routine is invoked, it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13851) * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13852) * routine, which will perform the proper device reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13853) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13854) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13855) * PCI_ERS_RESULT_RECOVERED - the device has been recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13856) * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13857) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13858) static pci_ers_result_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13859) lpfc_io_slot_reset(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13860) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13861) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13862) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13863) pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13865) switch (phba->pci_dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13866) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13867) rc = lpfc_io_slot_reset_s3(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13868) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13869) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13870) rc = lpfc_io_slot_reset_s4(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13871) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13872) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13873) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13874) "1428 Invalid PCI device group: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13875) phba->pci_dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13876) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13878) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13881) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13882) * lpfc_io_resume - lpfc method for resuming PCI I/O operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13883) * @pdev: pointer to PCI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13884) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13885) * This routine is registered to the PCI subsystem for error handling. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13886) * is called when kernel error recovery tells the lpfc driver that it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13887) * OK to resume normal PCI operation after PCI bus error recovery. When
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13888) * this routine is invoked, it dispatches the action to the proper SLI-3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13889) * or SLI-4 device io_resume routine, which will resume the device operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13890) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13891) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13892) lpfc_io_resume(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13893) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13894) struct Scsi_Host *shost = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13895) struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13897) switch (phba->pci_dev_grp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13898) case LPFC_PCI_DEV_LP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13899) lpfc_io_resume_s3(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13900) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13901) case LPFC_PCI_DEV_OC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13902) lpfc_io_resume_s4(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13903) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13904) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13905) lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13906) "1429 Invalid PCI device group: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13907) phba->pci_dev_grp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13908) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13910) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13913) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13914) * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13915) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13916) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13917) * This routine checks to see if OAS is supported for this adapter. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13918) * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13919) * the enable oas flag is cleared and the pool created for OAS device data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13920) * is destroyed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13921) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13922) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13923) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13924) lpfc_sli4_oas_verify(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13925) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13927) if (!phba->cfg_EnableXLane)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13928) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13930) if (phba->sli4_hba.pc_sli4_params.oas_supported) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13931) phba->cfg_fof = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13932) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13933) phba->cfg_fof = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13934) mempool_destroy(phba->device_data_mem_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13935) phba->device_data_mem_pool = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13938) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13941) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13942) * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13943) * @phba: pointer to lpfc hba data structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13944) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13945) * This routine checks to see if RAS is supported by the adapter. Check the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13946) * function through which RAS support enablement is to be done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13947) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13948) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13949) lpfc_sli4_ras_init(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13950) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13951) switch (phba->pcidev->device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13952) case PCI_DEVICE_ID_LANCER_G6_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13953) case PCI_DEVICE_ID_LANCER_G7_FC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13954) phba->ras_fwlog.ras_hwsupport = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13955) if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13956) phba->cfg_ras_fwlog_buffsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13957) phba->ras_fwlog.ras_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13958) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13959) phba->ras_fwlog.ras_enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13960) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13961) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13962) phba->ras_fwlog.ras_hwsupport = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13963) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13967) MODULE_DEVICE_TABLE(pci, lpfc_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13969) static const struct pci_error_handlers lpfc_err_handler = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13970) .error_detected = lpfc_io_error_detected,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13971) .slot_reset = lpfc_io_slot_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13972) .resume = lpfc_io_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13973) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13975) static struct pci_driver lpfc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13976) .name = LPFC_DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13977) .id_table = lpfc_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13978) .probe = lpfc_pci_probe_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13979) .remove = lpfc_pci_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13980) .shutdown = lpfc_pci_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13981) .suspend = lpfc_pci_suspend_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13982) .resume = lpfc_pci_resume_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13983) .err_handler = &lpfc_err_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13984) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13986) static const struct file_operations lpfc_mgmt_fop = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13987) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13988) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13990) static struct miscdevice lpfc_mgmt_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13991) .minor = MISC_DYNAMIC_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13992) .name = "lpfcmgmt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13993) .fops = &lpfc_mgmt_fop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13994) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13996) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13997) * lpfc_init - lpfc module initialization routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13998) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13999) * This routine is to be invoked when the lpfc module is loaded into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14000) * kernel. The special kernel macro module_init() is used to indicate the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14001) * role of this routine to the kernel as lpfc module entry point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14002) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14003) * Return codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14004) * 0 - successful
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14005) * -ENOMEM - FC attach transport failed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14006) * all others - failed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14007) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14008) static int __init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14009) lpfc_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14010) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14011) int error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14013) pr_info(LPFC_MODULE_DESC "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14014) pr_info(LPFC_COPYRIGHT "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14016) error = misc_register(&lpfc_mgmt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14017) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14018) printk(KERN_ERR "Could not register lpfcmgmt device, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14019) "misc_register returned with status %d", error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14021) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14022) lpfc_transport_functions.vport_create = lpfc_vport_create;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14023) lpfc_transport_functions.vport_delete = lpfc_vport_delete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14024) lpfc_transport_template =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14025) fc_attach_transport(&lpfc_transport_functions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14026) if (lpfc_transport_template == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14027) goto unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14028) lpfc_vport_transport_template =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14029) fc_attach_transport(&lpfc_vport_transport_functions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14030) if (lpfc_vport_transport_template == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14031) fc_release_transport(lpfc_transport_template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14032) goto unregister;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14033) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14034) lpfc_nvme_cmd_template();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14035) lpfc_nvmet_cmd_template();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14037) /* Initialize in case vector mapping is needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14038) lpfc_present_cpu = num_present_cpus();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14040) error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14041) "lpfc/sli4:online",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14042) lpfc_cpu_online, lpfc_cpu_offline);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14043) if (error < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14044) goto cpuhp_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14045) lpfc_cpuhp_state = error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14047) error = pci_register_driver(&lpfc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14048) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14049) goto unwind;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14051) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14053) unwind:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14054) cpuhp_remove_multi_state(lpfc_cpuhp_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14055) cpuhp_failure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14056) fc_release_transport(lpfc_transport_template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14057) fc_release_transport(lpfc_vport_transport_template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14058) unregister:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14059) misc_deregister(&lpfc_mgmt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14061) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14062) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14064) void lpfc_dmp_dbg(struct lpfc_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14065) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14066) unsigned int start_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14067) unsigned int dbg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14068) unsigned int temp_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14069) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14070) int j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14071) unsigned long rem_nsec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14073) if (phba->cfg_log_verbose)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14074) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14076) if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14077) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14079) start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14080) dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14081) temp_idx = start_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14082) if (dbg_cnt >= DBG_LOG_SZ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14083) dbg_cnt = DBG_LOG_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14084) temp_idx -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14085) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14086) if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14087) temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14088) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14089) if (start_idx < dbg_cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14090) start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14091) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14092) start_idx -= dbg_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14093) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14095) dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14096) start_idx, temp_idx, dbg_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14098) for (i = 0; i < dbg_cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14099) if ((start_idx + i) < DBG_LOG_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14100) temp_idx = (start_idx + i) % DBG_LOG_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14101) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14102) temp_idx = j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14103) rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14104) dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14105) temp_idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14106) (unsigned long)phba->dbg_log[temp_idx].t_ns,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14107) rem_nsec / 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14108) phba->dbg_log[temp_idx].log);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14110) atomic_set(&phba->dbg_log_cnt, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14111) atomic_set(&phba->dbg_log_dmping, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14114) __printf(2, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14115) void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14117) unsigned int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14118) va_list args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14119) int dbg_dmping = atomic_read(&phba->dbg_log_dmping);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14120) struct va_format vaf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14123) va_start(args, fmt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14124) if (unlikely(dbg_dmping)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14125) vaf.fmt = fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14126) vaf.va = &args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14127) dev_info(&phba->pcidev->dev, "%pV", &vaf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14128) va_end(args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14129) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14131) idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) %
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14132) DBG_LOG_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14134) atomic_inc(&phba->dbg_log_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14136) vscnprintf(phba->dbg_log[idx].log,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14137) sizeof(phba->dbg_log[idx].log), fmt, args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14138) va_end(args);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14140) phba->dbg_log[idx].t_ns = local_clock();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14143) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14144) * lpfc_exit - lpfc module removal routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14145) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14146) * This routine is invoked when the lpfc module is removed from the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14147) * The special kernel macro module_exit() is used to indicate the role of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14148) * this routine to the kernel as lpfc module exit point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14150) static void __exit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14151) lpfc_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14153) misc_deregister(&lpfc_mgmt_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14154) pci_unregister_driver(&lpfc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14155) cpuhp_remove_multi_state(lpfc_cpuhp_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14156) fc_release_transport(lpfc_transport_template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14157) fc_release_transport(lpfc_vport_transport_template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14158) idr_destroy(&lpfc_hba_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14161) module_init(lpfc_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14162) module_exit(lpfc_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14163) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14164) MODULE_DESCRIPTION(LPFC_MODULE_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14165) MODULE_AUTHOR("Broadcom");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14166) MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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