^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*******************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is part of the Emulex Linux Device Driver for *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Fibre Channel Host Bus Adapters. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2017-2019 Broadcom. All Rights Reserved. The term *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009-2016 Emulex. All rights reserved. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * EMULEX and SLI are trademarks of Emulex. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * www.broadcom.com *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This program is free software; you can redistribute it and/or *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * modify it under the terms of version 2 of the GNU General *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Public License as published by the Free Software Foundation. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is distributed in the hope that it will be useful. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * TO BE LEGALLY INVALID. See the GNU General Public License for *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * more details, a copy of which can be found in the file COPYING *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * included with this package. *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *******************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <uapi/scsi/fc/fc_els.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Macros to deal with bit fields. Each bit field must have 3 #defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * associated with it (_SHIFT, _MASK, and _WORD).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * EG. For a bit field that is in the 7th bit of the "field4" field of a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * structure and is 2 bits in size the following #defines must exist:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * struct temp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * uint32_t field1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * uint32_t field2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * uint32_t field3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * uint32_t field4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * #define example_bit_field_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * #define example_bit_field_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * #define example_bit_field_WORD field4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * uint32_t field5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Then the macros below may be used to get or set the value of that field.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * EG. To get the value of the bit field from the above example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * struct temp t1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * value = bf_get(example_bit_field, &t1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * And then to set that bit field:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * bf_set(example_bit_field, &t1, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Or clear that bit field:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * bf_set(example_bit_field, &t1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define bf_get_be32(name, ptr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ((be32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define bf_get_le32(name, ptr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define bf_get(name, ptr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define bf_set_le32(name, ptr, value) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ((ptr)->name##_WORD = cpu_to_le32(((((value) & \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) ~(name##_MASK << name##_SHIFT)))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define bf_set(name, ptr, value) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct dma_address {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) uint32_t addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) uint32_t addr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct lpfc_sli_intf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define lpfc_sli_intf_valid_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define lpfc_sli_intf_valid_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define lpfc_sli_intf_valid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define LPFC_SLI_INTF_VALID 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define lpfc_sli_intf_sli_hint2_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define lpfc_sli_intf_sli_hint2_MASK 0x0000001F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define lpfc_sli_intf_sli_hint2_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define LPFC_SLI_INTF_SLI_HINT2_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define lpfc_sli_intf_sli_hint1_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define lpfc_sli_intf_sli_hint1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define lpfc_sli_intf_sli_hint1_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define LPFC_SLI_INTF_SLI_HINT1_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define LPFC_SLI_INTF_SLI_HINT1_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define LPFC_SLI_INTF_SLI_HINT1_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define lpfc_sli_intf_if_type_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define lpfc_sli_intf_if_type_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define lpfc_sli_intf_if_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define LPFC_SLI_INTF_IF_TYPE_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define LPFC_SLI_INTF_IF_TYPE_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define LPFC_SLI_INTF_IF_TYPE_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define LPFC_SLI_INTF_IF_TYPE_6 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define lpfc_sli_intf_sli_family_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define lpfc_sli_intf_sli_family_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define lpfc_sli_intf_sli_family_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define LPFC_SLI_INTF_FAMILY_BE2 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define LPFC_SLI_INTF_FAMILY_BE3 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define LPFC_SLI_INTF_FAMILY_LNCR_A0 0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define LPFC_SLI_INTF_FAMILY_LNCR_B0 0xb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define lpfc_sli_intf_slirev_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define lpfc_sli_intf_slirev_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define lpfc_sli_intf_slirev_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define LPFC_SLI_INTF_REV_SLI3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define LPFC_SLI_INTF_REV_SLI4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define lpfc_sli_intf_func_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define lpfc_sli_intf_func_type_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define lpfc_sli_intf_func_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define LPFC_SLI_INTF_IF_TYPE_PHYS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define LPFC_SLI_INTF_IF_TYPE_VIRT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define LPFC_SLI4_MBX_EMBED true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define LPFC_SLI4_MBX_NEMBED false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define LPFC_SLI4_MB_WORD_COUNT 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define LPFC_MAX_MQ_PAGE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define LPFC_MAX_WQ_PAGE_V0 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define LPFC_MAX_WQ_PAGE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define LPFC_MAX_RQ_PAGE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define LPFC_MAX_CQ_PAGE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define LPFC_MAX_EQ_PAGE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define LPFC_VIR_FUNC_MAX 32 /* Maximum number of virtual functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define LPFC_PCI_FUNC_MAX 5 /* Maximum number of PCI functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define LPFC_VFR_PAGE_SIZE 0x1000 /* 4KB BAR2 per-VF register page size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* Define SLI4 Alignment requirements. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define LPFC_ALIGN_16_BYTE 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define LPFC_ALIGN_64_BYTE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define SLI4_PAGE_SIZE 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Define SLI4 specific definitions. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define LPFC_MQ_CQE_BYTE_OFFSET 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define LPFC_MBX_CMD_HDR_LENGTH 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define LPFC_MBX_ERROR_RANGE 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define LPFC_BMBX_BIT1_ADDR_HI 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define LPFC_BMBX_BIT1_ADDR_LO 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define LPFC_RPI_HDR_COUNT 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define LPFC_HDR_TEMPLATE_SIZE 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define LPFC_RPI_ALLOC_ERROR 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define LPFC_FCF_RECORD_WD_CNT 132
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define LPFC_ENTIRE_FCF_DATABASE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define LPFC_DFLT_FCF_INDEX 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* Virtual function numbers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define LPFC_VF0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define LPFC_VF1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define LPFC_VF2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define LPFC_VF3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define LPFC_VF4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define LPFC_VF5 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define LPFC_VF6 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define LPFC_VF7 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define LPFC_VF8 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define LPFC_VF9 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define LPFC_VF10 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define LPFC_VF11 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define LPFC_VF12 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define LPFC_VF13 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define LPFC_VF14 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define LPFC_VF15 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define LPFC_VF16 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define LPFC_VF17 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define LPFC_VF18 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define LPFC_VF19 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define LPFC_VF20 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define LPFC_VF21 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define LPFC_VF22 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define LPFC_VF23 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define LPFC_VF24 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define LPFC_VF25 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define LPFC_VF26 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define LPFC_VF27 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define LPFC_VF28 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define LPFC_VF29 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define LPFC_VF30 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define LPFC_VF31 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* PCI function numbers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define LPFC_PCI_FUNC0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define LPFC_PCI_FUNC1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define LPFC_PCI_FUNC2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define LPFC_PCI_FUNC3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define LPFC_PCI_FUNC4 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* SLI4 interface type-2 PDEV_CTL register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define LPFC_CTL_PDEV_CTL_OFFSET 0x414
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define LPFC_CTL_PDEV_CTL_DRST 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define LPFC_CTL_PDEV_CTL_FRST 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define LPFC_CTL_PDEV_CTL_DD 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define LPFC_CTL_PDEV_CTL_LC 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define LPFC_CTL_PDEV_CTL_FRL_ALL 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define LPFC_CTL_PDEV_CTL_FRL_FC_FCOE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define LPFC_CTL_PDEV_CTL_FRL_NIC 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define LPFC_CTL_PDEV_CTL_DDL_RAS 0x1000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define LPFC_FW_DUMP_REQUEST (LPFC_CTL_PDEV_CTL_DD | LPFC_CTL_PDEV_CTL_FRST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* Active interrupt test count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define LPFC_ACT_INTR_CNT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* Algrithmns for scheduling FCP commands to WQs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define LPFC_FCP_SCHED_BY_HDWQ 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define LPFC_FCP_SCHED_BY_CPU 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* Algrithmns for NameServer Query after RSCN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define LPFC_NS_QUERY_GID_FT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define LPFC_NS_QUERY_GID_PT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Delay Multiplier constant */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define LPFC_DMULT_CONST 651042
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define LPFC_DMULT_MAX 1023
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* Configuration of Interrupts / sec for entire HBA port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define LPFC_MIN_IMAX 5000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define LPFC_MAX_IMAX 5000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define LPFC_DEF_IMAX 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define LPFC_MAX_AUTO_EQ_DELAY 120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define LPFC_EQ_DELAY_STEP 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define LPFC_EQD_ISR_TRIGGER 20000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* 1s intervals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define LPFC_EQ_DELAY_MSECS 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define LPFC_MIN_CPU_MAP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define LPFC_MAX_CPU_MAP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define LPFC_HBA_CPU_MAP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* PORT_CAPABILITIES constants. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define LPFC_MAX_SUPPORTED_PAGES 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct ulp_bde64 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) union ULP_BDE_TUS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) uint32_t w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #ifdef __BIG_ENDIAN_BITFIELD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) VALUE !! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) uint32_t bdeSize:24; /* Size of buffer (in bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #else /* __LITTLE_ENDIAN_BITFIELD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) uint32_t bdeSize:24; /* Size of buffer (in bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) VALUE !! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define BUFF_TYPE_BDE_64 0x00 /* BDE (Host_resident) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define BUFF_TYPE_BDE_IMMED 0x01 /* Immediate Data BDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define BUFF_TYPE_BDE_64P 0x02 /* BDE (Port-resident) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #define BUFF_TYPE_BDE_64I 0x08 /* Input BDE (Host-resident) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define BUFF_TYPE_BDE_64IP 0x0A /* Input BDE (Port-resident) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define BUFF_TYPE_BLP_64 0x40 /* BLP (Host-resident) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define BUFF_TYPE_BLP_64P 0x42 /* BLP (Port-resident) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) } f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) } tus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) uint32_t addrLow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) uint32_t addrHigh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /* Maximun size of immediate data that can fit into a 128 byte WQE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define LPFC_MAX_BDE_IMM_SIZE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct lpfc_sli4_flags {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #define lpfc_idx_rsrc_rdy_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define lpfc_idx_rsrc_rdy_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define lpfc_idx_rsrc_rdy_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define LPFC_IDX_RSRC_RDY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define lpfc_rpi_rsrc_rdy_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define lpfc_rpi_rsrc_rdy_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #define lpfc_rpi_rsrc_rdy_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define LPFC_RPI_RSRC_RDY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #define lpfc_vpi_rsrc_rdy_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define lpfc_vpi_rsrc_rdy_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define lpfc_vpi_rsrc_rdy_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define LPFC_VPI_RSRC_RDY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define lpfc_vfi_rsrc_rdy_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #define lpfc_vfi_rsrc_rdy_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #define lpfc_vfi_rsrc_rdy_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define LPFC_VFI_RSRC_RDY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct sli4_bls_rsp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) uint32_t word0_rsvd; /* Word0 must be reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #define lpfc_abts_orig_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define lpfc_abts_orig_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define lpfc_abts_orig_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define LPFC_ABTS_UNSOL_RSP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) #define LPFC_ABTS_UNSOL_INT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define lpfc_abts_rxid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define lpfc_abts_rxid_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define lpfc_abts_rxid_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define lpfc_abts_oxid_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define lpfc_abts_oxid_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define lpfc_abts_oxid_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define lpfc_vndr_code_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define lpfc_vndr_code_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define lpfc_vndr_code_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define lpfc_rsn_expln_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define lpfc_rsn_expln_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define lpfc_rsn_expln_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define lpfc_rsn_code_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define lpfc_rsn_code_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define lpfc_rsn_code_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) uint32_t word5_rsvd; /* Word5 must be reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* event queue entry structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct lpfc_eqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #define lpfc_eqe_resource_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define lpfc_eqe_resource_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define lpfc_eqe_resource_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define lpfc_eqe_minor_code_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define lpfc_eqe_minor_code_MASK 0x00000FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define lpfc_eqe_minor_code_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define lpfc_eqe_major_code_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define lpfc_eqe_major_code_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define lpfc_eqe_major_code_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define lpfc_eqe_valid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define lpfc_eqe_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define lpfc_eqe_valid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* completion queue entry structure (common fields for all cqe types) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct lpfc_cqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) uint32_t reserved0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) uint32_t reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) uint32_t reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define lpfc_cqe_valid_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define lpfc_cqe_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define lpfc_cqe_valid_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define lpfc_cqe_code_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define lpfc_cqe_code_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #define lpfc_cqe_code_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /* Completion Queue Entry Status Codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define CQE_STATUS_SUCCESS 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define CQE_STATUS_FCP_RSP_FAILURE 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #define CQE_STATUS_REMOTE_STOP 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #define CQE_STATUS_LOCAL_REJECT 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define CQE_STATUS_NPORT_RJT 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define CQE_STATUS_FABRIC_RJT 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define CQE_STATUS_NPORT_BSY 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define CQE_STATUS_FABRIC_BSY 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #define CQE_STATUS_INTERMED_RSP 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define CQE_STATUS_LS_RJT 0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define CQE_STATUS_CMD_REJECT 0xb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define CQE_STATUS_FCP_TGT_LENCHECK 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define CQE_STATUS_NEED_BUFF_ENTRY 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define CQE_STATUS_DI_ERROR 0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* Used when mapping CQE status to IOCB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #define LPFC_IOCB_STATUS_MASK 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* Status returned by hardware (valid only if status = CQE_STATUS_SUCCESS). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define CQE_HW_STATUS_NO_ERR 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define CQE_HW_STATUS_UNDERRUN 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define CQE_HW_STATUS_OVERRUN 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* Completion Queue Entry Codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #define CQE_CODE_COMPL_WQE 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define CQE_CODE_RELEASE_WQE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define CQE_CODE_RECEIVE 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define CQE_CODE_XRI_ABORTED 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #define CQE_CODE_RECEIVE_V1 0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define CQE_CODE_NVME_ERSP 0xd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * Define mask value for xri_aborted and wcqe completed CQE extended status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * Currently, extended status is limited to 9 bits (0x0 -> 0x103) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define WCQE_PARAM_MASK 0x1FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* completion queue entry for wqe completions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) struct lpfc_wcqe_complete {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #define lpfc_wcqe_c_request_tag_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define lpfc_wcqe_c_request_tag_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define lpfc_wcqe_c_request_tag_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define lpfc_wcqe_c_status_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #define lpfc_wcqe_c_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define lpfc_wcqe_c_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #define lpfc_wcqe_c_hw_status_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define lpfc_wcqe_c_hw_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) #define lpfc_wcqe_c_hw_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #define lpfc_wcqe_c_ersp0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define lpfc_wcqe_c_ersp0_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) #define lpfc_wcqe_c_ersp0_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) uint32_t total_data_placed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) uint32_t parameter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define lpfc_wcqe_c_bg_edir_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define lpfc_wcqe_c_bg_edir_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define lpfc_wcqe_c_bg_edir_WORD parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define lpfc_wcqe_c_bg_tdpv_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define lpfc_wcqe_c_bg_tdpv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define lpfc_wcqe_c_bg_tdpv_WORD parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) #define lpfc_wcqe_c_bg_re_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #define lpfc_wcqe_c_bg_re_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) #define lpfc_wcqe_c_bg_re_WORD parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #define lpfc_wcqe_c_bg_ae_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #define lpfc_wcqe_c_bg_ae_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) #define lpfc_wcqe_c_bg_ae_WORD parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) #define lpfc_wcqe_c_bg_ge_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) #define lpfc_wcqe_c_bg_ge_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) #define lpfc_wcqe_c_bg_ge_WORD parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #define lpfc_wcqe_c_valid_SHIFT lpfc_cqe_valid_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) #define lpfc_wcqe_c_valid_MASK lpfc_cqe_valid_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #define lpfc_wcqe_c_valid_WORD lpfc_cqe_valid_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define lpfc_wcqe_c_xb_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #define lpfc_wcqe_c_xb_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #define lpfc_wcqe_c_xb_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define lpfc_wcqe_c_pv_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) #define lpfc_wcqe_c_pv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define lpfc_wcqe_c_pv_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) #define lpfc_wcqe_c_priority_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) #define lpfc_wcqe_c_priority_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define lpfc_wcqe_c_priority_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #define lpfc_wcqe_c_code_SHIFT lpfc_cqe_code_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #define lpfc_wcqe_c_code_MASK lpfc_cqe_code_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) #define lpfc_wcqe_c_code_WORD lpfc_cqe_code_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define lpfc_wcqe_c_sqhead_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #define lpfc_wcqe_c_sqhead_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define lpfc_wcqe_c_sqhead_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /* completion queue entry for wqe release */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct lpfc_wcqe_release {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) uint32_t reserved0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) uint32_t reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) #define lpfc_wcqe_r_wq_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #define lpfc_wcqe_r_wq_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #define lpfc_wcqe_r_wq_id_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) #define lpfc_wcqe_r_wqe_index_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define lpfc_wcqe_r_wqe_index_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) #define lpfc_wcqe_r_wqe_index_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) #define lpfc_wcqe_r_valid_SHIFT lpfc_cqe_valid_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) #define lpfc_wcqe_r_valid_MASK lpfc_cqe_valid_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #define lpfc_wcqe_r_valid_WORD lpfc_cqe_valid_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define lpfc_wcqe_r_code_SHIFT lpfc_cqe_code_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define lpfc_wcqe_r_code_MASK lpfc_cqe_code_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define lpfc_wcqe_r_code_WORD lpfc_cqe_code_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct sli4_wcqe_xri_aborted {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #define lpfc_wcqe_xa_status_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define lpfc_wcqe_xa_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define lpfc_wcqe_xa_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) uint32_t parameter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #define lpfc_wcqe_xa_remote_xid_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) #define lpfc_wcqe_xa_remote_xid_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) #define lpfc_wcqe_xa_remote_xid_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) #define lpfc_wcqe_xa_xri_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) #define lpfc_wcqe_xa_xri_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #define lpfc_wcqe_xa_xri_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) #define lpfc_wcqe_xa_valid_SHIFT lpfc_cqe_valid_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) #define lpfc_wcqe_xa_valid_MASK lpfc_cqe_valid_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) #define lpfc_wcqe_xa_valid_WORD lpfc_cqe_valid_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #define lpfc_wcqe_xa_ia_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #define lpfc_wcqe_xa_ia_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) #define lpfc_wcqe_xa_ia_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) #define CQE_XRI_ABORTED_IA_REMOTE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #define CQE_XRI_ABORTED_IA_LOCAL 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) #define lpfc_wcqe_xa_br_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) #define lpfc_wcqe_xa_br_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) #define lpfc_wcqe_xa_br_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) #define CQE_XRI_ABORTED_BR_BA_ACC 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) #define CQE_XRI_ABORTED_BR_BA_RJT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) #define lpfc_wcqe_xa_eo_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define lpfc_wcqe_xa_eo_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #define lpfc_wcqe_xa_eo_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define CQE_XRI_ABORTED_EO_REMOTE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #define CQE_XRI_ABORTED_EO_LOCAL 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #define lpfc_wcqe_xa_code_SHIFT lpfc_cqe_code_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #define lpfc_wcqe_xa_code_MASK lpfc_cqe_code_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) #define lpfc_wcqe_xa_code_WORD lpfc_cqe_code_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) /* completion queue entry structure for rqe completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct lpfc_rcqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #define lpfc_rcqe_bindex_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #define lpfc_rcqe_bindex_MASK 0x0000FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) #define lpfc_rcqe_bindex_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #define lpfc_rcqe_status_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #define lpfc_rcqe_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #define lpfc_rcqe_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #define FC_STATUS_RQ_SUCCESS 0x10 /* Async receive successful */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) #define FC_STATUS_RQ_BUF_LEN_EXCEEDED 0x11 /* payload truncated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) #define FC_STATUS_INSUFF_BUF_NEED_BUF 0x12 /* Insufficient buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #define FC_STATUS_INSUFF_BUF_FRM_DISC 0x13 /* Frame Discard */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #define lpfc_rcqe_fcf_id_v1_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #define lpfc_rcqe_fcf_id_v1_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #define lpfc_rcqe_fcf_id_v1_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) #define lpfc_rcqe_length_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) #define lpfc_rcqe_length_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #define lpfc_rcqe_length_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #define lpfc_rcqe_rq_id_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) #define lpfc_rcqe_rq_id_MASK 0x000003FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #define lpfc_rcqe_rq_id_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) #define lpfc_rcqe_fcf_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #define lpfc_rcqe_fcf_id_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) #define lpfc_rcqe_fcf_id_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #define lpfc_rcqe_rq_id_v1_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) #define lpfc_rcqe_rq_id_v1_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) #define lpfc_rcqe_rq_id_v1_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) #define lpfc_rcqe_valid_SHIFT lpfc_cqe_valid_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) #define lpfc_rcqe_valid_MASK lpfc_cqe_valid_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) #define lpfc_rcqe_valid_WORD lpfc_cqe_valid_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) #define lpfc_rcqe_port_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) #define lpfc_rcqe_port_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) #define lpfc_rcqe_port_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) #define lpfc_rcqe_hdr_length_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) #define lpfc_rcqe_hdr_length_MASK 0x0000001F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) #define lpfc_rcqe_hdr_length_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) #define lpfc_rcqe_code_SHIFT lpfc_cqe_code_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) #define lpfc_rcqe_code_MASK lpfc_cqe_code_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) #define lpfc_rcqe_code_WORD lpfc_cqe_code_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) #define lpfc_rcqe_eof_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) #define lpfc_rcqe_eof_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) #define lpfc_rcqe_eof_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) #define FCOE_EOFn 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) #define FCOE_EOFt 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) #define FCOE_EOFni 0x49
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) #define FCOE_EOFa 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) #define lpfc_rcqe_sof_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) #define lpfc_rcqe_sof_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) #define lpfc_rcqe_sof_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) #define FCOE_SOFi2 0x2d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) #define FCOE_SOFi3 0x2e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) #define FCOE_SOFn2 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) #define FCOE_SOFn3 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) struct lpfc_rqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) uint32_t address_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) uint32_t address_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* buffer descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct lpfc_bde4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) uint32_t addr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) uint32_t addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) #define lpfc_bde4_last_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) #define lpfc_bde4_last_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) #define lpfc_bde4_last_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) #define lpfc_bde4_sge_offset_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) #define lpfc_bde4_sge_offset_MASK 0x000003FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) #define lpfc_bde4_sge_offset_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) #define lpfc_bde4_length_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) #define lpfc_bde4_length_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) #define lpfc_bde4_length_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) struct lpfc_register {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) #define LPFC_PORT_SEM_UE_RECOVERABLE 0xE000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) #define LPFC_PORT_SEM_MASK 0xF000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) /* The following BAR0 Registers apply to SLI4 if_type 0 UCNAs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) #define LPFC_UERR_STATUS_HI 0x00A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) #define LPFC_UERR_STATUS_LO 0x00A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #define LPFC_UE_MASK_HI 0x00AC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) #define LPFC_UE_MASK_LO 0x00A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) /* The following BAR0 register sets are defined for if_type 0 and 2 UCNAs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) #define LPFC_SLI_INTF 0x0058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) #define LPFC_SLI_ASIC_VER 0x009C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) #define LPFC_CTL_PORT_SEM_OFFSET 0x400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) #define lpfc_port_smphr_perr_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) #define lpfc_port_smphr_perr_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) #define lpfc_port_smphr_perr_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) #define lpfc_port_smphr_sfi_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) #define lpfc_port_smphr_sfi_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) #define lpfc_port_smphr_sfi_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) #define lpfc_port_smphr_nip_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) #define lpfc_port_smphr_nip_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) #define lpfc_port_smphr_nip_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) #define lpfc_port_smphr_ipc_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) #define lpfc_port_smphr_ipc_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) #define lpfc_port_smphr_ipc_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) #define lpfc_port_smphr_scr1_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) #define lpfc_port_smphr_scr1_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) #define lpfc_port_smphr_scr1_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) #define lpfc_port_smphr_scr2_SHIFT 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) #define lpfc_port_smphr_scr2_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) #define lpfc_port_smphr_scr2_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) #define lpfc_port_smphr_host_scratch_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) #define lpfc_port_smphr_host_scratch_MASK 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) #define lpfc_port_smphr_host_scratch_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) #define lpfc_port_smphr_port_status_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) #define lpfc_port_smphr_port_status_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) #define lpfc_port_smphr_port_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) #define LPFC_POST_STAGE_POWER_ON_RESET 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) #define LPFC_POST_STAGE_AWAITING_HOST_RDY 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) #define LPFC_POST_STAGE_HOST_RDY 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) #define LPFC_POST_STAGE_BE_RESET 0x0003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) #define LPFC_POST_STAGE_SEEPROM_CS_START 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) #define LPFC_POST_STAGE_SEEPROM_CS_DONE 0x0101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) #define LPFC_POST_STAGE_DDR_CONFIG_START 0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) #define LPFC_POST_STAGE_DDR_CONFIG_DONE 0x0201
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) #define LPFC_POST_STAGE_DDR_CALIBRATE_START 0x0300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) #define LPFC_POST_STAGE_DDR_CALIBRATE_DONE 0x0301
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) #define LPFC_POST_STAGE_DDR_TEST_START 0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) #define LPFC_POST_STAGE_DDR_TEST_DONE 0x0401
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) #define LPFC_POST_STAGE_REDBOOT_INIT_START 0x0600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) #define LPFC_POST_STAGE_REDBOOT_INIT_DONE 0x0601
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) #define LPFC_POST_STAGE_FW_IMAGE_LOAD_START 0x0700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) #define LPFC_POST_STAGE_FW_IMAGE_LOAD_DONE 0x0701
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) #define LPFC_POST_STAGE_ARMFW_START 0x0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) #define LPFC_POST_STAGE_DHCP_QUERY_START 0x0900
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) #define LPFC_POST_STAGE_DHCP_QUERY_DONE 0x0901
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) #define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_START 0x0A00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) #define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_DONE 0x0A01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) #define LPFC_POST_STAGE_RC_OPTION_SET 0x0B00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) #define LPFC_POST_STAGE_SWITCH_LINK 0x0B01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) #define LPFC_POST_STAGE_SEND_ICDS_MESSAGE 0x0B02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) #define LPFC_POST_STAGE_PERFROM_TFTP 0x0B03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) #define LPFC_POST_STAGE_PARSE_XML 0x0B04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) #define LPFC_POST_STAGE_DOWNLOAD_IMAGE 0x0B05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) #define LPFC_POST_STAGE_FLASH_IMAGE 0x0B06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) #define LPFC_POST_STAGE_RC_DONE 0x0B07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) #define LPFC_POST_STAGE_REBOOT_SYSTEM 0x0B08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) #define LPFC_POST_STAGE_MAC_ADDRESS 0x0C00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) #define LPFC_POST_STAGE_PORT_READY 0xC000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) #define LPFC_POST_STAGE_PORT_UE 0xF000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) #define LPFC_CTL_PORT_STA_OFFSET 0x404
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) #define lpfc_sliport_status_err_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) #define lpfc_sliport_status_err_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) #define lpfc_sliport_status_err_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) #define lpfc_sliport_status_end_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) #define lpfc_sliport_status_end_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) #define lpfc_sliport_status_end_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) #define lpfc_sliport_status_oti_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) #define lpfc_sliport_status_oti_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) #define lpfc_sliport_status_oti_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) #define lpfc_sliport_status_dip_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) #define lpfc_sliport_status_dip_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) #define lpfc_sliport_status_dip_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) #define lpfc_sliport_status_rn_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) #define lpfc_sliport_status_rn_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) #define lpfc_sliport_status_rn_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) #define lpfc_sliport_status_rdy_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) #define lpfc_sliport_status_rdy_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) #define lpfc_sliport_status_rdy_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) #define MAX_IF_TYPE_2_RESETS 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) #define LPFC_CTL_PORT_CTL_OFFSET 0x408
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) #define lpfc_sliport_ctrl_end_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) #define lpfc_sliport_ctrl_end_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) #define lpfc_sliport_ctrl_end_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) #define LPFC_SLIPORT_LITTLE_ENDIAN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) #define LPFC_SLIPORT_BIG_ENDIAN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) #define lpfc_sliport_ctrl_ip_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) #define lpfc_sliport_ctrl_ip_MASK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) #define lpfc_sliport_ctrl_ip_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) #define LPFC_SLIPORT_INIT_PORT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) #define LPFC_CTL_PORT_ER1_OFFSET 0x40C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) #define LPFC_CTL_PORT_ER2_OFFSET 0x410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) #define LPFC_CTL_PORT_EQ_DELAY_OFFSET 0x418
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) #define lpfc_sliport_eqdelay_delay_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) #define lpfc_sliport_eqdelay_delay_MASK 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) #define lpfc_sliport_eqdelay_delay_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) #define lpfc_sliport_eqdelay_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) #define lpfc_sliport_eqdelay_id_MASK 0xfff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) #define lpfc_sliport_eqdelay_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) #define LPFC_SEC_TO_USEC 1000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* The following Registers apply to SLI4 if_type 0 UCNAs. They typically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) * reside in BAR 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) #define LPFC_SLIPORT_IF0_SMPHR 0x00AC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) #define LPFC_IMR_MASK_ALL 0xFFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) #define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) #define LPFC_HST_ISR0 0x0C18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) #define LPFC_HST_ISR1 0x0C1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) #define LPFC_HST_ISR2 0x0C20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) #define LPFC_HST_ISR3 0x0C24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) #define LPFC_HST_ISR4 0x0C28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) #define LPFC_HST_IMR0 0x0C48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) #define LPFC_HST_IMR1 0x0C4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) #define LPFC_HST_IMR2 0x0C50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) #define LPFC_HST_IMR3 0x0C54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) #define LPFC_HST_IMR4 0x0C58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) #define LPFC_HST_ISCR0 0x0C78
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) #define LPFC_HST_ISCR1 0x0C7C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) #define LPFC_HST_ISCR2 0x0C80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) #define LPFC_HST_ISCR3 0x0C84
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) #define LPFC_HST_ISCR4 0x0C88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) #define LPFC_SLI4_INTR0 BIT0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) #define LPFC_SLI4_INTR1 BIT1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) #define LPFC_SLI4_INTR2 BIT2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) #define LPFC_SLI4_INTR3 BIT3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) #define LPFC_SLI4_INTR4 BIT4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) #define LPFC_SLI4_INTR5 BIT5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) #define LPFC_SLI4_INTR6 BIT6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) #define LPFC_SLI4_INTR7 BIT7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) #define LPFC_SLI4_INTR8 BIT8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) #define LPFC_SLI4_INTR9 BIT9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) #define LPFC_SLI4_INTR10 BIT10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) #define LPFC_SLI4_INTR11 BIT11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) #define LPFC_SLI4_INTR12 BIT12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) #define LPFC_SLI4_INTR13 BIT13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) #define LPFC_SLI4_INTR14 BIT14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) #define LPFC_SLI4_INTR15 BIT15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) #define LPFC_SLI4_INTR16 BIT16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) #define LPFC_SLI4_INTR17 BIT17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) #define LPFC_SLI4_INTR18 BIT18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) #define LPFC_SLI4_INTR19 BIT19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) #define LPFC_SLI4_INTR20 BIT20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) #define LPFC_SLI4_INTR21 BIT21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) #define LPFC_SLI4_INTR22 BIT22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) #define LPFC_SLI4_INTR23 BIT23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) #define LPFC_SLI4_INTR24 BIT24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) #define LPFC_SLI4_INTR25 BIT25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) #define LPFC_SLI4_INTR26 BIT26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) #define LPFC_SLI4_INTR27 BIT27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) #define LPFC_SLI4_INTR28 BIT28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) #define LPFC_SLI4_INTR29 BIT29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) #define LPFC_SLI4_INTR30 BIT30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) #define LPFC_SLI4_INTR31 BIT31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * The Doorbell registers defined here exist in different BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * register sets depending on the UCNA Port's reported if_type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * value. For UCNA ports running SLI4 and if_type 0, they reside in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * BAR4. For UCNA ports running SLI4 and if_type 2, they reside in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * BAR0. For FC ports running SLI4 and if_type 6, they reside in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * BAR2. The offsets and base address are different, so the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * has to compute the register addresses accordingly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) #define LPFC_ULP0_RQ_DOORBELL 0x00A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) #define LPFC_ULP1_RQ_DOORBELL 0x00C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) #define LPFC_IF6_RQ_DOORBELL 0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) #define lpfc_rq_db_list_fm_num_posted_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) #define lpfc_rq_db_list_fm_num_posted_MASK 0x00FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) #define lpfc_rq_db_list_fm_num_posted_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) #define lpfc_rq_db_list_fm_index_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) #define lpfc_rq_db_list_fm_index_MASK 0x00FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) #define lpfc_rq_db_list_fm_index_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) #define lpfc_rq_db_list_fm_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) #define lpfc_rq_db_list_fm_id_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) #define lpfc_rq_db_list_fm_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) #define lpfc_rq_db_ring_fm_num_posted_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) #define lpfc_rq_db_ring_fm_num_posted_MASK 0x3FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) #define lpfc_rq_db_ring_fm_num_posted_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) #define lpfc_rq_db_ring_fm_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) #define lpfc_rq_db_ring_fm_id_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) #define lpfc_rq_db_ring_fm_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) #define LPFC_ULP0_WQ_DOORBELL 0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) #define LPFC_ULP1_WQ_DOORBELL 0x0060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) #define lpfc_wq_db_list_fm_num_posted_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) #define lpfc_wq_db_list_fm_num_posted_MASK 0x00FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) #define lpfc_wq_db_list_fm_num_posted_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) #define lpfc_wq_db_list_fm_index_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) #define lpfc_wq_db_list_fm_index_MASK 0x00FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) #define lpfc_wq_db_list_fm_index_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) #define lpfc_wq_db_list_fm_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) #define lpfc_wq_db_list_fm_id_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) #define lpfc_wq_db_list_fm_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) #define lpfc_wq_db_ring_fm_num_posted_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) #define lpfc_wq_db_ring_fm_num_posted_MASK 0x3FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) #define lpfc_wq_db_ring_fm_num_posted_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) #define lpfc_wq_db_ring_fm_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) #define lpfc_wq_db_ring_fm_id_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) #define lpfc_wq_db_ring_fm_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) #define LPFC_IF6_WQ_DOORBELL 0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) #define lpfc_if6_wq_db_list_fm_num_posted_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) #define lpfc_if6_wq_db_list_fm_num_posted_MASK 0x00FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) #define lpfc_if6_wq_db_list_fm_num_posted_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) #define lpfc_if6_wq_db_list_fm_dpp_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) #define lpfc_if6_wq_db_list_fm_dpp_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) #define lpfc_if6_wq_db_list_fm_dpp_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) #define lpfc_if6_wq_db_list_fm_dpp_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) #define lpfc_if6_wq_db_list_fm_dpp_id_MASK 0x001F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) #define lpfc_if6_wq_db_list_fm_dpp_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) #define lpfc_if6_wq_db_list_fm_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) #define lpfc_if6_wq_db_list_fm_id_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) #define lpfc_if6_wq_db_list_fm_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) #define LPFC_EQCQ_DOORBELL 0x0120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) #define lpfc_eqcq_doorbell_se_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) #define lpfc_eqcq_doorbell_se_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) #define lpfc_eqcq_doorbell_se_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) #define LPFC_EQCQ_SOLICIT_ENABLE_OFF 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) #define LPFC_EQCQ_SOLICIT_ENABLE_ON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) #define lpfc_eqcq_doorbell_arm_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) #define lpfc_eqcq_doorbell_arm_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) #define lpfc_eqcq_doorbell_arm_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) #define lpfc_eqcq_doorbell_num_released_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) #define lpfc_eqcq_doorbell_num_released_MASK 0x1FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) #define lpfc_eqcq_doorbell_num_released_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) #define lpfc_eqcq_doorbell_qt_SHIFT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) #define lpfc_eqcq_doorbell_qt_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) #define lpfc_eqcq_doorbell_qt_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) #define LPFC_QUEUE_TYPE_COMPLETION 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) #define LPFC_QUEUE_TYPE_EVENT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) #define lpfc_eqcq_doorbell_eqci_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) #define lpfc_eqcq_doorbell_eqci_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) #define lpfc_eqcq_doorbell_eqci_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) #define lpfc_eqcq_doorbell_cqid_lo_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) #define lpfc_eqcq_doorbell_cqid_lo_MASK 0x03FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) #define lpfc_eqcq_doorbell_cqid_lo_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) #define lpfc_eqcq_doorbell_cqid_hi_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) #define lpfc_eqcq_doorbell_cqid_hi_MASK 0x001F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) #define lpfc_eqcq_doorbell_cqid_hi_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) #define lpfc_eqcq_doorbell_eqid_lo_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) #define lpfc_eqcq_doorbell_eqid_lo_MASK 0x01FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) #define lpfc_eqcq_doorbell_eqid_lo_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) #define lpfc_eqcq_doorbell_eqid_hi_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) #define lpfc_eqcq_doorbell_eqid_hi_MASK 0x001F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) #define lpfc_eqcq_doorbell_eqid_hi_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) #define LPFC_CQID_HI_FIELD_SHIFT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) #define LPFC_EQID_HI_FIELD_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) #define LPFC_IF6_CQ_DOORBELL 0x00C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) #define lpfc_if6_cq_doorbell_se_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) #define lpfc_if6_cq_doorbell_se_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) #define lpfc_if6_cq_doorbell_se_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) #define LPFC_IF6_CQ_SOLICIT_ENABLE_OFF 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #define LPFC_IF6_CQ_SOLICIT_ENABLE_ON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) #define lpfc_if6_cq_doorbell_arm_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) #define lpfc_if6_cq_doorbell_arm_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) #define lpfc_if6_cq_doorbell_arm_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) #define lpfc_if6_cq_doorbell_num_released_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) #define lpfc_if6_cq_doorbell_num_released_MASK 0x1FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) #define lpfc_if6_cq_doorbell_num_released_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) #define lpfc_if6_cq_doorbell_cqid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) #define lpfc_if6_cq_doorbell_cqid_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) #define lpfc_if6_cq_doorbell_cqid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) #define LPFC_IF6_EQ_DOORBELL 0x0120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) #define lpfc_if6_eq_doorbell_io_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) #define lpfc_if6_eq_doorbell_io_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) #define lpfc_if6_eq_doorbell_io_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) #define LPFC_IF6_EQ_INTR_OVERRIDE_OFF 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) #define LPFC_IF6_EQ_INTR_OVERRIDE_ON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) #define lpfc_if6_eq_doorbell_arm_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) #define lpfc_if6_eq_doorbell_arm_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) #define lpfc_if6_eq_doorbell_arm_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) #define lpfc_if6_eq_doorbell_num_released_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) #define lpfc_if6_eq_doorbell_num_released_MASK 0x1FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) #define lpfc_if6_eq_doorbell_num_released_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) #define lpfc_if6_eq_doorbell_eqid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) #define lpfc_if6_eq_doorbell_eqid_MASK 0x0FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) #define lpfc_if6_eq_doorbell_eqid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) #define LPFC_BMBX 0x0160
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) #define lpfc_bmbx_addr_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) #define lpfc_bmbx_addr_MASK 0x3FFFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) #define lpfc_bmbx_addr_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) #define lpfc_bmbx_hi_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) #define lpfc_bmbx_hi_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) #define lpfc_bmbx_hi_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) #define lpfc_bmbx_rdy_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) #define lpfc_bmbx_rdy_MASK 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) #define lpfc_bmbx_rdy_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) #define LPFC_MQ_DOORBELL 0x0140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) #define LPFC_IF6_MQ_DOORBELL 0x0160
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) #define lpfc_mq_doorbell_num_posted_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) #define lpfc_mq_doorbell_num_posted_MASK 0x3FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) #define lpfc_mq_doorbell_num_posted_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) #define lpfc_mq_doorbell_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) #define lpfc_mq_doorbell_id_MASK 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) #define lpfc_mq_doorbell_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) struct lpfc_sli4_cfg_mhdr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) #define lpfc_mbox_hdr_emb_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) #define lpfc_mbox_hdr_emb_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) #define lpfc_mbox_hdr_emb_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) #define lpfc_mbox_hdr_sge_cnt_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) #define lpfc_mbox_hdr_sge_cnt_MASK 0x0000001F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) #define lpfc_mbox_hdr_sge_cnt_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) uint32_t payload_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) uint32_t tag_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) uint32_t tag_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) uint32_t reserved5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) union lpfc_sli4_cfg_shdr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) #define lpfc_mbox_hdr_opcode_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) #define lpfc_mbox_hdr_opcode_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) #define lpfc_mbox_hdr_opcode_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) #define lpfc_mbox_hdr_subsystem_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) #define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) #define lpfc_mbox_hdr_subsystem_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) #define lpfc_mbox_hdr_port_number_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) #define lpfc_mbox_hdr_port_number_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) #define lpfc_mbox_hdr_port_number_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) #define lpfc_mbox_hdr_domain_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) #define lpfc_mbox_hdr_domain_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) #define lpfc_mbox_hdr_domain_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) uint32_t timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) uint32_t request_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) #define lpfc_mbox_hdr_version_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) #define lpfc_mbox_hdr_version_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) #define lpfc_mbox_hdr_version_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) #define lpfc_mbox_hdr_pf_num_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) #define lpfc_mbox_hdr_pf_num_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) #define lpfc_mbox_hdr_pf_num_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) #define lpfc_mbox_hdr_vh_num_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) #define lpfc_mbox_hdr_vh_num_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) #define lpfc_mbox_hdr_vh_num_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) #define LPFC_Q_CREATE_VERSION_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) #define LPFC_Q_CREATE_VERSION_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) #define LPFC_Q_CREATE_VERSION_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) #define LPFC_OPCODE_VERSION_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) #define LPFC_OPCODE_VERSION_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) #define lpfc_mbox_hdr_opcode_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) #define lpfc_mbox_hdr_opcode_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) #define lpfc_mbox_hdr_opcode_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) #define lpfc_mbox_hdr_subsystem_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) #define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) #define lpfc_mbox_hdr_subsystem_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) #define lpfc_mbox_hdr_domain_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) #define lpfc_mbox_hdr_domain_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) #define lpfc_mbox_hdr_domain_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) #define lpfc_mbox_hdr_status_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) #define lpfc_mbox_hdr_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) #define lpfc_mbox_hdr_status_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) #define lpfc_mbox_hdr_add_status_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) #define lpfc_mbox_hdr_add_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) #define lpfc_mbox_hdr_add_status_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) uint32_t response_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) uint32_t actual_response_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) /* Mailbox Header structures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) * struct mbox_header is defined for first generation SLI4_CFG mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) * calls deployed for BE-based ports.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) * struct sli4_mbox_header is defined for second generation SLI4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) * ports that don't deploy the SLI4_CFG mechanism.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) struct mbox_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) struct lpfc_sli4_cfg_mhdr cfg_mhdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) #define LPFC_EXTENT_LOCAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) #define LPFC_TIMEOUT_DEFAULT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) #define LPFC_EXTENT_VERSION_DEFAULT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) /* Subsystem Definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) #define LPFC_MBOX_SUBSYSTEM_NA 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) #define LPFC_MBOX_SUBSYSTEM_COMMON 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) #define LPFC_MBOX_SUBSYSTEM_LOWLEVEL 0xB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) #define LPFC_MBOX_SUBSYSTEM_FCOE 0xC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) /* Device Specific Definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) /* The HOST ENDIAN defines are in Big Endian format. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) #define HOST_ENDIAN_LOW_WORD0 0xFF3412FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) #define HOST_ENDIAN_HIGH_WORD1 0xFF7856FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /* Common Opcodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) #define LPFC_MBOX_OPCODE_NA 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) #define LPFC_MBOX_OPCODE_CQ_CREATE 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) #define LPFC_MBOX_OPCODE_EQ_CREATE 0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) #define LPFC_MBOX_OPCODE_MQ_CREATE 0x15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) #define LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) #define LPFC_MBOX_OPCODE_NOP 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) #define LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) #define LPFC_MBOX_OPCODE_MQ_DESTROY 0x35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) #define LPFC_MBOX_OPCODE_CQ_DESTROY 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) #define LPFC_MBOX_OPCODE_EQ_DESTROY 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) #define LPFC_MBOX_OPCODE_QUERY_FW_CFG 0x3A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) #define LPFC_MBOX_OPCODE_FUNCTION_RESET 0x3D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) #define LPFC_MBOX_OPCODE_SET_PHYSICAL_LINK_CONFIG 0x3E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) #define LPFC_MBOX_OPCODE_SET_BOOT_CONFIG 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) #define LPFC_MBOX_OPCODE_SET_BEACON_CONFIG 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) #define LPFC_MBOX_OPCODE_GET_BEACON_CONFIG 0x46
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) #define LPFC_MBOX_OPCODE_GET_PORT_NAME 0x4D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) #define LPFC_MBOX_OPCODE_MQ_CREATE_EXT 0x5A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) #define LPFC_MBOX_OPCODE_GET_VPD_DATA 0x5B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) #define LPFC_MBOX_OPCODE_SET_HOST_DATA 0x5D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) #define LPFC_MBOX_OPCODE_SEND_ACTIVATION 0x73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) #define LPFC_MBOX_OPCODE_RESET_LICENSES 0x74
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) #define LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO 0x9A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) #define LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT 0x9B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) #define LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT 0x9C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) #define LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT 0x9D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) #define LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG 0xA0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) #define LPFC_MBOX_OPCODE_GET_PROFILE_CAPACITIES 0xA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) #define LPFC_MBOX_OPCODE_GET_PROFILE_CONFIG 0xA4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) #define LPFC_MBOX_OPCODE_SET_PROFILE_CONFIG 0xA5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) #define LPFC_MBOX_OPCODE_GET_PROFILE_LIST 0xA6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) #define LPFC_MBOX_OPCODE_SET_ACT_PROFILE 0xA8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) #define LPFC_MBOX_OPCODE_GET_FACTORY_PROFILE_CONFIG 0xA9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) #define LPFC_MBOX_OPCODE_READ_OBJECT 0xAB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) #define LPFC_MBOX_OPCODE_WRITE_OBJECT 0xAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) #define LPFC_MBOX_OPCODE_READ_OBJECT_LIST 0xAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) #define LPFC_MBOX_OPCODE_DELETE_OBJECT 0xAE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) #define LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS 0xB5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) #define LPFC_MBOX_OPCODE_SET_FEATURES 0xBF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) /* FCoE Opcodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) #define LPFC_MBOX_OPCODE_FCOE_WQ_CREATE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) #define LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) #define LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) #define LPFC_MBOX_OPCODE_FCOE_REMOVE_SGL_PAGES 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) #define LPFC_MBOX_OPCODE_FCOE_RQ_CREATE 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) #define LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) #define LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) #define LPFC_MBOX_OPCODE_FCOE_ADD_FCF 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) #define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) #define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) #define LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) #define LPFC_MBOX_OPCODE_FCOE_CQ_CREATE_SET 0x1D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) #define LPFC_MBOX_OPCODE_FCOE_SET_FCLINK_SETTINGS 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) #define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_STATE 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) #define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_LOOPBACK 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) #define LPFC_MBOX_OPCODE_FCOE_FC_SET_TRUNK_MODE 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) /* Low level Opcodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) #define LPFC_MBOX_OPCODE_SET_DIAG_LOG_OPTION 0x37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) /* Mailbox command structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) struct eq_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) #define lpfc_eq_context_size_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) #define lpfc_eq_context_size_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) #define lpfc_eq_context_size_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) #define LPFC_EQE_SIZE_4 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) #define LPFC_EQE_SIZE_16 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) #define lpfc_eq_context_valid_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) #define lpfc_eq_context_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) #define lpfc_eq_context_valid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) #define lpfc_eq_context_autovalid_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) #define lpfc_eq_context_autovalid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) #define lpfc_eq_context_autovalid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) #define lpfc_eq_context_count_SHIFT 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) #define lpfc_eq_context_count_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) #define lpfc_eq_context_count_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) #define LPFC_EQ_CNT_256 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) #define LPFC_EQ_CNT_512 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) #define LPFC_EQ_CNT_1024 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) #define LPFC_EQ_CNT_2048 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) #define LPFC_EQ_CNT_4096 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) #define lpfc_eq_context_delay_multi_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) #define lpfc_eq_context_delay_multi_MASK 0x000003FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) #define lpfc_eq_context_delay_multi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) uint32_t reserved3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) struct eq_delay_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) uint32_t eq_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) uint32_t phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) uint32_t delay_multi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) #define LPFC_MAX_EQ_DELAY_EQID_CNT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) struct sgl_page_pairs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) uint32_t sgl_pg0_addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) uint32_t sgl_pg0_addr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) uint32_t sgl_pg1_addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) uint32_t sgl_pg1_addr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) struct lpfc_mbx_post_sgl_pages {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) #define lpfc_post_sgl_pages_xri_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) #define lpfc_post_sgl_pages_xri_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) #define lpfc_post_sgl_pages_xri_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) #define lpfc_post_sgl_pages_xricnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) #define lpfc_post_sgl_pages_xricnt_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) #define lpfc_post_sgl_pages_xricnt_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) struct sgl_page_pairs sgl_pg_pairs[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) /* word0 of page-1 struct shares the same SHIFT/MASK/WORD defines as above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) struct lpfc_mbx_post_uembed_sgl_page1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) struct sgl_page_pairs sgl_pg_pairs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) struct lpfc_mbx_sge {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) uint32_t pa_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) uint32_t pa_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) uint32_t length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) struct lpfc_mbx_nembed_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) struct lpfc_sli4_cfg_mhdr cfg_mhdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) #define LPFC_SLI4_MBX_SGE_MAX_PAGES 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) struct lpfc_mbx_sge sge[LPFC_SLI4_MBX_SGE_MAX_PAGES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) struct lpfc_mbx_nembed_sge_virt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) void *addr[LPFC_SLI4_MBX_SGE_MAX_PAGES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) struct lpfc_mbx_eq_create {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) #define lpfc_mbx_eq_create_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) #define lpfc_mbx_eq_create_num_pages_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) #define lpfc_mbx_eq_create_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) struct eq_context context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) struct dma_address page[LPFC_MAX_EQ_PAGE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) #define lpfc_mbx_eq_create_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) #define lpfc_mbx_eq_create_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) #define lpfc_mbx_eq_create_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) struct lpfc_mbx_modify_eq_delay {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) uint32_t num_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) struct eq_delay_info eq[LPFC_MAX_EQ_DELAY_EQID_CNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) struct lpfc_mbx_eq_destroy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) #define lpfc_mbx_eq_destroy_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) #define lpfc_mbx_eq_destroy_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) #define lpfc_mbx_eq_destroy_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) struct lpfc_mbx_nop {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) uint32_t context[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) struct lpfc_mbx_set_ras_fwlog {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) #define lpfc_fwlog_enable_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) #define lpfc_fwlog_enable_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) #define lpfc_fwlog_enable_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) #define lpfc_fwlog_loglvl_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) #define lpfc_fwlog_loglvl_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) #define lpfc_fwlog_loglvl_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) #define lpfc_fwlog_ra_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) #define lpfc_fwlog_ra_WORD 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) #define lpfc_fwlog_buffcnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) #define lpfc_fwlog_buffcnt_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) #define lpfc_fwlog_buffcnt_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) #define lpfc_fwlog_buffsz_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) #define lpfc_fwlog_buffsz_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) #define lpfc_fwlog_buffsz_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) #define lpfc_fwlog_acqe_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) #define lpfc_fwlog_acqe_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) #define lpfc_fwlog_acqe_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) #define lpfc_fwlog_cqid_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) #define lpfc_fwlog_cqid_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) #define lpfc_fwlog_cqid_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) #define LPFC_MAX_FWLOG_PAGE 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) struct dma_address lwpd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) struct dma_address buff_fwlog[LPFC_MAX_FWLOG_PAGE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) struct cq_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) #define lpfc_cq_context_event_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) #define lpfc_cq_context_event_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) #define lpfc_cq_context_event_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) #define lpfc_cq_context_valid_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) #define lpfc_cq_context_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) #define lpfc_cq_context_valid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) #define lpfc_cq_context_count_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) #define lpfc_cq_context_count_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) #define lpfc_cq_context_count_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) #define LPFC_CQ_CNT_256 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) #define LPFC_CQ_CNT_512 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) #define LPFC_CQ_CNT_1024 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) #define LPFC_CQ_CNT_WORD7 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) #define lpfc_cq_context_autovalid_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) #define lpfc_cq_context_autovalid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) #define lpfc_cq_context_autovalid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) #define lpfc_cq_eq_id_SHIFT 22 /* Version 0 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) #define lpfc_cq_eq_id_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) #define lpfc_cq_eq_id_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) #define lpfc_cq_eq_id_2_SHIFT 0 /* Version 2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) #define lpfc_cq_eq_id_2_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) #define lpfc_cq_eq_id_2_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) uint32_t lpfc_cq_context_count; /* Version 2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) uint32_t reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) struct lpfc_mbx_cq_create {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) #define lpfc_mbx_cq_create_page_size_SHIFT 16 /* Version 2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) #define lpfc_mbx_cq_create_page_size_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) #define lpfc_mbx_cq_create_page_size_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) #define lpfc_mbx_cq_create_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) #define lpfc_mbx_cq_create_num_pages_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) #define lpfc_mbx_cq_create_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) struct cq_context context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) struct dma_address page[LPFC_MAX_CQ_PAGE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) #define lpfc_mbx_cq_create_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) #define lpfc_mbx_cq_create_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) #define lpfc_mbx_cq_create_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) struct lpfc_mbx_cq_create_set {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) #define lpfc_mbx_cq_create_set_page_size_SHIFT 16 /* Version 2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) #define lpfc_mbx_cq_create_set_page_size_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) #define lpfc_mbx_cq_create_set_page_size_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) #define lpfc_mbx_cq_create_set_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) #define lpfc_mbx_cq_create_set_num_pages_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) #define lpfc_mbx_cq_create_set_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) #define lpfc_mbx_cq_create_set_evt_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) #define lpfc_mbx_cq_create_set_evt_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) #define lpfc_mbx_cq_create_set_evt_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) #define lpfc_mbx_cq_create_set_valid_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) #define lpfc_mbx_cq_create_set_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) #define lpfc_mbx_cq_create_set_valid_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) #define lpfc_mbx_cq_create_set_cqe_cnt_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) #define lpfc_mbx_cq_create_set_cqe_cnt_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) #define lpfc_mbx_cq_create_set_cqe_cnt_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) #define lpfc_mbx_cq_create_set_cqe_size_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) #define lpfc_mbx_cq_create_set_cqe_size_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) #define lpfc_mbx_cq_create_set_cqe_size_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) #define lpfc_mbx_cq_create_set_autovalid_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) #define lpfc_mbx_cq_create_set_autovalid_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) #define lpfc_mbx_cq_create_set_autovalid_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) #define lpfc_mbx_cq_create_set_nodelay_SHIFT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) #define lpfc_mbx_cq_create_set_nodelay_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) #define lpfc_mbx_cq_create_set_nodelay_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) #define lpfc_mbx_cq_create_set_clswm_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) #define lpfc_mbx_cq_create_set_clswm_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) #define lpfc_mbx_cq_create_set_clswm_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) #define lpfc_mbx_cq_create_set_arm_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) #define lpfc_mbx_cq_create_set_arm_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) #define lpfc_mbx_cq_create_set_arm_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) #define lpfc_mbx_cq_create_set_cq_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) #define lpfc_mbx_cq_create_set_cq_cnt_MASK 0x00007FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) #define lpfc_mbx_cq_create_set_cq_cnt_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) #define lpfc_mbx_cq_create_set_num_cq_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) #define lpfc_mbx_cq_create_set_num_cq_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) #define lpfc_mbx_cq_create_set_num_cq_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) #define lpfc_mbx_cq_create_set_eq_id1_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) #define lpfc_mbx_cq_create_set_eq_id1_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) #define lpfc_mbx_cq_create_set_eq_id1_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) #define lpfc_mbx_cq_create_set_eq_id0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) #define lpfc_mbx_cq_create_set_eq_id0_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) #define lpfc_mbx_cq_create_set_eq_id0_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) #define lpfc_mbx_cq_create_set_eq_id3_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) #define lpfc_mbx_cq_create_set_eq_id3_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) #define lpfc_mbx_cq_create_set_eq_id3_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) #define lpfc_mbx_cq_create_set_eq_id2_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) #define lpfc_mbx_cq_create_set_eq_id2_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) #define lpfc_mbx_cq_create_set_eq_id2_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) #define lpfc_mbx_cq_create_set_eq_id5_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) #define lpfc_mbx_cq_create_set_eq_id5_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) #define lpfc_mbx_cq_create_set_eq_id5_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) #define lpfc_mbx_cq_create_set_eq_id4_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) #define lpfc_mbx_cq_create_set_eq_id4_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) #define lpfc_mbx_cq_create_set_eq_id4_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) #define lpfc_mbx_cq_create_set_eq_id7_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) #define lpfc_mbx_cq_create_set_eq_id7_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) #define lpfc_mbx_cq_create_set_eq_id7_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) #define lpfc_mbx_cq_create_set_eq_id6_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) #define lpfc_mbx_cq_create_set_eq_id6_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) #define lpfc_mbx_cq_create_set_eq_id6_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) #define lpfc_mbx_cq_create_set_eq_id9_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) #define lpfc_mbx_cq_create_set_eq_id9_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) #define lpfc_mbx_cq_create_set_eq_id9_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) #define lpfc_mbx_cq_create_set_eq_id8_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) #define lpfc_mbx_cq_create_set_eq_id8_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) #define lpfc_mbx_cq_create_set_eq_id8_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) #define lpfc_mbx_cq_create_set_eq_id11_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) #define lpfc_mbx_cq_create_set_eq_id11_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) #define lpfc_mbx_cq_create_set_eq_id11_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) #define lpfc_mbx_cq_create_set_eq_id10_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) #define lpfc_mbx_cq_create_set_eq_id10_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) #define lpfc_mbx_cq_create_set_eq_id10_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) #define lpfc_mbx_cq_create_set_eq_id13_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) #define lpfc_mbx_cq_create_set_eq_id13_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) #define lpfc_mbx_cq_create_set_eq_id13_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) #define lpfc_mbx_cq_create_set_eq_id12_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) #define lpfc_mbx_cq_create_set_eq_id12_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) #define lpfc_mbx_cq_create_set_eq_id12_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) #define lpfc_mbx_cq_create_set_eq_id15_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) #define lpfc_mbx_cq_create_set_eq_id15_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) #define lpfc_mbx_cq_create_set_eq_id15_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) #define lpfc_mbx_cq_create_set_eq_id14_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) #define lpfc_mbx_cq_create_set_eq_id14_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) #define lpfc_mbx_cq_create_set_eq_id14_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) struct dma_address page[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) #define lpfc_mbx_cq_create_set_num_alloc_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) #define lpfc_mbx_cq_create_set_num_alloc_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) #define lpfc_mbx_cq_create_set_num_alloc_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) #define lpfc_mbx_cq_create_set_base_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) #define lpfc_mbx_cq_create_set_base_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) #define lpfc_mbx_cq_create_set_base_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) struct lpfc_mbx_cq_destroy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) #define lpfc_mbx_cq_destroy_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) #define lpfc_mbx_cq_destroy_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) #define lpfc_mbx_cq_destroy_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) struct wq_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) uint32_t reserved0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) uint32_t reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) uint32_t reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) uint32_t reserved3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) struct lpfc_mbx_wq_create {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) struct { /* Version 0 Request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) #define lpfc_mbx_wq_create_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) #define lpfc_mbx_wq_create_num_pages_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) #define lpfc_mbx_wq_create_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) #define lpfc_mbx_wq_create_dua_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) #define lpfc_mbx_wq_create_dua_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) #define lpfc_mbx_wq_create_dua_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) #define lpfc_mbx_wq_create_cq_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) #define lpfc_mbx_wq_create_cq_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) #define lpfc_mbx_wq_create_cq_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) struct dma_address page[LPFC_MAX_WQ_PAGE_V0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) #define lpfc_mbx_wq_create_bua_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) #define lpfc_mbx_wq_create_bua_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) #define lpfc_mbx_wq_create_bua_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) #define lpfc_mbx_wq_create_ulp_num_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) #define lpfc_mbx_wq_create_ulp_num_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) #define lpfc_mbx_wq_create_ulp_num_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) struct { /* Version 1 Request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) uint32_t word0; /* Word 0 is the same as in v0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) #define lpfc_mbx_wq_create_page_size_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) #define lpfc_mbx_wq_create_page_size_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) #define lpfc_mbx_wq_create_page_size_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) #define LPFC_WQ_PAGE_SIZE_4096 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) #define lpfc_mbx_wq_create_dpp_req_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) #define lpfc_mbx_wq_create_dpp_req_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) #define lpfc_mbx_wq_create_dpp_req_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) #define lpfc_mbx_wq_create_doe_SHIFT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) #define lpfc_mbx_wq_create_doe_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) #define lpfc_mbx_wq_create_doe_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) #define lpfc_mbx_wq_create_toe_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) #define lpfc_mbx_wq_create_toe_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) #define lpfc_mbx_wq_create_toe_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) #define lpfc_mbx_wq_create_wqe_size_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) #define lpfc_mbx_wq_create_wqe_size_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) #define lpfc_mbx_wq_create_wqe_size_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) #define LPFC_WQ_WQE_SIZE_64 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) #define LPFC_WQ_WQE_SIZE_128 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) #define lpfc_mbx_wq_create_wqe_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) #define lpfc_mbx_wq_create_wqe_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) #define lpfc_mbx_wq_create_wqe_count_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) struct dma_address page[LPFC_MAX_WQ_PAGE-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) } request_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) #define lpfc_mbx_wq_create_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) #define lpfc_mbx_wq_create_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) #define lpfc_mbx_wq_create_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) uint32_t doorbell_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) #define lpfc_mbx_wq_create_bar_set_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) #define lpfc_mbx_wq_create_bar_set_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) #define lpfc_mbx_wq_create_bar_set_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) #define WQ_PCI_BAR_0_AND_1 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) #define WQ_PCI_BAR_2_AND_3 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) #define WQ_PCI_BAR_4_AND_5 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) #define lpfc_mbx_wq_create_db_format_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) #define lpfc_mbx_wq_create_db_format_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) #define lpfc_mbx_wq_create_db_format_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) #define lpfc_mbx_wq_create_dpp_rsp_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) #define lpfc_mbx_wq_create_dpp_rsp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) #define lpfc_mbx_wq_create_dpp_rsp_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) #define lpfc_mbx_wq_create_v1_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) #define lpfc_mbx_wq_create_v1_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) #define lpfc_mbx_wq_create_v1_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) #define lpfc_mbx_wq_create_v1_bar_set_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) #define lpfc_mbx_wq_create_v1_bar_set_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) #define lpfc_mbx_wq_create_v1_bar_set_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) uint32_t doorbell_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) #define lpfc_mbx_wq_create_dpp_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) #define lpfc_mbx_wq_create_dpp_id_MASK 0x0000001F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) #define lpfc_mbx_wq_create_dpp_id_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) #define lpfc_mbx_wq_create_dpp_bar_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) #define lpfc_mbx_wq_create_dpp_bar_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) #define lpfc_mbx_wq_create_dpp_bar_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) uint32_t dpp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) } response_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) struct lpfc_mbx_wq_destroy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) #define lpfc_mbx_wq_destroy_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) #define lpfc_mbx_wq_destroy_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) #define lpfc_mbx_wq_destroy_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) #define LPFC_HDR_BUF_SIZE 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) #define LPFC_DATA_BUF_SIZE 2048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) #define LPFC_NVMET_DATA_BUF_SIZE 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) struct rq_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) #define lpfc_rq_context_rqe_count_SHIFT 16 /* Version 0 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) #define lpfc_rq_context_rqe_count_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) #define lpfc_rq_context_rqe_count_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) #define LPFC_RQ_RING_SIZE_512 9 /* 512 entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) #define LPFC_RQ_RING_SIZE_1024 10 /* 1024 entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) #define LPFC_RQ_RING_SIZE_2048 11 /* 2048 entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) #define LPFC_RQ_RING_SIZE_4096 12 /* 4096 entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) #define lpfc_rq_context_rqe_count_1_SHIFT 16 /* Version 1-2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) #define lpfc_rq_context_rqe_count_1_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) #define lpfc_rq_context_rqe_count_1_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) #define lpfc_rq_context_rqe_size_SHIFT 8 /* Version 1-2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) #define lpfc_rq_context_rqe_size_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) #define lpfc_rq_context_rqe_size_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) #define LPFC_RQE_SIZE_8 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) #define LPFC_RQE_SIZE_16 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) #define LPFC_RQE_SIZE_32 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) #define LPFC_RQE_SIZE_64 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) #define LPFC_RQE_SIZE_128 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) #define lpfc_rq_context_page_size_SHIFT 0 /* Version 1 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) #define lpfc_rq_context_page_size_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) #define lpfc_rq_context_page_size_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) #define LPFC_RQ_PAGE_SIZE_4096 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) #define lpfc_rq_context_data_size_SHIFT 16 /* Version 2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) #define lpfc_rq_context_data_size_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) #define lpfc_rq_context_data_size_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) #define lpfc_rq_context_hdr_size_SHIFT 0 /* Version 2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) #define lpfc_rq_context_hdr_size_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) #define lpfc_rq_context_hdr_size_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) #define lpfc_rq_context_cq_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) #define lpfc_rq_context_cq_id_MASK 0x000003FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) #define lpfc_rq_context_cq_id_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) #define lpfc_rq_context_buf_size_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) #define lpfc_rq_context_buf_size_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) #define lpfc_rq_context_buf_size_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) #define lpfc_rq_context_base_cq_SHIFT 0 /* Version 2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) #define lpfc_rq_context_base_cq_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) #define lpfc_rq_context_base_cq_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) uint32_t buffer_size; /* Version 1 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) struct lpfc_mbx_rq_create {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) #define lpfc_mbx_rq_create_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) #define lpfc_mbx_rq_create_num_pages_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) #define lpfc_mbx_rq_create_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) #define lpfc_mbx_rq_create_dua_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) #define lpfc_mbx_rq_create_dua_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) #define lpfc_mbx_rq_create_dua_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) #define lpfc_mbx_rq_create_bqu_SHIFT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) #define lpfc_mbx_rq_create_bqu_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) #define lpfc_mbx_rq_create_bqu_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) #define lpfc_mbx_rq_create_ulp_num_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) #define lpfc_mbx_rq_create_ulp_num_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) #define lpfc_mbx_rq_create_ulp_num_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) struct rq_context context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) struct dma_address page[LPFC_MAX_RQ_PAGE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) #define lpfc_mbx_rq_create_q_cnt_v2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) #define lpfc_mbx_rq_create_q_cnt_v2_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) #define lpfc_mbx_rq_create_q_cnt_v2_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) #define lpfc_mbx_rq_create_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) #define lpfc_mbx_rq_create_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) #define lpfc_mbx_rq_create_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) uint32_t doorbell_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) #define lpfc_mbx_rq_create_bar_set_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) #define lpfc_mbx_rq_create_bar_set_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) #define lpfc_mbx_rq_create_bar_set_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) #define lpfc_mbx_rq_create_db_format_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) #define lpfc_mbx_rq_create_db_format_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) #define lpfc_mbx_rq_create_db_format_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) struct lpfc_mbx_rq_create_v2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) #define lpfc_mbx_rq_create_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) #define lpfc_mbx_rq_create_num_pages_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) #define lpfc_mbx_rq_create_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) #define lpfc_mbx_rq_create_rq_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) #define lpfc_mbx_rq_create_rq_cnt_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) #define lpfc_mbx_rq_create_rq_cnt_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) #define lpfc_mbx_rq_create_dua_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) #define lpfc_mbx_rq_create_dua_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) #define lpfc_mbx_rq_create_dua_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) #define lpfc_mbx_rq_create_bqu_SHIFT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) #define lpfc_mbx_rq_create_bqu_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) #define lpfc_mbx_rq_create_bqu_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) #define lpfc_mbx_rq_create_ulp_num_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) #define lpfc_mbx_rq_create_ulp_num_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) #define lpfc_mbx_rq_create_ulp_num_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) #define lpfc_mbx_rq_create_dim_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) #define lpfc_mbx_rq_create_dim_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) #define lpfc_mbx_rq_create_dim_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) #define lpfc_mbx_rq_create_dfd_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) #define lpfc_mbx_rq_create_dfd_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) #define lpfc_mbx_rq_create_dfd_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) #define lpfc_mbx_rq_create_dnb_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) #define lpfc_mbx_rq_create_dnb_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) #define lpfc_mbx_rq_create_dnb_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) struct rq_context context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) struct dma_address page[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) #define lpfc_mbx_rq_create_q_cnt_v2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) #define lpfc_mbx_rq_create_q_cnt_v2_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) #define lpfc_mbx_rq_create_q_cnt_v2_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) #define lpfc_mbx_rq_create_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) #define lpfc_mbx_rq_create_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) #define lpfc_mbx_rq_create_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) uint32_t doorbell_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) #define lpfc_mbx_rq_create_bar_set_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) #define lpfc_mbx_rq_create_bar_set_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) #define lpfc_mbx_rq_create_bar_set_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) #define lpfc_mbx_rq_create_db_format_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) #define lpfc_mbx_rq_create_db_format_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) #define lpfc_mbx_rq_create_db_format_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) struct lpfc_mbx_rq_destroy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) #define lpfc_mbx_rq_destroy_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) #define lpfc_mbx_rq_destroy_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) #define lpfc_mbx_rq_destroy_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) struct mq_context {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) #define lpfc_mq_context_cq_id_SHIFT 22 /* Version 0 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) #define lpfc_mq_context_cq_id_MASK 0x000003FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) #define lpfc_mq_context_cq_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) #define lpfc_mq_context_ring_size_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) #define lpfc_mq_context_ring_size_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) #define lpfc_mq_context_ring_size_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) #define LPFC_MQ_RING_SIZE_16 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) #define LPFC_MQ_RING_SIZE_32 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) #define LPFC_MQ_RING_SIZE_64 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) #define LPFC_MQ_RING_SIZE_128 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) #define lpfc_mq_context_valid_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) #define lpfc_mq_context_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) #define lpfc_mq_context_valid_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) uint32_t reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) uint32_t reserved3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) struct lpfc_mbx_mq_create {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) #define lpfc_mbx_mq_create_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) #define lpfc_mbx_mq_create_num_pages_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) #define lpfc_mbx_mq_create_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) struct mq_context context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) struct dma_address page[LPFC_MAX_MQ_PAGE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) #define lpfc_mbx_mq_create_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) #define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) #define lpfc_mbx_mq_create_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) struct lpfc_mbx_mq_create_ext {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) #define lpfc_mbx_mq_create_ext_num_pages_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) #define lpfc_mbx_mq_create_ext_num_pages_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) #define lpfc_mbx_mq_create_ext_num_pages_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) #define lpfc_mbx_mq_create_ext_cq_id_SHIFT 16 /* Version 1 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) #define lpfc_mbx_mq_create_ext_cq_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) #define lpfc_mbx_mq_create_ext_cq_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) uint32_t async_evt_bmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) #define lpfc_mbx_mq_create_ext_async_evt_link_SHIFT LPFC_TRAILER_CODE_LINK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) #define lpfc_mbx_mq_create_ext_async_evt_link_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) #define lpfc_mbx_mq_create_ext_async_evt_link_WORD async_evt_bmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) #define LPFC_EVT_CODE_LINK_NO_LINK 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) #define LPFC_EVT_CODE_LINK_10_MBIT 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) #define LPFC_EVT_CODE_LINK_100_MBIT 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) #define LPFC_EVT_CODE_LINK_1_GBIT 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) #define LPFC_EVT_CODE_LINK_10_GBIT 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) #define lpfc_mbx_mq_create_ext_async_evt_fip_SHIFT LPFC_TRAILER_CODE_FCOE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) #define lpfc_mbx_mq_create_ext_async_evt_fip_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) #define lpfc_mbx_mq_create_ext_async_evt_fip_WORD async_evt_bmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) #define lpfc_mbx_mq_create_ext_async_evt_group5_SHIFT LPFC_TRAILER_CODE_GRP5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) #define lpfc_mbx_mq_create_ext_async_evt_group5_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) #define lpfc_mbx_mq_create_ext_async_evt_group5_WORD async_evt_bmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) #define lpfc_mbx_mq_create_ext_async_evt_fc_SHIFT LPFC_TRAILER_CODE_FC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) #define lpfc_mbx_mq_create_ext_async_evt_fc_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) #define lpfc_mbx_mq_create_ext_async_evt_fc_WORD async_evt_bmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) #define LPFC_EVT_CODE_FC_NO_LINK 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) #define LPFC_EVT_CODE_FC_1_GBAUD 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) #define LPFC_EVT_CODE_FC_2_GBAUD 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) #define LPFC_EVT_CODE_FC_4_GBAUD 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) #define LPFC_EVT_CODE_FC_8_GBAUD 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) #define LPFC_EVT_CODE_FC_10_GBAUD 0xA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) #define LPFC_EVT_CODE_FC_16_GBAUD 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) #define lpfc_mbx_mq_create_ext_async_evt_sli_SHIFT LPFC_TRAILER_CODE_SLI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) #define lpfc_mbx_mq_create_ext_async_evt_sli_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) #define lpfc_mbx_mq_create_ext_async_evt_sli_WORD async_evt_bmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) struct mq_context context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) struct dma_address page[LPFC_MAX_MQ_PAGE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) #define lpfc_mbx_mq_create_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) #define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) #define lpfc_mbx_mq_create_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) #define LPFC_ASYNC_EVENT_LINK_STATE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) #define LPFC_ASYNC_EVENT_FCF_STATE 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) #define LPFC_ASYNC_EVENT_GROUP5 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) struct lpfc_mbx_mq_destroy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) #define lpfc_mbx_mq_destroy_q_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) #define lpfc_mbx_mq_destroy_q_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) #define lpfc_mbx_mq_destroy_q_id_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) /* Start Gen 2 SLI4 Mailbox definitions: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) /* Define allocate-ready Gen 2 SLI4 FCoE Resource Extent Types. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) #define LPFC_RSC_TYPE_FCOE_VFI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) #define LPFC_RSC_TYPE_FCOE_VPI 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) #define LPFC_RSC_TYPE_FCOE_RPI 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) #define LPFC_RSC_TYPE_FCOE_XRI 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) struct lpfc_mbx_get_rsrc_extent_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) #define lpfc_mbx_get_rsrc_extent_info_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) #define lpfc_mbx_get_rsrc_extent_info_type_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) #define lpfc_mbx_get_rsrc_extent_info_type_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) } req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) #define lpfc_mbx_get_rsrc_extent_info_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) #define lpfc_mbx_get_rsrc_extent_info_cnt_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) #define lpfc_mbx_get_rsrc_extent_info_cnt_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) #define lpfc_mbx_get_rsrc_extent_info_size_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) #define lpfc_mbx_get_rsrc_extent_info_size_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) #define lpfc_mbx_get_rsrc_extent_info_size_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) } rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) struct lpfc_mbx_query_fw_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) uint32_t config_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) #define LPFC_FC_FCOE 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) uint32_t asic_revision;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) uint32_t physical_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) uint32_t function_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) #define LPFC_FCOE_INI_MODE 0x00000040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) #define LPFC_FCOE_TGT_MODE 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) #define LPFC_DUA_MODE 0x00000800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) uint32_t ulp0_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) #define LPFC_ULP_FCOE_INIT_MODE 0x00000040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) #define LPFC_ULP_FCOE_TGT_MODE 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) uint32_t ulp0_nap_words[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) uint32_t ulp1_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) uint32_t ulp1_nap_words[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) uint32_t function_capabilities;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) uint32_t cqid_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) uint32_t cqid_tot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) uint32_t eqid_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) uint32_t eqid_tot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) uint32_t ulp0_nap2_words[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) uint32_t ulp1_nap2_words[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) } rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) struct lpfc_mbx_set_beacon_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) #define lpfc_mbx_set_beacon_port_num_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) #define lpfc_mbx_set_beacon_port_num_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) #define lpfc_mbx_set_beacon_port_num_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) #define lpfc_mbx_set_beacon_port_type_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) #define lpfc_mbx_set_beacon_port_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) #define lpfc_mbx_set_beacon_port_type_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) #define lpfc_mbx_set_beacon_state_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) #define lpfc_mbx_set_beacon_state_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) #define lpfc_mbx_set_beacon_state_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) #define lpfc_mbx_set_beacon_duration_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) #define lpfc_mbx_set_beacon_duration_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) #define lpfc_mbx_set_beacon_duration_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) /* COMMON_SET_BEACON_CONFIG_V1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) #define lpfc_mbx_set_beacon_duration_v1_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) #define lpfc_mbx_set_beacon_duration_v1_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) #define lpfc_mbx_set_beacon_duration_v1_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) uint32_t word5; /* RESERVED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) struct lpfc_id_range {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) #define lpfc_mbx_rsrc_id_word4_0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) #define lpfc_mbx_rsrc_id_word4_0_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) #define lpfc_mbx_rsrc_id_word4_0_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) #define lpfc_mbx_rsrc_id_word4_1_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) #define lpfc_mbx_rsrc_id_word4_1_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) #define lpfc_mbx_rsrc_id_word4_1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) struct lpfc_mbx_set_link_diag_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) #define lpfc_mbx_set_diag_state_diag_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) #define lpfc_mbx_set_diag_state_diag_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) #define lpfc_mbx_set_diag_state_diag_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) #define lpfc_mbx_set_diag_state_diag_bit_valid_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) #define lpfc_mbx_set_diag_state_diag_bit_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) #define lpfc_mbx_set_diag_state_diag_bit_valid_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) #define LPFC_DIAG_STATE_DIAG_BIT_VALID_NO_CHANGE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) #define LPFC_DIAG_STATE_DIAG_BIT_VALID_CHANGE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) #define lpfc_mbx_set_diag_state_link_num_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) #define lpfc_mbx_set_diag_state_link_num_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) #define lpfc_mbx_set_diag_state_link_num_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) #define lpfc_mbx_set_diag_state_link_type_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) #define lpfc_mbx_set_diag_state_link_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) #define lpfc_mbx_set_diag_state_link_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) } req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) } rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) struct lpfc_mbx_set_link_diag_loopback {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) #define lpfc_mbx_set_diag_lpbk_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) #define lpfc_mbx_set_diag_lpbk_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) #define lpfc_mbx_set_diag_lpbk_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) #define LPFC_DIAG_LOOPBACK_TYPE_DISABLE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) #define LPFC_DIAG_LOOPBACK_TYPE_INTERNAL 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) #define LPFC_DIAG_LOOPBACK_TYPE_SERDES 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) #define LPFC_DIAG_LOOPBACK_TYPE_EXTERNAL_TRUNKED 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) #define lpfc_mbx_set_diag_lpbk_link_num_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) #define lpfc_mbx_set_diag_lpbk_link_num_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) #define lpfc_mbx_set_diag_lpbk_link_num_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) #define lpfc_mbx_set_diag_lpbk_link_type_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) #define lpfc_mbx_set_diag_lpbk_link_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) #define lpfc_mbx_set_diag_lpbk_link_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) } req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) } rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) struct lpfc_mbx_run_link_diag_test {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) #define lpfc_mbx_run_diag_test_link_num_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) #define lpfc_mbx_run_diag_test_link_num_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) #define lpfc_mbx_run_diag_test_link_num_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) #define lpfc_mbx_run_diag_test_link_type_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) #define lpfc_mbx_run_diag_test_link_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) #define lpfc_mbx_run_diag_test_link_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) #define lpfc_mbx_run_diag_test_test_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) #define lpfc_mbx_run_diag_test_test_id_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) #define lpfc_mbx_run_diag_test_test_id_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) #define lpfc_mbx_run_diag_test_loops_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) #define lpfc_mbx_run_diag_test_loops_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) #define lpfc_mbx_run_diag_test_loops_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) #define lpfc_mbx_run_diag_test_test_ver_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) #define lpfc_mbx_run_diag_test_test_ver_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) #define lpfc_mbx_run_diag_test_test_ver_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) #define lpfc_mbx_run_diag_test_err_act_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) #define lpfc_mbx_run_diag_test_err_act_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) #define lpfc_mbx_run_diag_test_err_act_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) } req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) } rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) * struct lpfc_mbx_alloc_rsrc_extents:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) * A mbox is generically 256 bytes long. An SLI4_CONFIG mailbox requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) * 6 words of header + 4 words of shared subcommand header +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) * 1 words of Extent-Opcode-specific header = 11 words or 44 bytes total.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) * An embedded version of SLI4_CONFIG therefore has 256 - 44 = 212 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) * for extents payload.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) * 212/2 (bytes per extent) = 106 extents.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) * 106/2 (extents per word) = 53 words.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) * lpfc_id_range id is statically size to 53.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) * This mailbox definition is used for ALLOC or GET_ALLOCATED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) * extent ranges. For ALLOC, the type and cnt are required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) * For GET_ALLOCATED, only the type is required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) struct lpfc_mbx_alloc_rsrc_extents {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) #define lpfc_mbx_alloc_rsrc_extents_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) #define lpfc_mbx_alloc_rsrc_extents_type_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) #define lpfc_mbx_alloc_rsrc_extents_type_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) #define lpfc_mbx_alloc_rsrc_extents_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) #define lpfc_mbx_alloc_rsrc_extents_cnt_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) #define lpfc_mbx_alloc_rsrc_extents_cnt_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) } req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) #define lpfc_mbx_rsrc_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) #define lpfc_mbx_rsrc_cnt_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) #define lpfc_mbx_rsrc_cnt_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) struct lpfc_id_range id[53];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) } rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) * This is the non-embedded version of ALLOC or GET RSRC_EXTENTS. Word4 in this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) * structure shares the same SHIFT/MASK/WORD defines provided in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) * mbx_alloc_rsrc_extents and mbx_get_alloc_rsrc_extents, word4, provided in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) * the structures defined above. This non-embedded structure provides for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) * maximum number of extents supported by the port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) struct lpfc_mbx_nembed_rsrc_extent {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) struct lpfc_id_range id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) struct lpfc_mbx_dealloc_rsrc_extents {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) #define lpfc_mbx_dealloc_rsrc_extents_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) #define lpfc_mbx_dealloc_rsrc_extents_type_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) #define lpfc_mbx_dealloc_rsrc_extents_type_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) } req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) /* Start SLI4 FCoE specific mbox structures. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) struct lpfc_mbx_post_hdr_tmpl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) #define lpfc_mbx_post_hdr_tmpl_rpi_offset_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) #define lpfc_mbx_post_hdr_tmpl_rpi_offset_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) #define lpfc_mbx_post_hdr_tmpl_rpi_offset_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) #define lpfc_mbx_post_hdr_tmpl_page_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) #define lpfc_mbx_post_hdr_tmpl_page_cnt_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) #define lpfc_mbx_post_hdr_tmpl_page_cnt_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) uint32_t rpi_paddr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) uint32_t rpi_paddr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) struct sli4_sge { /* SLI-4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) uint32_t addr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) uint32_t addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) #define lpfc_sli4_sge_offset_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) #define lpfc_sli4_sge_offset_MASK 0x07FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) #define lpfc_sli4_sge_offset_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) #define lpfc_sli4_sge_type_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) #define lpfc_sli4_sge_type_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) #define lpfc_sli4_sge_type_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) #define LPFC_SGE_TYPE_DATA 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) #define LPFC_SGE_TYPE_DIF 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) #define LPFC_SGE_TYPE_LSP 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) #define LPFC_SGE_TYPE_PEDIF 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) #define LPFC_SGE_TYPE_PESEED 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) #define LPFC_SGE_TYPE_DISEED 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) #define LPFC_SGE_TYPE_ENC 0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) #define LPFC_SGE_TYPE_ATM 0xA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) #define LPFC_SGE_TYPE_SKIP 0xC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) #define lpfc_sli4_sge_last_SHIFT 31 /* Last SEG in the SGL sets it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) #define lpfc_sli4_sge_last_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) #define lpfc_sli4_sge_last_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) uint32_t sge_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) struct sli4_hybrid_sgl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) struct list_head list_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) struct sli4_sge *dma_sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) dma_addr_t dma_phys_sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) struct fcp_cmd_rsp_buf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) struct list_head list_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) /* for storing cmd/rsp dma alloc'ed virt_addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) struct fcp_cmnd *fcp_cmnd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) struct fcp_rsp *fcp_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) /* for storing this cmd/rsp's dma mapped phys addr from per CPU pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) dma_addr_t fcp_cmd_rsp_dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) struct sli4_sge_diseed { /* SLI-4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) uint32_t ref_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) uint32_t ref_tag_tran;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) #define lpfc_sli4_sge_dif_apptran_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) #define lpfc_sli4_sge_dif_apptran_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) #define lpfc_sli4_sge_dif_apptran_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) #define lpfc_sli4_sge_dif_af_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) #define lpfc_sli4_sge_dif_af_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) #define lpfc_sli4_sge_dif_af_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) #define lpfc_sli4_sge_dif_na_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) #define lpfc_sli4_sge_dif_na_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) #define lpfc_sli4_sge_dif_na_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) #define lpfc_sli4_sge_dif_hi_SHIFT 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) #define lpfc_sli4_sge_dif_hi_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) #define lpfc_sli4_sge_dif_hi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) #define lpfc_sli4_sge_dif_type_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) #define lpfc_sli4_sge_dif_type_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) #define lpfc_sli4_sge_dif_type_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) #define lpfc_sli4_sge_dif_last_SHIFT 31 /* Last SEG in the SGL sets it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) #define lpfc_sli4_sge_dif_last_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) #define lpfc_sli4_sge_dif_last_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) #define lpfc_sli4_sge_dif_apptag_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) #define lpfc_sli4_sge_dif_apptag_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) #define lpfc_sli4_sge_dif_apptag_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) #define lpfc_sli4_sge_dif_bs_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) #define lpfc_sli4_sge_dif_bs_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) #define lpfc_sli4_sge_dif_bs_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) #define lpfc_sli4_sge_dif_ai_SHIFT 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) #define lpfc_sli4_sge_dif_ai_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) #define lpfc_sli4_sge_dif_ai_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) #define lpfc_sli4_sge_dif_me_SHIFT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) #define lpfc_sli4_sge_dif_me_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) #define lpfc_sli4_sge_dif_me_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) #define lpfc_sli4_sge_dif_re_SHIFT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) #define lpfc_sli4_sge_dif_re_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) #define lpfc_sli4_sge_dif_re_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) #define lpfc_sli4_sge_dif_ce_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) #define lpfc_sli4_sge_dif_ce_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) #define lpfc_sli4_sge_dif_ce_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) #define lpfc_sli4_sge_dif_nr_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) #define lpfc_sli4_sge_dif_nr_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) #define lpfc_sli4_sge_dif_nr_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) #define lpfc_sli4_sge_dif_oprx_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) #define lpfc_sli4_sge_dif_oprx_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) #define lpfc_sli4_sge_dif_oprx_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) #define lpfc_sli4_sge_dif_optx_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) #define lpfc_sli4_sge_dif_optx_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) #define lpfc_sli4_sge_dif_optx_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) /* optx and oprx use BG_OP_IN defines in lpfc_hw.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) struct fcf_record {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) uint32_t max_rcv_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) uint32_t fka_adv_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) uint32_t fip_priority;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) #define lpfc_fcf_record_mac_0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) #define lpfc_fcf_record_mac_0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) #define lpfc_fcf_record_mac_0_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) #define lpfc_fcf_record_mac_1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) #define lpfc_fcf_record_mac_1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) #define lpfc_fcf_record_mac_1_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) #define lpfc_fcf_record_mac_2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) #define lpfc_fcf_record_mac_2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) #define lpfc_fcf_record_mac_2_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) #define lpfc_fcf_record_mac_3_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) #define lpfc_fcf_record_mac_3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) #define lpfc_fcf_record_mac_3_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) #define lpfc_fcf_record_mac_4_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) #define lpfc_fcf_record_mac_4_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) #define lpfc_fcf_record_mac_4_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) #define lpfc_fcf_record_mac_5_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) #define lpfc_fcf_record_mac_5_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) #define lpfc_fcf_record_mac_5_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) #define lpfc_fcf_record_fcf_avail_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) #define lpfc_fcf_record_fcf_avail_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) #define lpfc_fcf_record_fcf_avail_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) #define lpfc_fcf_record_mac_addr_prov_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) #define lpfc_fcf_record_mac_addr_prov_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) #define lpfc_fcf_record_mac_addr_prov_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) #define LPFC_FCF_FPMA 1 /* Fabric Provided MAC Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) #define LPFC_FCF_SPMA 2 /* Server Provided MAC Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) #define lpfc_fcf_record_fab_name_0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) #define lpfc_fcf_record_fab_name_0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) #define lpfc_fcf_record_fab_name_0_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) #define lpfc_fcf_record_fab_name_1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) #define lpfc_fcf_record_fab_name_1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) #define lpfc_fcf_record_fab_name_1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) #define lpfc_fcf_record_fab_name_2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) #define lpfc_fcf_record_fab_name_2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) #define lpfc_fcf_record_fab_name_2_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) #define lpfc_fcf_record_fab_name_3_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) #define lpfc_fcf_record_fab_name_3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) #define lpfc_fcf_record_fab_name_3_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) #define lpfc_fcf_record_fab_name_4_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) #define lpfc_fcf_record_fab_name_4_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) #define lpfc_fcf_record_fab_name_4_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) #define lpfc_fcf_record_fab_name_5_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) #define lpfc_fcf_record_fab_name_5_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) #define lpfc_fcf_record_fab_name_5_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) #define lpfc_fcf_record_fab_name_6_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) #define lpfc_fcf_record_fab_name_6_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) #define lpfc_fcf_record_fab_name_6_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) #define lpfc_fcf_record_fab_name_7_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) #define lpfc_fcf_record_fab_name_7_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) #define lpfc_fcf_record_fab_name_7_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) #define lpfc_fcf_record_fc_map_0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) #define lpfc_fcf_record_fc_map_0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) #define lpfc_fcf_record_fc_map_0_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) #define lpfc_fcf_record_fc_map_1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) #define lpfc_fcf_record_fc_map_1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) #define lpfc_fcf_record_fc_map_1_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) #define lpfc_fcf_record_fc_map_2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) #define lpfc_fcf_record_fc_map_2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) #define lpfc_fcf_record_fc_map_2_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) #define lpfc_fcf_record_fcf_valid_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) #define lpfc_fcf_record_fcf_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) #define lpfc_fcf_record_fcf_valid_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) #define lpfc_fcf_record_fcf_fc_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) #define lpfc_fcf_record_fcf_fc_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) #define lpfc_fcf_record_fcf_fc_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) #define lpfc_fcf_record_fcf_sol_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) #define lpfc_fcf_record_fcf_sol_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) #define lpfc_fcf_record_fcf_sol_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) #define lpfc_fcf_record_fcf_index_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) #define lpfc_fcf_record_fcf_index_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) #define lpfc_fcf_record_fcf_index_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) #define lpfc_fcf_record_fcf_state_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) #define lpfc_fcf_record_fcf_state_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) #define lpfc_fcf_record_fcf_state_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) uint8_t vlan_bitmap[512];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) uint32_t word137;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) #define lpfc_fcf_record_switch_name_0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) #define lpfc_fcf_record_switch_name_0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) #define lpfc_fcf_record_switch_name_0_WORD word137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) #define lpfc_fcf_record_switch_name_1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) #define lpfc_fcf_record_switch_name_1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) #define lpfc_fcf_record_switch_name_1_WORD word137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) #define lpfc_fcf_record_switch_name_2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) #define lpfc_fcf_record_switch_name_2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) #define lpfc_fcf_record_switch_name_2_WORD word137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) #define lpfc_fcf_record_switch_name_3_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) #define lpfc_fcf_record_switch_name_3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) #define lpfc_fcf_record_switch_name_3_WORD word137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) uint32_t word138;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) #define lpfc_fcf_record_switch_name_4_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) #define lpfc_fcf_record_switch_name_4_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) #define lpfc_fcf_record_switch_name_4_WORD word138
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) #define lpfc_fcf_record_switch_name_5_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) #define lpfc_fcf_record_switch_name_5_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) #define lpfc_fcf_record_switch_name_5_WORD word138
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) #define lpfc_fcf_record_switch_name_6_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) #define lpfc_fcf_record_switch_name_6_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) #define lpfc_fcf_record_switch_name_6_WORD word138
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) #define lpfc_fcf_record_switch_name_7_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) #define lpfc_fcf_record_switch_name_7_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) #define lpfc_fcf_record_switch_name_7_WORD word138
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) struct lpfc_mbx_read_fcf_tbl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) #define lpfc_mbx_read_fcf_tbl_indx_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) #define lpfc_mbx_read_fcf_tbl_indx_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) #define lpfc_mbx_read_fcf_tbl_indx_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) uint32_t eventag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) uint32_t word11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) #define lpfc_mbx_read_fcf_tbl_nxt_vindx_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) #define lpfc_mbx_read_fcf_tbl_nxt_vindx_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) #define lpfc_mbx_read_fcf_tbl_nxt_vindx_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) struct lpfc_mbx_add_fcf_tbl_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) #define lpfc_mbx_add_fcf_tbl_fcfi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) #define lpfc_mbx_add_fcf_tbl_fcfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) #define lpfc_mbx_add_fcf_tbl_fcfi_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) struct lpfc_mbx_sge fcf_sge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) struct lpfc_mbx_del_fcf_tbl_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) #define lpfc_mbx_del_fcf_tbl_count_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) #define lpfc_mbx_del_fcf_tbl_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) #define lpfc_mbx_del_fcf_tbl_count_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) #define lpfc_mbx_del_fcf_tbl_index_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) #define lpfc_mbx_del_fcf_tbl_index_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) #define lpfc_mbx_del_fcf_tbl_index_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) struct lpfc_mbx_redisc_fcf_tbl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) #define lpfc_mbx_redisc_fcf_count_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) #define lpfc_mbx_redisc_fcf_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) #define lpfc_mbx_redisc_fcf_count_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) uint32_t resvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) #define lpfc_mbx_redisc_fcf_index_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) #define lpfc_mbx_redisc_fcf_index_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) #define lpfc_mbx_redisc_fcf_index_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) /* Status field for embedded SLI_CONFIG mailbox command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) #define STATUS_SUCCESS 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) #define STATUS_FAILED 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) #define STATUS_ILLEGAL_REQUEST 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) #define STATUS_ILLEGAL_FIELD 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) #define STATUS_INSUFFICIENT_BUFFER 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) #define STATUS_UNAUTHORIZED_REQUEST 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) #define STATUS_FLASHROM_SAVE_FAILED 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) #define STATUS_FLASHROM_RESTORE_FAILED 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) #define STATUS_ICCBINDEX_ALLOC_FAILED 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) #define STATUS_IOCTLHANDLE_ALLOC_FAILED 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) #define STATUS_INVALID_PHY_ADDR_FROM_OSM 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) #define STATUS_INVALID_PHY_ADDR_LEN_FROM_OSM 0x1d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) #define STATUS_ASSERT_FAILED 0x1e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) #define STATUS_INVALID_SESSION 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) #define STATUS_INVALID_CONNECTION 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) #define STATUS_BTL_PATH_EXCEEDS_OSM_LIMIT 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) #define STATUS_BTL_NO_FREE_SLOT_PATH 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) #define STATUS_BTL_NO_FREE_SLOT_TGTID 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) #define STATUS_OSM_DEVSLOT_NOT_FOUND 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) #define STATUS_FLASHROM_READ_FAILED 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) #define STATUS_POLL_IOCTL_TIMEOUT 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) #define STATUS_ERROR_ACITMAIN 0x2a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) #define STATUS_REBOOT_REQUIRED 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) #define STATUS_FCF_IN_USE 0x3a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) #define STATUS_FCF_TABLE_EMPTY 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) * Additional status field for embedded SLI_CONFIG mailbox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) * command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) #define ADD_STATUS_OPERATION_ALREADY_ACTIVE 0x67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) #define ADD_STATUS_FW_NOT_SUPPORTED 0xEB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) #define ADD_STATUS_INVALID_REQUEST 0x4B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) #define ADD_STATUS_FW_DOWNLOAD_HW_DISABLED 0x58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) struct lpfc_mbx_sli4_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) struct lpfc_mbx_init_vfi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) #define lpfc_init_vfi_vr_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) #define lpfc_init_vfi_vr_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) #define lpfc_init_vfi_vr_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) #define lpfc_init_vfi_vt_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) #define lpfc_init_vfi_vt_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) #define lpfc_init_vfi_vt_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) #define lpfc_init_vfi_vf_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) #define lpfc_init_vfi_vf_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) #define lpfc_init_vfi_vf_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) #define lpfc_init_vfi_vp_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) #define lpfc_init_vfi_vp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) #define lpfc_init_vfi_vp_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) #define lpfc_init_vfi_vfi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) #define lpfc_init_vfi_vfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) #define lpfc_init_vfi_vfi_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) #define lpfc_init_vfi_vpi_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) #define lpfc_init_vfi_vpi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) #define lpfc_init_vfi_vpi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) #define lpfc_init_vfi_fcfi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) #define lpfc_init_vfi_fcfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) #define lpfc_init_vfi_fcfi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) #define lpfc_init_vfi_pri_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) #define lpfc_init_vfi_pri_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) #define lpfc_init_vfi_pri_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) #define lpfc_init_vfi_vf_id_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) #define lpfc_init_vfi_vf_id_MASK 0x00000FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) #define lpfc_init_vfi_vf_id_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) #define lpfc_init_vfi_hop_count_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) #define lpfc_init_vfi_hop_count_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) #define lpfc_init_vfi_hop_count_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) #define MBX_VFI_IN_USE 0x9F02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) struct lpfc_mbx_reg_vfi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) #define lpfc_reg_vfi_upd_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) #define lpfc_reg_vfi_upd_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) #define lpfc_reg_vfi_upd_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) #define lpfc_reg_vfi_vp_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) #define lpfc_reg_vfi_vp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) #define lpfc_reg_vfi_vp_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) #define lpfc_reg_vfi_vfi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) #define lpfc_reg_vfi_vfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) #define lpfc_reg_vfi_vfi_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) #define lpfc_reg_vfi_vpi_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) #define lpfc_reg_vfi_vpi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) #define lpfc_reg_vfi_vpi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) #define lpfc_reg_vfi_fcfi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) #define lpfc_reg_vfi_fcfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) #define lpfc_reg_vfi_fcfi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) uint32_t wwn[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) uint32_t e_d_tov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) uint32_t r_a_tov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) #define lpfc_reg_vfi_nport_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) #define lpfc_reg_vfi_nport_id_MASK 0x00FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) #define lpfc_reg_vfi_nport_id_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) #define lpfc_reg_vfi_bbcr_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) #define lpfc_reg_vfi_bbcr_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) #define lpfc_reg_vfi_bbcr_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) #define lpfc_reg_vfi_bbscn_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) #define lpfc_reg_vfi_bbscn_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) #define lpfc_reg_vfi_bbscn_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) struct lpfc_mbx_init_vpi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) #define lpfc_init_vpi_vfi_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) #define lpfc_init_vpi_vfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) #define lpfc_init_vpi_vfi_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) #define lpfc_init_vpi_vpi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) #define lpfc_init_vpi_vpi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) #define lpfc_init_vpi_vpi_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) struct lpfc_mbx_read_vpi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) uint32_t word1_rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) #define lpfc_mbx_read_vpi_vnportid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) #define lpfc_mbx_read_vpi_vnportid_MASK 0x00FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) #define lpfc_mbx_read_vpi_vnportid_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) uint32_t word3_rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) #define lpfc_mbx_read_vpi_acq_alpa_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) #define lpfc_mbx_read_vpi_acq_alpa_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) #define lpfc_mbx_read_vpi_acq_alpa_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) #define lpfc_mbx_read_vpi_pb_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) #define lpfc_mbx_read_vpi_pb_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) #define lpfc_mbx_read_vpi_pb_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) #define lpfc_mbx_read_vpi_spec_alpa_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) #define lpfc_mbx_read_vpi_spec_alpa_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) #define lpfc_mbx_read_vpi_spec_alpa_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) #define lpfc_mbx_read_vpi_ns_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) #define lpfc_mbx_read_vpi_ns_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) #define lpfc_mbx_read_vpi_ns_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) #define lpfc_mbx_read_vpi_hl_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) #define lpfc_mbx_read_vpi_hl_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) #define lpfc_mbx_read_vpi_hl_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) uint32_t word5_rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) #define lpfc_mbx_read_vpi_vpi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) #define lpfc_mbx_read_vpi_vpi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) #define lpfc_mbx_read_vpi_vpi_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) #define lpfc_mbx_read_vpi_mac_0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) #define lpfc_mbx_read_vpi_mac_0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) #define lpfc_mbx_read_vpi_mac_0_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) #define lpfc_mbx_read_vpi_mac_1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) #define lpfc_mbx_read_vpi_mac_1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) #define lpfc_mbx_read_vpi_mac_1_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) #define lpfc_mbx_read_vpi_mac_2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) #define lpfc_mbx_read_vpi_mac_2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) #define lpfc_mbx_read_vpi_mac_2_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) #define lpfc_mbx_read_vpi_mac_3_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) #define lpfc_mbx_read_vpi_mac_3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) #define lpfc_mbx_read_vpi_mac_3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) #define lpfc_mbx_read_vpi_mac_4_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) #define lpfc_mbx_read_vpi_mac_4_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) #define lpfc_mbx_read_vpi_mac_4_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) #define lpfc_mbx_read_vpi_mac_5_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) #define lpfc_mbx_read_vpi_mac_5_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) #define lpfc_mbx_read_vpi_mac_5_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) #define lpfc_mbx_read_vpi_vlan_tag_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) #define lpfc_mbx_read_vpi_vlan_tag_MASK 0x00000FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) #define lpfc_mbx_read_vpi_vlan_tag_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) #define lpfc_mbx_read_vpi_vv_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) #define lpfc_mbx_read_vpi_vv_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) #define lpfc_mbx_read_vpi_vv_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) struct lpfc_mbx_unreg_vfi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) uint32_t word1_rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) #define lpfc_unreg_vfi_vfi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) #define lpfc_unreg_vfi_vfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) #define lpfc_unreg_vfi_vfi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) struct lpfc_mbx_resume_rpi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) #define lpfc_resume_rpi_index_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) #define lpfc_resume_rpi_index_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) #define lpfc_resume_rpi_index_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) #define lpfc_resume_rpi_ii_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) #define lpfc_resume_rpi_ii_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) #define lpfc_resume_rpi_ii_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) #define RESUME_INDEX_RPI 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) #define RESUME_INDEX_VPI 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) #define RESUME_INDEX_VFI 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) #define RESUME_INDEX_FCFI 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) uint32_t event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) #define REG_FCF_INVALID_QID 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) struct lpfc_mbx_reg_fcfi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) #define lpfc_reg_fcfi_info_index_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) #define lpfc_reg_fcfi_info_index_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) #define lpfc_reg_fcfi_info_index_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) #define lpfc_reg_fcfi_fcfi_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) #define lpfc_reg_fcfi_fcfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) #define lpfc_reg_fcfi_fcfi_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) #define lpfc_reg_fcfi_rq_id1_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) #define lpfc_reg_fcfi_rq_id1_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) #define lpfc_reg_fcfi_rq_id1_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) #define lpfc_reg_fcfi_rq_id0_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) #define lpfc_reg_fcfi_rq_id0_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) #define lpfc_reg_fcfi_rq_id0_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) #define lpfc_reg_fcfi_rq_id3_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) #define lpfc_reg_fcfi_rq_id3_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) #define lpfc_reg_fcfi_rq_id3_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) #define lpfc_reg_fcfi_rq_id2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) #define lpfc_reg_fcfi_rq_id2_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) #define lpfc_reg_fcfi_rq_id2_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) #define lpfc_reg_fcfi_type_match0_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) #define lpfc_reg_fcfi_type_match0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) #define lpfc_reg_fcfi_type_match0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) #define lpfc_reg_fcfi_type_mask0_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) #define lpfc_reg_fcfi_type_mask0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) #define lpfc_reg_fcfi_type_mask0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) #define lpfc_reg_fcfi_rctl_match0_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) #define lpfc_reg_fcfi_rctl_match0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) #define lpfc_reg_fcfi_rctl_match0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) #define lpfc_reg_fcfi_rctl_mask0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) #define lpfc_reg_fcfi_rctl_mask0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) #define lpfc_reg_fcfi_rctl_mask0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) #define lpfc_reg_fcfi_type_match1_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) #define lpfc_reg_fcfi_type_match1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) #define lpfc_reg_fcfi_type_match1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) #define lpfc_reg_fcfi_type_mask1_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) #define lpfc_reg_fcfi_type_mask1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) #define lpfc_reg_fcfi_type_mask1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) #define lpfc_reg_fcfi_rctl_match1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) #define lpfc_reg_fcfi_rctl_match1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) #define lpfc_reg_fcfi_rctl_match1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) #define lpfc_reg_fcfi_rctl_mask1_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) #define lpfc_reg_fcfi_rctl_mask1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) #define lpfc_reg_fcfi_rctl_mask1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) #define lpfc_reg_fcfi_type_match2_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) #define lpfc_reg_fcfi_type_match2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) #define lpfc_reg_fcfi_type_match2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) #define lpfc_reg_fcfi_type_mask2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) #define lpfc_reg_fcfi_type_mask2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) #define lpfc_reg_fcfi_type_mask2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) #define lpfc_reg_fcfi_rctl_match2_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) #define lpfc_reg_fcfi_rctl_match2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) #define lpfc_reg_fcfi_rctl_match2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) #define lpfc_reg_fcfi_rctl_mask2_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) #define lpfc_reg_fcfi_rctl_mask2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) #define lpfc_reg_fcfi_rctl_mask2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) #define lpfc_reg_fcfi_type_match3_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) #define lpfc_reg_fcfi_type_match3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) #define lpfc_reg_fcfi_type_match3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) #define lpfc_reg_fcfi_type_mask3_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) #define lpfc_reg_fcfi_type_mask3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) #define lpfc_reg_fcfi_type_mask3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) #define lpfc_reg_fcfi_rctl_match3_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) #define lpfc_reg_fcfi_rctl_match3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) #define lpfc_reg_fcfi_rctl_match3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) #define lpfc_reg_fcfi_rctl_mask3_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) #define lpfc_reg_fcfi_rctl_mask3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) #define lpfc_reg_fcfi_rctl_mask3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) #define lpfc_reg_fcfi_mam_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) #define lpfc_reg_fcfi_mam_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) #define lpfc_reg_fcfi_mam_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) #define LPFC_MAM_BOTH 0 /* Both SPMA and FPMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) #define LPFC_MAM_SPMA 1 /* Server Provided MAC Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) #define LPFC_MAM_FPMA 2 /* Fabric Provided MAC Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) #define lpfc_reg_fcfi_vv_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) #define lpfc_reg_fcfi_vv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) #define lpfc_reg_fcfi_vv_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) #define lpfc_reg_fcfi_vlan_tag_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) #define lpfc_reg_fcfi_vlan_tag_MASK 0x00000FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) #define lpfc_reg_fcfi_vlan_tag_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) struct lpfc_mbx_reg_fcfi_mrq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) #define lpfc_reg_fcfi_mrq_info_index_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) #define lpfc_reg_fcfi_mrq_info_index_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) #define lpfc_reg_fcfi_mrq_info_index_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) #define lpfc_reg_fcfi_mrq_fcfi_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) #define lpfc_reg_fcfi_mrq_fcfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) #define lpfc_reg_fcfi_mrq_fcfi_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) #define lpfc_reg_fcfi_mrq_rq_id1_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) #define lpfc_reg_fcfi_mrq_rq_id1_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) #define lpfc_reg_fcfi_mrq_rq_id1_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) #define lpfc_reg_fcfi_mrq_rq_id0_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) #define lpfc_reg_fcfi_mrq_rq_id0_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) #define lpfc_reg_fcfi_mrq_rq_id0_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) #define lpfc_reg_fcfi_mrq_rq_id3_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) #define lpfc_reg_fcfi_mrq_rq_id3_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) #define lpfc_reg_fcfi_mrq_rq_id3_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) #define lpfc_reg_fcfi_mrq_rq_id2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) #define lpfc_reg_fcfi_mrq_rq_id2_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) #define lpfc_reg_fcfi_mrq_rq_id2_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) #define lpfc_reg_fcfi_mrq_type_match0_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) #define lpfc_reg_fcfi_mrq_type_match0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) #define lpfc_reg_fcfi_mrq_type_match0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) #define lpfc_reg_fcfi_mrq_type_mask0_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) #define lpfc_reg_fcfi_mrq_type_mask0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) #define lpfc_reg_fcfi_mrq_type_mask0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) #define lpfc_reg_fcfi_mrq_rctl_match0_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) #define lpfc_reg_fcfi_mrq_rctl_match0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) #define lpfc_reg_fcfi_mrq_rctl_match0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) #define lpfc_reg_fcfi_mrq_rctl_mask0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) #define lpfc_reg_fcfi_mrq_rctl_mask0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) #define lpfc_reg_fcfi_mrq_rctl_mask0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) #define lpfc_reg_fcfi_mrq_type_match1_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) #define lpfc_reg_fcfi_mrq_type_match1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) #define lpfc_reg_fcfi_mrq_type_match1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) #define lpfc_reg_fcfi_mrq_type_mask1_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) #define lpfc_reg_fcfi_mrq_type_mask1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) #define lpfc_reg_fcfi_mrq_type_mask1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) #define lpfc_reg_fcfi_mrq_rctl_match1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) #define lpfc_reg_fcfi_mrq_rctl_match1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) #define lpfc_reg_fcfi_mrq_rctl_match1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) #define lpfc_reg_fcfi_mrq_rctl_mask1_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) #define lpfc_reg_fcfi_mrq_rctl_mask1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) #define lpfc_reg_fcfi_mrq_rctl_mask1_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) #define lpfc_reg_fcfi_mrq_type_match2_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) #define lpfc_reg_fcfi_mrq_type_match2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) #define lpfc_reg_fcfi_mrq_type_match2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) #define lpfc_reg_fcfi_mrq_type_mask2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) #define lpfc_reg_fcfi_mrq_type_mask2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) #define lpfc_reg_fcfi_mrq_type_mask2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) #define lpfc_reg_fcfi_mrq_rctl_match2_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) #define lpfc_reg_fcfi_mrq_rctl_match2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) #define lpfc_reg_fcfi_mrq_rctl_match2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) #define lpfc_reg_fcfi_mrq_rctl_mask2_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) #define lpfc_reg_fcfi_mrq_rctl_mask2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) #define lpfc_reg_fcfi_mrq_rctl_mask2_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) #define lpfc_reg_fcfi_mrq_type_match3_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) #define lpfc_reg_fcfi_mrq_type_match3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) #define lpfc_reg_fcfi_mrq_type_match3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) #define lpfc_reg_fcfi_mrq_type_mask3_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) #define lpfc_reg_fcfi_mrq_type_mask3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) #define lpfc_reg_fcfi_mrq_type_mask3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) #define lpfc_reg_fcfi_mrq_rctl_match3_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) #define lpfc_reg_fcfi_mrq_rctl_match3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) #define lpfc_reg_fcfi_mrq_rctl_match3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) #define lpfc_reg_fcfi_mrq_rctl_mask3_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) #define lpfc_reg_fcfi_mrq_rctl_mask3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) #define lpfc_reg_fcfi_mrq_rctl_mask3_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) #define lpfc_reg_fcfi_mrq_ptc7_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) #define lpfc_reg_fcfi_mrq_ptc7_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) #define lpfc_reg_fcfi_mrq_ptc7_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) #define lpfc_reg_fcfi_mrq_ptc6_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) #define lpfc_reg_fcfi_mrq_ptc6_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) #define lpfc_reg_fcfi_mrq_ptc6_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) #define lpfc_reg_fcfi_mrq_ptc5_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) #define lpfc_reg_fcfi_mrq_ptc5_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) #define lpfc_reg_fcfi_mrq_ptc5_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) #define lpfc_reg_fcfi_mrq_ptc4_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) #define lpfc_reg_fcfi_mrq_ptc4_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) #define lpfc_reg_fcfi_mrq_ptc4_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) #define lpfc_reg_fcfi_mrq_ptc3_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) #define lpfc_reg_fcfi_mrq_ptc3_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) #define lpfc_reg_fcfi_mrq_ptc3_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) #define lpfc_reg_fcfi_mrq_ptc2_SHIFT 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) #define lpfc_reg_fcfi_mrq_ptc2_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) #define lpfc_reg_fcfi_mrq_ptc2_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) #define lpfc_reg_fcfi_mrq_ptc1_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) #define lpfc_reg_fcfi_mrq_ptc1_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) #define lpfc_reg_fcfi_mrq_ptc1_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) #define lpfc_reg_fcfi_mrq_ptc0_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) #define lpfc_reg_fcfi_mrq_ptc0_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) #define lpfc_reg_fcfi_mrq_ptc0_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) #define lpfc_reg_fcfi_mrq_pt7_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) #define lpfc_reg_fcfi_mrq_pt7_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) #define lpfc_reg_fcfi_mrq_pt7_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) #define lpfc_reg_fcfi_mrq_pt6_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) #define lpfc_reg_fcfi_mrq_pt6_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) #define lpfc_reg_fcfi_mrq_pt6_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) #define lpfc_reg_fcfi_mrq_pt5_SHIFT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) #define lpfc_reg_fcfi_mrq_pt5_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) #define lpfc_reg_fcfi_mrq_pt5_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) #define lpfc_reg_fcfi_mrq_pt4_SHIFT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) #define lpfc_reg_fcfi_mrq_pt4_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) #define lpfc_reg_fcfi_mrq_pt4_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) #define lpfc_reg_fcfi_mrq_pt3_SHIFT 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) #define lpfc_reg_fcfi_mrq_pt3_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) #define lpfc_reg_fcfi_mrq_pt3_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) #define lpfc_reg_fcfi_mrq_pt2_SHIFT 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) #define lpfc_reg_fcfi_mrq_pt2_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) #define lpfc_reg_fcfi_mrq_pt2_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) #define lpfc_reg_fcfi_mrq_pt1_SHIFT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) #define lpfc_reg_fcfi_mrq_pt1_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) #define lpfc_reg_fcfi_mrq_pt1_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) #define lpfc_reg_fcfi_mrq_pt0_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) #define lpfc_reg_fcfi_mrq_pt0_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) #define lpfc_reg_fcfi_mrq_pt0_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) #define lpfc_reg_fcfi_mrq_xmv_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) #define lpfc_reg_fcfi_mrq_xmv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) #define lpfc_reg_fcfi_mrq_xmv_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) #define lpfc_reg_fcfi_mrq_mode_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) #define lpfc_reg_fcfi_mrq_mode_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) #define lpfc_reg_fcfi_mrq_mode_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) #define lpfc_reg_fcfi_mrq_vv_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) #define lpfc_reg_fcfi_mrq_vv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) #define lpfc_reg_fcfi_mrq_vv_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) #define lpfc_reg_fcfi_mrq_vlan_tag_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) #define lpfc_reg_fcfi_mrq_vlan_tag_MASK 0x00000FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) #define lpfc_reg_fcfi_mrq_vlan_tag_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) #define lpfc_reg_fcfi_mrq_policy_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) #define lpfc_reg_fcfi_mrq_policy_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) #define lpfc_reg_fcfi_mrq_policy_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) #define lpfc_reg_fcfi_mrq_filter_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) #define lpfc_reg_fcfi_mrq_filter_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) #define lpfc_reg_fcfi_mrq_filter_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) #define lpfc_reg_fcfi_mrq_npairs_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) #define lpfc_reg_fcfi_mrq_npairs_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) #define lpfc_reg_fcfi_mrq_npairs_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) uint32_t word11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) uint32_t word13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) uint32_t word14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) uint32_t word15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) uint32_t word16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) struct lpfc_mbx_unreg_fcfi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) uint32_t word1_rsv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) #define lpfc_unreg_fcfi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) #define lpfc_unreg_fcfi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) #define lpfc_unreg_fcfi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) struct lpfc_mbx_read_rev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) #define lpfc_mbx_rd_rev_sli_lvl_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) #define lpfc_mbx_rd_rev_sli_lvl_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) #define lpfc_mbx_rd_rev_sli_lvl_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) #define lpfc_mbx_rd_rev_fcoe_SHIFT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) #define lpfc_mbx_rd_rev_fcoe_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) #define lpfc_mbx_rd_rev_fcoe_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) #define lpfc_mbx_rd_rev_cee_ver_SHIFT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) #define lpfc_mbx_rd_rev_cee_ver_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) #define lpfc_mbx_rd_rev_cee_ver_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) #define LPFC_PREDCBX_CEE_MODE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) #define LPFC_DCBX_CEE_MODE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) #define lpfc_mbx_rd_rev_vpd_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) #define lpfc_mbx_rd_rev_vpd_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) #define lpfc_mbx_rd_rev_vpd_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) uint32_t first_hw_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) #define LPFC_G7_ASIC_1 0xd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) uint32_t second_hw_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) uint32_t word4_rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) uint32_t third_hw_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) #define lpfc_mbx_rd_rev_fcph_low_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) #define lpfc_mbx_rd_rev_fcph_low_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) #define lpfc_mbx_rd_rev_fcph_low_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) #define lpfc_mbx_rd_rev_fcph_high_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) #define lpfc_mbx_rd_rev_fcph_high_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) #define lpfc_mbx_rd_rev_fcph_high_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) #define lpfc_mbx_rd_rev_ftr_lvl_low_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) #define lpfc_mbx_rd_rev_ftr_lvl_low_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) #define lpfc_mbx_rd_rev_ftr_lvl_low_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) #define lpfc_mbx_rd_rev_ftr_lvl_high_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) #define lpfc_mbx_rd_rev_ftr_lvl_high_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) #define lpfc_mbx_rd_rev_ftr_lvl_high_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) uint32_t word7_rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) uint32_t fw_id_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) uint8_t fw_name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) uint32_t ulp_fw_id_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) uint8_t ulp_fw_name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) uint32_t word18_47_rsvd[30];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) uint32_t word48;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) #define lpfc_mbx_rd_rev_avail_len_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) #define lpfc_mbx_rd_rev_avail_len_MASK 0x00FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) #define lpfc_mbx_rd_rev_avail_len_WORD word48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) uint32_t vpd_paddr_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) uint32_t vpd_paddr_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) uint32_t avail_vpd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) uint32_t rsvd_52_63[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) struct lpfc_mbx_read_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) #define lpfc_mbx_rd_conf_extnts_inuse_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) #define lpfc_mbx_rd_conf_extnts_inuse_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) #define lpfc_mbx_rd_conf_extnts_inuse_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) #define lpfc_mbx_rd_conf_lnk_numb_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) #define lpfc_mbx_rd_conf_lnk_numb_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) #define lpfc_mbx_rd_conf_lnk_numb_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) #define lpfc_mbx_rd_conf_lnk_type_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) #define lpfc_mbx_rd_conf_lnk_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) #define lpfc_mbx_rd_conf_lnk_type_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) #define LPFC_LNK_TYPE_GE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) #define LPFC_LNK_TYPE_FC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) #define lpfc_mbx_rd_conf_lnk_ldv_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) #define lpfc_mbx_rd_conf_lnk_ldv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) #define lpfc_mbx_rd_conf_lnk_ldv_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) #define lpfc_mbx_rd_conf_trunk_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) #define lpfc_mbx_rd_conf_trunk_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) #define lpfc_mbx_rd_conf_trunk_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) #define lpfc_mbx_rd_conf_pt_SHIFT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) #define lpfc_mbx_rd_conf_pt_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) #define lpfc_mbx_rd_conf_pt_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) #define lpfc_mbx_rd_conf_tf_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) #define lpfc_mbx_rd_conf_tf_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) #define lpfc_mbx_rd_conf_tf_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) #define lpfc_mbx_rd_conf_ptv_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) #define lpfc_mbx_rd_conf_ptv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) #define lpfc_mbx_rd_conf_ptv_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) #define lpfc_mbx_rd_conf_topology_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) #define lpfc_mbx_rd_conf_topology_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) #define lpfc_mbx_rd_conf_topology_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) uint32_t rsvd_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) #define lpfc_mbx_rd_conf_e_d_tov_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) #define lpfc_mbx_rd_conf_e_d_tov_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) #define lpfc_mbx_rd_conf_e_d_tov_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) uint32_t rsvd_5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) #define lpfc_mbx_rd_conf_r_a_tov_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) #define lpfc_mbx_rd_conf_r_a_tov_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) #define lpfc_mbx_rd_conf_r_a_tov_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) #define lpfc_mbx_rd_conf_link_speed_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) #define lpfc_mbx_rd_conf_link_speed_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) #define lpfc_mbx_rd_conf_link_speed_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) uint32_t rsvd_7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) #define lpfc_mbx_rd_conf_bbscn_min_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) #define lpfc_mbx_rd_conf_bbscn_min_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) #define lpfc_mbx_rd_conf_bbscn_min_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) #define lpfc_mbx_rd_conf_bbscn_max_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) #define lpfc_mbx_rd_conf_bbscn_max_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) #define lpfc_mbx_rd_conf_bbscn_max_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) #define lpfc_mbx_rd_conf_bbscn_def_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) #define lpfc_mbx_rd_conf_bbscn_def_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) #define lpfc_mbx_rd_conf_bbscn_def_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) #define lpfc_mbx_rd_conf_lmt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) #define lpfc_mbx_rd_conf_lmt_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) #define lpfc_mbx_rd_conf_lmt_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) uint32_t rsvd_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) uint32_t rsvd_11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) #define lpfc_mbx_rd_conf_xri_base_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) #define lpfc_mbx_rd_conf_xri_base_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) #define lpfc_mbx_rd_conf_xri_base_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) #define lpfc_mbx_rd_conf_xri_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) #define lpfc_mbx_rd_conf_xri_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) #define lpfc_mbx_rd_conf_xri_count_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) uint32_t word13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) #define lpfc_mbx_rd_conf_rpi_base_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) #define lpfc_mbx_rd_conf_rpi_base_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) #define lpfc_mbx_rd_conf_rpi_base_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) #define lpfc_mbx_rd_conf_rpi_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) #define lpfc_mbx_rd_conf_rpi_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) #define lpfc_mbx_rd_conf_rpi_count_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) uint32_t word14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) #define lpfc_mbx_rd_conf_vpi_base_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) #define lpfc_mbx_rd_conf_vpi_base_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) #define lpfc_mbx_rd_conf_vpi_base_WORD word14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) #define lpfc_mbx_rd_conf_vpi_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) #define lpfc_mbx_rd_conf_vpi_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) #define lpfc_mbx_rd_conf_vpi_count_WORD word14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) uint32_t word15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) #define lpfc_mbx_rd_conf_vfi_base_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) #define lpfc_mbx_rd_conf_vfi_base_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) #define lpfc_mbx_rd_conf_vfi_base_WORD word15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) #define lpfc_mbx_rd_conf_vfi_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) #define lpfc_mbx_rd_conf_vfi_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) #define lpfc_mbx_rd_conf_vfi_count_WORD word15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) uint32_t word16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) #define lpfc_mbx_rd_conf_fcfi_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) #define lpfc_mbx_rd_conf_fcfi_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) #define lpfc_mbx_rd_conf_fcfi_count_WORD word16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) uint32_t word17;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) #define lpfc_mbx_rd_conf_rq_count_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) #define lpfc_mbx_rd_conf_rq_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) #define lpfc_mbx_rd_conf_rq_count_WORD word17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) #define lpfc_mbx_rd_conf_eq_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) #define lpfc_mbx_rd_conf_eq_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) #define lpfc_mbx_rd_conf_eq_count_WORD word17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) uint32_t word18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) #define lpfc_mbx_rd_conf_wq_count_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) #define lpfc_mbx_rd_conf_wq_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) #define lpfc_mbx_rd_conf_wq_count_WORD word18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) #define lpfc_mbx_rd_conf_cq_count_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) #define lpfc_mbx_rd_conf_cq_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) #define lpfc_mbx_rd_conf_cq_count_WORD word18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) struct lpfc_mbx_request_features {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) #define lpfc_mbx_rq_ftr_qry_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) #define lpfc_mbx_rq_ftr_qry_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) #define lpfc_mbx_rq_ftr_qry_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) #define lpfc_mbx_rq_ftr_rq_iaab_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) #define lpfc_mbx_rq_ftr_rq_iaab_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) #define lpfc_mbx_rq_ftr_rq_iaab_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) #define lpfc_mbx_rq_ftr_rq_npiv_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) #define lpfc_mbx_rq_ftr_rq_npiv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) #define lpfc_mbx_rq_ftr_rq_npiv_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) #define lpfc_mbx_rq_ftr_rq_dif_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) #define lpfc_mbx_rq_ftr_rq_dif_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) #define lpfc_mbx_rq_ftr_rq_dif_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) #define lpfc_mbx_rq_ftr_rq_vf_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) #define lpfc_mbx_rq_ftr_rq_vf_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) #define lpfc_mbx_rq_ftr_rq_vf_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) #define lpfc_mbx_rq_ftr_rq_fcpi_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) #define lpfc_mbx_rq_ftr_rq_fcpi_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) #define lpfc_mbx_rq_ftr_rq_fcpi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) #define lpfc_mbx_rq_ftr_rq_fcpt_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) #define lpfc_mbx_rq_ftr_rq_fcpt_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) #define lpfc_mbx_rq_ftr_rq_fcpt_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) #define lpfc_mbx_rq_ftr_rq_fcpc_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) #define lpfc_mbx_rq_ftr_rq_fcpc_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) #define lpfc_mbx_rq_ftr_rq_fcpc_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) #define lpfc_mbx_rq_ftr_rq_ifip_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) #define lpfc_mbx_rq_ftr_rq_ifip_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) #define lpfc_mbx_rq_ftr_rq_ifip_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) #define lpfc_mbx_rq_ftr_rq_iaar_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) #define lpfc_mbx_rq_ftr_rq_iaar_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) #define lpfc_mbx_rq_ftr_rq_iaar_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) #define lpfc_mbx_rq_ftr_rq_perfh_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) #define lpfc_mbx_rq_ftr_rq_perfh_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) #define lpfc_mbx_rq_ftr_rq_perfh_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) #define lpfc_mbx_rq_ftr_rq_mrqp_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) #define lpfc_mbx_rq_ftr_rq_mrqp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) #define lpfc_mbx_rq_ftr_rq_mrqp_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) #define lpfc_mbx_rq_ftr_rsp_iaab_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) #define lpfc_mbx_rq_ftr_rsp_iaab_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) #define lpfc_mbx_rq_ftr_rsp_iaab_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) #define lpfc_mbx_rq_ftr_rsp_npiv_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) #define lpfc_mbx_rq_ftr_rsp_npiv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) #define lpfc_mbx_rq_ftr_rsp_npiv_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) #define lpfc_mbx_rq_ftr_rsp_dif_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) #define lpfc_mbx_rq_ftr_rsp_dif_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) #define lpfc_mbx_rq_ftr_rsp_dif_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) #define lpfc_mbx_rq_ftr_rsp_vf_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) #define lpfc_mbx_rq_ftr_rsp_vf__MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) #define lpfc_mbx_rq_ftr_rsp_vf_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) #define lpfc_mbx_rq_ftr_rsp_fcpi_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) #define lpfc_mbx_rq_ftr_rsp_fcpi_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) #define lpfc_mbx_rq_ftr_rsp_fcpi_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) #define lpfc_mbx_rq_ftr_rsp_fcpt_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) #define lpfc_mbx_rq_ftr_rsp_fcpt_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) #define lpfc_mbx_rq_ftr_rsp_fcpt_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) #define lpfc_mbx_rq_ftr_rsp_fcpc_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) #define lpfc_mbx_rq_ftr_rsp_fcpc_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) #define lpfc_mbx_rq_ftr_rsp_fcpc_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) #define lpfc_mbx_rq_ftr_rsp_ifip_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) #define lpfc_mbx_rq_ftr_rsp_ifip_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) #define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) #define lpfc_mbx_rq_ftr_rsp_perfh_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) #define lpfc_mbx_rq_ftr_rsp_perfh_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) #define lpfc_mbx_rq_ftr_rsp_perfh_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) #define lpfc_mbx_rq_ftr_rsp_mrqp_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) #define lpfc_mbx_rq_ftr_rsp_mrqp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) #define lpfc_mbx_rq_ftr_rsp_mrqp_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) struct lpfc_mbx_memory_dump_type3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) #define lpfc_mbx_memory_dump_type3_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) #define lpfc_mbx_memory_dump_type3_type_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) #define lpfc_mbx_memory_dump_type3_type_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) #define lpfc_mbx_memory_dump_type3_link_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) #define lpfc_mbx_memory_dump_type3_link_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) #define lpfc_mbx_memory_dump_type3_link_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) #define lpfc_mbx_memory_dump_type3_page_no_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) #define lpfc_mbx_memory_dump_type3_page_no_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) #define lpfc_mbx_memory_dump_type3_page_no_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) #define lpfc_mbx_memory_dump_type3_offset_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) #define lpfc_mbx_memory_dump_type3_offset_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) #define lpfc_mbx_memory_dump_type3_offset_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) #define lpfc_mbx_memory_dump_type3_length_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) #define lpfc_mbx_memory_dump_type3_length_MASK 0x00ffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) #define lpfc_mbx_memory_dump_type3_length_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) uint32_t addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) uint32_t addr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) uint32_t return_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) #define DMP_PAGE_A0 0xa0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) #define DMP_PAGE_A2 0xa2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) #define DMP_SFF_PAGE_A0_SIZE 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) #define DMP_SFF_PAGE_A2_SIZE 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) #define SFP_WAVELENGTH_LC1310 1310
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) #define SFP_WAVELENGTH_LL1550 1550
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) * * SFF-8472 TABLE 3.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) * */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) #define SFF_PG0_CONNECTOR_UNKNOWN 0x00 /* Unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) #define SFF_PG0_CONNECTOR_SC 0x01 /* SC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) #define SFF_PG0_CONNECTOR_FC_COPPER1 0x02 /* FC style 1 copper connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) #define SFF_PG0_CONNECTOR_FC_COPPER2 0x03 /* FC style 2 copper connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) #define SFF_PG0_CONNECTOR_BNC 0x04 /* BNC / TNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) #define SFF_PG0_CONNECTOR__FC_COAX 0x05 /* FC coaxial headers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) #define SFF_PG0_CONNECTOR_FIBERJACK 0x06 /* FiberJack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) #define SFF_PG0_CONNECTOR_LC 0x07 /* LC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) #define SFF_PG0_CONNECTOR_MT 0x08 /* MT - RJ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) #define SFF_PG0_CONNECTOR_MU 0x09 /* MU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) #define SFF_PG0_CONNECTOR_SF 0x0A /* SG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) #define SFF_PG0_CONNECTOR_OPTICAL_PIGTAIL 0x0B /* Optical pigtail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) #define SFF_PG0_CONNECTOR_OPTICAL_PARALLEL 0x0C /* MPO Parallel Optic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) #define SFF_PG0_CONNECTOR_HSSDC_II 0x20 /* HSSDC II */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) #define SFF_PG0_CONNECTOR_COPPER_PIGTAIL 0x21 /* Copper pigtail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) #define SFF_PG0_CONNECTOR_RJ45 0x22 /* RJ45 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) /* SFF-8472 Table 3.1 Diagnostics: Data Fields Address/Page A0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) #define SSF_IDENTIFIER 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) #define SSF_EXT_IDENTIFIER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) #define SSF_CONNECTOR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) #define SSF_TRANSCEIVER_CODE_B0 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) #define SSF_TRANSCEIVER_CODE_B1 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) #define SSF_TRANSCEIVER_CODE_B2 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) #define SSF_TRANSCEIVER_CODE_B3 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) #define SSF_TRANSCEIVER_CODE_B4 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) #define SSF_TRANSCEIVER_CODE_B5 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) #define SSF_TRANSCEIVER_CODE_B6 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) #define SSF_TRANSCEIVER_CODE_B7 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) #define SSF_ENCODING 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) #define SSF_BR_NOMINAL 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) #define SSF_RATE_IDENTIFIER 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) #define SSF_LENGTH_9UM_KM 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) #define SSF_LENGTH_9UM 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) #define SSF_LENGTH_50UM_OM2 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) #define SSF_LENGTH_62UM_OM1 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) #define SFF_LENGTH_COPPER 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) #define SSF_LENGTH_50UM_OM3 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) #define SSF_VENDOR_NAME 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) #define SSF_VENDOR_OUI 36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) #define SSF_VENDOR_PN 40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) #define SSF_VENDOR_REV 56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) #define SSF_WAVELENGTH_B1 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) #define SSF_WAVELENGTH_B0 61
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) #define SSF_CC_BASE 63
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) #define SSF_OPTIONS_B1 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) #define SSF_OPTIONS_B0 65
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) #define SSF_BR_MAX 66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) #define SSF_BR_MIN 67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) #define SSF_VENDOR_SN 68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) #define SSF_DATE_CODE 84
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) #define SSF_MONITORING_TYPEDIAGNOSTIC 92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) #define SSF_ENHANCED_OPTIONS 93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) #define SFF_8472_COMPLIANCE 94
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) #define SSF_CC_EXT 95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) #define SSF_A0_VENDOR_SPECIFIC 96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) /* SFF-8472 Table 3.1a Diagnostics: Data Fields Address/Page A2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) #define SSF_TEMP_HIGH_ALARM 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) #define SSF_TEMP_LOW_ALARM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) #define SSF_TEMP_HIGH_WARNING 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) #define SSF_TEMP_LOW_WARNING 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) #define SSF_VOLTAGE_HIGH_ALARM 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) #define SSF_VOLTAGE_LOW_ALARM 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) #define SSF_VOLTAGE_HIGH_WARNING 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) #define SSF_VOLTAGE_LOW_WARNING 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) #define SSF_BIAS_HIGH_ALARM 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) #define SSF_BIAS_LOW_ALARM 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) #define SSF_BIAS_HIGH_WARNING 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) #define SSF_BIAS_LOW_WARNING 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) #define SSF_TXPOWER_HIGH_ALARM 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) #define SSF_TXPOWER_LOW_ALARM 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) #define SSF_TXPOWER_HIGH_WARNING 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) #define SSF_TXPOWER_LOW_WARNING 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) #define SSF_RXPOWER_HIGH_ALARM 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) #define SSF_RXPOWER_LOW_ALARM 34
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) #define SSF_RXPOWER_HIGH_WARNING 36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) #define SSF_RXPOWER_LOW_WARNING 38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) #define SSF_EXT_CAL_CONSTANTS 56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) #define SSF_CC_DMI 95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) #define SFF_TEMPERATURE_B1 96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) #define SFF_TEMPERATURE_B0 97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) #define SFF_VCC_B1 98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) #define SFF_VCC_B0 99
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) #define SFF_TX_BIAS_CURRENT_B1 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) #define SFF_TX_BIAS_CURRENT_B0 101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) #define SFF_TXPOWER_B1 102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) #define SFF_TXPOWER_B0 103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) #define SFF_RXPOWER_B1 104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) #define SFF_RXPOWER_B0 105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) #define SSF_STATUS_CONTROL 110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) #define SSF_ALARM_FLAGS 112
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) #define SSF_WARNING_FLAGS 116
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) #define SSF_EXT_TATUS_CONTROL_B1 118
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) #define SSF_EXT_TATUS_CONTROL_B0 119
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) #define SSF_A2_VENDOR_SPECIFIC 120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) #define SSF_USER_EEPROM 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) #define SSF_VENDOR_CONTROL 148
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) * Tranceiver codes Fibre Channel SFF-8472
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) * Table 3.5.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) struct sff_trasnceiver_codes_byte0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) uint8_t inifiband:4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) uint8_t teng_ethernet:4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) struct sff_trasnceiver_codes_byte1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) uint8_t sonet:6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) uint8_t escon:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) struct sff_trasnceiver_codes_byte2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) uint8_t soNet:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) struct sff_trasnceiver_codes_byte3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) uint8_t ethernet:8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) struct sff_trasnceiver_codes_byte4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) uint8_t fc_el_lo:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) uint8_t fc_lw_laser:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) uint8_t fc_sw_laser:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) uint8_t fc_md_distance:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) uint8_t fc_lg_distance:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) uint8_t fc_int_distance:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) uint8_t fc_short_distance:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) uint8_t fc_vld_distance:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) struct sff_trasnceiver_codes_byte5 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) uint8_t reserved1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) uint8_t reserved2:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) uint8_t fc_sfp_active:1; /* Active cable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) uint8_t fc_sfp_passive:1; /* Passive cable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) uint8_t fc_lw_laser:1; /* Longwave laser */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) uint8_t fc_sw_laser_sl:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) uint8_t fc_sw_laser_sn:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) uint8_t fc_el_hi:1; /* Electrical enclosure high bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) struct sff_trasnceiver_codes_byte6 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) uint8_t fc_tm_sm:1; /* Single Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) uint8_t reserved:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) uint8_t fc_tm_m6:1; /* Multimode, 62.5um (M6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) uint8_t fc_tm_tv:1; /* Video Coax (TV) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) uint8_t fc_tm_mi:1; /* Miniature Coax (MI) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) uint8_t fc_tm_tp:1; /* Twisted Pair (TP) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) uint8_t fc_tm_tw:1; /* Twin Axial Pair */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) struct sff_trasnceiver_codes_byte7 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) uint8_t fc_sp_100MB:1; /* 100 MB/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) uint8_t reserve:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) uint8_t fc_sp_200mb:1; /* 200 MB/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) uint8_t fc_sp_3200MB:1; /* 3200 MB/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) uint8_t fc_sp_400MB:1; /* 400 MB/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) uint8_t fc_sp_1600MB:1; /* 1600 MB/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) uint8_t fc_sp_800MB:1; /* 800 MB/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) uint8_t fc_sp_1200MB:1; /* 1200 MB/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) /* User writable non-volatile memory, SFF-8472 Table 3.20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) struct user_eeprom {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) uint8_t vendor_name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) uint8_t vendor_oui[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) uint8_t vendor_pn[816];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) uint8_t vendor_rev[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) uint8_t vendor_sn[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) uint8_t datecode[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) uint8_t lot_code[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) uint8_t reserved191[57];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) #define SLI4_PAGE_ALIGN(addr) (((addr)+((SLI4_PAGE_SIZE)-1)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) &(~((SLI4_PAGE_SIZE)-1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) struct lpfc_sli4_parameters {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) #define cfg_prot_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) #define cfg_prot_type_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) #define cfg_prot_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) #define cfg_ft_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) #define cfg_ft_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) #define cfg_ft_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) #define cfg_sli_rev_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) #define cfg_sli_rev_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) #define cfg_sli_rev_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) #define cfg_sli_family_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) #define cfg_sli_family_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) #define cfg_sli_family_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) #define cfg_if_type_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) #define cfg_if_type_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) #define cfg_if_type_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) #define cfg_sli_hint_1_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) #define cfg_sli_hint_1_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) #define cfg_sli_hint_1_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) #define cfg_sli_hint_2_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) #define cfg_sli_hint_2_MASK 0x0000001f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) #define cfg_sli_hint_2_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) #define cfg_eqav_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) #define cfg_eqav_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) #define cfg_eqav_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) #define cfg_cqv_SHIFT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) #define cfg_cqv_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) #define cfg_cqv_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) #define cfg_cqpsize_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) #define cfg_cqpsize_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) #define cfg_cqpsize_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) #define cfg_cqav_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) #define cfg_cqav_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) #define cfg_cqav_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) #define cfg_mqv_SHIFT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) #define cfg_mqv_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) #define cfg_mqv_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) #define cfg_wqpcnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) #define cfg_wqpcnt_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) #define cfg_wqpcnt_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) #define cfg_wqsize_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) #define cfg_wqsize_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) #define cfg_wqsize_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) #define cfg_wqv_SHIFT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) #define cfg_wqv_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) #define cfg_wqv_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) #define cfg_wqpsize_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) #define cfg_wqpsize_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) #define cfg_wqpsize_WORD word8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) #define cfg_rqv_SHIFT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) #define cfg_rqv_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) #define cfg_rqv_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) uint32_t word11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) #define cfg_rq_db_window_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) #define cfg_rq_db_window_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) #define cfg_rq_db_window_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) #define cfg_fcoe_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) #define cfg_fcoe_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) #define cfg_fcoe_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) #define cfg_ext_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) #define cfg_ext_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) #define cfg_ext_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) #define cfg_hdrr_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) #define cfg_hdrr_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) #define cfg_hdrr_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) #define cfg_phwq_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) #define cfg_phwq_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) #define cfg_phwq_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) #define cfg_oas_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) #define cfg_oas_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) #define cfg_oas_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) #define cfg_loopbk_scope_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) #define cfg_loopbk_scope_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) #define cfg_loopbk_scope_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) uint32_t sge_supp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) uint32_t word14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) #define cfg_sgl_page_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) #define cfg_sgl_page_cnt_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) #define cfg_sgl_page_cnt_WORD word14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) #define cfg_sgl_page_size_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) #define cfg_sgl_page_size_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) #define cfg_sgl_page_size_WORD word14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) #define cfg_sgl_pp_align_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) #define cfg_sgl_pp_align_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) #define cfg_sgl_pp_align_WORD word14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) uint32_t word15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) uint32_t word16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) uint32_t word17;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) uint32_t word18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) uint32_t word19;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) #define cfg_ext_embed_cb_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) #define cfg_ext_embed_cb_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) #define cfg_ext_embed_cb_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) #define cfg_mds_diags_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) #define cfg_mds_diags_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) #define cfg_mds_diags_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) #define cfg_nvme_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) #define cfg_nvme_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) #define cfg_nvme_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) #define cfg_xib_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) #define cfg_xib_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) #define cfg_xib_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) #define cfg_xpsgl_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) #define cfg_xpsgl_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) #define cfg_xpsgl_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) #define cfg_eqdr_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) #define cfg_eqdr_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) #define cfg_eqdr_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) #define cfg_nosr_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) #define cfg_nosr_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) #define cfg_nosr_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) #define cfg_bv1s_SHIFT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) #define cfg_bv1s_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) #define cfg_bv1s_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) #define cfg_pvl_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) #define cfg_pvl_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) #define cfg_pvl_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) #define cfg_nsler_SHIFT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) #define cfg_nsler_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) #define cfg_nsler_WORD word19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) uint32_t word20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) #define cfg_max_tow_xri_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) #define cfg_max_tow_xri_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) #define cfg_max_tow_xri_WORD word20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) uint32_t word21; /* RESERVED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) uint32_t word22; /* RESERVED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) uint32_t word23; /* RESERVED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) uint32_t word24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) #define cfg_frag_field_offset_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) #define cfg_frag_field_offset_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) #define cfg_frag_field_offset_WORD word24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) #define cfg_frag_field_size_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) #define cfg_frag_field_size_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) #define cfg_frag_field_size_WORD word24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) uint32_t word25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) #define cfg_sgl_field_offset_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) #define cfg_sgl_field_offset_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) #define cfg_sgl_field_offset_WORD word25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) #define cfg_sgl_field_size_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) #define cfg_sgl_field_size_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) #define cfg_sgl_field_size_WORD word25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) uint32_t word26; /* Chain SGE initial value LOW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) uint32_t word27; /* Chain SGE initial value HIGH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) #define LPFC_NODELAY_MAX_IO 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) #define LPFC_SET_UE_RECOVERY 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) #define LPFC_SET_MDS_DIAGS 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) #define LPFC_SET_DUAL_DUMP 0x1e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) struct lpfc_mbx_set_feature {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) uint32_t feature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) uint32_t param_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) #define lpfc_mbx_set_feature_UER_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) #define lpfc_mbx_set_feature_UER_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) #define lpfc_mbx_set_feature_UER_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) #define lpfc_mbx_set_feature_mds_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) #define lpfc_mbx_set_feature_mds_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) #define lpfc_mbx_set_feature_mds_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) #define lpfc_mbx_set_feature_mds_deep_loopbk_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) #define lpfc_mbx_set_feature_mds_deep_loopbk_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) #define lpfc_mbx_set_feature_mds_deep_loopbk_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) #define lpfc_mbx_set_feature_dd_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) #define lpfc_mbx_set_feature_dd_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) #define lpfc_mbx_set_feature_dd_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) #define lpfc_mbx_set_feature_ddquery_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) #define lpfc_mbx_set_feature_ddquery_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) #define lpfc_mbx_set_feature_ddquery_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) #define LPFC_DISABLE_DUAL_DUMP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) #define LPFC_ENABLE_DUAL_DUMP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) #define LPFC_QUERY_OP_DUAL_DUMP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) #define lpfc_mbx_set_feature_UERP_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) #define lpfc_mbx_set_feature_UERP_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) #define lpfc_mbx_set_feature_UERP_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) #define lpfc_mbx_set_feature_UESR_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) #define lpfc_mbx_set_feature_UESR_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) #define lpfc_mbx_set_feature_UESR_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) #define LPFC_SET_HOST_OS_DRIVER_VERSION 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) struct lpfc_mbx_set_host_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) #define LPFC_HOST_OS_DRIVER_VERSION_SIZE 48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) uint32_t param_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) uint32_t param_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) uint8_t data[LPFC_HOST_OS_DRIVER_VERSION_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) struct lpfc_mbx_set_trunk_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) #define lpfc_mbx_set_trunk_mode_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) #define lpfc_mbx_set_trunk_mode_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) #define lpfc_mbx_set_trunk_mode_MASK 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) struct lpfc_mbx_get_sli4_parameters {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) struct lpfc_sli4_parameters sli4_parameters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) struct lpfc_rscr_desc_generic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) #define LPFC_RSRC_DESC_WSIZE 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) uint32_t desc[LPFC_RSRC_DESC_WSIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) struct lpfc_rsrc_desc_pcie {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) #define lpfc_rsrc_desc_pcie_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) #define lpfc_rsrc_desc_pcie_type_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) #define lpfc_rsrc_desc_pcie_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) #define LPFC_RSRC_DESC_TYPE_PCIE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) #define lpfc_rsrc_desc_pcie_length_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) #define lpfc_rsrc_desc_pcie_length_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) #define lpfc_rsrc_desc_pcie_length_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) #define lpfc_rsrc_desc_pcie_pfnum_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) #define lpfc_rsrc_desc_pcie_pfnum_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) #define lpfc_rsrc_desc_pcie_pfnum_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) uint32_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) #define lpfc_rsrc_desc_pcie_sriov_sta_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) #define lpfc_rsrc_desc_pcie_sriov_sta_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) #define lpfc_rsrc_desc_pcie_sriov_sta_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) #define lpfc_rsrc_desc_pcie_pf_sta_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) #define lpfc_rsrc_desc_pcie_pf_sta_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) #define lpfc_rsrc_desc_pcie_pf_sta_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) #define lpfc_rsrc_desc_pcie_pf_type_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) #define lpfc_rsrc_desc_pcie_pf_type_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) #define lpfc_rsrc_desc_pcie_pf_type_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) #define lpfc_rsrc_desc_pcie_nr_virtfn_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) #define lpfc_rsrc_desc_pcie_nr_virtfn_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) #define lpfc_rsrc_desc_pcie_nr_virtfn_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) struct lpfc_rsrc_desc_fcfcoe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) #define lpfc_rsrc_desc_fcfcoe_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) #define lpfc_rsrc_desc_fcfcoe_type_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) #define lpfc_rsrc_desc_fcfcoe_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) #define LPFC_RSRC_DESC_TYPE_FCFCOE 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) #define lpfc_rsrc_desc_fcfcoe_length_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) #define lpfc_rsrc_desc_fcfcoe_length_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) #define lpfc_rsrc_desc_fcfcoe_length_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) #define LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) #define LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH 72
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) #define LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH 88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) #define lpfc_rsrc_desc_fcfcoe_vfnum_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) #define lpfc_rsrc_desc_fcfcoe_vfnum_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) #define lpfc_rsrc_desc_fcfcoe_vfnum_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) #define lpfc_rsrc_desc_fcfcoe_pfnum_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) #define lpfc_rsrc_desc_fcfcoe_pfnum_MASK 0x000007ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) #define lpfc_rsrc_desc_fcfcoe_pfnum_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) #define lpfc_rsrc_desc_fcfcoe_rpi_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) #define lpfc_rsrc_desc_fcfcoe_rpi_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) #define lpfc_rsrc_desc_fcfcoe_rpi_cnt_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) #define lpfc_rsrc_desc_fcfcoe_xri_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) #define lpfc_rsrc_desc_fcfcoe_xri_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) #define lpfc_rsrc_desc_fcfcoe_xri_cnt_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) #define lpfc_rsrc_desc_fcfcoe_wq_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) #define lpfc_rsrc_desc_fcfcoe_wq_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) #define lpfc_rsrc_desc_fcfcoe_wq_cnt_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) #define lpfc_rsrc_desc_fcfcoe_rq_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) #define lpfc_rsrc_desc_fcfcoe_rq_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) #define lpfc_rsrc_desc_fcfcoe_rq_cnt_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) #define lpfc_rsrc_desc_fcfcoe_cq_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) #define lpfc_rsrc_desc_fcfcoe_cq_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) #define lpfc_rsrc_desc_fcfcoe_cq_cnt_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) #define lpfc_rsrc_desc_fcfcoe_vpi_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) #define lpfc_rsrc_desc_fcfcoe_vpi_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) #define lpfc_rsrc_desc_fcfcoe_vpi_cnt_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) #define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) #define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) #define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) #define lpfc_rsrc_desc_fcfcoe_vfi_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506) #define lpfc_rsrc_desc_fcfcoe_vfi_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) #define lpfc_rsrc_desc_fcfcoe_vfi_cnt_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) uint32_t word8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) uint32_t word11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) uint32_t word13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) #define lpfc_rsrc_desc_fcfcoe_lnk_nr_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) #define lpfc_rsrc_desc_fcfcoe_lnk_nr_MASK 0x0000003f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) #define lpfc_rsrc_desc_fcfcoe_lnk_nr_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) #define lpfc_rsrc_desc_fcfcoe_lnk_tp_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) #define lpfc_rsrc_desc_fcfcoe_lnk_tp_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) #define lpfc_rsrc_desc_fcfcoe_lnk_tp_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) #define lpfc_rsrc_desc_fcfcoe_lmc_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) #define lpfc_rsrc_desc_fcfcoe_lmc_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) #define lpfc_rsrc_desc_fcfcoe_lmc_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) #define lpfc_rsrc_desc_fcfcoe_lld_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) #define lpfc_rsrc_desc_fcfcoe_lld_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) #define lpfc_rsrc_desc_fcfcoe_lld_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) #define lpfc_rsrc_desc_fcfcoe_eq_cnt_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) #define lpfc_rsrc_desc_fcfcoe_eq_cnt_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) #define lpfc_rsrc_desc_fcfcoe_eq_cnt_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) /* extended FC/FCoE Resource Descriptor when length = 88 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) uint32_t bw_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) uint32_t bw_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) uint32_t iops_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) uint32_t iops_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) uint32_t reserved[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) struct lpfc_func_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) #define LPFC_RSRC_DESC_MAX_NUM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) uint32_t rsrc_desc_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) struct lpfc_mbx_get_func_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) #define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) #define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) #define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) struct lpfc_func_cfg func_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) struct lpfc_prof_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) #define LPFC_RSRC_DESC_MAX_NUM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) uint32_t rsrc_desc_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) struct lpfc_mbx_get_prof_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) #define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) #define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) #define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) #define lpfc_mbx_get_prof_cfg_prof_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) #define lpfc_mbx_get_prof_cfg_prof_id_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) #define lpfc_mbx_get_prof_cfg_prof_id_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) #define lpfc_mbx_get_prof_cfg_prof_tp_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) #define lpfc_mbx_get_prof_cfg_prof_tp_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) #define lpfc_mbx_get_prof_cfg_prof_tp_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) struct lpfc_prof_cfg prof_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) struct lpfc_controller_attribute {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) uint32_t version_string[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) uint32_t manufacturer_name[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) uint32_t supported_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) uint32_t word17;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) #define lpfc_cntl_attr_eprom_ver_lo_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) #define lpfc_cntl_attr_eprom_ver_lo_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) #define lpfc_cntl_attr_eprom_ver_lo_WORD word17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) #define lpfc_cntl_attr_eprom_ver_hi_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) #define lpfc_cntl_attr_eprom_ver_hi_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) #define lpfc_cntl_attr_eprom_ver_hi_WORD word17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) uint32_t mbx_da_struct_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) uint32_t ep_fw_da_struct_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) uint32_t ncsi_ver_str[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) uint32_t dflt_ext_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) uint32_t model_number[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) uint32_t description[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) uint32_t serial_number[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) uint32_t ip_ver_str[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) uint32_t fw_ver_str[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) uint32_t bios_ver_str[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) uint32_t redboot_ver_str[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) uint32_t driver_ver_str[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) uint32_t flash_fw_ver_str[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) uint32_t functionality;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) uint32_t word105;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) #define lpfc_cntl_attr_max_cbd_len_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) #define lpfc_cntl_attr_max_cbd_len_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) #define lpfc_cntl_attr_max_cbd_len_WORD word105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) #define lpfc_cntl_attr_asic_rev_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) #define lpfc_cntl_attr_asic_rev_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) #define lpfc_cntl_attr_asic_rev_WORD word105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) #define lpfc_cntl_attr_gen_guid0_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) #define lpfc_cntl_attr_gen_guid0_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) #define lpfc_cntl_attr_gen_guid0_WORD word105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) uint32_t gen_guid1_12[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) uint32_t word109;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) #define lpfc_cntl_attr_gen_guid13_14_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) #define lpfc_cntl_attr_gen_guid13_14_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) #define lpfc_cntl_attr_gen_guid13_14_WORD word109
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) #define lpfc_cntl_attr_gen_guid15_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) #define lpfc_cntl_attr_gen_guid15_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) #define lpfc_cntl_attr_gen_guid15_WORD word109
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) #define lpfc_cntl_attr_hba_port_cnt_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) #define lpfc_cntl_attr_hba_port_cnt_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) #define lpfc_cntl_attr_hba_port_cnt_WORD word109
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) uint32_t word110;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) #define lpfc_cntl_attr_dflt_lnk_tmo_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) #define lpfc_cntl_attr_dflt_lnk_tmo_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) #define lpfc_cntl_attr_dflt_lnk_tmo_WORD word110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) #define lpfc_cntl_attr_multi_func_dev_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) #define lpfc_cntl_attr_multi_func_dev_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) #define lpfc_cntl_attr_multi_func_dev_WORD word110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) uint32_t word111;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) #define lpfc_cntl_attr_cache_valid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) #define lpfc_cntl_attr_cache_valid_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) #define lpfc_cntl_attr_cache_valid_WORD word111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) #define lpfc_cntl_attr_hba_status_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) #define lpfc_cntl_attr_hba_status_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) #define lpfc_cntl_attr_hba_status_WORD word111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) #define lpfc_cntl_attr_max_domain_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) #define lpfc_cntl_attr_max_domain_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) #define lpfc_cntl_attr_max_domain_WORD word111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) #define lpfc_cntl_attr_lnk_numb_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) #define lpfc_cntl_attr_lnk_numb_MASK 0x0000003f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) #define lpfc_cntl_attr_lnk_numb_WORD word111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) #define lpfc_cntl_attr_lnk_type_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) #define lpfc_cntl_attr_lnk_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) #define lpfc_cntl_attr_lnk_type_WORD word111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) uint32_t fw_post_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) uint32_t hba_mtu[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) uint32_t word121;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) uint32_t reserved1[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) uint32_t word125;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) #define lpfc_cntl_attr_pci_vendor_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) #define lpfc_cntl_attr_pci_vendor_id_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) #define lpfc_cntl_attr_pci_vendor_id_WORD word125
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) #define lpfc_cntl_attr_pci_device_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) #define lpfc_cntl_attr_pci_device_id_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) #define lpfc_cntl_attr_pci_device_id_WORD word125
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) uint32_t word126;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) #define lpfc_cntl_attr_pci_subvdr_id_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) #define lpfc_cntl_attr_pci_subvdr_id_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) #define lpfc_cntl_attr_pci_subvdr_id_WORD word126
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) #define lpfc_cntl_attr_pci_subsys_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) #define lpfc_cntl_attr_pci_subsys_id_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) #define lpfc_cntl_attr_pci_subsys_id_WORD word126
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) uint32_t word127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) #define lpfc_cntl_attr_pci_bus_num_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) #define lpfc_cntl_attr_pci_bus_num_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) #define lpfc_cntl_attr_pci_bus_num_WORD word127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) #define lpfc_cntl_attr_pci_dev_num_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) #define lpfc_cntl_attr_pci_dev_num_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) #define lpfc_cntl_attr_pci_dev_num_WORD word127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) #define lpfc_cntl_attr_pci_fnc_num_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) #define lpfc_cntl_attr_pci_fnc_num_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) #define lpfc_cntl_attr_pci_fnc_num_WORD word127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) #define lpfc_cntl_attr_inf_type_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) #define lpfc_cntl_attr_inf_type_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) #define lpfc_cntl_attr_inf_type_WORD word127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) uint32_t unique_id[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) uint32_t word130;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) #define lpfc_cntl_attr_num_netfil_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) #define lpfc_cntl_attr_num_netfil_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) #define lpfc_cntl_attr_num_netfil_WORD word130
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) uint32_t reserved2[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) struct lpfc_mbx_get_cntl_attributes {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) union lpfc_sli4_cfg_shdr cfg_shdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) struct lpfc_controller_attribute cntl_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) struct lpfc_mbx_get_port_name {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) #define lpfc_mbx_get_port_name_lnk_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) #define lpfc_mbx_get_port_name_lnk_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) #define lpfc_mbx_get_port_name_lnk_type_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) #define lpfc_mbx_get_port_name_name0_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) #define lpfc_mbx_get_port_name_name0_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) #define lpfc_mbx_get_port_name_name0_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) #define lpfc_mbx_get_port_name_name1_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) #define lpfc_mbx_get_port_name_name1_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) #define lpfc_mbx_get_port_name_name1_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) #define lpfc_mbx_get_port_name_name2_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) #define lpfc_mbx_get_port_name_name2_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) #define lpfc_mbx_get_port_name_name2_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) #define lpfc_mbx_get_port_name_name3_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) #define lpfc_mbx_get_port_name_name3_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) #define lpfc_mbx_get_port_name_name3_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) #define LPFC_LINK_NUMBER_0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) #define LPFC_LINK_NUMBER_1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) #define LPFC_LINK_NUMBER_2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) #define LPFC_LINK_NUMBER_3 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) /* Mailbox Completion Queue Error Messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) #define MB_CQE_STATUS_SUCCESS 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) #define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) #define MB_CQE_STATUS_INVALID_PARAMETER 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) #define MB_CQE_STATUS_INSUFFICIENT_RESOURCES 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) #define MB_CEQ_STATUS_QUEUE_FLUSHING 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) #define MB_CQE_STATUS_DMA_FAILED 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) #define LPFC_MBX_WR_CONFIG_MAX_BDE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) struct lpfc_mbx_wr_object {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734) struct mbox_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) #define lpfc_wr_object_eof_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) #define lpfc_wr_object_eof_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) #define lpfc_wr_object_eof_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) #define lpfc_wr_object_eas_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) #define lpfc_wr_object_eas_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) #define lpfc_wr_object_eas_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) #define lpfc_wr_object_write_length_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) #define lpfc_wr_object_write_length_MASK 0x00FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) #define lpfc_wr_object_write_length_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) uint32_t write_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) uint32_t object_name[26];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) uint32_t bde_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) struct ulp_bde64 bde[LPFC_MBX_WR_CONFIG_MAX_BDE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) } request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) uint32_t actual_write_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) #define lpfc_wr_object_change_status_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) #define lpfc_wr_object_change_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) #define lpfc_wr_object_change_status_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) #define LPFC_CHANGE_STATUS_NO_RESET_NEEDED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) #define LPFC_CHANGE_STATUS_PHYS_DEV_RESET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) #define LPFC_CHANGE_STATUS_FW_RESET 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) #define LPFC_CHANGE_STATUS_PORT_MIGRATION 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) #define LPFC_CHANGE_STATUS_PCI_RESET 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) #define lpfc_wr_object_csf_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) #define lpfc_wr_object_csf_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) #define lpfc_wr_object_csf_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) } response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) /* mailbox queue entry structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) struct lpfc_mqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) #define lpfc_mqe_status_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) #define lpfc_mqe_status_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) #define lpfc_mqe_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) #define lpfc_mqe_command_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) #define lpfc_mqe_command_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) #define lpfc_mqe_command_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) uint32_t mb_words[LPFC_SLI4_MB_WORD_COUNT - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) /* sli4 mailbox commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) struct lpfc_mbx_sli4_config sli4_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) struct lpfc_mbx_init_vfi init_vfi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) struct lpfc_mbx_reg_vfi reg_vfi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) struct lpfc_mbx_reg_vfi unreg_vfi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) struct lpfc_mbx_init_vpi init_vpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) struct lpfc_mbx_resume_rpi resume_rpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) struct lpfc_mbx_read_fcf_tbl read_fcf_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) struct lpfc_mbx_add_fcf_tbl_entry add_fcf_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) struct lpfc_mbx_del_fcf_tbl_entry del_fcf_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) struct lpfc_mbx_redisc_fcf_tbl redisc_fcf_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) struct lpfc_mbx_reg_fcfi reg_fcfi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) struct lpfc_mbx_reg_fcfi_mrq reg_fcfi_mrq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) struct lpfc_mbx_unreg_fcfi unreg_fcfi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) struct lpfc_mbx_mq_create mq_create;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) struct lpfc_mbx_mq_create_ext mq_create_ext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) struct lpfc_mbx_eq_create eq_create;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) struct lpfc_mbx_modify_eq_delay eq_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) struct lpfc_mbx_cq_create cq_create;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) struct lpfc_mbx_cq_create_set cq_create_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) struct lpfc_mbx_wq_create wq_create;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) struct lpfc_mbx_rq_create rq_create;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) struct lpfc_mbx_rq_create_v2 rq_create_v2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) struct lpfc_mbx_mq_destroy mq_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) struct lpfc_mbx_eq_destroy eq_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) struct lpfc_mbx_cq_destroy cq_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) struct lpfc_mbx_wq_destroy wq_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) struct lpfc_mbx_rq_destroy rq_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809) struct lpfc_mbx_get_rsrc_extent_info rsrc_extent_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) struct lpfc_mbx_alloc_rsrc_extents alloc_rsrc_extents;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) struct lpfc_mbx_dealloc_rsrc_extents dealloc_rsrc_extents;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) struct lpfc_mbx_post_sgl_pages post_sgl_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) struct lpfc_mbx_nembed_cmd nembed_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) struct lpfc_mbx_read_rev read_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) struct lpfc_mbx_read_vpi read_vpi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) struct lpfc_mbx_read_config rd_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) struct lpfc_mbx_request_features req_ftrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) struct lpfc_mbx_post_hdr_tmpl hdr_tmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) struct lpfc_mbx_query_fw_config query_fw_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) struct lpfc_mbx_set_beacon_config beacon_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) struct lpfc_mbx_get_sli4_parameters get_sli4_parameters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) struct lpfc_mbx_set_link_diag_state link_diag_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) struct lpfc_mbx_set_link_diag_loopback link_diag_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) struct lpfc_mbx_run_link_diag_test link_diag_test;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) struct lpfc_mbx_get_func_cfg get_func_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) struct lpfc_mbx_get_prof_cfg get_prof_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) struct lpfc_mbx_wr_object wr_object;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) struct lpfc_mbx_get_port_name get_port_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) struct lpfc_mbx_set_feature set_feature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) struct lpfc_mbx_memory_dump_type3 mem_dump_type3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) struct lpfc_mbx_set_host_data set_host_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) struct lpfc_mbx_set_trunk_mode set_trunk_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833) struct lpfc_mbx_nop nop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) struct lpfc_mbx_set_ras_fwlog ras_fwlog;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) } un;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) struct lpfc_mcqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) #define lpfc_mcqe_status_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) #define lpfc_mcqe_status_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) #define lpfc_mcqe_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) #define lpfc_mcqe_ext_status_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) #define lpfc_mcqe_ext_status_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) #define lpfc_mcqe_ext_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) uint32_t mcqe_tag0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) uint32_t mcqe_tag1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) uint32_t trailer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) #define lpfc_trailer_valid_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) #define lpfc_trailer_valid_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) #define lpfc_trailer_valid_WORD trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) #define lpfc_trailer_async_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) #define lpfc_trailer_async_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) #define lpfc_trailer_async_WORD trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) #define lpfc_trailer_hpi_SHIFT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) #define lpfc_trailer_hpi_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) #define lpfc_trailer_hpi_WORD trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) #define lpfc_trailer_completed_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) #define lpfc_trailer_completed_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) #define lpfc_trailer_completed_WORD trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) #define lpfc_trailer_consumed_SHIFT 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) #define lpfc_trailer_consumed_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) #define lpfc_trailer_consumed_WORD trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) #define lpfc_trailer_type_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) #define lpfc_trailer_type_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) #define lpfc_trailer_type_WORD trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) #define lpfc_trailer_code_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) #define lpfc_trailer_code_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) #define lpfc_trailer_code_WORD trailer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) #define LPFC_TRAILER_CODE_LINK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) #define LPFC_TRAILER_CODE_FCOE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) #define LPFC_TRAILER_CODE_DCBX 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) #define LPFC_TRAILER_CODE_GRP5 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) #define LPFC_TRAILER_CODE_FC 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) #define LPFC_TRAILER_CODE_SLI 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) struct lpfc_acqe_link {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) #define lpfc_acqe_link_speed_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) #define lpfc_acqe_link_speed_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) #define lpfc_acqe_link_speed_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) #define LPFC_ASYNC_LINK_SPEED_ZERO 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) #define LPFC_ASYNC_LINK_SPEED_10MBPS 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) #define LPFC_ASYNC_LINK_SPEED_100MBPS 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) #define LPFC_ASYNC_LINK_SPEED_1GBPS 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) #define LPFC_ASYNC_LINK_SPEED_10GBPS 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) #define LPFC_ASYNC_LINK_SPEED_20GBPS 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889) #define LPFC_ASYNC_LINK_SPEED_25GBPS 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) #define LPFC_ASYNC_LINK_SPEED_40GBPS 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) #define LPFC_ASYNC_LINK_SPEED_100GBPS 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) #define lpfc_acqe_link_duplex_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) #define lpfc_acqe_link_duplex_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) #define lpfc_acqe_link_duplex_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) #define LPFC_ASYNC_LINK_DUPLEX_NONE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) #define LPFC_ASYNC_LINK_DUPLEX_HALF 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897) #define LPFC_ASYNC_LINK_DUPLEX_FULL 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) #define lpfc_acqe_link_status_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) #define lpfc_acqe_link_status_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) #define lpfc_acqe_link_status_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) #define LPFC_ASYNC_LINK_STATUS_DOWN 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) #define LPFC_ASYNC_LINK_STATUS_UP 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) #define LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) #define LPFC_ASYNC_LINK_STATUS_LOGICAL_UP 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) #define lpfc_acqe_link_type_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) #define lpfc_acqe_link_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) #define lpfc_acqe_link_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) #define lpfc_acqe_link_number_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) #define lpfc_acqe_link_number_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) #define lpfc_acqe_link_number_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) #define lpfc_acqe_link_fault_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) #define lpfc_acqe_link_fault_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) #define lpfc_acqe_link_fault_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) #define LPFC_ASYNC_LINK_FAULT_NONE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) #define LPFC_ASYNC_LINK_FAULT_LOCAL 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) #define LPFC_ASYNC_LINK_FAULT_REMOTE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) #define LPFC_ASYNC_LINK_FAULT_LR_LRR 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) #define lpfc_acqe_logical_link_speed_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920) #define lpfc_acqe_logical_link_speed_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) #define lpfc_acqe_logical_link_speed_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) uint32_t event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923) uint32_t trailer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) #define LPFC_LINK_EVENT_TYPE_PHYSICAL 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) #define LPFC_LINK_EVENT_TYPE_VIRTUAL 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) struct lpfc_acqe_fip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) uint32_t index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) #define lpfc_acqe_fip_fcf_count_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) #define lpfc_acqe_fip_fcf_count_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) #define lpfc_acqe_fip_fcf_count_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) #define lpfc_acqe_fip_event_type_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935) #define lpfc_acqe_fip_event_type_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) #define lpfc_acqe_fip_event_type_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) uint32_t event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) uint32_t trailer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) #define LPFC_FIP_EVENT_TYPE_NEW_FCF 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) #define LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) #define LPFC_FIP_EVENT_TYPE_FCF_DEAD 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942) #define LPFC_FIP_EVENT_TYPE_CVL 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) #define LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946) struct lpfc_acqe_dcbx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) uint32_t tlv_ttl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948) uint32_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) uint32_t event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) uint32_t trailer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) struct lpfc_acqe_grp5 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) #define lpfc_acqe_grp5_type_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) #define lpfc_acqe_grp5_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) #define lpfc_acqe_grp5_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958) #define lpfc_acqe_grp5_number_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) #define lpfc_acqe_grp5_number_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) #define lpfc_acqe_grp5_number_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) #define lpfc_acqe_grp5_llink_spd_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963) #define lpfc_acqe_grp5_llink_spd_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) #define lpfc_acqe_grp5_llink_spd_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) uint32_t event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) uint32_t trailer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) extern const char *const trunk_errmsg[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) struct lpfc_acqe_fc_la {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973) #define lpfc_acqe_fc_la_speed_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) #define lpfc_acqe_fc_la_speed_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975) #define lpfc_acqe_fc_la_speed_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) #define LPFC_FC_LA_SPEED_UNKNOWN 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) #define LPFC_FC_LA_SPEED_1G 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978) #define LPFC_FC_LA_SPEED_2G 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) #define LPFC_FC_LA_SPEED_4G 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) #define LPFC_FC_LA_SPEED_8G 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) #define LPFC_FC_LA_SPEED_10G 0xA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) #define LPFC_FC_LA_SPEED_16G 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983) #define LPFC_FC_LA_SPEED_32G 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984) #define LPFC_FC_LA_SPEED_64G 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) #define LPFC_FC_LA_SPEED_128G 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) #define LPFC_FC_LA_SPEED_256G 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987) #define lpfc_acqe_fc_la_topology_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) #define lpfc_acqe_fc_la_topology_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) #define lpfc_acqe_fc_la_topology_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) #define LPFC_FC_LA_TOP_UNKOWN 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) #define LPFC_FC_LA_TOP_P2P 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) #define LPFC_FC_LA_TOP_FCAL 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) #define LPFC_FC_LA_TOP_INTERNAL_LOOP 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) #define LPFC_FC_LA_TOP_SERDES_LOOP 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) #define lpfc_acqe_fc_la_att_type_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) #define lpfc_acqe_fc_la_att_type_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997) #define lpfc_acqe_fc_la_att_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998) #define LPFC_FC_LA_TYPE_LINK_UP 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) #define LPFC_FC_LA_TYPE_LINK_DOWN 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) #define LPFC_FC_LA_TYPE_NO_HARD_ALPA 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001) #define LPFC_FC_LA_TYPE_MDS_LINK_DOWN 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) #define LPFC_FC_LA_TYPE_MDS_LOOPBACK 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) #define LPFC_FC_LA_TYPE_UNEXP_WWPN 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) #define LPFC_FC_LA_TYPE_TRUNKING_EVENT 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) #define lpfc_acqe_fc_la_port_type_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) #define lpfc_acqe_fc_la_port_type_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) #define lpfc_acqe_fc_la_port_type_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008) #define LPFC_LINK_TYPE_ETHERNET 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) #define LPFC_LINK_TYPE_FC 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010) #define lpfc_acqe_fc_la_port_number_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) #define lpfc_acqe_fc_la_port_number_MASK 0x0000003F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) #define lpfc_acqe_fc_la_port_number_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) /* Attention Type is 0x07 (Trunking Event) word0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) #define lpfc_acqe_fc_la_trunk_link_status_port0_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016) #define lpfc_acqe_fc_la_trunk_link_status_port0_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) #define lpfc_acqe_fc_la_trunk_link_status_port0_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) #define lpfc_acqe_fc_la_trunk_link_status_port1_SHIFT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) #define lpfc_acqe_fc_la_trunk_link_status_port1_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020) #define lpfc_acqe_fc_la_trunk_link_status_port1_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021) #define lpfc_acqe_fc_la_trunk_link_status_port2_SHIFT 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) #define lpfc_acqe_fc_la_trunk_link_status_port2_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) #define lpfc_acqe_fc_la_trunk_link_status_port2_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) #define lpfc_acqe_fc_la_trunk_link_status_port3_SHIFT 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) #define lpfc_acqe_fc_la_trunk_link_status_port3_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) #define lpfc_acqe_fc_la_trunk_link_status_port3_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027) #define lpfc_acqe_fc_la_trunk_config_port0_SHIFT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) #define lpfc_acqe_fc_la_trunk_config_port0_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) #define lpfc_acqe_fc_la_trunk_config_port0_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030) #define lpfc_acqe_fc_la_trunk_config_port1_SHIFT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) #define lpfc_acqe_fc_la_trunk_config_port1_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032) #define lpfc_acqe_fc_la_trunk_config_port1_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) #define lpfc_acqe_fc_la_trunk_config_port2_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034) #define lpfc_acqe_fc_la_trunk_config_port2_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) #define lpfc_acqe_fc_la_trunk_config_port2_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) #define lpfc_acqe_fc_la_trunk_config_port3_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) #define lpfc_acqe_fc_la_trunk_config_port3_MASK 0x0000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) #define lpfc_acqe_fc_la_trunk_config_port3_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) #define lpfc_acqe_fc_la_llink_spd_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) #define lpfc_acqe_fc_la_llink_spd_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) #define lpfc_acqe_fc_la_llink_spd_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043) #define lpfc_acqe_fc_la_fault_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) #define lpfc_acqe_fc_la_fault_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) #define lpfc_acqe_fc_la_fault_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) #define lpfc_acqe_fc_la_trunk_fault_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047) #define lpfc_acqe_fc_la_trunk_fault_MASK 0x0000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) #define lpfc_acqe_fc_la_trunk_fault_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) #define lpfc_acqe_fc_la_trunk_linkmask_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) #define lpfc_acqe_fc_la_trunk_linkmask_MASK 0x000000F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051) #define lpfc_acqe_fc_la_trunk_linkmask_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) #define LPFC_FC_LA_FAULT_NONE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) #define LPFC_FC_LA_FAULT_LOCAL 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) #define LPFC_FC_LA_FAULT_REMOTE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) uint32_t event_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) uint32_t trailer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) #define LPFC_FC_LA_EVENT_TYPE_FC_LINK 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) #define LPFC_FC_LA_EVENT_TYPE_SHARED_LINK 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) struct lpfc_acqe_misconfigured_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) uint32_t word0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) #define lpfc_sli_misconfigured_port0_state_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065) #define lpfc_sli_misconfigured_port0_state_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) #define lpfc_sli_misconfigured_port0_state_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067) #define lpfc_sli_misconfigured_port1_state_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) #define lpfc_sli_misconfigured_port1_state_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) #define lpfc_sli_misconfigured_port1_state_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) #define lpfc_sli_misconfigured_port2_state_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) #define lpfc_sli_misconfigured_port2_state_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072) #define lpfc_sli_misconfigured_port2_state_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073) #define lpfc_sli_misconfigured_port3_state_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) #define lpfc_sli_misconfigured_port3_state_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075) #define lpfc_sli_misconfigured_port3_state_WORD word0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077) #define lpfc_sli_misconfigured_port0_op_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) #define lpfc_sli_misconfigured_port0_op_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) #define lpfc_sli_misconfigured_port0_op_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) #define lpfc_sli_misconfigured_port0_severity_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) #define lpfc_sli_misconfigured_port0_severity_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082) #define lpfc_sli_misconfigured_port0_severity_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) #define lpfc_sli_misconfigured_port1_op_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) #define lpfc_sli_misconfigured_port1_op_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) #define lpfc_sli_misconfigured_port1_op_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086) #define lpfc_sli_misconfigured_port1_severity_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) #define lpfc_sli_misconfigured_port1_severity_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088) #define lpfc_sli_misconfigured_port1_severity_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089) #define lpfc_sli_misconfigured_port2_op_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090) #define lpfc_sli_misconfigured_port2_op_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) #define lpfc_sli_misconfigured_port2_op_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) #define lpfc_sli_misconfigured_port2_severity_SHIFT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093) #define lpfc_sli_misconfigured_port2_severity_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) #define lpfc_sli_misconfigured_port2_severity_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) #define lpfc_sli_misconfigured_port3_op_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) #define lpfc_sli_misconfigured_port3_op_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) #define lpfc_sli_misconfigured_port3_op_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) #define lpfc_sli_misconfigured_port3_severity_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) #define lpfc_sli_misconfigured_port3_severity_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) #define lpfc_sli_misconfigured_port3_severity_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) } theEvent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) #define LPFC_SLI_EVENT_STATUS_VALID 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) #define LPFC_SLI_EVENT_STATUS_NOT_PRESENT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) #define LPFC_SLI_EVENT_STATUS_WRONG_TYPE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105) #define LPFC_SLI_EVENT_STATUS_UNSUPPORTED 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106) #define LPFC_SLI_EVENT_STATUS_UNQUALIFIED 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) #define LPFC_SLI_EVENT_STATUS_UNCERTIFIED 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110) struct lpfc_acqe_sli {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) uint32_t event_data1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) uint32_t event_data2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) uint32_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) uint32_t trailer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) #define LPFC_SLI_EVENT_TYPE_PORT_ERROR 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) #define LPFC_SLI_EVENT_TYPE_OVER_TEMP 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117) #define LPFC_SLI_EVENT_TYPE_NORM_TEMP 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118) #define LPFC_SLI_EVENT_TYPE_NVLOG_POST 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) #define LPFC_SLI_EVENT_TYPE_DIAG_DUMP 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) #define LPFC_SLI_EVENT_TYPE_MISCONFIGURED 0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121) #define LPFC_SLI_EVENT_TYPE_REMOTE_DPORT 0xA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) #define LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN 0xF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) #define LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127) * Define the bootstrap mailbox (bmbx) region used to communicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) * mailbox command between the host and port. The mailbox consists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129) * of a payload area of 256 bytes and a completion queue of length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130) * 16 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) struct lpfc_bmbx_create {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) struct lpfc_mqe mqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134) struct lpfc_mcqe mcqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) #define SGL_ALIGN_SZ 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138) #define SGL_PAGE_SIZE 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) /* align SGL addr on a size boundary - adjust address up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) #define NO_XRI 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) struct wqe_common {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) uint32_t word6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) #define wqe_xri_tag_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) #define wqe_xri_tag_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) #define wqe_xri_tag_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) #define wqe_ctxt_tag_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148) #define wqe_ctxt_tag_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) #define wqe_ctxt_tag_WORD word6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150) uint32_t word7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) #define wqe_dif_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) #define wqe_dif_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) #define wqe_dif_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) #define LPFC_WQE_DIF_PASSTHRU 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155) #define LPFC_WQE_DIF_STRIP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) #define LPFC_WQE_DIF_INSERT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) #define wqe_ct_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) #define wqe_ct_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159) #define wqe_ct_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) #define wqe_status_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) #define wqe_status_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162) #define wqe_status_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) #define wqe_cmnd_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) #define wqe_cmnd_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) #define wqe_cmnd_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) #define wqe_class_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167) #define wqe_class_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) #define wqe_class_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169) #define wqe_ar_SHIFT 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170) #define wqe_ar_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171) #define wqe_ar_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) #define wqe_ag_SHIFT wqe_ar_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) #define wqe_ag_MASK wqe_ar_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) #define wqe_ag_WORD wqe_ar_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) #define wqe_pu_SHIFT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) #define wqe_pu_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177) #define wqe_pu_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) #define wqe_erp_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179) #define wqe_erp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) #define wqe_erp_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) #define wqe_conf_SHIFT wqe_erp_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) #define wqe_conf_MASK wqe_erp_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) #define wqe_conf_WORD wqe_erp_WORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) #define wqe_lnk_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) #define wqe_lnk_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) #define wqe_lnk_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187) #define wqe_tmo_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) #define wqe_tmo_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) #define wqe_tmo_WORD word7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) uint32_t abort_tag; /* word 8 in WQE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) uint32_t word9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) #define wqe_reqtag_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) #define wqe_reqtag_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) #define wqe_reqtag_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) #define wqe_temp_rpi_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) #define wqe_temp_rpi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197) #define wqe_temp_rpi_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) #define wqe_rcvoxid_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) #define wqe_rcvoxid_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) #define wqe_rcvoxid_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) #define wqe_sof_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) #define wqe_sof_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) #define wqe_sof_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) #define wqe_eof_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) #define wqe_eof_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) #define wqe_eof_WORD word9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) uint32_t word10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) #define wqe_ebde_cnt_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) #define wqe_ebde_cnt_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210) #define wqe_ebde_cnt_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) #define wqe_nvme_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) #define wqe_nvme_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) #define wqe_nvme_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214) #define wqe_oas_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) #define wqe_oas_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216) #define wqe_oas_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) #define wqe_lenloc_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) #define wqe_lenloc_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) #define wqe_lenloc_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) #define LPFC_WQE_LENLOC_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221) #define LPFC_WQE_LENLOC_WORD3 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) #define LPFC_WQE_LENLOC_WORD12 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223) #define LPFC_WQE_LENLOC_WORD4 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) #define wqe_qosd_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) #define wqe_qosd_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226) #define wqe_qosd_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227) #define wqe_xbl_SHIFT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) #define wqe_xbl_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229) #define wqe_xbl_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) #define wqe_iod_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231) #define wqe_iod_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) #define wqe_iod_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233) #define LPFC_WQE_IOD_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234) #define LPFC_WQE_IOD_WRITE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) #define LPFC_WQE_IOD_READ 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) #define wqe_dbde_SHIFT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) #define wqe_dbde_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238) #define wqe_dbde_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) #define wqe_wqes_SHIFT 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) #define wqe_wqes_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241) #define wqe_wqes_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242) /* Note that this field overlaps above fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) #define wqe_wqid_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244) #define wqe_wqid_MASK 0x00007fff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) #define wqe_wqid_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246) #define wqe_pri_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247) #define wqe_pri_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248) #define wqe_pri_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249) #define wqe_pv_SHIFT 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) #define wqe_pv_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251) #define wqe_pv_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252) #define wqe_xc_SHIFT 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253) #define wqe_xc_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254) #define wqe_xc_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) #define wqe_sr_SHIFT 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) #define wqe_sr_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) #define wqe_sr_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) #define wqe_ccpe_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259) #define wqe_ccpe_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260) #define wqe_ccpe_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261) #define wqe_ccp_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) #define wqe_ccp_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263) #define wqe_ccp_WORD word10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264) uint32_t word11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265) #define wqe_cmd_type_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266) #define wqe_cmd_type_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267) #define wqe_cmd_type_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268) #define wqe_els_id_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269) #define wqe_els_id_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270) #define wqe_els_id_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) #define LPFC_ELS_ID_FLOGI 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) #define LPFC_ELS_ID_FDISC 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273) #define LPFC_ELS_ID_LOGO 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274) #define LPFC_ELS_ID_DEFAULT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275) #define wqe_irsp_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276) #define wqe_irsp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277) #define wqe_irsp_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278) #define wqe_pbde_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279) #define wqe_pbde_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) #define wqe_pbde_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281) #define wqe_sup_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) #define wqe_sup_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283) #define wqe_sup_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) #define wqe_wqec_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285) #define wqe_wqec_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286) #define wqe_wqec_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) #define wqe_irsplen_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288) #define wqe_irsplen_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289) #define wqe_irsplen_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) #define wqe_cqid_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) #define wqe_cqid_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292) #define wqe_cqid_WORD word11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) #define LPFC_WQE_CQ_ID_DEFAULT 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) struct wqe_did {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298) #define wqe_els_did_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299) #define wqe_els_did_MASK 0x00FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) #define wqe_els_did_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) #define wqe_xmit_bls_pt_SHIFT 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302) #define wqe_xmit_bls_pt_MASK 0x00000003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303) #define wqe_xmit_bls_pt_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) #define wqe_xmit_bls_ar_SHIFT 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305) #define wqe_xmit_bls_ar_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) #define wqe_xmit_bls_ar_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) #define wqe_xmit_bls_xo_SHIFT 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308) #define wqe_xmit_bls_xo_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) #define wqe_xmit_bls_xo_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312) struct lpfc_wqe_generic{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317) struct wqe_common wqe_com;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) uint32_t payload[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) struct els_request64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323) uint32_t payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) #define els_req64_sid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326) #define els_req64_sid_MASK 0x00FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) #define els_req64_sid_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328) #define els_req64_sp_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329) #define els_req64_sp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330) #define els_req64_sp_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331) #define els_req64_vf_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332) #define els_req64_vf_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333) #define els_req64_vf_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334) struct wqe_did wqe_dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337) #define els_req64_vfid_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) #define els_req64_vfid_MASK 0x00000FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339) #define els_req64_vfid_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) #define els_req64_pri_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341) #define els_req64_pri_MASK 0x00000007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) #define els_req64_pri_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343) uint32_t word13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344) #define els_req64_hopcnt_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345) #define els_req64_hopcnt_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) #define els_req64_hopcnt_WORD word13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347) uint32_t word14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348) uint32_t max_response_payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351) struct xmit_els_rsp64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) uint32_t response_payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355) #define els_rsp64_sid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) #define els_rsp64_sid_MASK 0x00FFFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) #define els_rsp64_sid_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358) #define els_rsp64_sp_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) #define els_rsp64_sp_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360) #define els_rsp64_sp_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) struct wqe_did wqe_dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) #define wqe_rsp_temp_rpi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) #define wqe_rsp_temp_rpi_MASK 0x0000FFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) #define wqe_rsp_temp_rpi_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) uint32_t rsvd_13_15[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) struct xmit_bls_rsp64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371) uint32_t payload0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372) /* Payload0 for BA_ACC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) #define xmit_bls_rsp64_acc_seq_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374) #define xmit_bls_rsp64_acc_seq_id_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) #define xmit_bls_rsp64_acc_seq_id_WORD payload0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376) #define xmit_bls_rsp64_acc_seq_id_vald_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) #define xmit_bls_rsp64_acc_seq_id_vald_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378) #define xmit_bls_rsp64_acc_seq_id_vald_WORD payload0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379) /* Payload0 for BA_RJT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380) #define xmit_bls_rsp64_rjt_vspec_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) #define xmit_bls_rsp64_rjt_vspec_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382) #define xmit_bls_rsp64_rjt_vspec_WORD payload0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) #define xmit_bls_rsp64_rjt_expc_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384) #define xmit_bls_rsp64_rjt_expc_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385) #define xmit_bls_rsp64_rjt_expc_WORD payload0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386) #define xmit_bls_rsp64_rjt_rsnc_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387) #define xmit_bls_rsp64_rjt_rsnc_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388) #define xmit_bls_rsp64_rjt_rsnc_WORD payload0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390) #define xmit_bls_rsp64_rxid_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391) #define xmit_bls_rsp64_rxid_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392) #define xmit_bls_rsp64_rxid_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393) #define xmit_bls_rsp64_oxid_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394) #define xmit_bls_rsp64_oxid_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395) #define xmit_bls_rsp64_oxid_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397) #define xmit_bls_rsp64_seqcnthi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398) #define xmit_bls_rsp64_seqcnthi_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) #define xmit_bls_rsp64_seqcnthi_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400) #define xmit_bls_rsp64_seqcntlo_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401) #define xmit_bls_rsp64_seqcntlo_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) #define xmit_bls_rsp64_seqcntlo_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) uint32_t rsrvd3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) uint32_t rsrvd4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405) struct wqe_did wqe_dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) uint32_t word12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408) #define xmit_bls_rsp64_temprpi_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409) #define xmit_bls_rsp64_temprpi_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) #define xmit_bls_rsp64_temprpi_WORD word12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411) uint32_t rsvd_13_15[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414) struct wqe_rctl_dfctl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416) #define wqe_si_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) #define wqe_si_MASK 0x000000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) #define wqe_si_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) #define wqe_la_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420) #define wqe_la_MASK 0x000000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421) #define wqe_la_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) #define wqe_xo_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423) #define wqe_xo_MASK 0x000000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) #define wqe_xo_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) #define wqe_ls_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426) #define wqe_ls_MASK 0x000000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) #define wqe_ls_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) #define wqe_dfctl_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429) #define wqe_dfctl_MASK 0x0000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430) #define wqe_dfctl_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) #define wqe_type_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) #define wqe_type_MASK 0x0000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433) #define wqe_type_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434) #define wqe_rctl_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435) #define wqe_rctl_MASK 0x0000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436) #define wqe_rctl_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439) struct xmit_seq64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441) uint32_t rsvd3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442) uint32_t relative_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443) struct wqe_rctl_dfctl wge_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) uint32_t xmit_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446) uint32_t rsvd_12_15[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448) struct xmit_bcast64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450) uint32_t seq_payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451) uint32_t rsvd4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452) struct wqe_rctl_dfctl wge_ctl; /* word 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) uint32_t rsvd_12_15[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457) struct gen_req64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459) uint32_t request_payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) uint32_t relative_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461) struct wqe_rctl_dfctl wge_ctl; /* word 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) uint32_t rsvd_12_14[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464) uint32_t max_response_payload_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) /* Define NVME PRLI request to fabric. NVME is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) * fabric-only protocol.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469) * Updated to red-lined v1.08 on Sept 16, 2016
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) struct lpfc_nvme_prli {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) uint32_t word1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) /* The Response Code is defined in the FCP PRLI lpfc_hw.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474) #define prli_acc_rsp_code_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475) #define prli_acc_rsp_code_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) #define prli_acc_rsp_code_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477) #define prli_estabImagePair_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478) #define prli_estabImagePair_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479) #define prli_estabImagePair_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480) #define prli_type_code_ext_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) #define prli_type_code_ext_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) #define prli_type_code_ext_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483) #define prli_type_code_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) #define prli_type_code_MASK 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485) #define prli_type_code_WORD word1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486) uint32_t word_rsvd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487) uint32_t word_rsvd3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489) uint32_t word4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) #define prli_fba_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491) #define prli_fba_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492) #define prli_fba_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493) #define prli_disc_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494) #define prli_disc_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495) #define prli_disc_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) #define prli_tgt_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497) #define prli_tgt_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498) #define prli_tgt_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) #define prli_init_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) #define prli_init_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501) #define prli_init_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) #define prli_conf_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) #define prli_conf_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504) #define prli_conf_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505) #define prli_nsler_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) #define prli_nsler_MASK 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507) #define prli_nsler_WORD word4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) uint32_t word5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509) #define prli_fb_sz_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510) #define prli_fb_sz_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511) #define prli_fb_sz_WORD word5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512) #define LPFC_NVMET_FB_SZ_MAX 65536 /* Driver target mode only. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515) struct create_xri_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) uint32_t rsrvd[5]; /* words 0-4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517) struct wqe_did wqe_dest; /* word 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) uint32_t rsvd_12_15[4]; /* word 12-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522) #define INHIBIT_ABORT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523) #define T_REQUEST_TAG 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524) #define T_XRI_TAG 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) struct abort_cmd_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527) uint32_t rsrvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529) #define abort_cmd_ia_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) #define abort_cmd_ia_MASK 0x000000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531) #define abort_cmd_ia_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) #define abort_cmd_criteria_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533) #define abort_cmd_criteria_MASK 0x0000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) #define abort_cmd_criteria_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535) uint32_t rsrvd4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) uint32_t rsrvd5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538) uint32_t rsvd_12_15[4]; /* word 12-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) struct fcp_iwrite64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) #define cmd_buff_len_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545) #define cmd_buff_len_MASK 0x00000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546) #define cmd_buff_len_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547) #define payload_offset_len_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548) #define payload_offset_len_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549) #define payload_offset_len_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) uint32_t total_xfer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) uint32_t initial_xfer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553) uint32_t rsrvd12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) struct ulp_bde64 ph_bde; /* words 13-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557) struct fcp_iread64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) #define cmd_buff_len_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561) #define cmd_buff_len_MASK 0x00000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562) #define cmd_buff_len_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4563) #define payload_offset_len_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4564) #define payload_offset_len_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4565) #define payload_offset_len_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4566) uint32_t total_xfer_len; /* word 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4567) uint32_t rsrvd5; /* word 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4568) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4569) uint32_t rsrvd12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4570) struct ulp_bde64 ph_bde; /* words 13-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4573) struct fcp_icmnd64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4574) struct ulp_bde64 bde; /* words 0-2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4575) uint32_t word3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4576) #define cmd_buff_len_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4577) #define cmd_buff_len_MASK 0x00000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4578) #define cmd_buff_len_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4579) #define payload_offset_len_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4580) #define payload_offset_len_MASK 0x0000ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4581) #define payload_offset_len_WORD word3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4582) uint32_t rsrvd4; /* word 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4583) uint32_t rsrvd5; /* word 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4584) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4585) uint32_t rsvd_12_15[4]; /* word 12-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4586) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4588) struct fcp_trsp64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4589) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4590) uint32_t response_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4591) uint32_t rsvd_4_5[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4592) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4593) uint32_t rsvd_12_15[4]; /* word 12-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4594) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4596) struct fcp_tsend64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4597) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4598) uint32_t payload_offset_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4599) uint32_t relative_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4600) uint32_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4601) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4602) uint32_t fcp_data_len; /* word 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4603) uint32_t rsvd_13_15[3]; /* word 13-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4604) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4606) struct fcp_treceive64_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4607) struct ulp_bde64 bde;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4608) uint32_t payload_offset_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4609) uint32_t relative_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4610) uint32_t reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4611) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4612) uint32_t fcp_data_len; /* word 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4613) uint32_t rsvd_13_15[3]; /* word 13-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4614) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4615) #define TXRDY_PAYLOAD_LEN 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4617) #define CMD_SEND_FRAME 0xE1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4619) struct send_frame_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4620) struct ulp_bde64 bde; /* words 0-2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4621) uint32_t frame_len; /* word 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4622) uint32_t fc_hdr_wd0; /* word 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4623) uint32_t fc_hdr_wd1; /* word 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4624) struct wqe_common wqe_com; /* words 6-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4625) uint32_t fc_hdr_wd2; /* word 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4626) uint32_t fc_hdr_wd3; /* word 13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4627) uint32_t fc_hdr_wd4; /* word 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4628) uint32_t fc_hdr_wd5; /* word 15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4629) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4631) #define ELS_RDF_REG_TAG_CNT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4632) struct lpfc_els_rdf_reg_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4633) struct fc_df_desc_fpin_reg reg_desc; /* descriptor header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4634) __be32 desc_tags[ELS_RDF_REG_TAG_CNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4635) /* tags in reg_desc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4636) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4638) struct lpfc_els_rdf_req {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4639) struct fc_els_rdf rdf; /* hdr up to descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4640) struct lpfc_els_rdf_reg_desc reg_d1; /* 1st descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4641) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4643) struct lpfc_els_rdf_rsp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4644) struct fc_els_rdf_resp rdf_resp; /* hdr up to descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4645) struct lpfc_els_rdf_reg_desc reg_d1; /* 1st descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4646) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4648) union lpfc_wqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4649) uint32_t words[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4650) struct lpfc_wqe_generic generic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4651) struct fcp_icmnd64_wqe fcp_icmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4652) struct fcp_iread64_wqe fcp_iread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4653) struct fcp_iwrite64_wqe fcp_iwrite;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4654) struct abort_cmd_wqe abort_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4655) struct create_xri_wqe create_xri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4656) struct xmit_bcast64_wqe xmit_bcast64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4657) struct xmit_seq64_wqe xmit_sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4658) struct xmit_bls_rsp64_wqe xmit_bls_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4659) struct xmit_els_rsp64_wqe xmit_els_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4660) struct els_request64_wqe els_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4661) struct gen_req64_wqe gen_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4662) struct fcp_trsp64_wqe fcp_trsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4663) struct fcp_tsend64_wqe fcp_tsend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4664) struct fcp_treceive64_wqe fcp_treceive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4665) struct send_frame_wqe send_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4666) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4668) union lpfc_wqe128 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4669) uint32_t words[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4670) struct lpfc_wqe_generic generic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4671) struct fcp_icmnd64_wqe fcp_icmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4672) struct fcp_iread64_wqe fcp_iread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4673) struct fcp_iwrite64_wqe fcp_iwrite;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4674) struct abort_cmd_wqe abort_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4675) struct create_xri_wqe create_xri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4676) struct xmit_bcast64_wqe xmit_bcast64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4677) struct xmit_seq64_wqe xmit_sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4678) struct xmit_bls_rsp64_wqe xmit_bls_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4679) struct xmit_els_rsp64_wqe xmit_els_rsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4680) struct els_request64_wqe els_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4681) struct gen_req64_wqe gen_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4682) struct fcp_trsp64_wqe fcp_trsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4683) struct fcp_tsend64_wqe fcp_tsend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4684) struct fcp_treceive64_wqe fcp_treceive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4685) struct send_frame_wqe send_frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4686) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4688) #define MAGIC_NUMBER_G6 0xFEAA0003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4689) #define MAGIC_NUMBER_G7 0xFEAA0005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4691) struct lpfc_grp_hdr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4692) uint32_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4693) uint32_t magic_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4694) uint32_t word2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4695) #define lpfc_grp_hdr_file_type_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4696) #define lpfc_grp_hdr_file_type_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4697) #define lpfc_grp_hdr_file_type_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4698) #define lpfc_grp_hdr_id_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4699) #define lpfc_grp_hdr_id_MASK 0x000000FF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4700) #define lpfc_grp_hdr_id_WORD word2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4701) uint8_t rev_name[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4702) uint8_t date[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4703) uint8_t revision[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4704) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4706) /* Defines for WQE command type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4707) #define FCP_COMMAND 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4708) #define NVME_READ_CMD 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4709) #define FCP_COMMAND_DATA_OUT 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4710) #define NVME_WRITE_CMD 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4711) #define FCP_COMMAND_TRECEIVE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4712) #define FCP_COMMAND_TRSP 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4713) #define FCP_COMMAND_TSEND 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4714) #define OTHER_COMMAND 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4715) #define ELS_COMMAND_NON_FIP 0xC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4716) #define ELS_COMMAND_FIP 0xD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4718) #define LPFC_NVME_EMBED_CMD 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4719) #define LPFC_NVME_EMBED_WRITE 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4720) #define LPFC_NVME_EMBED_READ 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4722) /* WQE Commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4723) #define CMD_ABORT_XRI_WQE 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4724) #define CMD_XMIT_SEQUENCE64_WQE 0x82
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4725) #define CMD_XMIT_BCAST64_WQE 0x84
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4726) #define CMD_ELS_REQUEST64_WQE 0x8A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4727) #define CMD_XMIT_ELS_RSP64_WQE 0x95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4728) #define CMD_XMIT_BLS_RSP64_WQE 0x97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4729) #define CMD_FCP_IWRITE64_WQE 0x98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4730) #define CMD_FCP_IREAD64_WQE 0x9A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4731) #define CMD_FCP_ICMND64_WQE 0x9C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4732) #define CMD_FCP_TSEND64_WQE 0x9F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4733) #define CMD_FCP_TRECEIVE64_WQE 0xA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4734) #define CMD_FCP_TRSP64_WQE 0xA3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4735) #define CMD_GEN_REQUEST64_WQE 0xC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4737) #define CMD_WQE_MASK 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4740) #define LPFC_FW_DUMP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4741) #define LPFC_FW_RESET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4742) #define LPFC_DV_RESET 3
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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