^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /* Driver for the Iomega MatchMaker parallel port SCSI HBA embedded in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * the Iomega ZIP Plus drive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (c) 1998 David Campbell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Please note that I live in Perth, Western Australia. GMT+0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _IMM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _IMM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define IMM_VERSION "2.05 (for Linux 2.4.0)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * 10 Apr 1998 (Good Friday) - Received EN144302 by email from Iomega.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Scarry thing is the level of support from one of their managers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * The onus is now on us (the developers) to shut up and start coding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 11Apr98 [ 0.10 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * --- SNIP ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * It manages to find the drive which is a good start. Writing data during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * data phase is known to be broken (due to requirements of two byte writes).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Removing "Phase" debug messages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * PS: Took four hours of coding after I bought a drive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * ANZAC Day (Aus "War Veterans Holiday") 25Apr98 [ 0.14 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Ten minutes later after a few fixes.... (LITERALLY!!!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Have mounted disk, copied file, dismounted disk, remount disk, diff file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * ----- It actually works!!! -----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * 25Apr98 [ 0.15 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Twenty minutes of mucking around, rearanged the IEEE negotiate mechanism.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Now have byte mode working (only EPP and ECP to go now... :=)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * 26Apr98 [ 0.16 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Thirty minutes of further coding results in EPP working on my machine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * 27Apr98 [ 0.17 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * Due to work commitments and inability to get a "true" ECP mode functioning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * I have decided to code the parport support into imm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * 09Jun98 [ 0.18 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Driver is now out of beta testing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * Support for parport has been added.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * Now distributed with the ppa driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * 12Jun98 [ 2.00 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * Err.. It appears that imm-2.00 was broken....
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * 18Jun98 [ 2.01 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * Patch applied to sync this against the Linux 2.1.x kernel code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Included qboot_zip.sh
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * 21Jun98 [ 2.02 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Other clean ups include the follow changes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * CONFIG_SCSI_PPA_HAVE_PEDANTIC => CONFIG_SCSI_IZIP_EPP16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * added CONFIG_SCSI_IZIP_SLOW_CTR option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * [2.03]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * Fix kernel panic on scsi timeout. 20Aug00 [2.04]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Avoid io_request_lock problems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * John Cavan <johncavan@home.com> 16Nov00 [2.05]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* ------ END OF USER CONFIGURABLE PARAMETERS ----- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #include <linux/stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* batteries not included :-) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * modes in which the driver can operate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define IMM_AUTODETECT 0 /* Autodetect mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define IMM_NIBBLE 1 /* work in standard 4 bit mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define IMM_PS2 2 /* PS/2 byte mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define IMM_EPP_8 3 /* EPP mode, 8 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define IMM_EPP_16 4 /* EPP mode, 16 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define IMM_EPP_32 5 /* EPP mode, 32 bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define IMM_UNKNOWN 6 /* Just in case... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static char *IMM_MODE_STRING[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) [IMM_AUTODETECT] = "Autodetect",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) [IMM_NIBBLE] = "SPP",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) [IMM_PS2] = "PS/2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) [IMM_EPP_8] = "EPP 8 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) [IMM_EPP_16] = "EPP 16 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #ifdef CONFIG_SCSI_IZIP_EPP16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) [IMM_EPP_32] = "EPP 16 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) [IMM_EPP_32] = "EPP 32 bit",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) [IMM_UNKNOWN] = "Unknown",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* other options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define IMM_BURST_SIZE 512 /* data burst size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define IMM_SELECT_TMO 500 /* 500 how long to wait for target ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define IMM_SPIN_TMO 5000 /* 50000 imm_wait loop limiter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define IMM_DEBUG 0 /* debugging option */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* args to imm_connect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define CONNECT_EPP_MAYBE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define CONNECT_NORMAL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define r_dtr(x) (unsigned char)inb((x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define r_str(x) (unsigned char)inb((x)+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define r_ctr(x) (unsigned char)inb((x)+2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define r_epp(x) (unsigned char)inb((x)+4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define r_fifo(x) (unsigned char)inb((x)) /* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* On PCI is: base+0x400 != base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define r_ecr(x) (unsigned char)inb((x)+2) /* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define w_dtr(x,y) outb(y, (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define w_str(x,y) outb(y, (x)+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define w_epp(x,y) outb(y, (x)+4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define w_fifo(x,y) outb(y, (x)) /* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define w_ecr(x,y) outb(y, (x)+0x2) /* x must be base_hi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #ifdef CONFIG_SCSI_IZIP_SLOW_CTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define w_ctr(x,y) outb_p(y, (x)+2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define w_ctr(x,y) outb(y, (x)+2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int imm_engine(imm_struct *, struct scsi_cmnd *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #endif /* _IMM_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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