Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/zorro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <asm/amigaints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/amigahw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include "scsi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include "wd33c93.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "gvp11.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define CHECK_WD33C93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) struct gvp11_hostdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	struct WD33C93_hostdata wh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	struct gvp11_scsiregs *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) static irqreturn_t gvp11_intr(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	struct Scsi_Host *instance = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	struct gvp11_hostdata *hdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	unsigned int status = hdata->regs->CNTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	if (!(status & GVP11_DMAC_INT_PENDING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 		return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	spin_lock_irqsave(instance->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	wd33c93_intr(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	spin_unlock_irqrestore(instance->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static int gvp11_xfer_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) void gvp11_setup(char *str, int *ints)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	gvp11_xfer_mask = ints[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	struct Scsi_Host *instance = cmd->device->host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	struct gvp11_hostdata *hdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	struct WD33C93_hostdata *wh = &hdata->wh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct gvp11_scsiregs *regs = hdata->regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	unsigned short cntr = GVP11_DMAC_INT_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	unsigned long addr = virt_to_bus(cmd->SCp.ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	int bank_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	static int scsi_alloc_out_of_range = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	/* use bounce buffer if the physical address is bad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	if (addr & wh->dma_xfer_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		wh->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		if (!scsi_alloc_out_of_range) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 			wh->dma_bounce_buffer =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 				kmalloc(wh->dma_bounce_len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 			wh->dma_buffer_pool = BUF_SCSI_ALLOCED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		if (scsi_alloc_out_of_range ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		    !wh->dma_bounce_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 			wh->dma_bounce_buffer =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 				amiga_chip_alloc(wh->dma_bounce_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 						 "GVP II SCSI Bounce Buffer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 			if (!wh->dma_bounce_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 				wh->dma_bounce_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 				return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 			wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		/* check if the address of the bounce buffer is OK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		addr = virt_to_bus(wh->dma_bounce_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		if (addr & wh->dma_xfer_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 			/* fall back to Chip RAM if address out of range */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 				kfree(wh->dma_bounce_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 				scsi_alloc_out_of_range = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 				amiga_chip_free(wh->dma_bounce_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			wh->dma_bounce_buffer =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				amiga_chip_alloc(wh->dma_bounce_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 						 "GVP II SCSI Bounce Buffer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 			if (!wh->dma_bounce_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				wh->dma_bounce_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 				return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 			addr = virt_to_bus(wh->dma_bounce_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		if (!dir_in) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			/* copy to bounce buffer for a write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			memcpy(wh->dma_bounce_buffer, cmd->SCp.ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			       cmd->SCp.this_residual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	/* setup dma direction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (!dir_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		cntr |= GVP11_DMAC_DIR_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	wh->dma_dir = dir_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	regs->CNTR = cntr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	/* setup DMA *physical* address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	regs->ACR = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (dir_in) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		/* invalidate any cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		cache_clear(addr, cmd->SCp.this_residual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		/* push any dirty cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		cache_push(addr, cmd->SCp.this_residual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	if (bank_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		regs->BANK = bank_mask & (addr >> 18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	/* start DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	regs->ST_DMA = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	/* return success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		     int status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	struct gvp11_hostdata *hdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	struct WD33C93_hostdata *wh = &hdata->wh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct gvp11_scsiregs *regs = hdata->regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	/* stop DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	regs->SP_DMA = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	/* remove write bit from CONTROL bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	regs->CNTR = GVP11_DMAC_INT_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	/* copy from a bounce buffer, if necessary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if (status && wh->dma_bounce_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		if (wh->dma_dir && SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			memcpy(SCpnt->SCp.ptr, wh->dma_bounce_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 			       SCpnt->SCp.this_residual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 		if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 			kfree(wh->dma_bounce_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 			amiga_chip_free(wh->dma_bounce_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		wh->dma_bounce_buffer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		wh->dma_bounce_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static struct scsi_host_template gvp11_scsi_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	.module			= THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.name			= "GVP Series II SCSI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.show_info		= wd33c93_show_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.write_info		= wd33c93_write_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	.proc_name		= "GVP11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	.queuecommand		= wd33c93_queuecommand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	.eh_abort_handler	= wd33c93_abort,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.eh_host_reset_handler	= wd33c93_host_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.can_queue		= CAN_QUEUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.this_id		= 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	.sg_tablesize		= SG_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	.cmd_per_lun		= CMD_PER_LUN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	.dma_boundary		= PAGE_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static int check_wd33c93(struct gvp11_scsiregs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #ifdef CHECK_WD33C93
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	volatile unsigned char *sasr_3393, *scmd_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	unsigned char save_sasr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	unsigned char q, qq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	 * These darn GVP boards are a problem - it can be tough to tell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	 * whether or not they include a SCSI controller. This is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	 * ultimate Yet-Another-GVP-Detection-Hack in that it actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	 * probes for a WD33c93 chip: If we find one, it's extremely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	 * likely that this card supports SCSI, regardless of Product_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	 * Code, Board_Size, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	/* Get pointers to the presumed register locations and save contents */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	sasr_3393 = &regs->SASR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	scmd_3393 = &regs->SCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	save_sasr = *sasr_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	/* First test the AuxStatus Reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	q = *sasr_3393;	/* read it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (q & 0x08)	/* bit 3 should always be clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	*sasr_3393 = WD_AUXILIARY_STATUS;	/* setup indirect address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (*sasr_3393 == WD_AUXILIARY_STATUS) {	/* shouldn't retain the write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		*sasr_3393 = save_sasr;	/* Oops - restore this byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	if (*sasr_3393 != q) {	/* should still read the same */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		*sasr_3393 = save_sasr;	/* Oops - restore this byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (*scmd_3393 != q)	/* and so should the image at 0x1f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	 * Ok, we probably have a wd33c93, but let's check a few other places
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	 * for good measure. Make sure that this works for both 'A and 'B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	 * chip versions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	*sasr_3393 = WD_SCSI_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	q = *scmd_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	*sasr_3393 = WD_SCSI_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	*scmd_3393 = ~q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	*sasr_3393 = WD_SCSI_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	qq = *scmd_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	*sasr_3393 = WD_SCSI_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	*scmd_3393 = q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (qq != q)	/* should be read only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	*sasr_3393 = 0x1e;	/* this register is unimplemented */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	q = *scmd_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	*sasr_3393 = 0x1e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	*scmd_3393 = ~q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	*sasr_3393 = 0x1e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	qq = *scmd_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	*sasr_3393 = 0x1e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	*scmd_3393 = q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	if (qq != q || qq != 0xff)	/* should be read only, all 1's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	*sasr_3393 = WD_TIMEOUT_PERIOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	q = *scmd_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	*sasr_3393 = WD_TIMEOUT_PERIOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	*scmd_3393 = ~q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	*sasr_3393 = WD_TIMEOUT_PERIOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	qq = *scmd_3393;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	*sasr_3393 = WD_TIMEOUT_PERIOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	*scmd_3393 = q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	if (qq != (~q & 0xff))	/* should be read/write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #endif /* CHECK_WD33C93 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	struct Scsi_Host *instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	unsigned long address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	unsigned int epc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	unsigned int default_dma_xfer_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	struct gvp11_hostdata *hdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	struct gvp11_scsiregs *regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	wd33c93_regs wdregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	default_dma_xfer_mask = ent->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	 * Rumors state that some GVP ram boards use the same product
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	 * code as the SCSI controllers. Therefore if the board-size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	 * is not 64KB we assume it is a ram board and bail out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (zorro_resource_len(z) != 0x10000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	address = z->resource.start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	if (!request_mem_region(address, 256, "wd33c93"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	regs = ZTWO_VADDR(address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	error = check_wd33c93(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		goto fail_check_or_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	instance = scsi_host_alloc(&gvp11_scsi_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 				   sizeof(struct gvp11_hostdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	if (!instance) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 		goto fail_check_or_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	instance->irq = IRQ_AMIGA_PORTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	instance->unique_id = z->slotaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	regs->secret2 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	regs->secret1 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	regs->secret3 = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	while (regs->CNTR & GVP11_DMAC_BUSY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	regs->CNTR = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	regs->BANK = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	wdregs.SASR = &regs->SASR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	wdregs.SCMD = &regs->SCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	hdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	if (gvp11_xfer_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		hdata->wh.dma_xfer_mask = gvp11_xfer_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		hdata->wh.dma_xfer_mask = default_dma_xfer_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	hdata->wh.no_sync = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	hdata->wh.fast = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	hdata->wh.dma_mode = CTRL_DMA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	hdata->regs = regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	 * Check for 14MHz SCSI clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	wd33c93_init(instance, wdregs, dma_setup, dma_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		     (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 					     : WD33C93_FS_12_15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	error = request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 			    "GVP11 SCSI", instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 		goto fail_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	regs->CNTR = GVP11_DMAC_INT_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	error = scsi_add_host(instance, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		goto fail_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	zorro_set_drvdata(z, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	scsi_scan_host(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) fail_host:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	free_irq(IRQ_AMIGA_PORTS, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) fail_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	scsi_host_put(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) fail_check_or_alloc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	release_mem_region(address, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static void gvp11_remove(struct zorro_dev *z)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	struct Scsi_Host *instance = zorro_get_drvdata(z);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	struct gvp11_hostdata *hdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	hdata->regs->CNTR = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	scsi_remove_host(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	free_irq(IRQ_AMIGA_PORTS, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	scsi_host_put(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	release_mem_region(z->resource.start, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	 * This should (hopefully) be the correct way to identify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	 * all the different GVP SCSI controllers (except for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	 * SERIES I though).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static struct zorro_device_id gvp11_zorro_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	{ ZORRO_PROD_GVP_COMBO_030_R3_SCSI,	~0x00ffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	{ ZORRO_PROD_GVP_SERIES_II,		~0x00ffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	{ ZORRO_PROD_GVP_GFORCE_030_SCSI,	~0x01ffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	{ ZORRO_PROD_GVP_A530_SCSI,		~0x01ffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	{ ZORRO_PROD_GVP_COMBO_030_R4_SCSI,	~0x01ffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	{ ZORRO_PROD_GVP_A1291,			~0x07ffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	{ ZORRO_PROD_GVP_GFORCE_040_SCSI_1,	~0x07ffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	{ 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) MODULE_DEVICE_TABLE(zorro, gvp11_zorro_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static struct zorro_driver gvp11_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	.name		= "gvp11",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	.id_table	= gvp11_zorro_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	.probe		= gvp11_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	.remove		= gvp11_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static int __init gvp11_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	return zorro_register_driver(&gvp11_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) module_init(gvp11_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static void __exit gvp11_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	zorro_unregister_driver(&gvp11_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) module_exit(gvp11_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) MODULE_DESCRIPTION("GVP Series II SCSI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) MODULE_LICENSE("GPL");