^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2008 Cisco Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2007 Nuova Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This program is free software; you may redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifndef _VNIC_WQ_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define _VNIC_WQ_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "vnic_dev.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "vnic_cq.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * These defines avoid symbol clash between fnic and enic (Cisco 10G Eth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Driver) when both are built with CONFIG options =y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define vnic_wq_desc_avail fnic_wq_desc_avail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define vnic_wq_desc_used fnic_wq_desc_used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define vnic_wq_next_desc fni_cwq_next_desc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define vnic_wq_post fnic_wq_post
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define vnic_wq_service fnic_wq_service
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define vnic_wq_free fnic_wq_free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define vnic_wq_alloc fnic_wq_alloc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define vnic_wq_devcmd2_alloc fnic_wq_devcmd2_alloc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define vnic_wq_init_start fnic_wq_init_start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define vnic_wq_init fnic_wq_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define vnic_wq_error_status fnic_wq_error_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define vnic_wq_enable fnic_wq_enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define vnic_wq_disable fnic_wq_disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define vnic_wq_clean fnic_wq_clean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Work queue control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct vnic_wq_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u64 ring_base; /* 0x00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 ring_size; /* 0x08 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u32 pad0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u32 posted_index; /* 0x10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u32 pad1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u32 cq_index; /* 0x18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 pad2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u32 enable; /* 0x20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 pad3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u32 running; /* 0x28 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u32 pad4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u32 fetch_index; /* 0x30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u32 pad5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 dca_value; /* 0x38 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 pad6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u32 error_interrupt_enable; /* 0x40 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 pad7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u32 error_interrupt_offset; /* 0x48 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u32 pad8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u32 error_status; /* 0x50 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u32 pad9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct vnic_wq_buf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct vnic_wq_buf *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) dma_addr_t dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) void *os_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int sop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) void *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Break the vnic_wq_buf allocations into blocks of 64 entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define VNIC_WQ_BUF_BLK_ENTRIES 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define VNIC_WQ_BUF_BLK_SZ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) (VNIC_WQ_BUF_BLK_ENTRIES * sizeof(struct vnic_wq_buf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define VNIC_WQ_BUF_BLKS_NEEDED(entries) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) DIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct vnic_wq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct vnic_dev *vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct vnic_wq_ctrl __iomem *ctrl; /* memory-mapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct vnic_dev_ring ring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct vnic_wq_buf *bufs[VNIC_WQ_BUF_BLKS_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct vnic_wq_buf *to_use;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct vnic_wq_buf *to_clean;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) unsigned int pkts_outstanding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static inline unsigned int vnic_wq_desc_avail(struct vnic_wq *wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* how many does SW own? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return wq->ring.desc_avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static inline unsigned int vnic_wq_desc_used(struct vnic_wq *wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* how many does HW own? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return wq->ring.desc_count - wq->ring.desc_avail - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static inline void *vnic_wq_next_desc(struct vnic_wq *wq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return wq->to_use->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline void vnic_wq_post(struct vnic_wq *wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void *os_buf, dma_addr_t dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned int len, int sop, int eop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct vnic_wq_buf *buf = wq->to_use;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) buf->sop = sop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) buf->os_buf = eop ? os_buf : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) buf->dma_addr = dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) buf->len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) buf = buf->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (eop) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* Adding write memory barrier prevents compiler and/or CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * reordering, thus avoiding descriptor posting before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * descriptor is initialized. Otherwise, hardware can read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * stale descriptor fields.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) iowrite32(buf->index, &wq->ctrl->posted_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) wq->to_use = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) wq->ring.desc_avail--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static inline void vnic_wq_service(struct vnic_wq *wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct cq_desc *cq_desc, u16 completed_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) void (*buf_service)(struct vnic_wq *wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void *opaque)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct vnic_wq_buf *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) buf = wq->to_clean;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) (*buf_service)(wq, cq_desc, buf, opaque);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) wq->ring.desc_avail++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) wq->to_clean = buf->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (buf->index == completed_index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) buf = wq->to_clean;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) void vnic_wq_free(struct vnic_wq *wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned int desc_count, unsigned int desc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int vnic_wq_devcmd2_alloc(struct vnic_dev *vdev, struct vnic_wq *wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unsigned int desc_count, unsigned int desc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) void vnic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) unsigned int fetch_index, unsigned int posted_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned int error_interrupt_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) unsigned int error_interrupt_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) unsigned int error_interrupt_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned int error_interrupt_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) unsigned int vnic_wq_error_status(struct vnic_wq *wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) void vnic_wq_enable(struct vnic_wq *wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int vnic_wq_disable(struct vnic_wq *wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) void vnic_wq_clean(struct vnic_wq *wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) void (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #endif /* _VNIC_WQ_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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