Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * This program is free software; you may redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #ifndef _VNIC_RQ_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define _VNIC_RQ_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include "vnic_dev.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include "vnic_cq.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * These defines avoid symbol clash between fnic and enic (Cisco 10G Eth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * Driver) when both are built with CONFIG options =y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define vnic_rq_desc_avail fnic_rq_desc_avail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define vnic_rq_desc_used fnic_rq_desc_used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define vnic_rq_next_desc fnic_rq_next_desc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define vnic_rq_next_index fnic_rq_next_index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define vnic_rq_next_buf_index fnic_rq_next_buf_index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define vnic_rq_post fnic_rq_post
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define vnic_rq_posting_soon fnic_rq_posting_soon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define vnic_rq_return_descs fnic_rq_return_descs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define vnic_rq_service fnic_rq_service
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define vnic_rq_fill fnic_rq_fill
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define vnic_rq_free fnic_rq_free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define vnic_rq_alloc fnic_rq_alloc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define vnic_rq_init fnic_rq_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define vnic_rq_error_status fnic_rq_error_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define vnic_rq_enable fnic_rq_enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define vnic_rq_disable fnic_rq_disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define vnic_rq_clean fnic_rq_clean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) /* Receive queue control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) struct vnic_rq_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	u64 ring_base;			/* 0x00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	u32 ring_size;			/* 0x08 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	u32 pad0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	u32 posted_index;		/* 0x10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	u32 pad1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u32 cq_index;			/* 0x18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u32 pad2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u32 enable;			/* 0x20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	u32 pad3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u32 running;			/* 0x28 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u32 pad4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	u32 fetch_index;		/* 0x30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	u32 pad5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u32 error_interrupt_enable;	/* 0x38 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	u32 pad6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	u32 error_interrupt_offset;	/* 0x40 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u32 pad7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u32 error_status;		/* 0x48 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u32 pad8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	u32 dropped_packet_count;	/* 0x50 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	u32 pad9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u32 dropped_packet_count_rc;	/* 0x58 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u32 pad10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) /* Break the vnic_rq_buf allocations into blocks of 64 entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define VNIC_RQ_BUF_BLK_ENTRIES 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define VNIC_RQ_BUF_BLK_SZ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	(VNIC_RQ_BUF_BLK_ENTRIES * sizeof(struct vnic_rq_buf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define VNIC_RQ_BUF_BLKS_NEEDED(entries) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	DIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) struct vnic_rq_buf {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	struct vnic_rq_buf *next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	dma_addr_t dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	void *os_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	unsigned int os_buf_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	void *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) struct vnic_rq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct vnic_dev *vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct vnic_rq_ctrl __iomem *ctrl;	/* memory-mapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	struct vnic_dev_ring ring;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	struct vnic_rq_buf *bufs[VNIC_RQ_BUF_BLKS_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	struct vnic_rq_buf *to_use;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	struct vnic_rq_buf *to_clean;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	void *os_buf_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	unsigned int buf_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	unsigned int pkts_outstanding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static inline unsigned int vnic_rq_desc_avail(struct vnic_rq *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	/* how many does SW own? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return rq->ring.desc_avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static inline unsigned int vnic_rq_desc_used(struct vnic_rq *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* how many does HW own? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return rq->ring.desc_count - rq->ring.desc_avail - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static inline void *vnic_rq_next_desc(struct vnic_rq *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	return rq->to_use->desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static inline unsigned int vnic_rq_next_index(struct vnic_rq *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	return rq->to_use->index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static inline unsigned int vnic_rq_next_buf_index(struct vnic_rq *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	return rq->buf_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static inline void vnic_rq_post(struct vnic_rq *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	void *os_buf, unsigned int os_buf_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	dma_addr_t dma_addr, unsigned int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	struct vnic_rq_buf *buf = rq->to_use;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	buf->os_buf = os_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	buf->os_buf_index = os_buf_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	buf->dma_addr = dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	buf->len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	buf = buf->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	rq->to_use = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	rq->ring.desc_avail--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	/* Move the posted_index every nth descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #ifndef VNIC_RQ_RETURN_RATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define VNIC_RQ_RETURN_RATE		0xf	/* keep 2^n - 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if ((buf->index & VNIC_RQ_RETURN_RATE) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		/* Adding write memory barrier prevents compiler and/or CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		 * reordering, thus avoiding descriptor posting before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		 * descriptor is initialized. Otherwise, hardware can read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 		 * stale descriptor fields.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		iowrite32(buf->index, &rq->ctrl->posted_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static inline int vnic_rq_posting_soon(struct vnic_rq *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	return (rq->to_use->index & VNIC_RQ_RETURN_RATE) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static inline void vnic_rq_return_descs(struct vnic_rq *rq, unsigned int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	rq->ring.desc_avail += count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) enum desc_return_options {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	VNIC_RQ_RETURN_DESC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	VNIC_RQ_DEFER_RETURN_DESC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static inline void vnic_rq_service(struct vnic_rq *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	struct cq_desc *cq_desc, u16 completed_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	int desc_return, void (*buf_service)(struct vnic_rq *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	int skipped, void *opaque), void *opaque)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	struct vnic_rq_buf *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	int skipped;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	buf = rq->to_clean;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		skipped = (buf->index != completed_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		(*buf_service)(rq, cq_desc, buf, skipped, opaque);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		if (desc_return == VNIC_RQ_RETURN_DESC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 			rq->ring.desc_avail++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		rq->to_clean = buf->next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		if (!skipped)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		buf = rq->to_clean;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static inline int vnic_rq_fill(struct vnic_rq *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	int (*buf_fill)(struct vnic_rq *rq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	while (vnic_rq_desc_avail(rq) > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		err = (*buf_fill)(rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) void vnic_rq_free(struct vnic_rq *rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	unsigned int desc_count, unsigned int desc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	unsigned int error_interrupt_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	unsigned int error_interrupt_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) unsigned int vnic_rq_error_status(struct vnic_rq *rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) void vnic_rq_enable(struct vnic_rq *rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) int vnic_rq_disable(struct vnic_rq *rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) void vnic_rq_clean(struct vnic_rq *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	void (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #endif /* _VNIC_RQ_H_ */