^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2008 Cisco Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2007 Nuova Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This program is free software; you may redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifndef _VNIC_INTR_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define _VNIC_INTR_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "vnic_dev.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * These defines avoid symbol clash between fnic and enic (Cisco 10G Eth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Driver) when both are built with CONFIG options =y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define vnic_intr_unmask fnic_intr_unmask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define vnic_intr_mask fnic_intr_mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define vnic_intr_return_credits fnic_intr_return_credits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define vnic_intr_credits fnic_intr_credits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define vnic_intr_return_all_credits fnic_intr_return_all_credits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define vnic_intr_legacy_pba fnic_intr_legacy_pba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define vnic_intr_free fnic_intr_free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define vnic_intr_alloc fnic_intr_alloc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define vnic_intr_init fnic_intr_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define vnic_intr_clean fnic_intr_clean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define VNIC_INTR_TIMER_MAX 0xffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define VNIC_INTR_TIMER_TYPE_ABS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define VNIC_INTR_TIMER_TYPE_QUIET 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* Interrupt control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct vnic_intr_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 coalescing_timer; /* 0x00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 pad0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u32 coalescing_value; /* 0x08 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u32 pad1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u32 coalescing_type; /* 0x10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u32 pad2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 mask_on_assertion; /* 0x18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u32 pad3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 mask; /* 0x20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u32 pad4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u32 int_credits; /* 0x28 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u32 pad5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u32 int_credit_return; /* 0x30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 pad6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct vnic_intr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct vnic_dev *vdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct vnic_intr_ctrl __iomem *ctrl; /* memory-mapped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static inline void vnic_intr_unmask(struct vnic_intr *intr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) iowrite32(0, &intr->ctrl->mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static inline void vnic_intr_mask(struct vnic_intr *intr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) iowrite32(1, &intr->ctrl->mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static inline void vnic_intr_return_credits(struct vnic_intr *intr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned int credits, int unmask, int reset_timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define VNIC_INTR_UNMASK_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define VNIC_INTR_RESET_TIMER_SHIFT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u32 int_credit_return = (credits & 0xffff) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) (unmask ? (1 << VNIC_INTR_UNMASK_SHIFT) : 0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) (reset_timer ? (1 << VNIC_INTR_RESET_TIMER_SHIFT) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) iowrite32(int_credit_return, &intr->ctrl->int_credit_return);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return ioread32(&intr->ctrl->int_credits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned int credits = vnic_intr_credits(intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int unmask = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int reset_timer = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) vnic_intr_return_credits(intr, credits, unmask, reset_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static inline u32 vnic_intr_legacy_pba(u32 __iomem *legacy_pba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* read PBA without clearing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return ioread32(legacy_pba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void vnic_intr_free(struct vnic_intr *intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned int index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) unsigned int coalescing_type, unsigned int mask_on_assertion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void vnic_intr_clean(struct vnic_intr *intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #endif /* _VNIC_INTR_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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