^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2008 Cisco Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2007 Nuova Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This program is free software; you may redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifndef _VNIC_DEV_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define _VNIC_DEV_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "vnic_resource.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "vnic_devcmd.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * These defines avoid symbol clash between fnic and enic (Cisco 10G Eth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * Driver) when both are built with CONFIG options =y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define vnic_dev_priv fnic_dev_priv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define vnic_dev_get_res_count fnic_dev_get_res_count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define vnic_dev_get_res fnic_dev_get_res
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define vnic_dev_desc_ring_size fnic_dev_desc_ring_siz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define vnic_dev_clear_desc_ring fnic_dev_clear_desc_ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define vnic_dev_alloc_desc_ring fnic_dev_alloc_desc_ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define vnic_dev_free_desc_ring fnic_dev_free_desc_ring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define vnic_dev_cmd fnic_dev_cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define vnic_dev_fw_info fnic_dev_fw_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define vnic_dev_spec fnic_dev_spec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define vnic_dev_stats_clear fnic_dev_stats_clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define vnic_dev_cmd_init fnic_dev_cmd_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define vnic_dev_stats_dump fnic_dev_stats_dump
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define vnic_dev_hang_notify fnic_dev_hang_notify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define vnic_dev_packet_filter fnic_dev_packet_filter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define vnic_dev_add_addr fnic_dev_add_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define vnic_dev_del_addr fnic_dev_del_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define vnic_dev_mac_addr fnic_dev_mac_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define vnic_dev_notify_set fnic_dev_notify_set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define vnic_dev_notify_unset fnic_dev_notify_unset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define vnic_dev_link_status fnic_dev_link_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define vnic_dev_port_speed fnic_dev_port_speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define vnic_dev_msg_lvl fnic_dev_msg_lvl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define vnic_dev_mtu fnic_dev_mtu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define vnic_dev_link_down_cnt fnic_dev_link_down_cnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define vnic_dev_close fnic_dev_close
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define vnic_dev_enable fnic_dev_enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define vnic_dev_disable fnic_dev_disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define vnic_dev_open fnic_dev_open
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define vnic_dev_open_done fnic_dev_open_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define vnic_dev_init fnic_dev_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define vnic_dev_soft_reset fnic_dev_soft_reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define vnic_dev_soft_reset_done fnic_dev_soft_reset_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define vnic_dev_set_intr_mode fnic_dev_set_intr_mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define vnic_dev_get_intr_mode fnic_dev_get_intr_mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define vnic_dev_unregister fnic_dev_unregister
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define vnic_dev_register fnic_dev_register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #ifndef VNIC_PADDR_TARGET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define VNIC_PADDR_TARGET 0x0000000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #ifndef readq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static inline u64 readq(void __iomem *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return ((u64)readl(reg + 0x4UL) << 32) | (u64)readl(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static inline void writeq(u64 val, void __iomem *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) writel(val & 0xffffffff, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) writel(val >> 32, reg + 0x4UL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) enum vnic_dev_intr_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) VNIC_DEV_INTR_MODE_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) VNIC_DEV_INTR_MODE_INTX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) VNIC_DEV_INTR_MODE_MSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) VNIC_DEV_INTR_MODE_MSIX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct vnic_dev_bar {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) void __iomem *vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) dma_addr_t bus_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned long len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct vnic_dev_ring {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) void *descs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) dma_addr_t base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) size_t base_align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) void *descs_unaligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) size_t size_unaligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) dma_addr_t base_addr_unaligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned int desc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned int desc_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned int desc_avail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct vnic_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct vnic_stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) void *vnic_dev_priv(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) enum vnic_res_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned int desc_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned int desc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned int desc_count, unsigned int desc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) void vnic_dev_free_desc_ring(struct vnic_dev *vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct vnic_dev_ring *ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u64 *a0, u64 *a1, int wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int vnic_dev_fw_info(struct vnic_dev *vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct vnic_devcmd_fw_info **fw_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int size, void *value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) int vnic_dev_stats_clear(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int vnic_dev_cmd_init(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int vnic_dev_hang_notify(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int broadcast, int promisc, int allmulti);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) void vnic_dev_notify_unset(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) int vnic_dev_link_status(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u32 vnic_dev_port_speed(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u32 vnic_dev_msg_lvl(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) u32 vnic_dev_mtu(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) int vnic_dev_close(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int vnic_dev_enable(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int vnic_dev_disable(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int vnic_dev_open(struct vnic_dev *vdev, int arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int vnic_dev_open_done(struct vnic_dev *vdev, int *done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int vnic_dev_init(struct vnic_dev *vdev, int arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) u16 vnic_dev_set_default_vlan(struct vnic_dev *vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u16 new_default_vlan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) enum vnic_dev_intr_mode intr_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) enum vnic_dev_intr_mode vnic_dev_get_intr_mode(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) void vnic_dev_unregister(struct vnic_dev *vdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) void *priv, struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct vnic_dev_bar *bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #endif /* _VNIC_DEV_H_ */