^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2008 Cisco Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright 2007 Nuova Systems, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * This program is free software; you may redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifndef _FNIC_IO_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define _FNIC_IO_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <scsi/fc/fc_fcp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define FNIC_DFLT_SG_DESC_CNT 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define FNIC_MAX_SG_DESC_CNT 256 /* Maximum descriptors per sgl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define FNIC_SG_DESC_ALIGN 16 /* Descriptor address alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) struct host_sg_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) __le64 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) __le32 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u32 _resvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct fnic_dflt_sgl_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct host_sg_desc sg_desc[FNIC_DFLT_SG_DESC_CNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct fnic_sgl_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct host_sg_desc sg_desc[FNIC_MAX_SG_DESC_CNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) enum fnic_sgl_list_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) FNIC_SGL_CACHE_DFLT = 0, /* cache with default size sgl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) FNIC_SGL_CACHE_MAX, /* cache with max size sgl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) FNIC_SGL_NUM_CACHES /* number of sgl caches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) enum fnic_ioreq_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) FNIC_IOREQ_NOT_INITED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) FNIC_IOREQ_CMD_PENDING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) FNIC_IOREQ_ABTS_PENDING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) FNIC_IOREQ_ABTS_COMPLETE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) FNIC_IOREQ_CMD_COMPLETE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct fnic_io_req {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct host_sg_desc *sgl_list; /* sgl list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) void *sgl_list_alloc; /* sgl list address used for free */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) dma_addr_t sense_buf_pa; /* dma address for sense buffer*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) dma_addr_t sgl_list_pa; /* dma address for sgl list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u16 sgl_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u8 sgl_type; /* device DMA descriptor list type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u8 io_completed:1; /* set to 1 when fw completes IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u32 port_id; /* remote port DID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned long start_time; /* in jiffies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct completion *abts_done; /* completion for abts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct completion *dr_done; /* completion for device reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) enum fnic_port_speeds {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) DCEM_PORTSPEED_NONE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) DCEM_PORTSPEED_1G = 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) DCEM_PORTSPEED_10G = 10000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) DCEM_PORTSPEED_20G = 20000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) DCEM_PORTSPEED_25G = 25000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) DCEM_PORTSPEED_40G = 40000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) DCEM_PORTSPEED_4x10G = 41000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) DCEM_PORTSPEED_100G = 100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #endif /* _FNIC_IO_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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