^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* esp_scsi.c: ESP SCSI driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kallsyms.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/irqreturn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <scsi/scsi_cmnd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <scsi/scsi_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <scsi/scsi_tcq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <scsi/scsi_dbg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <scsi/scsi_transport_spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "esp_scsi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DRV_MODULE_NAME "esp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PFX DRV_MODULE_NAME ": "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define DRV_VERSION "2.000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define DRV_MODULE_RELDATE "April 19, 2007"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* SCSI bus reset settle time in seconds. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static int esp_bus_reset_settle = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static u32 esp_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define ESP_DEBUG_INTR 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ESP_DEBUG_SCSICMD 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define ESP_DEBUG_RESET 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define ESP_DEBUG_MSGIN 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define ESP_DEBUG_MSGOUT 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ESP_DEBUG_CMDDONE 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define ESP_DEBUG_DISCONNECT 0x00000040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ESP_DEBUG_DATASTART 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ESP_DEBUG_DATADONE 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ESP_DEBUG_RECONNECT 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define ESP_DEBUG_AUTOSENSE 0x00000400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define ESP_DEBUG_EVENT 0x00000800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define ESP_DEBUG_COMMAND 0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define esp_log_intr(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) do { if (esp_debug & ESP_DEBUG_INTR) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define esp_log_reset(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) do { if (esp_debug & ESP_DEBUG_RESET) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define esp_log_msgin(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) do { if (esp_debug & ESP_DEBUG_MSGIN) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define esp_log_msgout(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) do { if (esp_debug & ESP_DEBUG_MSGOUT) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define esp_log_cmddone(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) do { if (esp_debug & ESP_DEBUG_CMDDONE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define esp_log_disconnect(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define esp_log_datastart(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) do { if (esp_debug & ESP_DEBUG_DATASTART) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define esp_log_datadone(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) do { if (esp_debug & ESP_DEBUG_DATADONE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define esp_log_reconnect(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) do { if (esp_debug & ESP_DEBUG_RECONNECT) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define esp_log_autosense(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define esp_log_event(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) do { if (esp_debug & ESP_DEBUG_EVENT) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define esp_log_command(f, a...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) do { if (esp_debug & ESP_DEBUG_COMMAND) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) shost_printk(KERN_DEBUG, esp->host, f, ## a); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define esp_read8(REG) esp->ops->esp_read8(esp, REG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static void esp_log_fill_regs(struct esp *esp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct esp_event_ent *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) p->sreg = esp->sreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) p->seqreg = esp->seqreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) p->sreg2 = esp->sreg2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) p->ireg = esp->ireg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) p->select_state = esp->select_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) p->event = esp->event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) void scsi_esp_cmd(struct esp *esp, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct esp_event_ent *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int idx = esp->esp_event_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) p = &esp->esp_event_log[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) p->type = ESP_EVENT_TYPE_CMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) p->val = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) esp_log_fill_regs(esp, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) esp_log_command("cmd[%02x]\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) esp_write8(val, ESP_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) EXPORT_SYMBOL(scsi_esp_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static void esp_send_dma_cmd(struct esp *esp, int len, int max_len, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (esp->flags & ESP_FLAG_USE_FIFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) for (i = 0; i < len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) esp_write8(esp->command_block[i], ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) scsi_esp_cmd(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) cmd |= ESP_CMD_DMA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) esp->ops->send_dma_cmd(esp, esp->command_block_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) len, max_len, 0, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static void esp_event(struct esp *esp, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct esp_event_ent *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int idx = esp->esp_event_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) p = &esp->esp_event_log[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) p->type = ESP_EVENT_TYPE_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) p->val = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) esp_log_fill_regs(esp, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) esp->event = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static void esp_dump_cmd_log(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) int idx = esp->esp_event_cur;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) int stop = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) shost_printk(KERN_INFO, esp->host, "Dumping command log\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct esp_event_ent *p = &esp->esp_event_log[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) "ent[%d] %s val[%02x] sreg[%02x] seqreg[%02x] "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) p->val, p->sreg, p->seqreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) p->sreg2, p->ireg, p->select_state, p->event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) } while (idx != stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static void esp_flush_fifo(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (esp->rev == ESP236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int lim = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (--lim == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) shost_printk(KERN_ALERT, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) "ESP_FF_BYTES will not clear!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static void hme_read_fifo(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) int idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) while (fcnt--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) esp->fifo[idx++] = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) esp->fifo[idx++] = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (esp->sreg2 & ESP_STAT2_F1BYTE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) esp_write8(0, ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) esp->fifo[idx++] = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) esp->fifo_cnt = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static void esp_set_all_config3(struct esp *esp, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) for (i = 0; i < ESP_MAX_TARGET; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) esp->target[i].esp_config3 = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) /* Reset the ESP chip, _not_ the SCSI bus. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static void esp_reset_esp(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* Now reset the ESP chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) scsi_esp_cmd(esp, ESP_CMD_RC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (esp->rev == FAST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* This is the only point at which it is reliable to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * the ID-code for a fast ESP chip variants.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) esp->max_period = ((35 * esp->ccycle) / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (esp->rev == FAST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u8 family_code = ESP_FAMILY(esp_read8(ESP_UID));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (family_code == ESP_UID_F236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) esp->rev = FAS236;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) } else if (family_code == ESP_UID_HME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) esp->rev = FASHME; /* Version is usually '5'. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) } else if (family_code == ESP_UID_FSC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) esp->rev = FSC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* Enable Active Negation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) esp_write8(ESP_CONFIG4_RADE, ESP_CFG4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) esp->rev = FAS100A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) esp->min_period = ((4 * esp->ccycle) / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) esp->min_period = ((5 * esp->ccycle) / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (esp->rev == FAS236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * The AM53c974 chip returns the same ID as FAS236;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * try to configure glitch eater.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 config4 = ESP_CONFIG4_GE1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) esp_write8(config4, ESP_CFG4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) config4 = esp_read8(ESP_CFG4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (config4 & ESP_CONFIG4_GE1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) esp->rev = PCSCSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) esp_write8(esp->config4, ESP_CFG4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) esp->max_period = (esp->max_period + 3)>>2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) esp->min_period = (esp->min_period + 3)>>2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) esp_write8(esp->config1, ESP_CFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) switch (esp->rev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) case ESP100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* nothing to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) case ESP100A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) esp_write8(esp->config2, ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) case ESP236:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* Slow 236 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) esp_write8(esp->config2, ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) esp->prev_cfg3 = esp->target[0].esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) esp_write8(esp->prev_cfg3, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) case FASHME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) case FAS236:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) case PCSCSI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) case FSC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) esp_write8(esp->config2, ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) u8 cfg3 = esp->target[0].esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (esp->scsi_id >= 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) cfg3 |= ESP_CONFIG3_IDBIT3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) esp_set_all_config3(esp, cfg3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u32 cfg3 = esp->target[0].esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) cfg3 |= ESP_CONFIG3_FCLK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) esp_set_all_config3(esp, cfg3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) esp->prev_cfg3 = esp->target[0].esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) esp_write8(esp->prev_cfg3, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) esp->radelay = 80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (esp->flags & ESP_FLAG_DIFFERENTIAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) esp->radelay = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) esp->radelay = 96;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) case FAS100A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /* Fast 100a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) esp_write8(esp->config2, ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) esp_set_all_config3(esp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) (esp->target[0].esp_config3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ESP_CONFIG3_FCLOCK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) esp->prev_cfg3 = esp->target[0].esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) esp_write8(esp->prev_cfg3, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) esp->radelay = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* Reload the configuration registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) esp_write8(esp->cfact, ESP_CFACT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) esp->prev_stp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) esp_write8(esp->prev_stp, ESP_STP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) esp->prev_soff = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) esp_write8(esp->prev_soff, ESP_SOFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) esp_write8(esp->neg_defp, ESP_TIMEO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* Eat any bitrot in the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) struct scatterlist *sg = scsi_sglist(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) int total = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct scatterlist *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (cmd->sc_data_direction == DMA_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (esp->flags & ESP_FLAG_NO_DMA_MAP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * For pseudo DMA and PIO we need the virtual address instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * a dma address, so perform an identity mapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) spriv->num_sg = scsi_sg_count(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) scsi_for_each_sg(cmd, s, spriv->num_sg, i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) s->dma_address = (uintptr_t)sg_virt(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) total += sg_dma_len(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) spriv->num_sg = scsi_dma_map(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) scsi_for_each_sg(cmd, s, spriv->num_sg, i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) total += sg_dma_len(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) spriv->cur_residue = sg_dma_len(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) spriv->prv_sg = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) spriv->cur_sg = sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) spriv->tot_residue = total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) return ent->sense_dma +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) (ent->sense_ptr - cmd->sense_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return sg_dma_address(p->cur_sg) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) (sg_dma_len(p->cur_sg) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) p->cur_residue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return SCSI_SENSE_BUFFERSIZE -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) (ent->sense_ptr - cmd->sense_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) return p->cur_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct scsi_cmnd *cmd, unsigned int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ent->sense_ptr += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) p->cur_residue -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) p->tot_residue -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (p->cur_residue < 0 || p->tot_residue < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) "Data transfer overflow.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) "cur_residue[%d] tot_residue[%d] len[%u]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) p->cur_residue, p->tot_residue, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) p->cur_residue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) p->tot_residue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (!p->cur_residue && p->tot_residue) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) p->prv_sg = p->cur_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) p->cur_sg = sg_next(p->cur_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) p->cur_residue = sg_dma_len(p->cur_sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) if (!(esp->flags & ESP_FLAG_NO_DMA_MAP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) scsi_dma_unmap(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ent->saved_sense_ptr = ent->sense_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) ent->saved_cur_residue = spriv->cur_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) ent->saved_prv_sg = spriv->prv_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) ent->saved_cur_sg = spriv->cur_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) ent->saved_tot_residue = spriv->tot_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) ent->sense_ptr = ent->saved_sense_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) spriv->cur_residue = ent->saved_cur_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) spriv->prv_sg = ent->saved_prv_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) spriv->cur_sg = ent->saved_cur_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) spriv->tot_residue = ent->saved_tot_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static void esp_write_tgt_config3(struct esp *esp, int tgt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (esp->rev > ESP100A) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) u8 val = esp->target[tgt].esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (val != esp->prev_cfg3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) esp->prev_cfg3 = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) esp_write8(val, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static void esp_write_tgt_sync(struct esp *esp, int tgt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) u8 off = esp->target[tgt].esp_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) u8 per = esp->target[tgt].esp_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (off != esp->prev_soff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) esp->prev_soff = off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) esp_write8(off, ESP_SOFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) if (per != esp->prev_stp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) esp->prev_stp = per;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) esp_write8(per, ESP_STP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) /* Arbitrary segment boundaries, 24-bit counts. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (dma_len > (1U << 24))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) dma_len = (1U << 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) u32 base, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) /* ESP chip limits other variants by 16-bits of transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) * count. Actually on FAS100A and FAS236 we could get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * in the ESP_CFG2 register but that causes other unwanted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * changes so we don't use it currently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) if (dma_len > (1U << 16))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) dma_len = (1U << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) /* All of the DMA variants hooked up to these chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) * cannot handle crossing a 24-bit address boundary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) base = dma_addr & ((1U << 24) - 1U);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) end = base + dma_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) if (end > (1U << 24))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) end = (1U <<24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) dma_len = end - base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return dma_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static int esp_need_to_nego_wide(struct esp_target_data *tp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) struct scsi_target *target = tp->starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) return spi_width(target) != tp->nego_goal_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) static int esp_need_to_nego_sync(struct esp_target_data *tp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) struct scsi_target *target = tp->starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) /* When offset is zero, period is "don't care". */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (!spi_offset(target) && !tp->nego_goal_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (spi_offset(target) == tp->nego_goal_offset &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) spi_period(target) == tp->nego_goal_period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct esp_lun_data *lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (!ent->orig_tag[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) /* Non-tagged, slot already taken? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (lp->non_tagged_cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (lp->hold) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /* We are being held by active tagged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (lp->num_tagged)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /* Tagged commands completed, we can unplug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * the queue and run this untagged command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) lp->hold = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) } else if (lp->num_tagged) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) /* Plug the queue until num_tagged decreases
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * to zero in esp_free_lun_tag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) lp->hold = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) lp->non_tagged_cmd = ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /* Tagged command. Check that it isn't blocked by a non-tagged one. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (lp->non_tagged_cmd || lp->hold)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) BUG_ON(lp->tagged_cmds[ent->orig_tag[1]]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) lp->tagged_cmds[ent->orig_tag[1]] = ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) lp->num_tagged++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static void esp_free_lun_tag(struct esp_cmd_entry *ent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) struct esp_lun_data *lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) if (ent->orig_tag[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) BUG_ON(lp->tagged_cmds[ent->orig_tag[1]] != ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) lp->tagged_cmds[ent->orig_tag[1]] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) lp->num_tagged--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) BUG_ON(lp->non_tagged_cmd != ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) lp->non_tagged_cmd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) static void esp_map_sense(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) ent->sense_ptr = ent->cmd->sense_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (esp->flags & ESP_FLAG_NO_DMA_MAP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) ent->sense_dma = (uintptr_t)ent->sense_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ent->sense_dma = dma_map_single(esp->dev, ent->sense_ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static void esp_unmap_sense(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (!(esp->flags & ESP_FLAG_NO_DMA_MAP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) dma_unmap_single(esp->dev, ent->sense_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) ent->sense_ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) /* When a contingent allegiance conditon is created, we force feed a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) * REQUEST_SENSE command to the device to fetch the sense data. I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * tried many other schemes, relying on the scsi error handling layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * to send out the REQUEST_SENSE automatically, but this was difficult
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * to get right especially in the presence of applications like smartd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * which use SG_IO to send out their own REQUEST_SENSE commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) struct scsi_device *dev = cmd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) int tgt, lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) u8 *p, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) tgt = dev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) lun = dev->lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if (!ent->sense_ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) esp_log_autosense("Doing auto-sense for tgt[%d] lun[%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) tgt, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) esp_map_sense(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) ent->saved_sense_ptr = ent->sense_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) esp->active_cmd = ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) p = esp->command_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) esp->msg_out_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) *p++ = IDENTIFY(0, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) *p++ = REQUEST_SENSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) *p++ = ((dev->scsi_level <= SCSI_2) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) (lun << 5) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) *p++ = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) *p++ = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) *p++ = SCSI_SENSE_BUFFERSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) *p++ = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) esp->select_state = ESP_SELECT_BASIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) val = tgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) esp_write8(val, ESP_BUSID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) esp_write_tgt_sync(esp, tgt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) esp_write_tgt_config3(esp, tgt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) val = (p - esp->command_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) esp_send_dma_cmd(esp, val, 16, ESP_CMD_SELA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) struct esp_cmd_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) list_for_each_entry(ent, &esp->queued_cmds, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct scsi_device *dev = cmd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) struct esp_lun_data *lp = dev->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) ent->tag[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ent->tag[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) return ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (!spi_populate_tag_msg(&ent->tag[0], cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) ent->tag[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) ent->tag[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) ent->orig_tag[0] = ent->tag[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) ent->orig_tag[1] = ent->tag[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (esp_alloc_lun_tag(ent, lp) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) return ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static void esp_maybe_execute_command(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) struct esp_target_data *tp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) struct scsi_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) struct scsi_cmnd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) struct esp_cmd_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) bool select_and_stop = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) int tgt, lun, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) u32 val, start_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) u8 *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) if (esp->active_cmd ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) (esp->flags & ESP_FLAG_RESETTING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) ent = find_and_prep_issuable_command(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if (!ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) esp_autosense(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) dev = cmd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) tgt = dev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) lun = dev->lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) tp = &esp->target[tgt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) list_move(&ent->list, &esp->active_cmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) esp->active_cmd = ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) esp_map_dma(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) esp_save_pointers(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (!(cmd->cmd_len == 6 || cmd->cmd_len == 10 || cmd->cmd_len == 12))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) select_and_stop = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) p = esp->command_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) esp->msg_out_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (tp->flags & ESP_TGT_CHECK_NEGO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) /* Need to negotiate. If the target is broken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) * go for synchronous transfers and non-wide.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (tp->flags & ESP_TGT_BROKEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) tp->flags &= ~ESP_TGT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) tp->nego_goal_period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) tp->nego_goal_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) tp->nego_goal_width = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) tp->nego_goal_tags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) /* If the settings are not changing, skip this. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) if (spi_width(tp->starget) == tp->nego_goal_width &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) spi_period(tp->starget) == tp->nego_goal_period &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) spi_offset(tp->starget) == tp->nego_goal_offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) tp->flags &= ~ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) goto build_identify;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) esp->msg_out_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) spi_populate_width_msg(&esp->msg_out[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) (tp->nego_goal_width ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) 1 : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) tp->flags |= ESP_TGT_NEGO_WIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) } else if (esp_need_to_nego_sync(tp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) esp->msg_out_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) spi_populate_sync_msg(&esp->msg_out[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) tp->nego_goal_period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) tp->nego_goal_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) tp->flags |= ESP_TGT_NEGO_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) tp->flags &= ~ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) /* If there are multiple message bytes, use Select and Stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) if (esp->msg_out_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) select_and_stop = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) build_identify:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) *p++ = IDENTIFY(tp->flags & ESP_TGT_DISCONNECT, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) if (ent->tag[0] && esp->rev == ESP100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) /* ESP100 lacks select w/atn3 command, use select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) * and stop instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) select_and_stop = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) if (select_and_stop) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) esp->cmd_bytes_left = cmd->cmd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) esp->cmd_bytes_ptr = &cmd->cmnd[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (ent->tag[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) for (i = esp->msg_out_len - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) i >= 0; i--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) esp->msg_out[i + 2] = esp->msg_out[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) esp->msg_out[0] = ent->tag[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) esp->msg_out[1] = ent->tag[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) esp->msg_out_len += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) start_cmd = ESP_CMD_SELAS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) esp->select_state = ESP_SELECT_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) start_cmd = ESP_CMD_SELA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) if (ent->tag[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) *p++ = ent->tag[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) *p++ = ent->tag[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) start_cmd = ESP_CMD_SA3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) for (i = 0; i < cmd->cmd_len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) *p++ = cmd->cmnd[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) esp->select_state = ESP_SELECT_BASIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) val = tgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) esp_write8(val, ESP_BUSID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) esp_write_tgt_sync(esp, tgt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) esp_write_tgt_config3(esp, tgt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) val = (p - esp->command_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) if (esp_debug & ESP_DEBUG_SCSICMD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) for (i = 0; i < cmd->cmd_len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) printk("%02x ", cmd->cmnd[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) printk("]\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) esp_send_dma_cmd(esp, val, 16, start_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) struct list_head *head = &esp->esp_cmd_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) struct esp_cmd_entry *ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) if (list_empty(head)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) ret = list_entry(head->next, struct esp_cmd_entry, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) list_del(&ret->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) memset(ret, 0, sizeof(*ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) list_add(&ent->list, &esp->esp_cmd_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) struct scsi_cmnd *cmd, unsigned int result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) struct scsi_device *dev = cmd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) int tgt = dev->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) int lun = dev->lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) esp->active_cmd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) esp_unmap_dma(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) esp_free_lun_tag(ent, dev->hostdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) cmd->result = result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) if (ent->eh_done) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) complete(ent->eh_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) ent->eh_done = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) esp_unmap_sense(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) /* Restore the message/status bytes to what we actually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) * saw originally. Also, report that we are providing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) * the sense data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) cmd->result = ((DRIVER_SENSE << 24) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) (DID_OK << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) (COMMAND_COMPLETE << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) (SAM_STAT_CHECK_CONDITION << 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) if (esp_debug & ESP_DEBUG_AUTOSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) esp->host->unique_id, tgt, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) for (i = 0; i < 18; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) printk("%02x ", cmd->sense_buffer[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) printk("]\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) list_del(&ent->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) esp_put_ent(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) esp_maybe_execute_command(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) static unsigned int compose_result(unsigned int status, unsigned int message,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) unsigned int driver_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) return (status | (message << 8) | (driver_code << 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) struct scsi_device *dev = ent->cmd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) struct esp_lun_data *lp = dev->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) scsi_track_queue_full(dev, lp->num_tagged - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) static int esp_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) struct scsi_device *dev = cmd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) struct esp *esp = shost_priv(dev->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) struct esp_cmd_priv *spriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) struct esp_cmd_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) ent = esp_get_ent(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) if (!ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) return SCSI_MLQUEUE_HOST_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) ent->cmd = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) cmd->scsi_done = done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) spriv = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) spriv->num_sg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) list_add_tail(&ent->list, &esp->queued_cmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) esp_maybe_execute_command(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) static DEF_SCSI_QCMD(esp_queuecommand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) static int esp_check_gross_error(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) if (esp->sreg & ESP_STAT_SPAM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) /* Gross Error, could be one of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) * - top of fifo overwritten
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) * - top of command register overwritten
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) * - DMA programmed with wrong direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) * - improper phase change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) "Gross error sreg[%02x]\n", esp->sreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) /* XXX Reset the chip. XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) static int esp_check_spur_intr(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) switch (esp->rev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) case ESP100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) case ESP100A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) /* The interrupt pending bit of the status register cannot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) * be trusted on these revisions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) esp->sreg &= ~ESP_STAT_INTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) if (!(esp->sreg & ESP_STAT_INTR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) if (esp->ireg & ESP_INTR_SR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) /* If the DMA is indicating interrupt pending and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * ESP is not, the only possibility is a DMA error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (!esp->ops->dma_error(esp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) "Spurious irq, sreg=%02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) esp->sreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) shost_printk(KERN_ERR, esp->host, "DMA error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) /* XXX Reset the chip. XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) static void esp_schedule_reset(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) esp_log_reset("esp_schedule_reset() from %ps\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) __builtin_return_address(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) esp->flags |= ESP_FLAG_RESETTING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) esp_event(esp, ESP_EVENT_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) /* In order to avoid having to add a special half-reconnected state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) * into the driver we just sit here and poll through the rest of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) * the reselection process to get the tag message bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) struct esp_lun_data *lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) struct esp_cmd_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) if (!lp->num_tagged) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) "Reconnect w/num_tagged==0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) esp_log_reconnect("reconnect tag, ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (esp->ops->irq_pending(esp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) if (i == ESP_QUICKIRQ_LIMIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) "Reconnect IRQ1 timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) esp->sreg = esp_read8(ESP_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) esp->ireg = esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) esp_log_reconnect("IRQ(%d:%x:%x), ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) i, esp->ireg, esp->sreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) if (esp->ireg & ESP_INTR_DC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) "Reconnect, got disconnect.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) "Reconnect, not MIP sreg[%02x].\n", esp->sreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) /* DMA in the tag bytes... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) esp->command_block[0] = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) esp->command_block[1] = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) esp->ops->send_dma_cmd(esp, esp->command_block_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) /* ACK the message. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) scsi_esp_cmd(esp, ESP_CMD_MOK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) if (esp->ops->irq_pending(esp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) esp->sreg = esp_read8(ESP_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) esp->ireg = esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) if (esp->ireg & ESP_INTR_FDONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) if (i == ESP_RESELECT_TAG_LIMIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) shost_printk(KERN_ERR, esp->host, "Reconnect IRQ2 timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) esp->ops->dma_drain(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) esp->ops->dma_invalidate(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) i, esp->ireg, esp->sreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) esp->command_block[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) esp->command_block[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) esp->command_block[0] > ORDERED_QUEUE_TAG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) "Reconnect, bad tag type %02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) esp->command_block[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) ent = lp->tagged_cmds[esp->command_block[1]];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) if (!ent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) "Reconnect, no entry for tag %02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) esp->command_block[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) return ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) static int esp_reconnect(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) struct esp_cmd_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) struct esp_target_data *tp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) struct esp_lun_data *lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) struct scsi_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) int target, lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) BUG_ON(esp->active_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) /* FASHME puts the target and lun numbers directly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) * into the fifo.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) target = esp->fifo[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) lun = esp->fifo[1] & 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) u8 bits = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) /* Older chips put the lun directly into the fifo, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) * the target is given as a sample of the arbitration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) * lines on the bus at reselection time. So we should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) * see the ID of the ESP and the one reconnecting target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) * set in the bitmap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) if (!(bits & esp->scsi_id_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) goto do_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) bits &= ~esp->scsi_id_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) if (!bits || (bits & (bits - 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) goto do_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) target = ffs(bits) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) lun = (esp_read8(ESP_FDATA) & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) if (esp->rev == ESP100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) u8 ireg = esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) /* This chip has a bug during reselection that can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) * cause a spurious illegal-command interrupt, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) * we simply ACK here. Another possibility is a bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) * reset so we must check for that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) if (ireg & ESP_INTR_SR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) goto do_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) scsi_esp_cmd(esp, ESP_CMD_NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) esp_write_tgt_sync(esp, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) esp_write_tgt_config3(esp, target);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) scsi_esp_cmd(esp, ESP_CMD_MOK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) ESP_BUSID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) tp = &esp->target[target];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) dev = __scsi_device_lookup_by_target(tp->starget, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) "Reconnect, no lp tgt[%u] lun[%u]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) target, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) goto do_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) lp = dev->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) ent = lp->non_tagged_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) if (!ent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) ent = esp_reconnect_with_tag(esp, lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) if (!ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) goto do_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) esp->active_cmd = ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) esp_event(esp, ESP_EVENT_CHECK_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) esp_restore_pointers(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) do_reset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) static int esp_finish_select(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) struct esp_cmd_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) struct scsi_cmnd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) /* No longer selecting. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) esp->select_state = ESP_SELECT_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) if (esp->ops->dma_error(esp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) /* If we see a DMA error during or as a result of selection,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) * all bets are off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) esp->ops->dma_invalidate(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) struct esp_target_data *tp = &esp->target[cmd->device->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) /* Carefully back out of the selection attempt. Release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) * resources (such as DMA mapping & TAG) and reset state (such
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) * as message out and command delivery variables).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) esp_unmap_dma(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) esp_free_lun_tag(ent, cmd->device->hostdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) esp->cmd_bytes_ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) esp->cmd_bytes_left = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) esp_unmap_sense(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) /* Now that the state is unwound properly, put back onto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) * the issue queue. This command is no longer active.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) list_move(&ent->list, &esp->queued_cmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) esp->active_cmd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) /* Return value ignored by caller, it directly invokes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) * esp_reconnect().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) if (esp->ireg == ESP_INTR_DC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) struct scsi_device *dev = cmd->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) /* Disconnect. Make sure we re-negotiate sync and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) * wide parameters if this target starts responding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) * again in the future.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) scsi_esp_cmd(esp, ESP_CMD_ESEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) /* Selection successful. On pre-FAST chips we have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) * to do a NOP and possibly clean out the FIFO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) if (esp->rev <= ESP236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) scsi_esp_cmd(esp, ESP_CMD_NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) if (!fcnt &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) (!esp->prev_soff ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) esp_flush_fifo(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) /* If we are doing a Select And Stop command, negotiation, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) * we'll do the right thing as we transition to the next phase.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) esp_event(esp, ESP_EVENT_CHECK_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) "Unexpected selection completion ireg[%x]\n", esp->ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) int fifo_cnt, ecount, bytes_sent, flush_fifo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) fifo_cnt <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) ecount = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) if (!(esp->sreg & ESP_STAT_TCNT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) (((unsigned int)esp_read8(ESP_TCMED)) << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) if (esp->rev == PCSCSI && (esp->config2 & ESP_CONFIG2_FENAB))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) ecount |= ((unsigned int)esp_read8(ESP_TCHI)) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) bytes_sent = esp->data_dma_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) bytes_sent -= ecount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) bytes_sent -= esp->send_cmd_residual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) * The am53c974 has a DMA 'pecularity'. The doc states:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) * In some odd byte conditions, one residual byte will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) * be left in the SCSI FIFO, and the FIFO Flags will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) * never count to '0 '. When this happens, the residual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) * byte should be retrieved via PIO following completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) * of the BLAST operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) if (fifo_cnt == 1 && ent->flags & ESP_CMD_FLAG_RESIDUAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) size_t count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) size_t offset = bytes_sent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) u8 bval = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) ent->sense_ptr[bytes_sent] = bval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) u8 *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) ptr = scsi_kmap_atomic_sg(p->cur_sg, p->num_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) &offset, &count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) if (likely(ptr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) *(ptr + offset) = bval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) scsi_kunmap_atomic_sg(ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) bytes_sent += fifo_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) ent->flags &= ~ESP_CMD_FLAG_RESIDUAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) if (!(ent->flags & ESP_CMD_FLAG_WRITE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) bytes_sent -= fifo_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) flush_fifo = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) if (!esp->prev_soff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) /* Synchronous data transfer, always flush fifo. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) flush_fifo = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) if (esp->rev == ESP100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) u32 fflags, phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) /* ESP100 has a chip bug where in the synchronous data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) * phase it can mistake a final long REQ pulse from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) * target as an extra data byte. Fun.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) * To detect this case we resample the status register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) * and fifo flags. If we're still in a data phase and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) * we see spurious chunks in the fifo, we return error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) * to the caller which should reset and set things up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) * such that we only try future transfers to this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) * target in synchronous mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) esp->sreg = esp_read8(ESP_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) phase = esp->sreg & ESP_STAT_PMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) fflags = esp_read8(ESP_FFLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) if ((phase == ESP_DOP &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) (fflags & ESP_FF_ONOTZERO)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) (phase == ESP_DIP &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) (fflags & ESP_FF_FBYTES)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) if (!(ent->flags & ESP_CMD_FLAG_WRITE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) flush_fifo = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) if (flush_fifo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) esp_flush_fifo(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) return bytes_sent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) u8 scsi_period, u8 scsi_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) u8 esp_stp, u8 esp_soff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) spi_period(tp->starget) = scsi_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) spi_offset(tp->starget) = scsi_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) if (esp_soff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) esp_stp &= 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) esp_soff |= esp->radelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) if (esp->rev >= FAS236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) u8 bit = ESP_CONFIG3_FSCSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) if (esp->rev >= FAS100A)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) bit = ESP_CONFIG3_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) if (scsi_period < 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) esp_soff &= ~esp->radelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) tp->esp_config3 |= bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) tp->esp_config3 &= ~bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) esp->prev_cfg3 = tp->esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) esp_write8(esp->prev_cfg3, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) tp->esp_period = esp->prev_stp = esp_stp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) tp->esp_offset = esp->prev_soff = esp_soff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) esp_write8(esp_soff, ESP_SOFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) esp_write8(esp_stp, ESP_STP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) spi_display_xfer_agreement(tp->starget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) static void esp_msgin_reject(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) struct esp_cmd_entry *ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) struct esp_target_data *tp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) int tgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) tgt = cmd->device->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) tp = &esp->target[tgt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) if (tp->flags & ESP_TGT_NEGO_WIDE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) if (!esp_need_to_nego_sync(tp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) tp->flags &= ~ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) scsi_esp_cmd(esp, ESP_CMD_RATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) esp->msg_out_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) spi_populate_sync_msg(&esp->msg_out[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) tp->nego_goal_period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) tp->nego_goal_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) tp->flags |= ESP_TGT_NEGO_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) if (tp->flags & ESP_TGT_NEGO_SYNC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) tp->esp_period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) tp->esp_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) esp_setsync(esp, tp, 0, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) scsi_esp_cmd(esp, ESP_CMD_RATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) shost_printk(KERN_INFO, esp->host, "Unexpected MESSAGE REJECT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) u8 period = esp->msg_in[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) u8 offset = esp->msg_in[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) u8 stp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) if (!(tp->flags & ESP_TGT_NEGO_SYNC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) goto do_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) if (offset > 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) goto do_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) if (offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) int one_clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) if (period > esp->max_period) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) period = offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) goto do_sdtr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) if (period < esp->min_period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) goto do_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) one_clock = esp->ccycle / 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) stp = DIV_ROUND_UP(period << 2, one_clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) if (stp && esp->rev >= FAS236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) if (stp >= 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) stp--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) stp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) esp_setsync(esp, tp, period, offset, stp, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) do_reject:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) esp->msg_out[0] = MESSAGE_REJECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) esp->msg_out_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) do_sdtr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) tp->nego_goal_period = period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) tp->nego_goal_offset = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) esp->msg_out_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) spi_populate_sync_msg(&esp->msg_out[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) tp->nego_goal_period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) tp->nego_goal_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) int size = 8 << esp->msg_in[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) u8 cfg3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) if (esp->rev != FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) goto do_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) if (size != 8 && size != 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) goto do_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) if (!(tp->flags & ESP_TGT_NEGO_WIDE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) goto do_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) cfg3 = tp->esp_config3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) if (size == 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) tp->flags |= ESP_TGT_WIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) cfg3 |= ESP_CONFIG3_EWIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) tp->flags &= ~ESP_TGT_WIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) cfg3 &= ~ESP_CONFIG3_EWIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) tp->esp_config3 = cfg3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) esp->prev_cfg3 = cfg3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) esp_write8(cfg3, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) tp->flags &= ~ESP_TGT_NEGO_WIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) spi_period(tp->starget) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) spi_offset(tp->starget) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) if (!esp_need_to_nego_sync(tp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) tp->flags &= ~ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) scsi_esp_cmd(esp, ESP_CMD_RATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) esp->msg_out_len =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) spi_populate_sync_msg(&esp->msg_out[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) tp->nego_goal_period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) tp->nego_goal_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) tp->flags |= ESP_TGT_NEGO_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) do_reject:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) esp->msg_out[0] = MESSAGE_REJECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) esp->msg_out_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) static void esp_msgin_extended(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) struct esp_cmd_entry *ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) struct esp_target_data *tp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) int tgt = cmd->device->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) tp = &esp->target[tgt];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) if (esp->msg_in[2] == EXTENDED_SDTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) esp_msgin_sdtr(esp, tp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) if (esp->msg_in[2] == EXTENDED_WDTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) esp_msgin_wdtr(esp, tp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) "Unexpected extended msg type %x\n", esp->msg_in[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) esp->msg_out[0] = MESSAGE_REJECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) esp->msg_out_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) /* Analyze msgin bytes received from target so far. Return non-zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) * if there are more bytes needed to complete the message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) static int esp_msgin_process(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) u8 msg0 = esp->msg_in[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) int len = esp->msg_in_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) if (msg0 & 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) /* Identify */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) "Unexpected msgin identify\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) switch (msg0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) case EXTENDED_MESSAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) if (len == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) if (len < esp->msg_in[1] + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) esp_msgin_extended(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) case IGNORE_WIDE_RESIDUE: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) struct esp_cmd_entry *ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) struct esp_cmd_priv *spriv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) if (len == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) if (esp->msg_in[1] != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) goto do_reject;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) spriv = ESP_CMD_PRIV(ent->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) spriv->cur_sg = spriv->prv_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) spriv->cur_residue = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) spriv->cur_residue++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) spriv->tot_residue++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) case NOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) case RESTORE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) esp_restore_pointers(esp, esp->active_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) case SAVE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) esp_save_pointers(esp, esp->active_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) case COMMAND_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) case DISCONNECT: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) struct esp_cmd_entry *ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) ent->message = msg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) esp_event(esp, ESP_EVENT_FREE_BUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) case MESSAGE_REJECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) esp_msgin_reject(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) do_reject:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) esp->msg_out[0] = MESSAGE_REJECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) esp->msg_out_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) static int esp_process_event(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) int write, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) again:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) write = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) esp_log_event("process event %d phase %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) esp->event, esp->sreg & ESP_STAT_PMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) switch (esp->event) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) case ESP_EVENT_CHECK_PHASE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) switch (esp->sreg & ESP_STAT_PMASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) case ESP_DOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) esp_event(esp, ESP_EVENT_DATA_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) case ESP_DIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) esp_event(esp, ESP_EVENT_DATA_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) case ESP_STATP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) esp_flush_fifo(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) esp_event(esp, ESP_EVENT_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) case ESP_MOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) esp_event(esp, ESP_EVENT_MSGOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) case ESP_MIP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) esp_event(esp, ESP_EVENT_MSGIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) case ESP_CMDP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) esp_event(esp, ESP_EVENT_CMD_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) "Unexpected phase, sreg=%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) esp->sreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) goto again;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) case ESP_EVENT_DATA_IN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) write = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) case ESP_EVENT_DATA_OUT: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) struct esp_cmd_entry *ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) unsigned int dma_len = esp_cur_dma_len(ent, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) if (esp->rev == ESP100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) scsi_esp_cmd(esp, ESP_CMD_NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) if (write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) ent->flags |= ESP_CMD_FLAG_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) ent->flags &= ~ESP_CMD_FLAG_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) if (esp->ops->dma_length_limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) dma_len = esp->ops->dma_length_limit(esp, dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) dma_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) esp->data_dma_len = dma_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) if (!dma_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) "DMA length is zero!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) "cur adr[%08llx] len[%08x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) (unsigned long long)esp_cur_dma_addr(ent, cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) esp_cur_dma_len(ent, cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) esp_log_datastart("start data addr[%08llx] len[%u] write(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) (unsigned long long)dma_addr, dma_len, write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) write, ESP_CMD_DMA | ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) esp_event(esp, ESP_EVENT_DATA_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) case ESP_EVENT_DATA_DONE: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) struct esp_cmd_entry *ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) int bytes_sent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) if (esp->ops->dma_error(esp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) "data done, DMA error, resetting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) if (ent->flags & ESP_CMD_FLAG_WRITE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) /* XXX parity errors, etc. XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) esp->ops->dma_drain(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) esp->ops->dma_invalidate(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) if (esp->ireg != ESP_INTR_BSERV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) /* We should always see exactly a bus-service
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) * interrupt at the end of a successful transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) "data done, not BSERV, resetting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) esp_log_datadone("data done flgs[%x] sent[%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) ent->flags, bytes_sent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) if (bytes_sent < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) /* XXX force sync mode for this target XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) esp_advance_dma(esp, ent, cmd, bytes_sent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) esp_event(esp, ESP_EVENT_CHECK_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) goto again;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) case ESP_EVENT_STATUS: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) struct esp_cmd_entry *ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) if (esp->ireg & ESP_INTR_FDONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) ent->status = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) ent->message = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) scsi_esp_cmd(esp, ESP_CMD_MOK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) } else if (esp->ireg == ESP_INTR_BSERV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) ent->status = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) ent->message = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) esp_event(esp, ESP_EVENT_MSGIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) if (ent->message != COMMAND_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) "Unexpected message %x in status\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) ent->message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) esp_event(esp, ESP_EVENT_FREE_BUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) case ESP_EVENT_FREE_BUS: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) struct esp_cmd_entry *ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) if (ent->message == COMMAND_COMPLETE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) ent->message == DISCONNECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) scsi_esp_cmd(esp, ESP_CMD_ESEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) if (ent->message == COMMAND_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) esp_log_cmddone("Command done status[%x] message[%x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) ent->status, ent->message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) if (ent->status == SAM_STAT_TASK_SET_FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) esp_event_queue_full(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) if (ent->status == SAM_STAT_CHECK_CONDITION &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) esp_autosense(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) esp_cmd_is_done(esp, ent, cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) compose_result(ent->status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) ent->message,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) DID_OK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) } else if (ent->message == DISCONNECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) esp_log_disconnect("Disconnecting tgt[%d] tag[%x:%x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) cmd->device->id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) ent->tag[0], ent->tag[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) esp->active_cmd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) esp_maybe_execute_command(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) "Unexpected message %x in freebus\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) ent->message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) if (esp->active_cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) case ESP_EVENT_MSGOUT: {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) if (esp_debug & ESP_DEBUG_MSGOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) printk("ESP: Sending message [ ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) for (i = 0; i < esp->msg_out_len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) printk("%02x ", esp->msg_out[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) printk("]\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) /* Always use the fifo. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) for (i = 0; i < esp->msg_out_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) esp_write8(esp->msg_out[i], ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) esp_write8(0, ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) scsi_esp_cmd(esp, ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) if (esp->msg_out_len == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) esp_write8(esp->msg_out[0], ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) scsi_esp_cmd(esp, ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) } else if (esp->flags & ESP_FLAG_USE_FIFO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) for (i = 0; i < esp->msg_out_len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) esp_write8(esp->msg_out[i], ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) scsi_esp_cmd(esp, ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) /* Use DMA. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) memcpy(esp->command_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) esp->msg_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) esp->msg_out_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) esp->ops->send_dma_cmd(esp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) esp->command_block_dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) esp->msg_out_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) esp->msg_out_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) ESP_CMD_DMA|ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) esp_event(esp, ESP_EVENT_MSGOUT_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) case ESP_EVENT_MSGOUT_DONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) if (esp->msg_out_len > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) esp->ops->dma_invalidate(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) /* XXX if the chip went into disconnected mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) * we can't run the phase state machine anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) if (!(esp->ireg & ESP_INTR_DC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) scsi_esp_cmd(esp, ESP_CMD_NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) esp->msg_out_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) esp_event(esp, ESP_EVENT_CHECK_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) goto again;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) case ESP_EVENT_MSGIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) if (esp->ireg & ESP_INTR_BSERV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) if (!(esp_read8(ESP_STATUS2) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) ESP_STAT2_FEMPTY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) if (esp->rev == ESP100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) scsi_esp_cmd(esp, ESP_CMD_NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) scsi_esp_cmd(esp, ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) if (esp->ireg & ESP_INTR_FDONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) val = esp->fifo[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) val = esp_read8(ESP_FDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) esp->msg_in[esp->msg_in_len++] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) esp_log_msgin("Got msgin byte %x\n", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) if (!esp_msgin_process(esp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) esp->msg_in_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) if (esp->rev == FASHME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) scsi_esp_cmd(esp, ESP_CMD_MOK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) /* Check whether a bus reset is to be done next */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) if (esp->event == ESP_EVENT_RESET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) if (esp->event != ESP_EVENT_FREE_BUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) esp_event(esp, ESP_EVENT_CHECK_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) "MSGIN neither BSERV not FDON, resetting");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) case ESP_EVENT_CMD_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) memcpy(esp->command_block, esp->cmd_bytes_ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) esp->cmd_bytes_left);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) esp_send_dma_cmd(esp, esp->cmd_bytes_left, 16, ESP_CMD_TI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) esp_event(esp, ESP_EVENT_CMD_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) case ESP_EVENT_CMD_DONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) esp->ops->dma_invalidate(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) if (esp->ireg & ESP_INTR_BSERV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) esp_event(esp, ESP_EVENT_CHECK_PHASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) goto again;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) case ESP_EVENT_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) scsi_esp_cmd(esp, ESP_CMD_RS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) "Unexpected event %x, resetting\n", esp->event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) esp_unmap_dma(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) esp_free_lun_tag(ent, cmd->device->hostdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) cmd->result = DID_RESET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) if (ent->flags & ESP_CMD_FLAG_AUTOSENSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) esp_unmap_sense(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) list_del(&ent->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) esp_put_ent(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) static void esp_clear_hold(struct scsi_device *dev, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) struct esp_lun_data *lp = dev->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) BUG_ON(lp->num_tagged);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) lp->hold = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) static void esp_reset_cleanup(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) struct esp_cmd_entry *ent, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) struct scsi_cmnd *cmd = ent->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) list_del(&ent->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) cmd->result = DID_RESET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) esp_put_ent(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) if (ent == esp->active_cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) esp->active_cmd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) esp_reset_cleanup_one(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) BUG_ON(esp->active_cmd != NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) /* Force renegotiation of sync/wide transfers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) for (i = 0; i < ESP_MAX_TARGET; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) struct esp_target_data *tp = &esp->target[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) tp->esp_period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) tp->esp_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) ESP_CONFIG3_FSCSI |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) ESP_CONFIG3_FAST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) tp->flags &= ~ESP_TGT_WIDE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) tp->flags |= ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) if (tp->starget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) __starget_for_each_device(tp->starget, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) esp_clear_hold);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) esp->flags &= ~ESP_FLAG_RESETTING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) /* Runs under host->lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) static void __esp_interrupt(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) int finish_reset, intr_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) u8 phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) * Once INTRPT is read STATUS and SSTEP are cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) esp->sreg = esp_read8(ESP_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) esp->seqreg = esp_read8(ESP_SSTEP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) esp->ireg = esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) if (esp->flags & ESP_FLAG_RESETTING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) finish_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) if (esp_check_gross_error(esp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) finish_reset = esp_check_spur_intr(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) if (finish_reset < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) if (esp->ireg & ESP_INTR_SR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) finish_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) if (finish_reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) esp_reset_cleanup(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) if (esp->eh_reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) complete(esp->eh_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) esp->eh_reset = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) phase = (esp->sreg & ESP_STAT_PMASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) if (esp->rev == FASHME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) if (((phase != ESP_DIP && phase != ESP_DOP) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) esp->select_state == ESP_SELECT_NONE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) esp->event != ESP_EVENT_STATUS &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) esp->event != ESP_EVENT_DATA_DONE) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) (esp->ireg & ESP_INTR_RSEL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) esp->sreg2 = esp_read8(ESP_STATUS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) (esp->sreg2 & ESP_STAT2_F1BYTE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) hme_read_fifo(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) esp_log_intr("intr sreg[%02x] seqreg[%02x] "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) "sreg2[%02x] ireg[%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) intr_done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) shost_printk(KERN_INFO, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) "unexpected IREG %02x\n", esp->ireg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) if (esp->ireg & ESP_INTR_IC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) esp_dump_cmd_log(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) esp_schedule_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) if (esp->ireg & ESP_INTR_RSEL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) if (esp->active_cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) (void) esp_finish_select(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) intr_done = esp_reconnect(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) /* Some combination of FDONE, BSERV, DC. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) if (esp->select_state != ESP_SELECT_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) intr_done = esp_finish_select(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) while (!intr_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) intr_done = esp_process_event(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) irqreturn_t scsi_esp_intr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) struct esp *esp = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) irqreturn_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) spin_lock_irqsave(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) if (esp->ops->irq_pending(esp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) __esp_interrupt(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) if (esp->ops->irq_pending(esp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) if (i == ESP_QUICKIRQ_LIMIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) EXPORT_SYMBOL(scsi_esp_intr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) static void esp_get_revision(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) if (esp->config2 == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) esp_write8(esp->config2, ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) val = esp_read8(ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) val &= ~ESP_CONFIG2_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) esp->config2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) * If what we write to cfg2 does not come back,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) * cfg2 is not implemented.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) * Therefore this must be a plain esp100.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) esp->rev = ESP100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) esp_set_all_config3(esp, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) esp->prev_cfg3 = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) esp_write8(esp->config2, ESP_CFG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) esp_write8(0, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) esp_write8(esp->prev_cfg3, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) val = esp_read8(ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) if (val != 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) /* The cfg2 register is implemented, however
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) * cfg3 is not, must be esp100a.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) esp->rev = ESP100A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) esp_set_all_config3(esp, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) esp->prev_cfg3 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) esp_write8(esp->prev_cfg3, ESP_CFG3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) /* All of cfg{1,2,3} implemented, must be one of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) * the fas variants, figure out which one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) esp->rev = FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) esp->sync_defp = SYNC_DEFP_FAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) esp->rev = ESP236;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) static void esp_init_swstate(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) INIT_LIST_HEAD(&esp->queued_cmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) INIT_LIST_HEAD(&esp->active_cmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) INIT_LIST_HEAD(&esp->esp_cmd_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) /* Start with a clear state, domain validation (via ->slave_configure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) * commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) for (i = 0 ; i < ESP_MAX_TARGET; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) esp->target[i].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) esp->target[i].nego_goal_period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) esp->target[i].nego_goal_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) esp->target[i].nego_goal_width = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) esp->target[i].nego_goal_tags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) /* This places the ESP into a known state at boot time. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) static void esp_bootup_reset(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) /* Reset the DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) esp->ops->reset_dma(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) /* Reset the ESP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) esp_reset_esp(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) /* Reset the SCSI bus, but tell ESP not to generate an irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) val = esp_read8(ESP_CFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) val |= ESP_CONFIG1_SRRDISAB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) esp_write8(val, ESP_CFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) scsi_esp_cmd(esp, ESP_CMD_RS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) udelay(400);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) esp_write8(esp->config1, ESP_CFG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) /* Eat any bitrot in the chip and we are done... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) static void esp_set_clock_params(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) int fhz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) u8 ccf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) /* This is getting messy but it has to be done correctly or else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) * you get weird behavior all over the place. We are trying to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) * basically figure out three pieces of information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) * a) Clock Conversion Factor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) * This is a representation of the input crystal clock frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) * going into the ESP on this machine. Any operation whose timing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) * is longer than 400ns depends on this value being correct. For
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) * example, you'll get blips for arbitration/selection during high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) * load or with multiple targets if this is not set correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) * b) Selection Time-Out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) * The ESP isn't very bright and will arbitrate for the bus and try
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) * to select a target forever if you let it. This value tells the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) * ESP when it has taken too long to negotiate and that it should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) * interrupt the CPU so we can see what happened. The value is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) * computed as follows (from NCR/Symbios chip docs).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) * (Time Out Period) * (Input Clock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) * STO = ----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) * (8192) * (Clock Conversion Factor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) * c) Imperical constants for synchronous offset and transfer period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) * register values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) * This entails the smallest and largest sync period we could ever
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) * handle on this ESP.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) fhz = esp->cfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) ccf = ((fhz / 1000000) + 4) / 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) if (ccf == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) ccf = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) /* If we can't find anything reasonable, just assume 20MHZ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) * This is the clock frequency of the older sun4c's where I've
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) * been unable to find the clock-frequency PROM property. All
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) * other machines provide useful values it seems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) if (fhz <= 5000000 || ccf < 1 || ccf > 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) fhz = 20000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) ccf = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) esp->cfact = (ccf == 8 ? 0 : ccf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) esp->cfreq = fhz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) esp->ccycle = ESP_HZ_TO_CYCLE(fhz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) esp->ctick = ESP_TICK(ccf, esp->ccycle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) esp->neg_defp = ESP_NEG_DEFP(fhz, ccf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) esp->sync_defp = SYNC_DEFP_SLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) static const char *esp_chip_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) "ESP100",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) "ESP100A",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) "ESP236",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) "FAS236",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) "AM53C974",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) "53CF9x-2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) "FAS100A",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) "FAST",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) "FASHME",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) static struct scsi_transport_template *esp_transport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) int scsi_esp_register(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) static int instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) if (!esp->num_tags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) esp->num_tags = ESP_DEFAULT_TAGS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) esp->host->transportt = esp_transport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) esp->host->max_lun = ESP_MAX_LUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) esp->host->cmd_per_lun = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) esp->host->unique_id = instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) esp_set_clock_params(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) esp_get_revision(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) esp_init_swstate(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) esp_bootup_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) dev_printk(KERN_INFO, esp->dev, "esp%u: regs[%1p:%1p] irq[%u]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) esp->host->unique_id, esp->regs, esp->dma_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) esp->host->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) dev_printk(KERN_INFO, esp->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) "esp%u: is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) esp->host->unique_id, esp_chip_names[esp->rev],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) /* Let the SCSI bus reset settle. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) ssleep(esp_bus_reset_settle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) err = scsi_add_host(esp->host, esp->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) instance++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) scsi_scan_host(esp->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) EXPORT_SYMBOL(scsi_esp_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) void scsi_esp_unregister(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) scsi_remove_host(esp->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) EXPORT_SYMBOL(scsi_esp_unregister);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) static int esp_target_alloc(struct scsi_target *starget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) struct esp_target_data *tp = &esp->target[starget->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) tp->starget = starget;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) static void esp_target_destroy(struct scsi_target *starget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) struct esp_target_data *tp = &esp->target[starget->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) tp->starget = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) static int esp_slave_alloc(struct scsi_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) struct esp *esp = shost_priv(dev->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) struct esp_target_data *tp = &esp->target[dev->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) struct esp_lun_data *lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) lp = kzalloc(sizeof(*lp), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) if (!lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) dev->hostdata = lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) spi_min_period(tp->starget) = esp->min_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) spi_max_offset(tp->starget) = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) spi_max_width(tp->starget) = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) spi_max_width(tp->starget) = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) static int esp_slave_configure(struct scsi_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) struct esp *esp = shost_priv(dev->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) struct esp_target_data *tp = &esp->target[dev->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) if (dev->tagged_supported)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) scsi_change_queue_depth(dev, esp->num_tags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) tp->flags |= ESP_TGT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) if (!spi_initial_dv(dev->sdev_target))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) spi_dv_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) static void esp_slave_destroy(struct scsi_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) struct esp_lun_data *lp = dev->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) kfree(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) dev->hostdata = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) struct esp *esp = shost_priv(cmd->device->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) struct esp_cmd_entry *ent, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) struct completion eh_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) /* XXX This helps a lot with debugging but might be a bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) * XXX much for the final driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) spin_lock_irqsave(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) shost_printk(KERN_ERR, esp->host, "Aborting command [%p:%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) cmd, cmd->cmnd[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) if (ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) shost_printk(KERN_ERR, esp->host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) "Current command [%p:%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) ent->cmd, ent->cmd->cmnd[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) list_for_each_entry(ent, &esp->queued_cmds, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) shost_printk(KERN_ERR, esp->host, "Queued command [%p:%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) ent->cmd, ent->cmd->cmnd[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) list_for_each_entry(ent, &esp->active_cmds, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) shost_printk(KERN_ERR, esp->host, " Active command [%p:%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) ent->cmd, ent->cmd->cmnd[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) esp_dump_cmd_log(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) spin_lock_irqsave(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) ent = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) list_for_each_entry(tmp, &esp->queued_cmds, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) if (tmp->cmd == cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) ent = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) if (ent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) /* Easiest case, we didn't even issue the command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) * yet so it is trivial to abort.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) list_del(&ent->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) cmd->result = DID_ABORT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) esp_put_ent(esp, ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) goto out_success;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) init_completion(&eh_done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) ent = esp->active_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) if (ent && ent->cmd == cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) /* Command is the currently active command on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) * the bus. If we already have an output message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) * pending, no dice.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) if (esp->msg_out_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) goto out_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) /* Send out an abort, encouraging the target to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) * go to MSGOUT phase by asserting ATN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) esp->msg_out[0] = ABORT_TASK_SET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) esp->msg_out_len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) ent->eh_done = &eh_done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) scsi_esp_cmd(esp, ESP_CMD_SATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) /* The command is disconnected. This is not easy to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) * abort. For now we fail and let the scsi error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) * handling layer go try a scsi bus reset or host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) * reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) * What we could do is put together a scsi command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) * solely for the purpose of sending an abort message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) * to the target. Coming up with all the code to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) * cook up scsi commands, special case them everywhere,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) * etc. is for questionable gain and it would be better
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) * if the generic scsi error handling layer could do at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) * least some of that for us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) * Anyways this is an area for potential future improvement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) * in this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) goto out_failure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) spin_lock_irqsave(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) ent->eh_done = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) out_success:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) out_failure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) /* XXX This might be a good location to set ESP_TGT_BROKEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) * XXX since we know which target/lun in particular is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) * XXX causing trouble.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) struct esp *esp = shost_priv(cmd->device->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) struct completion eh_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) init_completion(&eh_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) spin_lock_irqsave(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) esp->eh_reset = &eh_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) /* XXX This is too simple... We should add lots of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) * XXX checks here so that if we find that the chip is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) * XXX very wedged we return failure immediately so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) * XXX that we can perform a full chip reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) esp->flags |= ESP_FLAG_RESETTING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) scsi_esp_cmd(esp, ESP_CMD_RS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) ssleep(esp_bus_reset_settle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) spin_lock_irqsave(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) esp->eh_reset = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) /* All bets are off, reset the entire device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) struct esp *esp = shost_priv(cmd->device->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) spin_lock_irqsave(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) esp_bootup_reset(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) esp_reset_cleanup(esp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) spin_unlock_irqrestore(esp->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) ssleep(esp_bus_reset_settle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) static const char *esp_info(struct Scsi_Host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) return "esp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) struct scsi_host_template scsi_esp_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) .module = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) .name = "esp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) .info = esp_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) .queuecommand = esp_queuecommand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) .target_alloc = esp_target_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) .target_destroy = esp_target_destroy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) .slave_alloc = esp_slave_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) .slave_configure = esp_slave_configure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) .slave_destroy = esp_slave_destroy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) .eh_abort_handler = esp_eh_abort_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) .eh_bus_reset_handler = esp_eh_bus_reset_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) .eh_host_reset_handler = esp_eh_host_reset_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) .can_queue = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) .this_id = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) .sg_tablesize = SG_ALL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) .max_sectors = 0xffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) .skip_settle_delay = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) EXPORT_SYMBOL(scsi_esp_template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) static void esp_get_signalling(struct Scsi_Host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) struct esp *esp = shost_priv(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) enum spi_signal_type type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) if (esp->flags & ESP_FLAG_DIFFERENTIAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) type = SPI_SIGNAL_HVD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) type = SPI_SIGNAL_SE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) spi_signalling(host) = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) static void esp_set_offset(struct scsi_target *target, int offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) struct Scsi_Host *host = dev_to_shost(target->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) struct esp *esp = shost_priv(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) struct esp_target_data *tp = &esp->target[target->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) if (esp->flags & ESP_FLAG_DISABLE_SYNC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) tp->nego_goal_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) tp->nego_goal_offset = offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) tp->flags |= ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) static void esp_set_period(struct scsi_target *target, int period)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) struct Scsi_Host *host = dev_to_shost(target->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) struct esp *esp = shost_priv(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) struct esp_target_data *tp = &esp->target[target->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) tp->nego_goal_period = period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) tp->flags |= ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) static void esp_set_width(struct scsi_target *target, int width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) struct Scsi_Host *host = dev_to_shost(target->dev.parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) struct esp *esp = shost_priv(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) struct esp_target_data *tp = &esp->target[target->id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) tp->nego_goal_width = (width ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) tp->flags |= ESP_TGT_CHECK_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) static struct spi_function_template esp_transport_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) .set_offset = esp_set_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) .show_offset = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) .set_period = esp_set_period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) .show_period = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) .set_width = esp_set_width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) .show_width = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) .get_signalling = esp_get_signalling,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) static int __init esp_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) BUILD_BUG_ON(sizeof(struct scsi_pointer) <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) sizeof(struct esp_cmd_priv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) esp_transport_template = spi_attach_transport(&esp_transport_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) if (!esp_transport_template)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) static void __exit esp_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) spi_release_transport(esp_transport_template);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) MODULE_DESCRIPTION("ESP SCSI driver core");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) MODULE_VERSION(DRV_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) module_param(esp_bus_reset_settle, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) MODULE_PARM_DESC(esp_bus_reset_settle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) "ESP scsi bus reset delay in seconds");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) module_param(esp_debug, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) MODULE_PARM_DESC(esp_debug,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) "ESP bitmapped debugging message enable value:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) " 0x00000001 Log interrupt events\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) " 0x00000002 Log scsi commands\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) " 0x00000004 Log resets\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) " 0x00000008 Log message in events\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) " 0x00000010 Log message out events\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) " 0x00000020 Log command completion\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) " 0x00000040 Log disconnects\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) " 0x00000080 Log data start\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) " 0x00000100 Log data done\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) " 0x00000200 Log reconnects\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) " 0x00000400 Log auto-sense data\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) module_init(esp_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) module_exit(esp_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) #ifdef CONFIG_SCSI_ESP_PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) static inline unsigned int esp_wait_for_fifo(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) int i = 500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) if (fbytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) return fbytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) } while (--i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) shost_printk(KERN_ERR, esp->host, "FIFO is empty. sreg [%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) esp_read8(ESP_STATUS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) static inline int esp_wait_for_intr(struct esp *esp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) int i = 500000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) esp->sreg = esp_read8(ESP_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) if (esp->sreg & ESP_STAT_INTR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) } while (--i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) shost_printk(KERN_ERR, esp->host, "IRQ timeout. sreg [%02x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) esp->sreg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) #define ESP_FIFO_SIZE 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) void esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) u32 dma_count, int write, u8 cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) u8 phase = esp->sreg & ESP_STAT_PMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) cmd &= ~ESP_CMD_DMA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) esp->send_cmd_error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) if (write) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) u8 *dst = (u8 *)addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) u8 mask = ~(phase == ESP_MIP ? ESP_INTR_FDONE : ESP_INTR_BSERV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) scsi_esp_cmd(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) if (!esp_wait_for_fifo(esp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) *dst++ = readb(esp->fifo_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) --esp_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) if (!esp_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) if (esp_wait_for_intr(esp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) esp->send_cmd_error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) if ((esp->sreg & ESP_STAT_PMASK) != phase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) esp->ireg = esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) if (esp->ireg & mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) esp->send_cmd_error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) if (phase == ESP_MIP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) esp_write8(ESP_CMD_MOK, ESP_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) esp_write8(ESP_CMD_TI, ESP_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) unsigned int n = ESP_FIFO_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) u8 *src = (u8 *)addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) scsi_esp_cmd(esp, ESP_CMD_FLUSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) if (n > esp_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) n = esp_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) writesb(esp->fifo_reg, src, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) src += n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) esp_count -= n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) scsi_esp_cmd(esp, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) while (esp_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) if (esp_wait_for_intr(esp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) esp->send_cmd_error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) if ((esp->sreg & ESP_STAT_PMASK) != phase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) esp->ireg = esp_read8(ESP_INTRPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) if (esp->ireg & ~ESP_INTR_BSERV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) esp->send_cmd_error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) n = ESP_FIFO_SIZE -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) if (n > esp_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) n = esp_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) writesb(esp->fifo_reg, src, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) src += n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) esp_count -= n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) esp_write8(ESP_CMD_TI, ESP_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) esp->send_cmd_residual = esp_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) EXPORT_SYMBOL(esp_send_pio_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags