^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/drivers/scsi/esas2r/esas2r_io.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2001-2013 ATTO Technology, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * modify it under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * as published by the Free Software Foundation; either version 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * of the License, or (at your option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include "esas2r.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) void esas2r_start_request(struct esas2r_adapter *a, struct esas2r_request *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct esas2r_target *t = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct esas2r_request *startrq = rq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (unlikely(test_bit(AF_DEGRADED_MODE, &a->flags) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) test_bit(AF_POWER_DOWN, &a->flags))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (rq->vrq->scsi.function == VDA_FUNC_SCSI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) rq->req_stat = RS_SEL2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) rq->req_stat = RS_DEGRADED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) } else if (likely(rq->vrq->scsi.function == VDA_FUNC_SCSI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) t = a->targetdb + rq->target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (unlikely(t >= a->targetdb_end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) || !(t->flags & TF_USED))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) rq->req_stat = RS_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* copy in the target ID. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) rq->vrq->scsi.target_id = cpu_to_le16(t->virt_targ_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * Test if we want to report RS_SEL for missing target.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Note that if AF_DISC_PENDING is set than this will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * go on the defer queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (unlikely(t->target_state != TS_PRESENT &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) !test_bit(AF_DISC_PENDING, &a->flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) rq->req_stat = RS_SEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (unlikely(rq->req_stat != RS_PENDING)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) esas2r_complete_request(a, rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) esas2r_trace("rq=%p", rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) esas2r_trace("rq->vrq->scsi.handle=%x", rq->vrq->scsi.handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (rq->vrq->scsi.function == VDA_FUNC_SCSI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) esas2r_trace("rq->target_id=%d", rq->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) esas2r_trace("rq->vrq->scsi.flags=%x", rq->vrq->scsi.flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) spin_lock_irqsave(&a->queue_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (likely(list_empty(&a->defer_list) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) !test_bit(AF_CHPRST_PENDING, &a->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) !test_bit(AF_FLASHING, &a->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) !test_bit(AF_DISC_PENDING, &a->flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) esas2r_local_start_request(a, startrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) list_add_tail(&startrq->req_list, &a->defer_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) spin_unlock_irqrestore(&a->queue_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * Starts the specified request. all requests have RS_PENDING set when this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * routine is called. The caller is usually esas2r_start_request, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * esas2r_do_deferred_processes will start request that are deferred.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * The caller must ensure that requests can be started.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * esas2r_start_request will defer a request if there are already requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * waiting or there is a chip reset pending. once the reset condition clears,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * esas2r_do_deferred_processes will call this function to start the request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * When a request is started, it is placed on the active list and queued to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) void esas2r_local_start_request(struct esas2r_adapter *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct esas2r_request *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) esas2r_trace_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) esas2r_trace("rq=%p", rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) esas2r_trace("rq->vrq:%p", rq->vrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) esas2r_trace("rq->vrq_md->phys_addr:%x", rq->vrq_md->phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (unlikely(rq->vrq->scsi.function == VDA_FUNC_FLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) && rq->vrq->flash.sub_func == VDA_FLASH_COMMIT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) set_bit(AF_FLASHING, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) list_add_tail(&rq->req_list, &a->active_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) esas2r_start_vda_request(a, rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) esas2r_trace_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) void esas2r_start_vda_request(struct esas2r_adapter *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct esas2r_request *rq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct esas2r_inbound_list_source_entry *element;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) u32 dw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) rq->req_stat = RS_STARTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * Calculate the inbound list entry location and the current state of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * toggle bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) a->last_write++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (a->last_write >= a->list_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) a->last_write = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* update the toggle bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (test_bit(AF_COMM_LIST_TOGGLE, &a->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) clear_bit(AF_COMM_LIST_TOGGLE, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) set_bit(AF_COMM_LIST_TOGGLE, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) element =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) (struct esas2r_inbound_list_source_entry *)a->inbound_list_md.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) virt_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) + a->last_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* Set the VDA request size if it was never modified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (rq->vda_req_sz == RQ_SIZE_DEFAULT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) rq->vda_req_sz = (u16)(a->max_vdareq_size / sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) element->address = cpu_to_le64(rq->vrq_md->phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) element->length = cpu_to_le32(rq->vda_req_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* Update the write pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) dw = a->last_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (test_bit(AF_COMM_LIST_TOGGLE, &a->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) dw |= MU_ILW_TOGGLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) esas2r_trace("rq->vrq->scsi.handle:%x", rq->vrq->scsi.handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) esas2r_trace("dw:%x", dw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) esas2r_trace("rq->vda_req_sz:%x", rq->vda_req_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) esas2r_write_register_dword(a, MU_IN_LIST_WRITE, dw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * Build the scatter/gather list for an I/O request according to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * specifications placed in the s/g context. The caller must initialize
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * context prior to the initial call by calling esas2r_sgc_init().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) bool esas2r_build_sg_list_sge(struct esas2r_adapter *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct esas2r_sg_context *sgc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct esas2r_request *rq = sgc->first_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) union atto_vda_req *vrq = rq->vrq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) while (sgc->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) u32 rem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) u64 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) u32 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) len = (*sgc->get_phys_addr)(sgc, &addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (unlikely(len == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* if current length is more than what's left, stop there */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (unlikely(len > sgc->length))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) len = sgc->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) another_entry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* limit to a round number less than the maximum length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (len > SGE_LEN_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * Save the remainder of the split. Whenever we limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * an entry we come back around to build entries out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * of the leftover. We do this to prevent multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * calls to the get_phys_addr() function for an SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * that is too large.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) rem = len - SGE_LEN_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) len = SGE_LEN_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* See if we need to allocate a new SGL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (unlikely(sgc->sge.a64.curr > sgc->sge.a64.limit)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u8 sgelen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct esas2r_mem_desc *sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * If no SGls are available, return failure. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * caller can call us later with the current context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * to pick up here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) sgl = esas2r_alloc_sgl(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (unlikely(sgl == NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Calculate the length of the last SGE filled in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) sgelen = (u8)((u8 *)sgc->sge.a64.curr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) - (u8 *)sgc->sge.a64.last);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * Copy the last SGE filled in to the first entry of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * the new SGL to make room for the chain entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) memcpy(sgl->virt_addr, sgc->sge.a64.last, sgelen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* Figure out the new curr pointer in the new segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) sgc->sge.a64.curr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) (struct atto_vda_sge *)((u8 *)sgl->virt_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) sgelen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* Set the limit pointer and build the chain entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) sgc->sge.a64.limit =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) (struct atto_vda_sge *)((u8 *)sgl->virt_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) + sgl_page_size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) - sizeof(struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) atto_vda_sge));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) sgc->sge.a64.last->length = cpu_to_le32(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) SGE_CHAIN | SGE_ADDR_64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) sgc->sge.a64.last->address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) cpu_to_le64(sgl->phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * Now, if there was a previous chain entry, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * update it to contain the length of this segment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * and size of this chain. otherwise this is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * first SGL, so set the chain_offset in the request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (sgc->sge.a64.chain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) sgc->sge.a64.chain->length |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) cpu_to_le32(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ((u8 *)(sgc->sge.a64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) last + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) - (u8 *)rq->sg_table->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) virt_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) + sizeof(struct atto_vda_sge) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) LOBIT(SGE_CHAIN_SZ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) vrq->scsi.chain_offset = (u8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ((u8 *)sgc->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) sge.a64.last -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) (u8 *)vrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * This is the first SGL, so set the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * chain_offset and the VDA request size in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * the request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) rq->vda_req_sz =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) (vrq->scsi.chain_offset +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) sizeof(struct atto_vda_sge) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) / sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * Remember this so when we get a new SGL filled in we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * can update the length of this chain entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) sgc->sge.a64.chain = sgc->sge.a64.last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* Now link the new SGL onto the primary request. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) list_add(&sgl->next_desc, &rq->sg_table_head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* Update last one filled in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) sgc->sge.a64.last = sgc->sge.a64.curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Build the new SGE and update the S/G context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) sgc->sge.a64.curr->length = cpu_to_le32(SGE_ADDR_64 | len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) sgc->sge.a64.curr->address = cpu_to_le32(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) sgc->sge.a64.curr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) sgc->cur_offset += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) sgc->length -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * Check if we previously split an entry. If so we have to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * pick up where we left off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (rem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) addr += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) len = rem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) rem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) goto another_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* Mark the end of the SGL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) sgc->sge.a64.last->length |= cpu_to_le32(SGE_LAST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) * If there was a previous chain entry, update the length to indicate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * the length of this last segment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (sgc->sge.a64.chain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) sgc->sge.a64.chain->length |= cpu_to_le32(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) ((u8 *)(sgc->sge.a64.curr) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) (u8 *)rq->sg_table->virt_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) u16 reqsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * The entire VDA request was not used so lets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * set the size of the VDA request to be DMA'd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) reqsize =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ((u16)((u8 *)sgc->sge.a64.last - (u8 *)vrq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) + sizeof(struct atto_vda_sge) + 3) / sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * Only update the request size if it is bigger than what is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * already there. We can come in here twice for some management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (reqsize > rq->vda_req_sz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) rq->vda_req_sz = reqsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * Create PRD list for each I-block consumed by the command. This routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * determines how much data is required from each I-block being consumed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * by the command. The first and last I-blocks can be partials and all of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * the I-blocks in between are for a full I-block of data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * The interleave size is used to determine the number of bytes in the 1st
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * I-block and the remaining I-blocks are what remeains.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static bool esas2r_build_prd_iblk(struct esas2r_adapter *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct esas2r_sg_context *sgc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct esas2r_request *rq = sgc->first_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u64 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) u32 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct esas2r_mem_desc *sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) u32 numchain = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u32 rem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) while (sgc->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Get the next address/length pair */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) len = (*sgc->get_phys_addr)(sgc, &addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (unlikely(len == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /* If current length is more than what's left, stop there */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (unlikely(len > sgc->length))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) len = sgc->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) another_entry:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* Limit to a round number less than the maximum length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (len > PRD_LEN_MAX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * Save the remainder of the split. whenever we limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * an entry we come back around to build entries out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * of the leftover. We do this to prevent multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * calls to the get_phys_addr() function for an SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * that is too large.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) rem = len - PRD_LEN_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) len = PRD_LEN_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /* See if we need to allocate a new SGL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (sgc->sge.prd.sge_cnt == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (len == sgc->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * We only have 1 PRD entry left.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * It can be placed where the chain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * entry would have gone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) /* Build the simple SGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) sgc->sge.prd.curr->ctl_len = cpu_to_le32(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) PRD_DATA | len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) sgc->sge.prd.curr->address = cpu_to_le64(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /* Adjust length related fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) sgc->cur_offset += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) sgc->length -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /* We use the reserved chain entry for data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) numchain = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (sgc->sge.prd.chain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * Fill # of entries of current SGL in previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * chain the length of this current SGL may not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * full.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) sgc->sge.prd.chain->ctl_len |= cpu_to_le32(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) sgc->sge.prd.sgl_max_cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * If no SGls are available, return failure. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * caller can call us later with the current context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * to pick up here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) sgl = esas2r_alloc_sgl(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (unlikely(sgl == NULL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * Link the new SGL onto the chain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * They are in reverse order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) list_add(&sgl->next_desc, &rq->sg_table_head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * An SGL was just filled in and we are starting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) * a new SGL. Prime the chain of the ending SGL with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * info that points to the new SGL. The length gets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * filled in when the new SGL is filled or ended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) sgc->sge.prd.chain = sgc->sge.prd.curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) sgc->sge.prd.chain->ctl_len = cpu_to_le32(PRD_CHAIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) sgc->sge.prd.chain->address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) cpu_to_le64(sgl->phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * Start a new segment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * Take one away and save for chain SGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) sgc->sge.prd.curr =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) (struct atto_physical_region_description *)sgl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) ->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) virt_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) sgc->sge.prd.sge_cnt = sgc->sge.prd.sgl_max_cnt - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) sgc->sge.prd.sge_cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* Build the simple SGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) sgc->sge.prd.curr->ctl_len = cpu_to_le32(PRD_DATA | len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) sgc->sge.prd.curr->address = cpu_to_le64(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* Used another element. Point to the next one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) sgc->sge.prd.curr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) /* Adjust length related fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) sgc->cur_offset += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) sgc->length -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * Check if we previously split an entry. If so we have to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) * pick up where we left off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (rem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) addr += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) len = rem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) rem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) goto another_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) if (!list_empty(&rq->sg_table_head)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (sgc->sge.prd.chain) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) sgc->sge.prd.chain->ctl_len |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) cpu_to_le32(sgc->sge.prd.sgl_max_cnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) - sgc->sge.prd.sge_cnt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) - numchain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) bool esas2r_build_sg_list_prd(struct esas2r_adapter *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct esas2r_sg_context *sgc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) struct esas2r_request *rq = sgc->first_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) u32 len = sgc->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct esas2r_target *t = a->targetdb + rq->target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) u8 is_i_o = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) u16 reqsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct atto_physical_region_description *curr_iblk_chn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) u8 *cdb = (u8 *)&rq->vrq->scsi.cdb[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * extract LBA from command so we can determine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * the I-Block boundary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (rq->vrq->scsi.function == VDA_FUNC_SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) && t->target_state == TS_PRESENT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) && !(t->flags & TF_PASS_THRU)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) u32 lbalo = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) switch (rq->vrq->scsi.cdb[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) case READ_16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) case WRITE_16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) lbalo =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) MAKEDWORD(MAKEWORD(cdb[9],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) cdb[8]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) MAKEWORD(cdb[7],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) cdb[6]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) is_i_o = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) case READ_12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) case WRITE_12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) case READ_10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) case WRITE_10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) lbalo =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) MAKEDWORD(MAKEWORD(cdb[5],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) cdb[4]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) MAKEWORD(cdb[3],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) cdb[2]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) is_i_o = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) case READ_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) case WRITE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) lbalo =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) MAKEDWORD(MAKEWORD(cdb[3],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) cdb[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) MAKEWORD(cdb[1] & 0x1F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) is_i_o = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (is_i_o) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) u32 startlba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) rq->vrq->scsi.iblk_cnt_prd = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Determine size of 1st I-block PRD list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) startlba = t->inter_block - (lbalo & (t->inter_block -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) sgc->length = startlba * t->block_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) /* Chk if the 1st iblk chain starts at base of Iblock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if ((lbalo & (t->inter_block - 1)) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) rq->flags |= RF_1ST_IBLK_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (sgc->length > len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) sgc->length = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) sgc->length = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) sgc->length = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) /* get our starting chain address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) curr_iblk_chn =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) (struct atto_physical_region_description *)sgc->sge.a64.curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) sgc->sge.prd.sgl_max_cnt = sgl_page_size /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) sizeof(struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) atto_physical_region_description);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* create all of the I-block PRD lists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) while (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) sgc->sge.prd.sge_cnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) sgc->sge.prd.chain = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) sgc->sge.prd.curr = curr_iblk_chn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /* increment to next I-Block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) len -= sgc->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) /* go build the next I-Block PRD list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (unlikely(!esas2r_build_prd_iblk(a, sgc)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) curr_iblk_chn++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) if (is_i_o) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) rq->vrq->scsi.iblk_cnt_prd++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (len > t->inter_byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) sgc->length = t->inter_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) sgc->length = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) /* figure out the size used of the VDA request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) reqsize = ((u16)((u8 *)curr_iblk_chn - (u8 *)rq->vrq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) / sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * only update the request size if it is bigger than what is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * already there. we can come in here twice for some management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (reqsize > rq->vda_req_sz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) rq->vda_req_sz = reqsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) static void esas2r_handle_pending_reset(struct esas2r_adapter *a, u32 currtime)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) u32 delta = currtime - a->chip_init_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (delta <= ESAS2R_CHPRST_WAIT_TIME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) /* Wait before accessing registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) } else if (delta >= ESAS2R_CHPRST_TIME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * The last reset failed so try again. Reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) * processing will give up after three tries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) esas2r_local_reset_adapter(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) /* We can now see if the firmware is ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) u32 doorbell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) if (doorbell == 0xFFFFFFFF || !(doorbell & DRBL_FORCE_INT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) esas2r_force_interrupt(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) u32 ver = (doorbell & DRBL_FW_VER_MSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) /* Driver supports API version 0 and 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) esas2r_write_register_dword(a, MU_DOORBELL_OUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) doorbell);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) if (ver == DRBL_FW_VER_0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) set_bit(AF_CHPRST_DETECTED, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) set_bit(AF_LEGACY_SGE_MODE, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) a->max_vdareq_size = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) a->build_sgl = esas2r_build_sg_list_sge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) } else if (ver == DRBL_FW_VER_1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) set_bit(AF_CHPRST_DETECTED, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) clear_bit(AF_LEGACY_SGE_MODE, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) a->max_vdareq_size = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) a->build_sgl = esas2r_build_sg_list_prd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) esas2r_local_reset_adapter(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) /* This function must be called once per timer tick */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) void esas2r_timer_tick(struct esas2r_adapter *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) u32 currtime = jiffies_to_msecs(jiffies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) u32 deltatime = currtime - a->last_tick_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) a->last_tick_time = currtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) /* count down the uptime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (a->chip_uptime &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) !test_bit(AF_CHPRST_PENDING, &a->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) !test_bit(AF_DISC_PENDING, &a->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (deltatime >= a->chip_uptime)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) a->chip_uptime = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) a->chip_uptime -= deltatime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) if (test_bit(AF_CHPRST_PENDING, &a->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (!test_bit(AF_CHPRST_NEEDED, &a->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) !test_bit(AF_CHPRST_DETECTED, &a->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) esas2r_handle_pending_reset(a, currtime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (test_bit(AF_DISC_PENDING, &a->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) esas2r_disc_check_complete(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (test_bit(AF_HEARTBEAT_ENB, &a->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) if (test_bit(AF_HEARTBEAT, &a->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if ((currtime - a->heartbeat_time) >=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) ESAS2R_HEARTBEAT_TIME) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) clear_bit(AF_HEARTBEAT, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) esas2r_hdebug("heartbeat failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) esas2r_log(ESAS2R_LOG_CRIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) "heartbeat failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) esas2r_bugon();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) esas2r_local_reset_adapter(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) set_bit(AF_HEARTBEAT, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) a->heartbeat_time = currtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) esas2r_force_interrupt(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) if (atomic_read(&a->disable_cnt) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) esas2r_do_deferred_processes(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * Send the specified task management function to the target and LUN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) * specified in rqaux. in addition, immediately abort any commands that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) * are queued but not sent to the device according to the rules specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) * by the task management function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) bool esas2r_send_task_mgmt(struct esas2r_adapter *a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) struct esas2r_request *rqaux, u8 task_mgt_func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) u16 targetid = rqaux->target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) u8 lun = (u8)le32_to_cpu(rqaux->vrq->scsi.flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) bool ret = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) struct esas2r_request *rq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct list_head *next, *element;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) LIST_HEAD(comp_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) esas2r_trace_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) esas2r_trace("rqaux:%p", rqaux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) esas2r_trace("task_mgt_func:%x", task_mgt_func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) spin_lock_irqsave(&a->queue_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) /* search the defer queue looking for requests for the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) list_for_each_safe(element, next, &a->defer_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) rq = list_entry(element, struct esas2r_request, req_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (rq->vrq->scsi.function == VDA_FUNC_SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) && rq->target_id == targetid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) && (((u8)le32_to_cpu(rq->vrq->scsi.flags)) == lun
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) || task_mgt_func == 0x20)) { /* target reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) /* Found a request affected by the task management */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (rq->req_stat == RS_PENDING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) * The request is pending or waiting. We can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) * safelycomplete the request now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (esas2r_ioreq_aborted(a, rq, RS_ABORTED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) list_add_tail(&rq->comp_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) &comp_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) /* Send the task management request to the firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) rqaux->sense_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) rqaux->vrq->scsi.length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) rqaux->target_id = targetid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) rqaux->vrq->scsi.flags |= cpu_to_le32(lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) memset(rqaux->vrq->scsi.cdb, 0, sizeof(rqaux->vrq->scsi.cdb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) rqaux->vrq->scsi.flags |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) cpu_to_le16(task_mgt_func * LOBIT(FCP_CMND_TM_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) if (test_bit(AF_FLASHING, &a->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /* Assume success. if there are active requests, return busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) rqaux->req_stat = RS_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) list_for_each_safe(element, next, &a->active_list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) rq = list_entry(element, struct esas2r_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) req_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (rq->vrq->scsi.function == VDA_FUNC_SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) && rq->target_id == targetid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) && (((u8)le32_to_cpu(rq->vrq->scsi.flags)) == lun
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) || task_mgt_func == 0x20)) /* target reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) rqaux->req_stat = RS_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) ret = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) spin_unlock_irqrestore(&a->queue_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) if (!test_bit(AF_FLASHING, &a->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) esas2r_start_request(a, rqaux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) esas2r_comp_list_drain(a, &comp_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) if (atomic_read(&a->disable_cnt) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) esas2r_do_deferred_processes(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) esas2r_trace_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) void esas2r_reset_bus(struct esas2r_adapter *a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) esas2r_log(ESAS2R_LOG_INFO, "performing a bus reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) if (!test_bit(AF_DEGRADED_MODE, &a->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) !test_bit(AF_CHPRST_PENDING, &a->flags) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) !test_bit(AF_DISC_PENDING, &a->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) set_bit(AF_BUSRST_NEEDED, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) set_bit(AF_BUSRST_PENDING, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) set_bit(AF_OS_RESET, &a->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) esas2r_schedule_tasklet(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) bool esas2r_ioreq_aborted(struct esas2r_adapter *a, struct esas2r_request *rq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) u8 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) esas2r_trace_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) esas2r_trace("rq:%p", rq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) list_del_init(&rq->req_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) if (rq->timeout > RQ_MAX_TIMEOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) * The request timed out, but we could not abort it because a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) * chip reset occurred. Return busy status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) rq->req_stat = RS_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) esas2r_trace_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) rq->req_stat = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) esas2r_trace_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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