^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* linux/drivers/scsi/esas2r/atioctl.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * ATTO IOCTL Handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2001-2013 ATTO Technology, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (mailto:linuxdrivers@attotech.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include "atvda.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #ifndef ATIOCTL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define ATIOCTL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define EXPRESS_IOCTL_SIGNATURE "Express"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define EXPRESS_IOCTL_SIGNATURE_SIZE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* structure definitions for IOCTls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct __packed atto_express_ioctl_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u8 signature[EXPRESS_IOCTL_SIGNATURE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u8 return_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define IOCTL_SUCCESS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define IOCTL_ERR_INVCMD 101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define IOCTL_INIT_FAILED 102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define IOCTL_NOT_IMPLEMENTED 103
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define IOCTL_BAD_CHANNEL 104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define IOCTL_TARGET_OVERRUN 105
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define IOCTL_TARGET_NOT_ENABLED 106
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define IOCTL_BAD_FLASH_IMGTYPE 107
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define IOCTL_OUT_OF_RESOURCES 108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define IOCTL_GENERAL_ERROR 109
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define IOCTL_INVALID_PARAM 110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 retries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u8 pad[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * NOTE - if channel == 0xFF, the request is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * handled on the adapter it came in on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define MAX_NODE_NAMES 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct __packed atto_firmware_rw_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u8 function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define FUNC_FW_DOWNLOAD 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define FUNC_FW_UPLOAD 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u8 img_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define FW_IMG_FW 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define FW_IMG_BIOS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define FW_IMG_NVR 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define FW_IMG_RAW 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define FW_IMG_FM_API 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define FW_IMG_FS_API 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) u8 pad[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) u32 img_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u32 img_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u8 image[0x80000];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct __packed atto_param_rw_request {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) u16 code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) char data_buffer[512];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define MAX_CHANNEL 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct __packed atto_channel_list {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u32 num_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u8 channel[MAX_CHANNEL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct __packed atto_channel_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) u8 major_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) u8 minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u8 IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u8 revision_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u8 pci_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) u8 pci_dev_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u8 core_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u8 host_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u16 device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u16 vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u16 ven_dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u8 pad[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u32 hbaapi_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * CSMI control codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * class independent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define CSMI_CC_GET_DRVR_INFO 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define CSMI_CC_GET_CNTLR_CFG 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define CSMI_CC_GET_CNTLR_STS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define CSMI_CC_FW_DOWNLOAD 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* RAID class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define CSMI_CC_GET_RAID_INFO 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define CSMI_CC_GET_RAID_CFG 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* HBA class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define CSMI_CC_GET_PHY_INFO 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define CSMI_CC_SET_PHY_INFO 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define CSMI_CC_GET_LINK_ERRORS 22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define CSMI_CC_SMP_PASSTHRU 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define CSMI_CC_SSP_PASSTHRU 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define CSMI_CC_STP_PASSTHRU 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define CSMI_CC_GET_SATA_SIG 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define CSMI_CC_GET_SCSI_ADDR 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define CSMI_CC_GET_DEV_ADDR 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define CSMI_CC_TASK_MGT 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define CSMI_CC_GET_CONN_INFO 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* PHY class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define CSMI_CC_PHY_CTRL 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * CSMI status codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * class independent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define CSMI_STS_SUCCESS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define CSMI_STS_FAILED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define CSMI_STS_BAD_CTRL_CODE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define CSMI_STS_INV_PARAM 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define CSMI_STS_WRITE_ATTEMPTED 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* RAID class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define CSMI_STS_INV_RAID_SET 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* HBA class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define CSMI_STS_PHY_CHANGED CSMI_STS_SUCCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define CSMI_STS_PHY_UNCHANGEABLE 2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define CSMI_STS_INV_LINK_RATE 2001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define CSMI_STS_INV_PHY 2002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define CSMI_STS_INV_PHY_FOR_PORT 2003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define CSMI_STS_PHY_UNSELECTABLE 2004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define CSMI_STS_SELECT_PHY_OR_PORT 2005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define CSMI_STS_INV_PORT 2006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define CSMI_STS_PORT_UNSELECTABLE 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define CSMI_STS_CONNECTION_FAILED 2008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define CSMI_STS_NO_SATA_DEV 2009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define CSMI_STS_NO_SATA_SIGNATURE 2010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define CSMI_STS_SCSI_EMULATION 2011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define CSMI_STS_NOT_AN_END_DEV 2012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define CSMI_STS_NO_SCSI_ADDR 2013
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define CSMI_STS_NO_DEV_ADDR 2014
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* CSMI class independent structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) struct atto_csmi_get_driver_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) char name[81];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) char description[81];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) u16 major_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) u16 minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) u16 build_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) u16 release_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) u16 csmi_major_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) u16 csmi_minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define CSMI_MAJOR_REV_0_81 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define CSMI_MINOR_REV_0_81 81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define CSMI_MAJOR_REV CSMI_MAJOR_REV_0_81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define CSMI_MINOR_REV CSMI_MINOR_REV_0_81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct atto_csmi_get_pci_bus_addr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) u8 bus_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u8 device_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u8 function_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct atto_csmi_get_cntlr_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) u32 base_io_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u32 base_memaddr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u32 base_memaddr_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u32 board_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u16 slot_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define CSMI_SLOT_NUM_UNKNOWN 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u8 cntlr_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define CSMI_CNTLR_CLASS_HBA 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) u8 io_bus_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define CSMI_BUS_TYPE_PCI 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define CSMI_BUS_TYPE_PCMCIA 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct atto_csmi_get_pci_bus_addr pci_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) u8 reserved[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) char serial_num[81];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) u16 major_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) u16 minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u16 build_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) u16 release_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) u16 bios_major_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u16 bios_minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) u16 bios_build_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u16 bios_release_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) u32 cntlr_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define CSMI_CNTLRF_SAS_HBA 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #define CSMI_CNTLRF_SAS_RAID 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define CSMI_CNTLRF_SATA_HBA 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define CSMI_CNTLRF_SATA_RAID 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define CSMI_CNTLRF_FWD_SUPPORT 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define CSMI_CNTLRF_FWD_ONLINE 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define CSMI_CNTLRF_FWD_SRESET 0x00040000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define CSMI_CNTLRF_FWD_HRESET 0x00080000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define CSMI_CNTLRF_FWD_RROM 0x00100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u16 rrom_major_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u16 rrom_minor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u16 rrom_build_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) u16 rrom_release_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) u16 rrom_biosmajor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) u16 rrom_biosminor_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u16 rrom_biosbuild_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) u16 rrom_biosrelease_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) u8 reserved2[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct atto_csmi_get_cntlr_sts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #define CSMI_CNTLR_STS_GOOD 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #define CSMI_CNTLR_STS_FAILED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define CSMI_CNTLR_STS_OFFLINE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define CSMI_CNTLR_STS_POWEROFF 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) u32 offline_reason;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #define CSMI_OFFLINE_NO_REASON 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) #define CSMI_OFFLINE_INITIALIZING 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define CSMI_OFFLINE_BUS_DEGRADED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) #define CSMI_OFFLINE_BUS_FAILURE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 reserved[28];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct atto_csmi_fw_download {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) u32 buffer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u32 download_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define CSMI_FWDF_VALIDATE 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #define CSMI_FWDF_SOFT_RESET 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define CSMI_FWDF_HARD_RESET 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u8 reserved[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u16 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define CSMI_FWD_STS_SUCCESS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define CSMI_FWD_STS_FAILED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define CSMI_FWD_STS_USING_RROM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define CSMI_FWD_STS_REJECT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define CSMI_FWD_STS_DOWNREV 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) u16 severity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define CSMI_FWD_SEV_INFO 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define CSMI_FWD_SEV_WARNING 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define CSMI_FWD_SEV_ERROR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define CSMI_FWD_SEV_FATAL 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* CSMI RAID class structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct atto_csmi_get_raid_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u32 num_raid_sets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) u32 max_drivesper_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u8 reserved[92];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) struct atto_csmi_raid_drives {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) char model[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) char firmware[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) char serial_num[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) u8 sas_addr[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) u8 lun[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) u8 drive_sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define CSMI_DRV_STS_OK 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) #define CSMI_DRV_STS_REBUILDING 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define CSMI_DRV_STS_FAILED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) #define CSMI_DRV_STS_DEGRADED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u8 drive_usage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define CSMI_DRV_USE_NOT_USED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define CSMI_DRV_USE_MEMBER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define CSMI_DRV_USE_SPARE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) u8 reserved[30]; /* spec says 22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct atto_csmi_get_raid_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) u32 raid_set_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) u32 capacity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) u32 stripe_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) u8 raid_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) u8 information;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) u8 drive_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) u8 reserved[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) struct atto_csmi_raid_drives drives[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) /* CSMI HBA class structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct atto_csmi_phy_entity {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) u8 ident_frame[0x1C];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) u8 port_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) u8 neg_link_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) u8 min_link_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) u8 max_link_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) u8 phy_change_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u8 auto_discover;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #define CSMI_DISC_NOT_SUPPORTED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #define CSMI_DISC_NOT_STARTED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #define CSMI_DISC_IN_PROGRESS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define CSMI_DISC_COMPLETE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define CSMI_DISC_ERROR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u8 reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) u8 attach_ident_frame[0x1C];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct atto_csmi_get_phy_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) u8 number_of_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct atto_csmi_phy_entity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) phy[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct atto_csmi_set_phy_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u8 neg_link_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #define CSMI_NEG_RATE_NEGOTIATE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define CSMI_NEG_RATE_PHY_DIS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u8 prog_minlink_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u8 prog_maxlink_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) u8 signal_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #define CSMI_SIG_CLASS_UNKNOWN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define CSMI_SIG_CLASS_DIRECT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define CSMI_SIG_CLASS_SERVER 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #define CSMI_SIG_CLASS_ENCLOSURE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct atto_csmi_get_link_errors {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u8 reset_cnts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #define CSMI_RESET_CNTS_NO 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #define CSMI_RESET_CNTS_YES 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) u8 reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) u32 inv_dw_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) u32 disp_err_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) u32 loss_ofdw_sync_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u32 phy_reseterr_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * The following field has been added by ATTO for ease of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * implementation of additional statistics. Drivers must validate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * the length of the IOCTL payload prior to filling them in so CSMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * complaint applications function correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u32 crc_err_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct atto_csmi_smp_passthru {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) u8 port_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) u8 conn_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) u8 dest_sas_addr[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) u32 req_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) u8 smp_req[1020];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) u8 conn_sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) u8 reserved2[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) u32 rsp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) u8 smp_rsp[1020];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct atto_csmi_ssp_passthru_sts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) u8 conn_sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) u8 data_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) u16 rsp_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) u8 rsp[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u32 data_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct atto_csmi_ssp_passthru {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) u8 port_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) u8 conn_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) u8 dest_sas_addr[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) u8 lun[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) u8 cdb_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) u8 add_cdb_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u8 reserved2[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) u8 cdb[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define CSMI_SSPF_DD_READ 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define CSMI_SSPF_DD_WRITE 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define CSMI_SSPF_DD_UNSPECIFIED 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define CSMI_SSPF_TA_SIMPLE 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define CSMI_SSPF_TA_HEAD_OF_Q 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #define CSMI_SSPF_TA_ORDERED 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define CSMI_SSPF_TA_ACA 0x00000040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) u8 add_cdb[24];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) u32 data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) struct atto_csmi_ssp_passthru_sts sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) struct atto_csmi_stp_passthru_sts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) u8 conn_sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) u8 sts_fis[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u32 scr[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) u32 data_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) struct atto_csmi_stp_passthru {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) u8 port_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) u8 conn_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u8 dest_sas_addr[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) u8 reserved2[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u8 command_fis[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #define CSMI_STPF_DD_READ 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) #define CSMI_STPF_DD_WRITE 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define CSMI_STPF_DD_UNSPECIFIED 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #define CSMI_STPF_PIO 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) #define CSMI_STPF_DMA 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #define CSMI_STPF_PACKET 0x00000040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) #define CSMI_STPF_DMA_QUEUED 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) #define CSMI_STPF_EXECUTE_DIAG 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) #define CSMI_STPF_RESET_DEVICE 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) u32 data_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct atto_csmi_stp_passthru_sts sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) struct atto_csmi_get_sata_sig {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) u8 reg_dth_fis[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct atto_csmi_get_scsi_addr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) u8 sas_addr[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) u8 sas_lun[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) u8 host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) u8 path_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) u8 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) u8 lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) struct atto_csmi_get_dev_addr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) u8 host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) u8 path_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) u8 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) u8 lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) u8 sas_addr[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) u8 sas_lun[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) struct atto_csmi_task_mgmt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) u8 host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) u8 path_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) u8 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) u8 lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) #define CSMI_TMF_TASK_IU 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) #define CSMI_TMF_HARD_RST 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) #define CSMI_TMF_SUPPRESS_RSLT 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) u32 queue_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) u8 task_mgt_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) u8 reserved2[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) u32 information;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) #define CSMI_TM_INFO_TEST 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) #define CSMI_TM_INFO_EXCEEDED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) #define CSMI_TM_INFO_DEMAND 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) #define CSMI_TM_INFO_TRIGGER 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct atto_csmi_ssp_passthru_sts sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct atto_csmi_get_conn_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u32 pinout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) #define CSMI_CON_UNKNOWN 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) #define CSMI_CON_SFF_8482 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) #define CSMI_CON_SFF_8470_LANE_1 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) #define CSMI_CON_SFF_8470_LANE_2 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) #define CSMI_CON_SFF_8470_LANE_3 0x00000400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) #define CSMI_CON_SFF_8470_LANE_4 0x00000800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) #define CSMI_CON_SFF_8484_LANE_1 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) #define CSMI_CON_SFF_8484_LANE_2 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) #define CSMI_CON_SFF_8484_LANE_3 0x00040000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) #define CSMI_CON_SFF_8484_LANE_4 0x00080000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) u8 connector[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) u8 location;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) #define CSMI_CON_INTERNAL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) #define CSMI_CON_EXTERNAL 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) #define CSMI_CON_SWITCHABLE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) #define CSMI_CON_AUTO 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) u8 reserved[15];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* CSMI PHY class structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) struct atto_csmi_character {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) u8 type_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) #define CSMI_CTF_POS_DISP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) #define CSMI_CTF_NEG_DISP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #define CSMI_CTF_CTRL_CHAR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) u8 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) struct atto_csmi_pc_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) #define CSMI_PC_TYPE_UNDEFINED 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #define CSMI_PC_TYPE_SATA 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) #define CSMI_PC_TYPE_SAS 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) u8 rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) u8 reserved[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) u32 vendor_unique[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) u32 tx_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) #define CSMI_PC_TXF_PREEMP_DIS 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) signed char tx_amplitude;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) signed char tx_preemphasis;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) signed char tx_slew_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) signed char tx_reserved[13];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) u8 tx_vendor_unique[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) u32 rx_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) #define CSMI_PC_RXF_EQ_DIS 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) signed char rx_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) signed char rx_equalization_gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) signed char rx_reserved[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) u8 rx_vendor_unique[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) u32 pattern_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) #define CSMI_PC_PATF_FIXED 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) #define CSMI_PC_PATF_DIS_SCR 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) #define CSMI_PC_PATF_DIS_ALIGN 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) #define CSMI_PC_PATF_DIS_SSC 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) u8 fixed_pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) #define CSMI_PC_FP_CJPAT 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) #define CSMI_PC_FP_ALIGN 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) u8 user_pattern_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) u8 pattern_reserved[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) struct atto_csmi_character user_pattern_buffer[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) struct atto_csmi_phy_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u32 function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) #define CSMI_PC_FUNC_GET_SETUP 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) u16 len_of_cntl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) u8 num_of_cntls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) u8 reserved[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) u32 link_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) #define CSMI_PHY_ACTIVATE_CTRL 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) #define CSMI_PHY_UPD_SPINUP_RATE 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) #define CSMI_PHY_AUTO_COMWAKE 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) u8 spinup_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) u8 link_reserved[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) u32 vendor_unique[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) struct atto_csmi_pc_ctrl control[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) union atto_ioctl_csmi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct atto_csmi_get_driver_info drvr_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) struct atto_csmi_get_cntlr_cfg cntlr_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) struct atto_csmi_get_cntlr_sts cntlr_sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) struct atto_csmi_fw_download fw_dwnld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) struct atto_csmi_get_raid_info raid_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct atto_csmi_get_raid_cfg raid_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) struct atto_csmi_get_phy_info get_phy_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) struct atto_csmi_set_phy_info set_phy_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct atto_csmi_get_link_errors link_errs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) struct atto_csmi_smp_passthru smp_pass_thru;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) struct atto_csmi_ssp_passthru ssp_pass_thru;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) struct atto_csmi_stp_passthru stp_pass_thru;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) struct atto_csmi_task_mgmt tsk_mgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) struct atto_csmi_get_sata_sig sata_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) struct atto_csmi_get_scsi_addr scsi_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) struct atto_csmi_get_dev_addr dev_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct atto_csmi_get_conn_info conn_info[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) struct atto_csmi_phy_ctrl phy_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) struct atto_csmi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) u32 control_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) union atto_ioctl_csmi data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) struct atto_module_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) void *adapter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) void *pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) void *scsi_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) unsigned short host_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) u64 node_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) u64 port_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) u64 sas_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) #define ATTO_FUNC_GET_ADAP_INFO 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) #define ATTO_VER_GET_ADAP_INFO0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) #define ATTO_VER_GET_ADAP_INFO ATTO_VER_GET_ADAP_INFO0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) struct __packed atto_hba_get_adapter_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) u16 vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) u16 device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) u16 ss_vendor_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) u16 ss_device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) u8 class_code[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) u8 rev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) u8 bus_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) u8 dev_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) u8 func_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) u8 link_width_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) u8 link_width_curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) #define ATTO_GAI_PCILW_UNKNOWN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) u8 link_speed_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) u8 link_speed_curr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) #define ATTO_GAI_PCILS_UNKNOWN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) #define ATTO_GAI_PCILS_GEN1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) #define ATTO_GAI_PCILS_GEN2 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) #define ATTO_GAI_PCILS_GEN3 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) u8 interrupt_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) #define ATTO_GAI_PCIIM_UNKNOWN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) #define ATTO_GAI_PCIIM_LEGACY 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) #define ATTO_GAI_PCIIM_MSI 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) #define ATTO_GAI_PCIIM_MSIX 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) u8 msi_vector_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) u8 reserved[19];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) } pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) u8 adap_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) #define ATTO_GAI_AT_EPCIU320 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) #define ATTO_GAI_AT_ESASRAID 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) #define ATTO_GAI_AT_ESASRAID2 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) #define ATTO_GAI_AT_ESASHBA 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) #define ATTO_GAI_AT_ESASHBA2 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) #define ATTO_GAI_AT_CELERITY 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) #define ATTO_GAI_AT_CELERITY8 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) #define ATTO_GAI_AT_FASTFRAME 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) #define ATTO_GAI_AT_ESASHBA3 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) #define ATTO_GAI_AT_CELERITY16 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) #define ATTO_GAI_AT_TLSASHBA 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) #define ATTO_GAI_AT_ESASHBA4 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) u8 adap_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) #define ATTO_GAI_AF_DEGRADED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) #define ATTO_GAI_AF_SPT_SUPP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) #define ATTO_GAI_AF_DEVADDR_SUPP 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) #define ATTO_GAI_AF_PHYCTRL_SUPP 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) #define ATTO_GAI_AF_TEST_SUPP 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) #define ATTO_GAI_AF_DIAG_SUPP 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) #define ATTO_GAI_AF_VIRT_SES 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) #define ATTO_GAI_AF_CONN_CTRL 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) u8 num_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) u8 num_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) u8 drvr_rev_major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) u8 drvr_rev_minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) u8 drvr_revsub_minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) u8 drvr_rev_build;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) char drvr_rev_ascii[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) char drvr_name[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) char firmware_rev[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) char flash_rev[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) char model_name_short[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) char model_name[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) u32 num_targets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) u32 num_targsper_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) u32 num_lunsper_targ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) u8 num_busses;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) u8 num_connectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) u8 adap_flags2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) #define ATTO_GAI_AF2_FCOE_SUPP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) #define ATTO_GAI_AF2_NIC_SUPP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) #define ATTO_GAI_AF2_LOCATE_SUPP 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) #define ATTO_GAI_AF2_ADAP_CTRL_SUPP 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) #define ATTO_GAI_AF2_DEV_INFO_SUPP 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) #define ATTO_GAI_AF2_NPIV_SUPP 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) #define ATTO_GAI_AF2_MP_SUPP 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) u8 num_temp_sensors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) u32 num_targets_backend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) u32 tunnel_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) #define ATTO_GAI_TF_MEM_RW 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) #define ATTO_GAI_TF_TRACE 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) #define ATTO_GAI_TF_SCSI_PASS_THRU 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) #define ATTO_GAI_TF_GET_DEV_ADDR 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) #define ATTO_GAI_TF_PHY_CTRL 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) #define ATTO_GAI_TF_CONN_CTRL 0x00000020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) #define ATTO_GAI_TF_GET_DEV_INFO 0x00000040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) u8 reserved3[0x138];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) #define ATTO_FUNC_GET_ADAP_ADDR 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) #define ATTO_VER_GET_ADAP_ADDR0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) #define ATTO_VER_GET_ADAP_ADDR ATTO_VER_GET_ADAP_ADDR0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) struct __packed atto_hba_get_adapter_address {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) u8 addr_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) #define ATTO_GAA_AT_PORT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) #define ATTO_GAA_AT_NODE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) #define ATTO_GAA_AT_CURR_MAC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) #define ATTO_GAA_AT_PERM_MAC 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) #define ATTO_GAA_AT_VNIC 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) u8 port_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) u16 addr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) u8 address[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) #define ATTO_FUNC_MEM_RW 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) #define ATTO_VER_MEM_RW0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) #define ATTO_VER_MEM_RW ATTO_VER_MEM_RW0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) struct __packed atto_hba_memory_read_write {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) u8 mem_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) u8 mem_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) u8 pci_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) u8 i2c_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) u8 i2c_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) u64 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) u8 reserved[48];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) #define ATTO_FUNC_TRACE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) #define ATTO_VER_TRACE0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) #define ATTO_VER_TRACE1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) #define ATTO_VER_TRACE ATTO_VER_TRACE1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) struct __packed atto_hba_trace {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) u8 trace_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) #define ATTO_TRC_TF_GET_INFO 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) #define ATTO_TRC_TF_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) #define ATTO_TRC_TF_DISABLE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) #define ATTO_TRC_TF_SET_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) #define ATTO_TRC_TF_UPLOAD 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) #define ATTO_TRC_TF_RESET 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) u8 trace_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) #define ATTO_TRC_TT_DRIVER 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) #define ATTO_TRC_TT_FWCOREDUMP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) u8 reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) u32 current_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) u32 total_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) u32 trace_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) u8 reserved2[48];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) #define ATTO_FUNC_SCSI_PASS_THRU 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) #define ATTO_VER_SCSI_PASS_THRU0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) #define ATTO_VER_SCSI_PASS_THRU ATTO_VER_SCSI_PASS_THRU0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) struct __packed atto_hba_scsi_pass_thru {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) u8 cdb[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) u8 cdb_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) u8 req_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) #define ATTO_SPT_RS_SUCCESS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) #define ATTO_SPT_RS_FAILED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) #define ATTO_SPT_RS_OVERRUN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #define ATTO_SPT_RS_UNDERRUN 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) #define ATTO_SPT_RS_NO_DEVICE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) #define ATTO_SPT_RS_NO_LUN 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) #define ATTO_SPT_RS_TIMEOUT 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) #define ATTO_SPT_RS_BUS_RESET 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) #define ATTO_SPT_RS_ABORTED 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) #define ATTO_SPT_RS_BUSY 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) #define ATTO_SPT_RS_DEGRADED 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) u8 scsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) u8 sense_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) #define ATTO_SPTF_DATA_IN 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) #define ATTO_SPTF_DATA_OUT 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) #define ATTO_SPTF_SIMPLE_Q 0x00000004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) #define ATTO_SPTF_HEAD_OF_Q 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) #define ATTO_SPTF_ORDERED_Q 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) u32 timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) u32 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) u8 lun[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) u32 residual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) u8 sense_data[0xFC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) u8 reserved[0x28];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) #define ATTO_FUNC_GET_DEV_ADDR 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) #define ATTO_VER_GET_DEV_ADDR0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) #define ATTO_VER_GET_DEV_ADDR ATTO_VER_GET_DEV_ADDR0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) struct __packed atto_hba_get_device_address {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) u8 addr_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) #define ATTO_GDA_AT_PORT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) #define ATTO_GDA_AT_NODE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) #define ATTO_GDA_AT_MAC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) #define ATTO_GDA_AT_PORTID 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) #define ATTO_GDA_AT_UNIQUE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) u16 addr_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) u32 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) u8 address[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) /* The following functions are supported by firmware but do not have any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) * associated driver structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) #define ATTO_FUNC_PHY_CTRL 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) #define ATTO_FUNC_CONN_CTRL 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) #define ATTO_FUNC_ADAP_CTRL 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) #define ATTO_VER_ADAP_CTRL0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) #define ATTO_VER_ADAP_CTRL ATTO_VER_ADAP_CTRL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) struct __packed atto_hba_adap_ctrl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) u8 adap_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) #define ATTO_AC_AF_HARD_RST 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) #define ATTO_AC_AF_GET_STATE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) #define ATTO_AC_AF_GET_TEMP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) u8 adap_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) #define ATTO_AC_AS_UNKNOWN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) #define ATTO_AC_AS_OK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) #define ATTO_AC_AS_RST_SCHED 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) #define ATTO_AC_AS_RST_IN_PROG 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) #define ATTO_AC_AS_RST_DISC 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) #define ATTO_AC_AS_DEGRADED 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) #define ATTO_AC_AS_DISABLED 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) #define ATTO_AC_AS_TEMP 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) u8 reserved[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) u8 temp_sensor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) u8 temp_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) #define ATTO_AC_TS_UNSUPP 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) #define ATTO_AC_TS_UNKNOWN 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) #define ATTO_AC_TS_INIT_FAILED 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) #define ATTO_AC_TS_NORMAL 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) #define ATTO_AC_TS_OUT_OF_RANGE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) #define ATTO_AC_TS_FAULT 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) signed short temp_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) signed short temp_lower_lim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) signed short temp_upper_lim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) char temp_desc[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) u8 reserved2[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) #define ATTO_FUNC_GET_DEV_INFO 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) #define ATTO_VER_GET_DEV_INFO0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) #define ATTO_VER_GET_DEV_INFO ATTO_VER_GET_DEV_INFO0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) struct __packed atto_hba_sas_device_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) #define ATTO_SDI_MAX_PHYS_WIDE_PORT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) u8 phy_id[ATTO_SDI_MAX_PHYS_WIDE_PORT]; /* IDs of parent exp/adapt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) #define ATTO_SDI_PHY_ID_INV ATTO_SAS_PHY_ID_INV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) u32 exp_target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) u32 sas_port_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) u8 sas_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) #define ATTO_SDI_SAS_LVL_INV 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) u8 slot_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) #define ATTO_SDI_SLOT_NUM_INV ATTO_SLOT_NUM_INV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) u8 dev_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) #define ATTO_SDI_DT_END_DEVICE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) #define ATTO_SDI_DT_EXPANDER 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) #define ATTO_SDI_DT_PORT_MULT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) u8 ini_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) u8 tgt_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) u8 link_rate; /* SMP_RATE_XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) u8 loc_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) #define ATTO_SDI_LF_DIRECT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) #define ATTO_SDI_LF_EXPANDER 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) #define ATTO_SDI_LF_PORT_MULT 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) u8 pm_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) u8 reserved[0x60];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) union atto_hba_device_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) struct atto_hba_sas_device_info sas_dev_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) struct __packed atto_hba_get_device_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) u32 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) u8 info_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) #define ATTO_GDI_IT_UNKNOWN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) #define ATTO_GDI_IT_SAS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) #define ATTO_GDI_IT_FC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) #define ATTO_GDI_IT_FCOE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) u8 reserved[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) union atto_hba_device_info dev_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) struct atto_ioctl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) u8 function; /* ATTO_FUNC_XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) #define ATTO_STS_SUCCESS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) #define ATTO_STS_FAILED 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) #define ATTO_STS_INV_VERSION 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) #define ATTO_STS_OUT_OF_RSRC 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) #define ATTO_STS_INV_FUNC 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) #define ATTO_STS_UNSUPPORTED 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) #define ATTO_STS_INV_ADAPTER 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) #define ATTO_STS_INV_DRVR_VER 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) #define ATTO_STS_INV_PARAM 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) #define ATTO_STS_TIMEOUT 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) #define ATTO_STS_NOT_APPL 0x0A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) #define ATTO_STS_DEGRADED 0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) #define HBAF_TUNNEL 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) u32 data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) u8 reserved2[56];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) u8 byte[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) struct atto_hba_get_adapter_info get_adap_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) struct atto_hba_get_adapter_address get_adap_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) struct atto_hba_scsi_pass_thru scsi_pass_thru;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) struct atto_hba_get_device_address get_dev_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) struct atto_hba_adap_ctrl adap_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) struct atto_hba_get_device_info get_dev_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) struct atto_hba_trace trace;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) struct __packed atto_ioctl_vda_scsi_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) #define ATTO_VDA_SCSI_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) #define ATTO_VDA_SCSI_VER ATTO_VDA_SCSI_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) u8 cdb[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) u32 data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) u32 residual_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) u16 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) u8 sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) u8 scsi_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) u8 reserved[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) u8 sense_data[80];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) struct __packed atto_ioctl_vda_flash_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) #define ATTO_VDA_FLASH_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) #define ATTO_VDA_FLASH_VER ATTO_VDA_FLASH_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) u32 flash_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) u32 data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) u8 sub_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) u8 reserved[15];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) u32 flash_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) u32 page_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) u8 prod_info[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) } info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) char file_name[16]; /* 8.3 fname, NULL term, wc=* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) u32 file_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) } file;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) struct __packed atto_ioctl_vda_diag_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) #define ATTO_VDA_DIAG_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) #define ATTO_VDA_DIAG_VER ATTO_VDA_DIAG_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) u64 local_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) u32 data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) u8 sub_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) struct __packed atto_ioctl_vda_cli_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) #define ATTO_VDA_CLI_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) #define ATTO_VDA_CLI_VER ATTO_VDA_CLI_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) u32 cmd_rsp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) struct __packed atto_ioctl_vda_smp_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) #define ATTO_VDA_SMP_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) #define ATTO_VDA_SMP_VER ATTO_VDA_SMP_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) u64 dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) u32 cmd_rsp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) struct __packed atto_ioctl_vda_cfg_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) #define ATTO_VDA_CFG_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) #define ATTO_VDA_CFG_VER ATTO_VDA_CFG_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) u32 data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) u8 cfg_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) u8 reserved[11];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) u8 bytes[112];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) struct atto_vda_cfg_init init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) struct __packed atto_ioctl_vda_mgt_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) #define ATTO_VDA_MGT_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) #define ATTO_VDA_MGT_VER ATTO_VDA_MGT_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) u8 mgt_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) u8 scan_generation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) u16 dev_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) u32 data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) u8 reserved[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) u8 bytes[112];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) struct atto_vda_devinfo dev_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) struct atto_vda_grp_info grp_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) struct atto_vdapart_info part_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) struct atto_vda_dh_info dh_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) struct atto_vda_metrics_info metrics_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) struct atto_vda_schedule_info sched_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) struct atto_vda_n_vcache_info nvcache_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) struct atto_vda_buzzer_info buzzer_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) struct atto_vda_adapter_info adapter_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) struct atto_vda_temp_info temp_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) struct atto_vda_fan_info fan_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) struct __packed atto_ioctl_vda_gsv_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) #define ATTO_VDA_GSV_VER0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) #define ATTO_VDA_GSV_VER ATTO_VDA_GSV_VER0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) u8 rsp_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) u8 reserved[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) u8 version_info[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) #define ATTO_VDA_VER_UNSUPPORTED 0xFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) struct __packed atto_ioctl_vda {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) u8 function; /* VDA_FUNC_XXXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) u8 status; /* ATTO_STS_XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) u8 vda_status; /* RS_XXX (if status == ATTO_STS_SUCCESS) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) u32 data_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) u8 reserved[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) struct atto_ioctl_vda_scsi_cmd scsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) struct atto_ioctl_vda_flash_cmd flash;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) struct atto_ioctl_vda_diag_cmd diag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) struct atto_ioctl_vda_cli_cmd cli;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) struct atto_ioctl_vda_smp_cmd smp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) struct atto_ioctl_vda_cfg_cmd cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) struct atto_ioctl_vda_mgt_cmd mgt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) struct atto_ioctl_vda_gsv_cmd gsv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) u8 cmd_info[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) } cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) u8 data[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) struct atto_vda_devinfo2 dev_info2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) struct __packed atto_ioctl_smp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) #define ATTO_SMP_VERSION0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) #define ATTO_SMP_VERSION1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) #define ATTO_SMP_VERSION2 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) #define ATTO_SMP_VERSION ATTO_SMP_VERSION2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) u8 function;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) #define ATTO_SMP_FUNC_DISC_SMP 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) #define ATTO_SMP_FUNC_DISC_TARG 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) #define ATTO_SMP_FUNC_SEND_CMD 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) #define ATTO_SMP_FUNC_DISC_TARG_DIRECT 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) #define ATTO_SMP_FUNC_SEND_CMD_DIRECT 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) #define ATTO_SMP_FUNC_DISC_SMP_DIRECT 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) u8 status; /* ATTO_STS_XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) u8 smp_status; /* if status == ATTO_STS_SUCCESS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) #define ATTO_SMP_STS_SUCCESS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) #define ATTO_SMP_STS_FAILURE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) #define ATTO_SMP_STS_RESCAN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) #define ATTO_SMP_STS_NOT_FOUND 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) u16 target_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) u8 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) u8 dev_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) u64 smp_sas_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) u64 targ_sas_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) u32 req_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) u32 rsp_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) #define ATTO_SMPF_ROOT_EXP 0x01 /* expander direct attached */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) u8 reserved[31];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) u8 byte[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) u32 dword[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) struct __packed atto_express_ioctl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) struct atto_express_ioctl_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) struct atto_firmware_rw_request fwrw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) struct atto_param_rw_request prw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) struct atto_channel_list chanlist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) struct atto_channel_info chaninfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) struct atto_ioctl ioctl_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) struct atto_module_info modinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) struct atto_ioctl_vda ioctl_vda;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) struct atto_ioctl_smp ioctl_smp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) struct atto_csmi csmi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) } data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) /* The struct associated with the code is listed after the definition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) #define EXPRESS_IOCTL_MIN 0x4500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) #define EXPRESS_IOCTL_RW_FIRMWARE 0x4500 /* FIRMWARERW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) #define EXPRESS_IOCTL_READ_PARAMS 0x4501 /* PARAMRW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) #define EXPRESS_IOCTL_WRITE_PARAMS 0x4502 /* PARAMRW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) #define EXPRESS_IOCTL_FC_API 0x4503 /* internal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) #define EXPRESS_IOCTL_GET_CHANNELS 0x4504 /* CHANNELLIST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) #define EXPRESS_IOCTL_CHAN_INFO 0x4505 /* CHANNELINFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) #define EXPRESS_IOCTL_DEFAULT_PARAMS 0x4506 /* PARAMRW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) #define EXPRESS_ADDR_MEMORY 0x4507 /* MEMADDR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) #define EXPRESS_RW_MEMORY 0x4508 /* MEMRW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) #define EXPRESS_TSDK_DUMP 0x4509 /* TSDKDUMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) #define EXPRESS_IOCTL_SMP 0x450A /* IOCTL_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) #define EXPRESS_CSMI 0x450B /* CSMI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) #define EXPRESS_IOCTL_HBA 0x450C /* IOCTL_HBA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) #define EXPRESS_IOCTL_VDA 0x450D /* IOCTL_VDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) #define EXPRESS_IOCTL_GET_ID 0x450E /* GET_ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) #define EXPRESS_IOCTL_GET_MOD_INFO 0x450F /* MODULE_INFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) #define EXPRESS_IOCTL_MAX 0x450F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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