^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * dc395x.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Device Driver for Tekram DC395(U/UW/F), DC315(U)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * PCI SCSI Bus Master Host Adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * (SCSI chip set used Tekram ASIC TRM-S1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * C.L. Huang <ching@tekram.com.tw>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Erich Chen <erich@tekram.com.tw>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * (C) Copyright 1995-1999 Tekram Technology Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Kurt Garloff <garloff@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * (C) 1999-2000 Kurt Garloff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Oliver Neukum <oliver@neukum.name>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Ali Akcaagac <aliakc@web.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Jamie Lenehan <lenehan@twibble.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * (C) 2003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * License: GNU GPL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * 2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * notice, this list of conditions and the following disclaimer in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * documentation and/or other materials provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * 3. The name of the author may not be used to endorse or promote products
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * derived from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include <scsi/scsi_cmnd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include <scsi/scsi_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include "dc395x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define DC395X_NAME "dc395x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define DC395X_BANNER "Tekram DC395(U/UW/F), DC315(U) - ASIC TRM-S1040"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define DC395X_VERSION "v2.05, 2004/03/08"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /*---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Features
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * Set to disable parts of the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /*#define DC395x_NO_DISCONNECT*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /*#define DC395x_NO_TAGQ*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /*#define DC395x_NO_SYNC*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /*#define DC395x_NO_WIDE*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) Debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * Types of debugging that can be enabled and disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define DBG_KG 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define DBG_0 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define DBG_1 0x0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define DBG_SG 0x0020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define DBG_FIFO 0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define DBG_PIO 0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * Set set of things to output debugging for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * Undefine to remove all debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /*#define DEBUG_MASK (DBG_0|DBG_1|DBG_SG|DBG_FIFO|DBG_PIO)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*#define DEBUG_MASK DBG_0*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * Output a kernel mesage at the specified level and append the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * driver name and a ": " to the start of the message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define dprintkl(level, format, arg...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) printk(level DC395X_NAME ": " format , ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #ifdef DEBUG_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * print a debug message - this is formated with KERN_DEBUG, then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * driver name followed by a ": " and then the message is output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * This also checks that the specified debug level is enabled before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * outputing the message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define dprintkdbg(type, format, arg...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if ((type) & (DEBUG_MASK)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) dprintkl(KERN_DEBUG , format , ## arg); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * Check if the specified type of debugging is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define debug_enabled(type) ((DEBUG_MASK) & (type))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * No debugging. Do nothing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define dprintkdbg(type, format, arg...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) do {} while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define debug_enabled(type) (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #ifndef PCI_VENDOR_ID_TEKRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define PCI_VENDOR_ID_TEKRAM 0x1DE1 /* Vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #ifndef PCI_DEVICE_ID_TEKRAM_TRMS1040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define PCI_DEVICE_ID_TEKRAM_TRMS1040 0x0391 /* Device ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define DC395x_LOCK_IO(dev,flags) spin_lock_irqsave(((struct Scsi_Host *)dev)->host_lock, flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define DC395x_UNLOCK_IO(dev,flags) spin_unlock_irqrestore(((struct Scsi_Host *)dev)->host_lock, flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define DC395x_read8(acb,address) (u8)(inb(acb->io_port_base + (address)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define DC395x_read16(acb,address) (u16)(inw(acb->io_port_base + (address)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define DC395x_read32(acb,address) (u32)(inl(acb->io_port_base + (address)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define DC395x_write8(acb,address,value) outb((value), acb->io_port_base + (address))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define DC395x_write16(acb,address,value) outw((value), acb->io_port_base + (address))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define DC395x_write32(acb,address,value) outl((value), acb->io_port_base + (address))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* cmd->result */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define RES_TARGET 0x000000FF /* Target State */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define RES_TARGET_LNX STATUS_MASK /* Only official ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define RES_ENDMSG 0x0000FF00 /* End Message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define RES_DID 0x00FF0000 /* DID_ codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define RES_DRV 0xFF000000 /* DRIVER_ codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define MK_RES(drv,did,msg,tgt) ((int)(drv)<<24 | (int)(did)<<16 | (int)(msg)<<8 | (int)(tgt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define MK_RES_LNX(drv,did,msg,tgt) ((int)(drv)<<24 | (int)(did)<<16 | (int)(msg)<<8 | (int)(tgt)<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define SET_RES_TARGET(who,tgt) { who &= ~RES_TARGET; who |= (int)(tgt); }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define SET_RES_TARGET_LNX(who,tgt) { who &= ~RES_TARGET_LNX; who |= (int)(tgt) << 1; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define SET_RES_MSG(who,msg) { who &= ~RES_ENDMSG; who |= (int)(msg) << 8; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define SET_RES_DID(who,did) { who &= ~RES_DID; who |= (int)(did) << 16; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define SET_RES_DRV(who,drv) { who &= ~RES_DRV; who |= (int)(drv) << 24; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define TAG_NONE 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * srb->segement_x is the hw sg list. It is always allocated as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * DC395x_MAX_SG_LISTENTRY entries in a linear block which does not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * cross a page boundy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define SEGMENTX_LEN (sizeof(struct SGentry)*DC395x_MAX_SG_LISTENTRY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct SGentry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) u32 address; /* bus! address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /* The SEEPROM structure for TRM_S1040 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct NVRamTarget {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) u8 cfg0; /* Target configuration byte 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) u8 period; /* Target period */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) u8 cfg2; /* Target configuration byte 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u8 cfg3; /* Target configuration byte 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) struct NvRamType {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) u8 sub_vendor_id[2]; /* 0,1 Sub Vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) u8 sub_sys_id[2]; /* 2,3 Sub System ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) u8 sub_class; /* 4 Sub Class */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) u8 vendor_id[2]; /* 5,6 Vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) u8 device_id[2]; /* 7,8 Device ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u8 reserved; /* 9 Reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct NVRamTarget target[DC395x_MAX_SCSI_ID];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /** 10,11,12,13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ** 14,15,16,17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ** ....
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ** ....
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ** 70,71,72,73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) u8 scsi_id; /* 74 Host Adapter SCSI ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) u8 channel_cfg; /* 75 Channel configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) u8 delay_time; /* 76 Power on delay time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u8 max_tag; /* 77 Maximum tags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) u8 reserved0; /* 78 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u8 boot_target; /* 79 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u8 boot_lun; /* 80 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) u8 reserved1; /* 81 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u16 reserved2[22]; /* 82,..125 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u16 cksum; /* 126,127 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct ScsiReqBlk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct list_head list; /* next/prev ptrs for srb lists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct scsi_cmnd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct SGentry *segment_x; /* Linear array of hw sg entries (up to 64 entries) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) dma_addr_t sg_bus_addr; /* Bus address of sg list (ie, of segment_x) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) u8 sg_count; /* No of HW sg entries for this request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) u8 sg_index; /* Index of HW sg entry for this request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) size_t total_xfer_length; /* Total number of bytes remaining to be transferred */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) size_t request_length; /* Total number of bytes in this request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * The sense buffer handling function, request_sense, uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * the first hw sg entry (segment_x[0]) and the transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * length (total_xfer_length). While doing this it stores the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * original values into the last sg hw list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * (srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1] and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * total_xfer_length in xferred. These values are restored in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * pci_unmap_srb_sense. This is the only place xferred is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) size_t xferred; /* Saved copy of total_xfer_length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) u16 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) u8 msgin_buf[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u8 msgout_buf[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) u8 adapter_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u8 target_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u8 msg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) u8 end_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) u8 tag_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) u8 retry_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) u8 flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) u8 scsi_phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct DeviceCtlBlk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct list_head list; /* next/prev ptrs for the dcb list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct AdapterCtlBlk *acb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct list_head srb_going_list; /* head of going srb list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct list_head srb_waiting_list; /* head of waiting srb list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct ScsiReqBlk *active_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u32 tag_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) u16 max_command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) u8 target_id; /* SCSI Target ID (SCSI Only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 target_lun; /* SCSI Log. Unit (SCSI Only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) u8 identify_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) u8 dev_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) u8 inquiry7; /* To store Inquiry flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u8 sync_mode; /* 0:async mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 min_nego_period; /* for nego. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 sync_period; /* for reg. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u8 sync_offset; /* for reg. and nego.(low nibble) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u8 flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u8 dev_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u8 init_tcq_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct AdapterCtlBlk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct Scsi_Host *scsi_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) unsigned long io_port_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) unsigned long io_port_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct list_head dcb_list; /* head of going dcb list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct DeviceCtlBlk *dcb_run_robin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) struct DeviceCtlBlk *active_dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) struct list_head srb_free_list; /* head of free srb list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) struct ScsiReqBlk *tmp_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct timer_list waiting_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) struct timer_list selto_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) unsigned long last_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) u16 srb_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) u8 sel_timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) unsigned int irq_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) u8 tag_max_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) u8 acb_flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) u8 gmode2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) u8 lun_chk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) u8 scan_devices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u8 hostid_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u8 dcb_map[DC395x_MAX_SCSI_ID];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct DeviceCtlBlk *children[DC395x_MAX_SCSI_ID][32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct pci_dev *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) u8 msg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct ScsiReqBlk srb_array[DC395x_MAX_SRB_CNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) struct ScsiReqBlk srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) struct NvRamType eeprom; /* eeprom settings for this adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /*---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) Forward declarations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static void data_out_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static void data_in_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) static void command_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static void status_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static void msgout_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static void msgin_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static void data_out_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static void data_in_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static void command_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static void status_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static void msgout_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static void msgin_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) u16 *pscsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static void set_basic_config(struct AdapterCtlBlk *acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static void cleanup_after_transfer(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static void reset_scsi_bus(struct AdapterCtlBlk *acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static void data_io_transfer(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) struct ScsiReqBlk *srb, u16 io_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static void disconnect(struct AdapterCtlBlk *acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static void reselect(struct AdapterCtlBlk *acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) static u8 start_scsi(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) static inline void enable_msgout_abort(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static void build_srb(struct scsi_cmnd *cmd, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct scsi_cmnd *cmd, u8 force);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static void scsi_reset_detect(struct AdapterCtlBlk *acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static void pci_unmap_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static void pci_unmap_srb_sense(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static void srb_done(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static void request_sense(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct ScsiReqBlk *srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static void set_xfer_rate(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct DeviceCtlBlk *dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static void waiting_timeout(struct timer_list *t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /*---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) Static Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) ---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static u16 current_sync_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static void *dc395x_scsi_phase0[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) data_out_phase0,/* phase:0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) data_in_phase0, /* phase:1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) command_phase0, /* phase:2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) status_phase0, /* phase:3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) nop0, /* phase:4 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) nop0, /* phase:5 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) msgout_phase0, /* phase:6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) msgin_phase0, /* phase:7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static void *dc395x_scsi_phase1[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) data_out_phase1,/* phase:0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) data_in_phase1, /* phase:1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) command_phase1, /* phase:2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) status_phase1, /* phase:3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) nop1, /* phase:4 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) nop1, /* phase:5 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) msgout_phase1, /* phase:6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) msgin_phase1, /* phase:7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) *Fast20: 000 50ns, 20.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) * 001 75ns, 13.3 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) * 010 100ns, 10.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * 011 125ns, 8.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * 100 150ns, 6.6 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) * 101 175ns, 5.7 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * 110 200ns, 5.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * 111 250ns, 4.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) *Fast40(LVDS): 000 25ns, 40.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * 001 50ns, 20.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * 010 75ns, 13.3 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * 011 100ns, 10.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * 100 125ns, 8.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * 101 150ns, 6.6 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) * 110 175ns, 5.7 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * 111 200ns, 5.0 MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /*static u8 clock_period[] = {12,19,25,31,37,44,50,62};*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /* real period:48ns,76ns,100ns,124ns,148ns,176ns,200ns,248ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static u8 clock_period[] = { 12, 18, 25, 31, 37, 43, 50, 62 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static u16 clock_speed[] = { 200, 133, 100, 80, 67, 58, 50, 40 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /*---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) Configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * Module/boot parameters currently effect *all* instances of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * card in the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) * Command line parameters are stored in a structure below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * These are the index's into the structure for the various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * command line options.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) #define CFG_ADAPTER_ID 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) #define CFG_MAX_SPEED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) #define CFG_DEV_MODE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) #define CFG_ADAPTER_MODE 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) #define CFG_TAGS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #define CFG_RESET_DELAY 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) #define CFG_NUM 6 /* number of configuration items */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * Value used to indicate that a command line override
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * hasn't been used to modify the value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #define CFG_PARAM_UNSET -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) * Hold command line parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct ParameterData {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) int value; /* value of this setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) int min; /* minimum value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) int max; /* maximum value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) int def; /* default value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) int safe; /* safe value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) static struct ParameterData cfg_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) { /* adapter id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) CFG_PARAM_UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) { /* max speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) CFG_PARAM_UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 1, /* 13.3Mhz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 4, /* 6.7Hmz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) { /* dev mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) CFG_PARAM_UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 0x3f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) NTC_DO_PARITY_CHK | NTC_DO_DISCONNECT | NTC_DO_SYNC_NEGO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) NTC_DO_WIDE_NEGO | NTC_DO_TAG_QUEUEING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) NTC_DO_SEND_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) NTC_DO_PARITY_CHK | NTC_DO_SEND_START
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) { /* adapter mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) CFG_PARAM_UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 0x2f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) NAC_SCANLUN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) NAC_GT2DRIVES | NAC_GREATER_1G | NAC_POWERON_SCSI_RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) /*| NAC_ACTIVE_NEG*/,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) NAC_GT2DRIVES | NAC_GREATER_1G | NAC_POWERON_SCSI_RESET | 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) { /* tags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) CFG_PARAM_UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 3, /* 16 tags (??) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) { /* reset delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) CFG_PARAM_UNSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 180,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 1, /* 1 second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 10, /* 10 seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * Safe settings. If set to zero the BIOS/default values with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * command line overrides will be used. If set to 1 then safe and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * slow settings will be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static bool use_safe_settings = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) module_param_named(safe, use_safe_settings, bool, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) MODULE_PARM_DESC(safe, "Use safe and slow settings only. Default: false");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) module_param_named(adapter_id, cfg_data[CFG_ADAPTER_ID].value, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) MODULE_PARM_DESC(adapter_id, "Adapter SCSI ID. Default 7 (0-15)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) module_param_named(max_speed, cfg_data[CFG_MAX_SPEED].value, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) MODULE_PARM_DESC(max_speed, "Maximum bus speed. Default 1 (0-7) Speeds: 0=20, 1=13.3, 2=10, 3=8, 4=6.7, 5=5.8, 6=5, 7=4 Mhz");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) module_param_named(dev_mode, cfg_data[CFG_DEV_MODE].value, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) MODULE_PARM_DESC(dev_mode, "Device mode.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) module_param_named(adapter_mode, cfg_data[CFG_ADAPTER_MODE].value, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) MODULE_PARM_DESC(adapter_mode, "Adapter mode.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) module_param_named(tags, cfg_data[CFG_TAGS].value, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) MODULE_PARM_DESC(tags, "Number of tags (1<<x). Default 3 (0-5)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) module_param_named(reset_delay, cfg_data[CFG_RESET_DELAY].value, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) MODULE_PARM_DESC(reset_delay, "Reset delay in seconds. Default 1 (0-180)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * set_safe_settings - if the use_safe_settings option is set then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * set all values to the safe and slow values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) static void set_safe_settings(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (use_safe_settings)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) dprintkl(KERN_INFO, "Using safe settings.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) for (i = 0; i < CFG_NUM; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) cfg_data[i].value = cfg_data[i].safe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * fix_settings - reset any boot parameters which are out of range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * back to the default values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static void fix_settings(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) dprintkdbg(DBG_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) "setup: AdapterId=%08x MaxSpeed=%08x DevMode=%08x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) "AdapterMode=%08x Tags=%08x ResetDelay=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) cfg_data[CFG_ADAPTER_ID].value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) cfg_data[CFG_MAX_SPEED].value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) cfg_data[CFG_DEV_MODE].value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) cfg_data[CFG_ADAPTER_MODE].value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) cfg_data[CFG_TAGS].value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) cfg_data[CFG_RESET_DELAY].value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) for (i = 0; i < CFG_NUM; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (cfg_data[i].value < cfg_data[i].min
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) || cfg_data[i].value > cfg_data[i].max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) cfg_data[i].value = cfg_data[i].def;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * Mapping from the eeprom delay index value (index into this array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * to the number of actual seconds that the delay should be for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static char eeprom_index_to_delay_map[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) { 1, 3, 5, 10, 16, 30, 60, 120 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * eeprom_index_to_delay - Take the eeprom delay setting and convert it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * into a number of seconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * @eeprom: The eeprom structure in which we find the delay index to map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) static void eeprom_index_to_delay(struct NvRamType *eeprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) eeprom->delay_time = eeprom_index_to_delay_map[eeprom->delay_time];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) * delay_to_eeprom_index - Take a delay in seconds and return the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) * closest eeprom index which will delay for at least that amount of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) * seconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) * @delay: The delay, in seconds, to find the eeprom index for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static int delay_to_eeprom_index(int delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) u8 idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) while (idx < 7 && eeprom_index_to_delay_map[idx] < delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) return idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * eeprom_override - Override the eeprom settings, in the provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * eeprom structure, with values that have been set on the command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * @eeprom: The eeprom data to override with command line options.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static void eeprom_override(struct NvRamType *eeprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) u8 id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) /* Adapter Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) if (cfg_data[CFG_ADAPTER_ID].value != CFG_PARAM_UNSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) eeprom->scsi_id = (u8)cfg_data[CFG_ADAPTER_ID].value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (cfg_data[CFG_ADAPTER_MODE].value != CFG_PARAM_UNSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) eeprom->channel_cfg = (u8)cfg_data[CFG_ADAPTER_MODE].value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (cfg_data[CFG_RESET_DELAY].value != CFG_PARAM_UNSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) eeprom->delay_time = delay_to_eeprom_index(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) cfg_data[CFG_RESET_DELAY].value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if (cfg_data[CFG_TAGS].value != CFG_PARAM_UNSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) eeprom->max_tag = (u8)cfg_data[CFG_TAGS].value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) /* Device Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) for (id = 0; id < DC395x_MAX_SCSI_ID; id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) if (cfg_data[CFG_DEV_MODE].value != CFG_PARAM_UNSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) eeprom->target[id].cfg0 =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) (u8)cfg_data[CFG_DEV_MODE].value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (cfg_data[CFG_MAX_SPEED].value != CFG_PARAM_UNSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) eeprom->target[id].period =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) (u8)cfg_data[CFG_MAX_SPEED].value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) /*---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) ---------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) static unsigned int list_size(struct list_head *head)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) unsigned int count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) struct list_head *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) list_for_each(pos, head)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static struct DeviceCtlBlk *dcb_get_next(struct list_head *head,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) struct DeviceCtlBlk *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) int use_next = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) struct DeviceCtlBlk* next = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) struct DeviceCtlBlk* i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (list_empty(head))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) /* find supplied dcb and then select the next one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) list_for_each_entry(i, head, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (use_next) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) next = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) } else if (i == pos) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) use_next = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) /* if no next one take the head one (ie, wraparound) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) if (!next)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) list_for_each_entry(i, head, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) next = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) return next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static void free_tag(struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (srb->tag_number < 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) dcb->tag_mask &= ~(1 << srb->tag_number); /* free tag mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) srb->tag_number = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) /* Find cmd in SRB list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static inline struct ScsiReqBlk *find_cmd(struct scsi_cmnd *cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) struct list_head *head)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) struct ScsiReqBlk *i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) list_for_each_entry(i, head, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) if (i->cmd == cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) /* Sets the timer to wake us up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static void waiting_set_timer(struct AdapterCtlBlk *acb, unsigned long to)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (timer_pending(&acb->waiting_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) if (time_before(jiffies + to, acb->last_reset - HZ / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) acb->waiting_timer.expires =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) acb->last_reset - HZ / 2 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) acb->waiting_timer.expires = jiffies + to + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) add_timer(&acb->waiting_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) /* Send the next command from the waiting list to the bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static void waiting_process_next(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct DeviceCtlBlk *start = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) struct DeviceCtlBlk *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) struct list_head *dcb_list_head = &acb->dcb_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (acb->active_dcb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) || (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (timer_pending(&acb->waiting_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) del_timer(&acb->waiting_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) if (list_empty(dcb_list_head))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) * Find the starting dcb. Need to find it again in the list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) * since the list may have changed since we set the ptr to it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) list_for_each_entry(dcb, dcb_list_head, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (dcb == acb->dcb_run_robin) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) start = dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) if (!start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) /* This can happen! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) start = list_entry(dcb_list_head->next, typeof(*start), list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) acb->dcb_run_robin = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) * Loop over the dcb, but we start somewhere (potentially) in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) * the middle of the loop so we need to manully do this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) pos = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) struct list_head *waiting_list_head = &pos->srb_waiting_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) /* Make sure, the next another device gets scheduled ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) acb->dcb_run_robin = dcb_get_next(dcb_list_head,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) acb->dcb_run_robin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) if (list_empty(waiting_list_head) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) pos->max_command <= list_size(&pos->srb_going_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /* move to next dcb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) pos = dcb_get_next(dcb_list_head, pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) srb = list_entry(waiting_list_head->next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) struct ScsiReqBlk, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /* Try to send to the bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if (!start_scsi(acb, pos, srb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) list_move(&srb->list, &pos->srb_going_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) waiting_set_timer(acb, HZ/50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) } while (pos != start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) /* Wake up waiting queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static void waiting_timeout(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) struct AdapterCtlBlk *acb = from_timer(acb, t, waiting_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) dprintkdbg(DBG_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) "waiting_timeout: Queue woken up by timer. acb=%p\n", acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) DC395x_LOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) DC395x_UNLOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) /* Get the DCB for a given ID/LUN combination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static struct DeviceCtlBlk *find_dcb(struct AdapterCtlBlk *acb, u8 id, u8 lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) return acb->children[id][lun];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) /* Send SCSI Request Block (srb) to adapter (acb) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) static void send_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) struct DeviceCtlBlk *dcb = srb->dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) if (dcb->max_command <= list_size(&dcb->srb_going_list) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) acb->active_dcb ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) (acb->acb_flag & (RESET_DETECT + RESET_DONE + RESET_DEV))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) list_add_tail(&srb->list, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) if (!start_scsi(acb, dcb, srb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) list_add_tail(&srb->list, &dcb->srb_going_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) list_add(&srb->list, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) waiting_set_timer(acb, HZ / 50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) /* Prepare SRB for being sent to Device DCB w/ command *cmd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) static void build_srb(struct scsi_cmnd *cmd, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) int nseg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) enum dma_data_direction dir = cmd->sc_data_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) dprintkdbg(DBG_0, "build_srb: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) cmd, dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) srb->dcb = dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) srb->cmd = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) srb->sg_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) srb->total_xfer_length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) srb->sg_bus_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) srb->sg_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) srb->adapter_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) srb->target_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) srb->msg_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) srb->status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) srb->flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) srb->state = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) srb->retry_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) srb->tag_number = TAG_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) srb->scsi_phase = PH_BUS_FREE; /* initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) srb->end_message = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) nseg = scsi_dma_map(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) BUG_ON(nseg < 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) if (dir == DMA_NONE || !nseg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) dprintkdbg(DBG_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) "build_srb: [0] len=%d buf=%p use_sg=%d !MAP=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) cmd->bufflen, scsi_sglist(cmd), scsi_sg_count(cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) srb->segment_x[0].address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) u32 reqlen = scsi_bufflen(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) struct SGentry *sgp = srb->segment_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) srb->sg_count = nseg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) dprintkdbg(DBG_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) "build_srb: [n] len=%d buf=%p use_sg=%d segs=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) reqlen, scsi_sglist(cmd), scsi_sg_count(cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) srb->sg_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) scsi_for_each_sg(cmd, sg, srb->sg_count, i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) u32 busaddr = (u32)sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) u32 seglen = (u32)sg->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) sgp[i].address = busaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) sgp[i].length = seglen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) srb->total_xfer_length += seglen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) sgp += srb->sg_count - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) * adjust last page if too big as it is allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) * on even page boundaries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) if (srb->total_xfer_length > reqlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) sgp->length -= (srb->total_xfer_length - reqlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) srb->total_xfer_length = reqlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) /* Fixup for WIDE padding - make sure length is even */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) if (dcb->sync_period & WIDE_SYNC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) srb->total_xfer_length % 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) srb->total_xfer_length++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) sgp->length++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) srb->sg_bus_addr = dma_map_single(&dcb->acb->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) srb->segment_x, SEGMENTX_LEN, DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) dprintkdbg(DBG_SG, "build_srb: [n] map sg %p->%08x(%05x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) srb->segment_x, srb->sg_bus_addr, SEGMENTX_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) srb->request_length = srb->total_xfer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) * dc395x_queue_command - queue scsi command passed from the mid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) * layer, invoke 'done' on completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) * @cmd: pointer to scsi command object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * @done: function pointer to be invoked on completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) * Returns 1 if the adapter (host) is busy, else returns 0. One
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) * reason for an adapter to be busy is that the number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) * of outstanding queued commands is already equal to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) * struct Scsi_Host::can_queue .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) * Required: if struct Scsi_Host::can_queue is ever non-zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) * then this function is required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) * Locks: struct Scsi_Host::host_lock held on entry (with "irqsave")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) * and is expected to be held on return.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) static int dc395x_queue_command_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) struct AdapterCtlBlk *acb =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) (struct AdapterCtlBlk *)cmd->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) dprintkdbg(DBG_0, "queue_command: (0x%p) <%02i-%i> cmnd=0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) cmd, cmd->device->id, (u8)cmd->device->lun, cmd->cmnd[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) /* Assume BAD_TARGET; will be cleared later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) cmd->result = DID_BAD_TARGET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) /* ignore invalid targets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (cmd->device->id >= acb->scsi_host->max_id ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) cmd->device->lun >= acb->scsi_host->max_lun ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) cmd->device->lun >31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) goto complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) /* does the specified lun on the specified device exist */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) if (!(acb->dcb_map[cmd->device->id] & (1 << cmd->device->lun))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) dprintkl(KERN_INFO, "queue_command: Ignore target <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) cmd->device->id, (u8)cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) goto complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) /* do we have a DCB for the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) dcb = find_dcb(acb, cmd->device->id, cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (!dcb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) /* should never happen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) dprintkl(KERN_ERR, "queue_command: No such device <%02i-%i>",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) cmd->device->id, (u8)cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) goto complete;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) /* set callback and clear result in the command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) cmd->scsi_done = done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) cmd->result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) srb = list_first_entry_or_null(&acb->srb_free_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) struct ScsiReqBlk, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) if (!srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) * Return 1 since we are unable to queue this command at this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * point in time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) dprintkdbg(DBG_0, "queue_command: No free srb's\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) list_del(&srb->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) build_srb(cmd, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) if (!list_empty(&dcb->srb_waiting_list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) /* append to waiting queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) list_add_tail(&srb->list, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) /* process immediately */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) send_srb(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) dprintkdbg(DBG_1, "queue_command: (0x%p) done\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) complete:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * Complete the command immediatey, and then return 0 to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) * indicate that we have handled the command. This is usually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) * done when the commad is for things like non existent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) * devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) static DEF_SCSI_QCMD(dc395x_queue_command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) static void dump_register_info(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) struct DeviceCtlBlk *dcb, struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) u16 pstat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) struct pci_dev *dev = acb->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) pci_read_config_word(dev, PCI_STATUS, &pstat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) if (!dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) dcb = acb->active_dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) if (!srb && dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) srb = dcb->active_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) if (!srb->cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) dprintkl(KERN_INFO, "dump: srb=%p cmd=%p OOOPS!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) srb, srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) dprintkl(KERN_INFO, "dump: srb=%p cmd=%p "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) "cmnd=0x%02x <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) srb, srb->cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) srb->cmd->cmnd[0], srb->cmd->device->id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) printk(" sglist=%p cnt=%i idx=%i len=%zu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) srb->segment_x, srb->sg_count, srb->sg_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) printk(" state=0x%04x status=0x%02x phase=0x%02x (%sconn.)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) srb->state, srb->status, srb->scsi_phase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) (acb->active_dcb) ? "" : "not");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) dprintkl(KERN_INFO, "dump: SCSI{status=0x%04x fifocnt=0x%02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) "signals=0x%02x irqstat=0x%02x sync=0x%02x target=0x%02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) "rselid=0x%02x ctr=0x%08x irqen=0x%02x config=0x%04x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) "config2=0x%02x cmd=0x%02x selto=0x%02x}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) DC395x_read16(acb, TRM_S1040_SCSI_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) DC395x_read8(acb, TRM_S1040_SCSI_SYNC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) DC395x_read8(acb, TRM_S1040_SCSI_TARGETID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) DC395x_read8(acb, TRM_S1040_SCSI_IDMSG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) DC395x_read32(acb, TRM_S1040_SCSI_COUNTER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) DC395x_read8(acb, TRM_S1040_SCSI_INTEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) DC395x_read16(acb, TRM_S1040_SCSI_CONFIG0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) DC395x_read8(acb, TRM_S1040_SCSI_CONFIG2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) DC395x_read8(acb, TRM_S1040_SCSI_COMMAND),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) DC395x_read8(acb, TRM_S1040_SCSI_TIMEOUT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) dprintkl(KERN_INFO, "dump: DMA{cmd=0x%04x fifocnt=0x%02x fstat=0x%02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) "irqstat=0x%02x irqen=0x%02x cfg=0x%04x tctr=0x%08x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) "ctctr=0x%08x addr=0x%08x:0x%08x}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) DC395x_read16(acb, TRM_S1040_DMA_COMMAND),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) DC395x_read8(acb, TRM_S1040_DMA_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) DC395x_read8(acb, TRM_S1040_DMA_INTEN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) DC395x_read16(acb, TRM_S1040_DMA_CONFIG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) DC395x_read32(acb, TRM_S1040_DMA_XCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) DC395x_read32(acb, TRM_S1040_DMA_CXCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) DC395x_read32(acb, TRM_S1040_DMA_XHIGHADDR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) DC395x_read32(acb, TRM_S1040_DMA_XLOWADDR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) dprintkl(KERN_INFO, "dump: gen{gctrl=0x%02x gstat=0x%02x gtmr=0x%02x} "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) "pci{status=0x%04x}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) DC395x_read8(acb, TRM_S1040_GEN_CONTROL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) DC395x_read8(acb, TRM_S1040_GEN_STATUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) DC395x_read8(acb, TRM_S1040_GEN_TIMER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) pstat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) static inline void clear_fifo(struct AdapterCtlBlk *acb, char *txt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) #if debug_enabled(DBG_FIFO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) u8 lines = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) u8 fifocnt = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) if (!(fifocnt & 0x40))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) dprintkdbg(DBG_FIFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) "clear_fifo: (%i bytes) on phase %02x in %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) fifocnt & 0x3f, lines, txt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) static void reset_dev_param(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) struct NvRamType *eeprom = &acb->eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) dprintkdbg(DBG_0, "reset_dev_param: acb=%p\n", acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) list_for_each_entry(dcb, &acb->dcb_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) u8 period_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) dcb->sync_mode &= ~(SYNC_NEGO_DONE + WIDE_NEGO_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) dcb->sync_period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) dcb->sync_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) dcb->dev_mode = eeprom->target[dcb->target_id].cfg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) period_index = eeprom->target[dcb->target_id].period & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) dcb->min_nego_period = clock_period[period_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) if (!(dcb->dev_mode & NTC_DO_WIDE_NEGO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) || !(acb->config & HCC_WIDE_CARD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) dcb->sync_mode &= ~WIDE_NEGO_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) * perform a hard reset on the SCSI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) * @cmd - some command for this host (for fetching hooks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) * Returns: SUCCESS (0x2002) on success, else FAILED (0x2003).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) static int __dc395x_eh_bus_reset(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) struct AdapterCtlBlk *acb =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) (struct AdapterCtlBlk *)cmd->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) dprintkl(KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) "eh_bus_reset: (0%p) target=<%02i-%i> cmd=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) cmd, cmd->device->id, (u8)cmd->device->lun, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) if (timer_pending(&acb->waiting_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) del_timer(&acb->waiting_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) * disable interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) reset_scsi_bus(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) /* We may be in serious trouble. Wait some seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) acb->last_reset =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) jiffies + 3 * HZ / 2 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) HZ * acb->eeprom.delay_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) * re-enable interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) /* Clear SCSI FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) clear_fifo(acb, "eh_bus_reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /* Delete pending IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) set_basic_config(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) reset_dev_param(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) doing_srb_done(acb, DID_RESET, cmd, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) acb->active_dcb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE ,RESET_DEV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) static int dc395x_eh_bus_reset(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) spin_lock_irq(cmd->device->host->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) rc = __dc395x_eh_bus_reset(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) spin_unlock_irq(cmd->device->host->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) * abort an errant SCSI command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) * @cmd - command to be aborted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) * Returns: SUCCESS (0x2002) on success, else FAILED (0x2003).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) static int dc395x_eh_abort(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) * Look into our command queues: If it has not been sent already,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) * we remove it and return success. Otherwise fail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) struct AdapterCtlBlk *acb =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) (struct AdapterCtlBlk *)cmd->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) dprintkl(KERN_INFO, "eh_abort: (0x%p) target=<%02i-%i> cmd=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) cmd, cmd->device->id, (u8)cmd->device->lun, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) dcb = find_dcb(acb, cmd->device->id, cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) if (!dcb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) dprintkl(KERN_DEBUG, "eh_abort: No such device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) srb = find_cmd(cmd, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) if (srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) list_del(&srb->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) pci_unmap_srb_sense(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) pci_unmap_srb(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) free_tag(dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) list_add_tail(&srb->list, &acb->srb_free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) dprintkl(KERN_DEBUG, "eh_abort: Command was waiting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) cmd->result = DID_ABORT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) srb = find_cmd(cmd, &dcb->srb_going_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) if (srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) dprintkl(KERN_DEBUG, "eh_abort: Command in progress\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) /* XXX: Should abort the command here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) dprintkl(KERN_DEBUG, "eh_abort: Command not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) /* SDTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) static void build_sdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) u8 *ptr = srb->msgout_buf + srb->msg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) if (srb->msg_count > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) dprintkl(KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) "build_sdtr: msgout_buf BUSY (%i: %02x %02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) srb->msg_count, srb->msgout_buf[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) srb->msgout_buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) dcb->sync_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) dcb->min_nego_period = 200 >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) } else if (dcb->sync_offset == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) dcb->sync_offset = SYNC_NEGO_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) *ptr++ = MSG_EXTENDED; /* (01h) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) *ptr++ = 3; /* length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) *ptr++ = EXTENDED_SDTR; /* (01h) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) *ptr++ = dcb->min_nego_period; /* Transfer period (in 4ns) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) *ptr++ = dcb->sync_offset; /* Transfer period (max. REQ/ACK dist) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) srb->msg_count += 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) srb->state |= SRB_DO_SYNC_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) /* WDTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) static void build_wdtr(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) u8 wide = ((dcb->dev_mode & NTC_DO_WIDE_NEGO) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) (acb->config & HCC_WIDE_CARD)) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) u8 *ptr = srb->msgout_buf + srb->msg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) if (srb->msg_count > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) dprintkl(KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) "build_wdtr: msgout_buf BUSY (%i: %02x %02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) srb->msg_count, srb->msgout_buf[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) srb->msgout_buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) *ptr++ = MSG_EXTENDED; /* (01h) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) *ptr++ = 2; /* length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) *ptr++ = EXTENDED_WDTR; /* (03h) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) *ptr++ = wide;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) srb->msg_count += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) srb->state |= SRB_DO_WIDE_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) /* Timer to work around chip flaw: When selecting and the bus is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) * busy, we sometimes miss a Selection timeout IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) void selection_timeout_missed(unsigned long ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) /* Sets the timer to wake us up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) static void selto_timer(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) if (timer_pending(&acb->selto_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) acb->selto_timer.function = selection_timeout_missed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) acb->selto_timer.data = (unsigned long) acb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) if (time_before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) (jiffies + HZ, acb->last_reset + HZ / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) acb->selto_timer.expires =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) acb->last_reset + HZ / 2 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) acb->selto_timer.expires = jiffies + HZ + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) add_timer(&acb->selto_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) void selection_timeout_missed(unsigned long ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) dprintkl(KERN_DEBUG, "Chip forgot to produce SelTO IRQ!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) if (!acb->active_dcb || !acb->active_dcb->active_srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) dprintkl(KERN_DEBUG, "... but no cmd pending? Oops!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) DC395x_LOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) srb = acb->active_dcb->active_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) disconnect(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) DC395x_UNLOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) static u8 start_scsi(struct AdapterCtlBlk* acb, struct DeviceCtlBlk* dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) struct ScsiReqBlk* srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) u16 s_stat2, return_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) u8 s_stat, scsicommand, i, identify_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) u8 *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) dprintkdbg(DBG_0, "start_scsi: (0x%p) <%02i-%i> srb=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) dcb->target_id, dcb->target_lun, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) srb->tag_number = TAG_NONE; /* acb->tag_max_num: had error read in eeprom */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) s_stat = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) s_stat2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) s_stat2 = DC395x_read16(acb, TRM_S1040_SCSI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) if (s_stat & 0x20 /* s_stat2 & 0x02000 */ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) dprintkdbg(DBG_KG, "start_scsi: (0x%p) BUSY %02x %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) s_stat, s_stat2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) * Try anyway?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) * We could, BUT: Sometimes the TRM_S1040 misses to produce a Selection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) * Timeout, a Disconnect or a Reselection IRQ, so we would be screwed!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) * (This is likely to be a bug in the hardware. Obviously, most people
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) * only have one initiator per SCSI bus.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) * Instead let this fail and have the timer make sure the command is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) * tried again after a short time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) /*selto_timer (acb); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) if (acb->active_dcb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) dprintkl(KERN_DEBUG, "start_scsi: (0x%p) Attempt to start a"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) "command while another command (0x%p) is active.",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) srb->cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) acb->active_dcb->active_srb ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) acb->active_dcb->active_srb->cmd : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) dprintkdbg(DBG_KG, "start_scsi: (0x%p) Failed (busy)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) /* Allow starting of SCSI commands half a second before we allow the mid-level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) * to queue them again after a reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) if (time_before(jiffies, acb->last_reset - HZ / 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) dprintkdbg(DBG_KG, "start_scsi: Refuse cmds (reset wait)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) /* Flush FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) clear_fifo(acb, "start_scsi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) srb->scsi_phase = PH_BUS_FREE; /* initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) identify_message = dcb->identify_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) /*DC395x_TRM_write8(TRM_S1040_SCSI_IDMSG, identify_message); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) /* Don't allow disconnection for AUTO_REQSENSE: Cont.All.Cond.! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) if (srb->flag & AUTO_REQSENSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) identify_message &= 0xBF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) if (((srb->cmd->cmnd[0] == INQUIRY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) || (srb->cmd->cmnd[0] == REQUEST_SENSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) || (srb->flag & AUTO_REQSENSE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) && (((dcb->sync_mode & WIDE_NEGO_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) && !(dcb->sync_mode & WIDE_NEGO_DONE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) || ((dcb->sync_mode & SYNC_NEGO_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) && !(dcb->sync_mode & SYNC_NEGO_DONE)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) && (dcb->target_lun == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) srb->msgout_buf[0] = identify_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) srb->msg_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) scsicommand = SCMD_SEL_ATNSTOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) srb->state = SRB_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) #ifndef SYNC_FIRST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) if (dcb->sync_mode & WIDE_NEGO_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) && dcb->inquiry7 & SCSI_INQ_WBUS16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) build_wdtr(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) goto no_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) if (dcb->sync_mode & SYNC_NEGO_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) && dcb->inquiry7 & SCSI_INQ_SYNC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) build_sdtr(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) goto no_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) if (dcb->sync_mode & WIDE_NEGO_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) && dcb->inquiry7 & SCSI_INQ_WBUS16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) build_wdtr(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) goto no_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) srb->msg_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) /* Send identify message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, identify_message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) scsicommand = SCMD_SEL_ATN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) srb->state = SRB_START_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) #ifndef DC395x_NO_TAGQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) if ((dcb->sync_mode & EN_TAG_QUEUEING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) && (identify_message & 0xC0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) /* Send Tag message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) u32 tag_mask = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) u8 tag_number = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) while (tag_mask & dcb->tag_mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) && tag_number < dcb->max_command) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) tag_mask = tag_mask << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) tag_number++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) if (tag_number >= dcb->max_command) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) dprintkl(KERN_WARNING, "start_scsi: (0x%p) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) "Out of tags target=<%02i-%i>)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) srb->cmd, srb->cmd->device->id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) srb->state = SRB_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) DO_HWRESELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) /* Send Tag id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, MSG_SIMPLE_QTAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, tag_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) dcb->tag_mask |= tag_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) srb->tag_number = tag_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) scsicommand = SCMD_SEL_ATN3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) srb->state = SRB_START_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) /*polling:*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) /* Send CDB ..command block ......... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) dprintkdbg(DBG_KG, "start_scsi: (0x%p) <%02i-%i> cmnd=0x%02x tag=%i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) srb->cmd->cmnd[0], srb->tag_number);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) if (srb->flag & AUTO_REQSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SCSI_SENSE_BUFFERSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) ptr = (u8 *)srb->cmd->cmnd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) for (i = 0; i < srb->cmd->cmd_len; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) no_cmd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) DO_HWRESELECT | DO_DATALATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) if (DC395x_read16(acb, TRM_S1040_SCSI_STATUS) & SCSIINTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) * If start_scsi return 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) * we caught an interrupt (must be reset or reselection ... )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) * : Let's process it first!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) dprintkdbg(DBG_0, "start_scsi: (0x%p) <%02i-%i> Failed - busy\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) srb->cmd, dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) srb->state = SRB_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) free_tag(dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) srb->msg_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) return_code = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) /* This IRQ should NOT get lost, as we did not acknowledge it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) * If start_scsi returns 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) * we know that the SCSI processor is free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) srb->scsi_phase = PH_BUS_FREE; /* initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) dcb->active_srb = srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) acb->active_dcb = dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) return_code = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) DO_DATALATCH | DO_HWRESELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) /* SCSI command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, scsicommand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) return return_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) #define DC395x_ENABLE_MSGOUT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) DC395x_write16 (acb, TRM_S1040_SCSI_CONTROL, DO_SETATN); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) srb->state |= SRB_MSGOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) /* abort command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) static inline void enable_msgout_abort(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) srb->msgout_buf[0] = ABORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) srb->msg_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) srb->state &= ~SRB_MSGIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) srb->state |= SRB_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) * dc395x_handle_interrupt - Handle an interrupt that has been confirmed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) * have been triggered for this card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) * @acb: a pointer to the adpter control block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) * @scsi_status: the status return when we checked the card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) static void dc395x_handle_interrupt(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) u16 scsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) u16 phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) u8 scsi_intstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) void (*dc395x_statev)(struct AdapterCtlBlk *, struct ScsiReqBlk *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) u16 *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) DC395x_LOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) /* This acknowledges the IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) scsi_intstatus = DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) if ((scsi_status & 0x2007) == 0x2002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) "COP after COP completed? %04x\n", scsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) if (debug_enabled(DBG_KG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) if (scsi_intstatus & INT_SELTIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) dprintkdbg(DBG_KG, "handle_interrupt: Selection timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) /*dprintkl(KERN_DEBUG, "handle_interrupt: intstatus = 0x%02x ", scsi_intstatus); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) if (timer_pending(&acb->selto_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) del_timer(&acb->selto_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) if (scsi_intstatus & (INT_SELTIMEOUT | INT_DISCONNECT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) disconnect(acb); /* bus free interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) if (scsi_intstatus & INT_RESELECTED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) reselect(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) if (scsi_intstatus & INT_SELECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) dprintkl(KERN_INFO, "Host does not support target mode!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) if (scsi_intstatus & INT_SCSIRESET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) scsi_reset_detect(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) if (scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) dcb = acb->active_dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) if (!dcb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) "Oops: BusService (%04x %02x) w/o ActiveDCB!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) scsi_status, scsi_intstatus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) srb = dcb->active_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) if (dcb->flag & ABORT_DEV_) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) dprintkdbg(DBG_0, "MsgOut Abort Device.....\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) enable_msgout_abort(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) /* software sequential machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) phase = (u16)srb->scsi_phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) * 62037 or 62137
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) * call dc395x_scsi_phase0[]... "phase entry"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) * handle every phase before start transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) /* data_out_phase0, phase:0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) /* data_in_phase0, phase:1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) /* command_phase0, phase:2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) /* status_phase0, phase:3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) /* nop0, phase:4 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) /* nop0, phase:5 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) /* msgout_phase0, phase:6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) /* msgin_phase0, phase:7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) dc395x_statev = dc395x_scsi_phase0[phase];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) dc395x_statev(acb, srb, &scsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) * if there were any exception occurred scsi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) * will be modify to bus free phase new scsi_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) * transfer out from ... previous dc395x_statev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) srb->scsi_phase = scsi_status & PHASEMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) phase = (u16)scsi_status & PHASEMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) * call dc395x_scsi_phase1[]... "phase entry" handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) * every phase to do transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) /* data_out_phase1, phase:0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) /* data_in_phase1, phase:1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) /* command_phase1, phase:2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) /* status_phase1, phase:3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) /* nop1, phase:4 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) /* nop1, phase:5 PH_BUS_FREE .. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) /* msgout_phase1, phase:6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) /* msgin_phase1, phase:7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) dc395x_statev = dc395x_scsi_phase1[phase];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) dc395x_statev(acb, srb, &scsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) DC395x_UNLOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) static irqreturn_t dc395x_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) struct AdapterCtlBlk *acb = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) u16 scsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) u8 dma_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) irqreturn_t handled = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) * Check for pending interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) scsi_status = DC395x_read16(acb, TRM_S1040_SCSI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) if (scsi_status & SCSIINTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) /* interrupt pending - let's process it! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) dc395x_handle_interrupt(acb, scsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) handled = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) else if (dma_status & 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) /* Error from the DMA engine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) dprintkl(KERN_INFO, "Interrupt from DMA engine: 0x%02x!\n", dma_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) dprintkl(KERN_INFO, "This means DMA error! Try to handle ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) if (acb->active_dcb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) acb->active_dcb-> flag |= ABORT_DEV_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) if (acb->active_dcb->active_srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) enable_msgout_abort(acb, acb->active_dcb->active_srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, ABORTXFER | CLRXFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) dprintkl(KERN_INFO, "Ignoring DMA error (probably a bad thing) ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) acb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) handled = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) return handled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) static void msgout_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) dprintkdbg(DBG_0, "msgout_phase0: (0x%p)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) if (srb->state & (SRB_UNEXPECT_RESEL + SRB_ABORT_SENT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) *pscsi_status = PH_BUS_FREE; /*.. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) srb->state &= ~SRB_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) static void msgout_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) u16 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) u8 *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) dprintkdbg(DBG_0, "msgout_phase1: (0x%p)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) clear_fifo(acb, "msgout_phase1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) if (!(srb->state & SRB_MSGOUT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) srb->state |= SRB_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) "msgout_phase1: (0x%p) Phase unexpected\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) srb->cmd); /* So what ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) if (!srb->msg_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) dprintkdbg(DBG_0, "msgout_phase1: (0x%p) NOP msg\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, MSG_NOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) ptr = (u8 *)srb->msgout_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) for (i = 0; i < srb->msg_count; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) srb->msg_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) if (srb->msgout_buf[0] == MSG_ABORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) srb->state = SRB_ABORT_SENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) static void command_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) dprintkdbg(DBG_0, "command_phase0: (0x%p)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) static void command_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) u8 *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) u16 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) dprintkdbg(DBG_0, "command_phase1: (0x%p)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) clear_fifo(acb, "command_phase1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_CLRATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) if (!(srb->flag & AUTO_REQSENSE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) ptr = (u8 *)srb->cmd->cmnd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) for (i = 0; i < srb->cmd->cmd_len; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, REQUEST_SENSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) dcb = acb->active_dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) /* target id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, (dcb->target_lun << 5));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, SCSI_SENSE_BUFFERSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) srb->state |= SRB_COMMAND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) /* SCSI command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) * Verify that the remaining space in the hw sg lists is the same as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) * the count of remaining bytes in srb->total_xfer_length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) static void sg_verify_length(struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) if (debug_enabled(DBG_SG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) unsigned len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) unsigned idx = srb->sg_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) struct SGentry *psge = srb->segment_x + idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) for (; idx < srb->sg_count; psge++, idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) len += psge->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) if (len != srb->total_xfer_length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) dprintkdbg(DBG_SG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) "Inconsistent SRB S/G lengths (Tot=%i, Count=%i) !!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) srb->total_xfer_length, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) * Compute the next Scatter Gather list index and adjust its length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) * and address if necessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) static void sg_update_list(struct ScsiReqBlk *srb, u32 left)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) u8 idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) u32 xferred = srb->total_xfer_length - left; /* bytes transferred */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) struct SGentry *psge = srb->segment_x + srb->sg_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) dprintkdbg(DBG_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) "sg_update_list: Transferred %i of %i bytes, %i remain\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) xferred, srb->total_xfer_length, left);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) if (xferred == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) /* nothing to update since we did not transfer any data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) sg_verify_length(srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) srb->total_xfer_length = left; /* update remaining count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) for (idx = srb->sg_index; idx < srb->sg_count; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) if (xferred >= psge->length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) /* Complete SG entries done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) xferred -= psge->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) /* Partial SG entry done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) dma_sync_single_for_cpu(&srb->dcb->acb->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) srb->sg_bus_addr, SEGMENTX_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) psge->length -= xferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) psge->address += xferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) srb->sg_index = idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) dma_sync_single_for_device(&srb->dcb->acb->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) srb->sg_bus_addr, SEGMENTX_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) psge++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) sg_verify_length(srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) * We have transferred a single byte (PIO mode?) and need to update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) * the count of bytes remaining (total_xfer_length) and update the sg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) * entry to either point to next byte in the current sg entry, or of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) * already at the end to point to the start of the next sg entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) static void sg_subtract_one(struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) sg_update_list(srb, srb->total_xfer_length - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) * cleanup_after_transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) * Makes sure, DMA and SCSI engine are empty, after the transfer has finished
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) * KG: Currently called from StatusPhase1 ()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) * Should probably also be called from other places
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) * Best might be to call it in DataXXPhase0, if new phase will differ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) static void cleanup_after_transfer(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) /*DC395x_write8 (TRM_S1040_DMA_STATUS, FORCEDMACOMP); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) if (DC395x_read16(acb, TRM_S1040_DMA_COMMAND) & 0x0001) { /* read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) clear_fifo(acb, "cleanup/in");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) } else { /* write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) if (!(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) & 0x40))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) clear_fifo(acb, "cleanup/out");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) * Those no of bytes will be transferred w/ PIO through the SCSI FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) * Seems to be needed for unknown reasons; could be a hardware bug :-(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) #define DC395x_LASTPIO 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) static void data_out_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) struct DeviceCtlBlk *dcb = srb->dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) u16 scsi_status = *pscsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) u32 d_left_counter = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) dprintkdbg(DBG_0, "data_out_phase0: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) * KG: We need to drain the buffers before we draw any conclusions!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) * This means telling the DMA to push the rest into SCSI, telling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) * SCSI to push the rest to the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) * However, the device might have been the one to stop us (phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) * change), and the data in transit just needs to be accounted so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) * it can be retransmitted.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) * KG: Stop DMA engine pushing more data into the SCSI FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) * If we need more data, the DMA SG list will be freshly set up, anyway
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) dprintkdbg(DBG_PIO, "data_out_phase0: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) "DMA{fifocnt=0x%02x fifostat=0x%02x} "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) "SCSI{fifocnt=0x%02x cnt=0x%06x status=0x%04x} total=0x%06x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) DC395x_read32(acb, TRM_S1040_SCSI_COUNTER), scsi_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, STOPDMAXFER | CLRXFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) if (!(srb->state & SRB_XFERPAD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) if (scsi_status & PARITYERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) srb->status |= PARITY_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) * KG: Right, we can't just rely on the SCSI_COUNTER, because this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) * is the no of bytes it got from the DMA engine not the no it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) * transferred successfully to the device. (And the difference could
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) * be as much as the FIFO size, I guess ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) if (!(scsi_status & SCSIXFERDONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) * when data transfer from DMA FIFO to SCSI FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) * if there was some data left in SCSI FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) d_left_counter =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) (u32)(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) 0x1F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) if (dcb->sync_period & WIDE_SYNC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) d_left_counter <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) dprintkdbg(DBG_KG, "data_out_phase0: FIFO contains %i %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) "SCSI{fifocnt=0x%02x cnt=0x%08x} "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) "DMA{fifocnt=0x%04x cnt=0x%02x ctr=0x%08x}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) (dcb->sync_period & WIDE_SYNC) ? "words" : "bytes",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) DC395x_read32(acb, TRM_S1040_SCSI_COUNTER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) DC395x_read32(acb, TRM_S1040_DMA_CXCNT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) * calculate all the residue data that not yet tranfered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) * SCSI transfer counter + left in SCSI FIFO data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) * .....TRM_S1040_SCSI_COUNTER (24bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) * The counter always decrement by one for every SCSI byte transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) * .....TRM_S1040_SCSI_FIFOCNT ( 5bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) * The counter is SCSI FIFO offset counter (in units of bytes or! words)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) if (srb->total_xfer_length > DC395x_LASTPIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) d_left_counter +=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) DC395x_read32(acb, TRM_S1040_SCSI_COUNTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) /* Is this a good idea? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) /*clear_fifo(acb, "DOP1"); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) /* KG: What is this supposed to be useful for? WIDE padding stuff? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) if (d_left_counter == 1 && dcb->sync_period & WIDE_SYNC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) && scsi_bufflen(srb->cmd) % 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) d_left_counter = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) dprintkl(KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) "data_out_phase0: Discard 1 byte (0x%02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) scsi_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) * KG: Oops again. Same thinko as above: The SCSI might have been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) * faster than the DMA engine, so that it ran out of data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) * In that case, we have to do just nothing!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) * But: Why the interrupt: No phase change. No XFERCNT_2_ZERO. Or?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) * KG: This is nonsense: We have been WRITING data to the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) * If the SCSI engine has no bytes left, how should the DMA engine?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) if (d_left_counter == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) srb->total_xfer_length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) * if transfer not yet complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) * there were some data residue in SCSI FIFO or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) * SCSI transfer counter not empty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) long oldxferred =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) srb->total_xfer_length - d_left_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) const int diff =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) (dcb->sync_period & WIDE_SYNC) ? 2 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) sg_update_list(srb, d_left_counter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) /* KG: Most ugly hack! Apparently, this works around a chip bug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) if ((srb->segment_x[srb->sg_index].length ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) diff && scsi_sg_count(srb->cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) || ((oldxferred & ~PAGE_MASK) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) (PAGE_SIZE - diff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) dprintkl(KERN_INFO, "data_out_phase0: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) "Work around chip bug (%i)?\n", diff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) d_left_counter =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) srb->total_xfer_length - diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) sg_update_list(srb, d_left_counter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) /*srb->total_xfer_length -= diff; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) /*srb->virt_addr += diff; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) /*if (srb->cmd->use_sg) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) /* srb->sg_index++; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) if ((*pscsi_status & PHASEMASK) != PH_DATA_OUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) cleanup_after_transfer(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) static void data_out_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) dprintkdbg(DBG_0, "data_out_phase1: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) clear_fifo(acb, "data_out_phase1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) /* do prepare before transfer when data out phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) data_io_transfer(acb, srb, XFERDATAOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) static void data_in_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) u16 scsi_status = *pscsi_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) dprintkdbg(DBG_0, "data_in_phase0: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) * KG: DataIn is much more tricky than DataOut. When the device is finished
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) * and switches to another phase, the SCSI engine should be finished too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) * But: There might still be bytes left in its FIFO to be fetched by the DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) * engine and transferred to memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) * We should wait for the FIFOs to be emptied by that (is there any way to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) * enforce this?) and then stop the DMA engine, because it might think, that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) * there are more bytes to follow. Yes, the device might disconnect prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) * having all bytes transferred!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) * Also we should make sure that all data from the DMA engine buffer's really
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) * made its way to the system memory! Some documentation on this would not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) * seem to be a bad idea, actually.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) if (!(srb->state & SRB_XFERPAD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) u32 d_left_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) unsigned int sc, fc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) if (scsi_status & PARITYERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) dprintkl(KERN_INFO, "data_in_phase0: (0x%p) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) "Parity Error\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) srb->status |= PARITY_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) * KG: We should wait for the DMA FIFO to be empty ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) * but: it would be better to wait first for the SCSI FIFO and then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) * the DMA FIFO to become empty? How do we know, that the device not already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) * sent data to the FIFO in a MsgIn phase, eg.?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) if (!(DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT) & 0x80)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) int ctr = 6000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) "DIP0: Wait for DMA FIFO to flush ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) /*DC395x_write8 (TRM_S1040_DMA_CONTROL, STOPDMAXFER); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) /*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 7); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) /*DC395x_write8 (TRM_S1040_SCSI_COMMAND, SCMD_DMA_IN); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) while (!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) (DC395x_read16(acb, TRM_S1040_DMA_FIFOSTAT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) 0x80) && --ctr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) if (ctr < 6000000 - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) dprintkl(KERN_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) "DIP0: Had to wait for DMA ...\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) if (!ctr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) dprintkl(KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) "Deadlock in DIP0 waiting for DMA FIFO empty!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) /*DC395x_write32 (TRM_S1040_SCSI_COUNTER, 0); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) dprintkdbg(DBG_KG, "data_in_phase0: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) "DMA{fifocnt=0x%02x fifostat=0x%02x}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) DC395x_read8(acb, TRM_S1040_DMA_FIFOCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) /* Now: Check remainig data: The SCSI counters should tell us ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) sc = DC395x_read32(acb, TRM_S1040_SCSI_COUNTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) fc = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) d_left_counter = sc + ((fc & 0x1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) << ((srb->dcb->sync_period & WIDE_SYNC) ? 1 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) dprintkdbg(DBG_KG, "data_in_phase0: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) "SCSI{fifocnt=0x%02x%s ctr=0x%08x} "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) "DMA{fifocnt=0x%02x fifostat=0x%02x ctr=0x%08x} "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) "Remain{totxfer=%i scsi_fifo+ctr=%i}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) fc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) (srb->dcb->sync_period & WIDE_SYNC) ? "words" : "bytes",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) sc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) fc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) DC395x_read8(acb, TRM_S1040_DMA_FIFOSTAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) DC395x_read32(acb, TRM_S1040_DMA_CXCNT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) srb->total_xfer_length, d_left_counter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) #if DC395x_LASTPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) /* KG: Less than or equal to 4 bytes can not be transferred via DMA, it seems. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) if (d_left_counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) && srb->total_xfer_length <= DC395x_LASTPIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) size_t left_io = srb->total_xfer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) /*u32 addr = (srb->segment_x[srb->sg_index].address); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) /*sg_update_list (srb, d_left_counter); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) dprintkdbg(DBG_PIO, "data_in_phase0: PIO (%i %s) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) "for remaining %i bytes:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) fc & 0x1f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) (srb->dcb->sync_period & WIDE_SYNC) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) "words" : "bytes",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) if (srb->dcb->sync_period & WIDE_SYNC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) CFG2_WIDEFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) while (left_io) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) unsigned char *virt, *base = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) size_t len = left_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) size_t offset = srb->request_length - left_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) /* Assumption: it's inside one page as it's at most 4 bytes and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) I just assume it's on a 4-byte boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) base = scsi_kmap_atomic_sg(scsi_sglist(srb->cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) srb->sg_count, &offset, &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) virt = base + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) left_io -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) while (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) u8 byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) byte = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) *virt++ = byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) if (debug_enabled(DBG_PIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) printk(" %02x", byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) d_left_counter--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) sg_subtract_one(srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) fc = DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) if (fc == 0x40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) left_io = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) WARN_ON((fc != 0x40) == !d_left_counter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) if (fc == 0x40 && (srb->dcb->sync_period & WIDE_SYNC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) /* Read the last byte ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) if (srb->total_xfer_length > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) u8 byte = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) *virt++ = byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) srb->total_xfer_length--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) if (debug_enabled(DBG_PIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) printk(" %02x", byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) scsi_kunmap_atomic_sg(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) /*printk(" %08x", *(u32*)(bus_to_virt (addr))); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) /*srb->total_xfer_length = 0; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) if (debug_enabled(DBG_PIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) #endif /* DC395x_LASTPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) * KG: This was in DATAOUT. Does it also belong here?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) * Nobody seems to know what counter and fifo_cnt count exactly ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) if (!(scsi_status & SCSIXFERDONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) * when data transfer from DMA FIFO to SCSI FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) * if there was some data left in SCSI FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) d_left_counter =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) (u32)(DC395x_read8(acb, TRM_S1040_SCSI_FIFOCNT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) 0x1F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) if (srb->dcb->sync_period & WIDE_SYNC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) d_left_counter <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) * if WIDE scsi SCSI FIFOCNT unit is word !!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) * so need to *= 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) * KG: Seems to be correct ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) /* KG: This should not be needed any more! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) if (d_left_counter == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) || (scsi_status & SCSIXFERCNT_2_ZERO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) int ctr = 6000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) u8 TempDMAstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) TempDMAstatus =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) DC395x_read8(acb, TRM_S1040_DMA_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) } while (!(TempDMAstatus & DMAXFERCOMP) && --ctr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) if (!ctr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) dprintkl(KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) "Deadlock in DataInPhase0 waiting for DMA!!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) srb->total_xfer_length = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) srb->total_xfer_length = d_left_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) } else { /* phase changed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) * parsing the case:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) * when a transfer not yet complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) * but be disconnected by target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) * if transfer not yet complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) * there were some data residue in SCSI FIFO or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) * SCSI transfer counter not empty
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) sg_update_list(srb, d_left_counter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) /* KG: The target may decide to disconnect: Empty FIFO before! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) if ((*pscsi_status & PHASEMASK) != PH_DATA_IN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) cleanup_after_transfer(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) static void data_in_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) dprintkdbg(DBG_0, "data_in_phase1: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) data_io_transfer(acb, srb, XFERDATAIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) static void data_io_transfer(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) struct ScsiReqBlk *srb, u16 io_dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) struct DeviceCtlBlk *dcb = srb->dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) u8 bval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) dprintkdbg(DBG_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) "data_io_transfer: (0x%p) <%02i-%i> %c len=%i, sg=(%i/%i)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) ((io_dir & DMACMD_DIR) ? 'r' : 'w'),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) srb->total_xfer_length, srb->sg_index, srb->sg_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) if (srb == acb->tmp_srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) dprintkl(KERN_ERR, "data_io_transfer: Using tmp_srb!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) if (srb->sg_index >= srb->sg_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) /* can't happen? out of bounds error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) if (srb->total_xfer_length > DC395x_LASTPIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) u8 dma_status = DC395x_read8(acb, TRM_S1040_DMA_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) * KG: What should we do: Use SCSI Cmd 0x90/0x92?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) * Maybe, even ABORTXFER would be appropriate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) if (dma_status & XFERPENDING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) dprintkl(KERN_DEBUG, "data_io_transfer: Xfer pending! "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) "Expect trouble!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) dump_register_info(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) /* clear_fifo(acb, "IO"); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) * load what physical address of Scatter/Gather list table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) * want to be transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) srb->state |= SRB_DATA_XFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) DC395x_write32(acb, TRM_S1040_DMA_XHIGHADDR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) if (scsi_sg_count(srb->cmd)) { /* with S/G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) io_dir |= DMACMD_SG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) srb->sg_bus_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) sizeof(struct SGentry) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) srb->sg_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) /* load how many bytes in the sg list table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) DC395x_write32(acb, TRM_S1040_DMA_XCNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) ((u32)(srb->sg_count -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) srb->sg_index) << 3));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) } else { /* without S/G */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) io_dir &= ~DMACMD_SG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) DC395x_write32(acb, TRM_S1040_DMA_XLOWADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) srb->segment_x[0].address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) DC395x_write32(acb, TRM_S1040_DMA_XCNT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) srb->segment_x[0].length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) /* load total transfer length (24bits) max value 16Mbyte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) DC395x_write32(acb, TRM_S1040_SCSI_COUNTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) if (io_dir & DMACMD_DIR) { /* read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) SCMD_DMA_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) DC395x_write16(acb, TRM_S1040_DMA_COMMAND, io_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) DC395x_write16(acb, TRM_S1040_DMA_COMMAND, io_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) SCMD_DMA_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) #if DC395x_LASTPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) else if (srb->total_xfer_length > 0) { /* The last four bytes: Do PIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) * load what physical address of Scatter/Gather list table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) * want to be transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) srb->state |= SRB_DATA_XFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) /* load total transfer length (24bits) max value 16Mbyte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) DC395x_write32(acb, TRM_S1040_SCSI_COUNTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) if (io_dir & DMACMD_DIR) { /* read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) SCMD_FIFO_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) } else { /* write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) int ln = srb->total_xfer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) size_t left_io = srb->total_xfer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) if (srb->dcb->sync_period & WIDE_SYNC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) CFG2_WIDEFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) while (left_io) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) unsigned char *virt, *base = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) size_t len = left_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) size_t offset = srb->request_length - left_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) /* Again, max 4 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) base = scsi_kmap_atomic_sg(scsi_sglist(srb->cmd),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) srb->sg_count, &offset, &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) virt = base + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) left_io -= len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) while (len--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) if (debug_enabled(DBG_PIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) printk(" %02x", *virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, *virt++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) sg_subtract_one(srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) scsi_kunmap_atomic_sg(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) if (srb->dcb->sync_period & WIDE_SYNC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) if (ln % 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) if (debug_enabled(DBG_PIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) printk(" |00");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) /*DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, ln); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) if (debug_enabled(DBG_PIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) SCMD_FIFO_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) #endif /* DC395x_LASTPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) else { /* xfer pad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) u8 data = 0, data2 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) if (srb->sg_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) srb->adapter_status = H_OVER_UNDER_RUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) srb->status |= OVER_RUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) * KG: despite the fact that we are using 16 bits I/O ops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) * the SCSI FIFO is only 8 bits according to the docs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) * (we can set bit 1 in 0x8f to serialize FIFO access ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) if (dcb->sync_period & WIDE_SYNC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) CFG2_WIDEFIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) if (io_dir & DMACMD_DIR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) data = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) data2 = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) /* Danger, Robinson: If you find KGs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) * scattered over the wide disk, the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) * or chip is to blame :-( */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'K');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'G');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) /* Danger, Robinson: If you find a collection of Ks on your disk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) * something broke :-( */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) if (io_dir & DMACMD_DIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) data = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) DC395x_write8(acb, TRM_S1040_SCSI_FIFO, 'K');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) srb->state |= SRB_XFERPAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) /* SCSI command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) bval = (io_dir & DMACMD_DIR) ? SCMD_FIFO_IN : SCMD_FIFO_OUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, bval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) static void status_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) dprintkdbg(DBG_0, "status_phase0: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) srb->target_status = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) srb->end_message = DC395x_read8(acb, TRM_S1040_SCSI_FIFO); /* get message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) srb->state = SRB_COMPLETED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) *pscsi_status = PH_BUS_FREE; /*.. initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) static void status_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) dprintkdbg(DBG_0, "status_phase1: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) srb->cmd, srb->cmd->device->id, (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) srb->state = SRB_STATUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_COMP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) /* Check if the message is complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) static inline u8 msgin_completed(u8 * msgbuf, u32 len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) if (*msgbuf == EXTENDED_MESSAGE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) if (len < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) if (len < msgbuf[1] + 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) } else if (*msgbuf >= 0x20 && *msgbuf <= 0x2f) /* two byte messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) if (len < 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) /* reject_msg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) static inline void msgin_reject(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) srb->msgout_buf[0] = MESSAGE_REJECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) srb->msg_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) srb->state &= ~SRB_MSGIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) srb->state |= SRB_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) dprintkl(KERN_INFO, "msgin_reject: 0x%02x <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) srb->msgin_buf[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) srb->dcb->target_id, srb->dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) static struct ScsiReqBlk *msgin_qtag(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) struct DeviceCtlBlk *dcb, u8 tag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) struct ScsiReqBlk *srb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) struct ScsiReqBlk *i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) dprintkdbg(DBG_0, "msgin_qtag: (0x%p) tag=%i srb=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) srb->cmd, tag, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) if (!(dcb->tag_mask & (1 << tag)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) "msgin_qtag: tag_mask=0x%08x does not reserve tag %i!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) dcb->tag_mask, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) if (list_empty(&dcb->srb_going_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) goto mingx0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) list_for_each_entry(i, &dcb->srb_going_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) if (i->tag_number == tag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) srb = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) if (!srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) goto mingx0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) dprintkdbg(DBG_0, "msgin_qtag: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) srb->cmd, srb->dcb->target_id, srb->dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) if (dcb->flag & ABORT_DEV_) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) /*srb->state = SRB_ABORT_SENT; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) enable_msgout_abort(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) if (!(srb->state & SRB_DISCONNECT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) goto mingx0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) memcpy(srb->msgin_buf, dcb->active_srb->msgin_buf, acb->msg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) srb->state |= dcb->active_srb->state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) srb->state |= SRB_DATA_XFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) dcb->active_srb = srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) /* How can we make the DORS happy? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) return srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) mingx0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) srb = acb->tmp_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) srb->state = SRB_UNEXPECT_RESEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) dcb->active_srb = srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) srb->msgout_buf[0] = MSG_ABORT_TAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) srb->msg_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) dprintkl(KERN_DEBUG, "msgin_qtag: Unknown tag %i - abort\n", tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) return srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) static inline void reprogram_regs(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) struct DeviceCtlBlk *dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) set_xfer_rate(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) /* set async transfer mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) static void msgin_set_async(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) struct DeviceCtlBlk *dcb = srb->dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) dprintkl(KERN_DEBUG, "msgin_set_async: No sync transfers <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) dcb->sync_mode &= ~(SYNC_NEGO_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) dcb->sync_mode |= SYNC_NEGO_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) /*dcb->sync_period &= 0; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) dcb->sync_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) dcb->min_nego_period = 200 >> 2; /* 200ns <=> 5 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) srb->state &= ~SRB_DO_SYNC_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) reprogram_regs(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) if ((dcb->sync_mode & WIDE_NEGO_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) && !(dcb->sync_mode & WIDE_NEGO_DONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) build_wdtr(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) dprintkdbg(DBG_0, "msgin_set_async(rej): Try WDTR anyway\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) /* set sync transfer mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) static void msgin_set_sync(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) struct DeviceCtlBlk *dcb = srb->dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) u8 bval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) int fact;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) dprintkdbg(DBG_1, "msgin_set_sync: <%02i> Sync: %ins "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) "(%02i.%01i MHz) Offset %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) dcb->target_id, srb->msgin_buf[3] << 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) (250 / srb->msgin_buf[3]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) ((250 % srb->msgin_buf[3]) * 10) / srb->msgin_buf[3],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) srb->msgin_buf[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) if (srb->msgin_buf[4] > 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) srb->msgin_buf[4] = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) if (!(dcb->dev_mode & NTC_DO_SYNC_NEGO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) dcb->sync_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) else if (dcb->sync_offset == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) dcb->sync_offset = srb->msgin_buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) if (srb->msgin_buf[4] > dcb->sync_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) srb->msgin_buf[4] = dcb->sync_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) dcb->sync_offset = srb->msgin_buf[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) bval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) while (bval < 7 && (srb->msgin_buf[3] > clock_period[bval]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) || dcb->min_nego_period >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) clock_period[bval]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) bval++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) if (srb->msgin_buf[3] < clock_period[bval])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) dprintkl(KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) "msgin_set_sync: Increase sync nego period to %ins\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) clock_period[bval] << 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) srb->msgin_buf[3] = clock_period[bval];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) dcb->sync_period &= 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) dcb->sync_period |= ALT_SYNC | bval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) dcb->min_nego_period = srb->msgin_buf[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) if (dcb->sync_period & WIDE_SYNC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) fact = 500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) fact = 250;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) dprintkl(KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) "Target %02i: %s Sync: %ins Offset %i (%02i.%01i MB/s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) dcb->target_id, (fact == 500) ? "Wide16" : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) dcb->min_nego_period << 2, dcb->sync_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) (fact / dcb->min_nego_period),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) ((fact % dcb->min_nego_period) * 10 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) dcb->min_nego_period / 2) / dcb->min_nego_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) if (!(srb->state & SRB_DO_SYNC_NEGO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) /* Reply with corrected SDTR Message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) dprintkl(KERN_DEBUG, "msgin_set_sync: answer w/%ins %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) srb->msgin_buf[3] << 2, srb->msgin_buf[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) memcpy(srb->msgout_buf, srb->msgin_buf, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) srb->msg_count = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) dcb->sync_mode |= SYNC_NEGO_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) if ((dcb->sync_mode & WIDE_NEGO_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) && !(dcb->sync_mode & WIDE_NEGO_DONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) build_wdtr(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) dprintkdbg(DBG_0, "msgin_set_sync: Also try WDTR\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) srb->state &= ~SRB_DO_SYNC_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) dcb->sync_mode |= SYNC_NEGO_DONE | SYNC_NEGO_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) reprogram_regs(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) static inline void msgin_set_nowide(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) struct DeviceCtlBlk *dcb = srb->dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) dprintkdbg(DBG_1, "msgin_set_nowide: <%02i>\n", dcb->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) dcb->sync_period &= ~WIDE_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) dcb->sync_mode &= ~(WIDE_NEGO_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) dcb->sync_mode |= WIDE_NEGO_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) srb->state &= ~SRB_DO_WIDE_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) reprogram_regs(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) if ((dcb->sync_mode & SYNC_NEGO_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) && !(dcb->sync_mode & SYNC_NEGO_DONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) build_sdtr(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) dprintkdbg(DBG_0, "msgin_set_nowide: Rejected. Try SDTR anyway\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) static void msgin_set_wide(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) struct DeviceCtlBlk *dcb = srb->dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) u8 wide = (dcb->dev_mode & NTC_DO_WIDE_NEGO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) && acb->config & HCC_WIDE_CARD) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) dprintkdbg(DBG_1, "msgin_set_wide: <%02i>\n", dcb->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) if (srb->msgin_buf[3] > wide)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) srb->msgin_buf[3] = wide;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) /* Completed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) if (!(srb->state & SRB_DO_WIDE_NEGO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) "msgin_set_wide: Wide nego initiated <%02i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) dcb->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) memcpy(srb->msgout_buf, srb->msgin_buf, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) srb->msg_count = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) srb->state |= SRB_DO_WIDE_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) dcb->sync_mode |= (WIDE_NEGO_ENABLE | WIDE_NEGO_DONE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) if (srb->msgin_buf[3] > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) dcb->sync_period |= WIDE_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) dcb->sync_period &= ~WIDE_SYNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) srb->state &= ~SRB_DO_WIDE_NEGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) /*dcb->sync_mode &= ~(WIDE_NEGO_ENABLE+WIDE_NEGO_DONE); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) dprintkdbg(DBG_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) "msgin_set_wide: Wide (%i bit) negotiated <%02i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) (8 << srb->msgin_buf[3]), dcb->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) reprogram_regs(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) if ((dcb->sync_mode & SYNC_NEGO_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) && !(dcb->sync_mode & SYNC_NEGO_DONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) build_sdtr(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) dprintkdbg(DBG_0, "msgin_set_wide: Also try SDTR.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) * extended message codes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) * code description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) * 02h Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) * 00h MODIFY DATA POINTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) * 01h SYNCHRONOUS DATA TRANSFER REQUEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) * 03h WIDE DATA TRANSFER REQUEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) * 04h - 7Fh Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) * 80h - FFh Vendor specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) static void msgin_phase0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) struct DeviceCtlBlk *dcb = acb->active_dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) dprintkdbg(DBG_0, "msgin_phase0: (0x%p)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) srb->msgin_buf[acb->msg_len++] = DC395x_read8(acb, TRM_S1040_SCSI_FIFO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) if (msgin_completed(srb->msgin_buf, acb->msg_len)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) /* Now eval the msg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) switch (srb->msgin_buf[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) case DISCONNECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) srb->state = SRB_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) case SIMPLE_QUEUE_TAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) case HEAD_OF_QUEUE_TAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) case ORDERED_QUEUE_TAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) srb =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) msgin_qtag(acb, dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) srb->msgin_buf[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) case MESSAGE_REJECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) DO_CLRATN | DO_DATALATCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) /* A sync nego message was rejected ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) if (srb->state & SRB_DO_SYNC_NEGO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) msgin_set_async(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) /* A wide nego message was rejected ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) if (srb->state & SRB_DO_WIDE_NEGO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) msgin_set_nowide(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) enable_msgout_abort(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) /*srb->state |= SRB_ABORT_SENT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) case EXTENDED_MESSAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) /* SDTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) if (srb->msgin_buf[1] == 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) && srb->msgin_buf[2] == EXTENDED_SDTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) msgin_set_sync(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) /* WDTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) if (srb->msgin_buf[1] == 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) && srb->msgin_buf[2] == EXTENDED_WDTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) && srb->msgin_buf[3] <= 2) { /* sanity check ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) msgin_set_wide(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) msgin_reject(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) case MSG_IGNOREWIDE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) /* Discard wide residual */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) dprintkdbg(DBG_0, "msgin_phase0: Ignore Wide Residual!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) case COMMAND_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) /* nothing has to be done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) case SAVE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) * SAVE POINTER may be ignored as we have the struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) * ScsiReqBlk* associated with the scsi command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) dprintkdbg(DBG_0, "msgin_phase0: (0x%p) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) "SAVE POINTER rem=%i Ignore\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) srb->cmd, srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) case RESTORE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) dprintkdbg(DBG_0, "msgin_phase0: RESTORE POINTER. Ignore\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) case ABORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) dprintkdbg(DBG_0, "msgin_phase0: (0x%p) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) "<%02i-%i> ABORT msg\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) srb->cmd, dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) dcb->flag |= ABORT_DEV_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) enable_msgout_abort(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) /* reject unknown messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) if (srb->msgin_buf[0] & IDENTIFY_BASE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) dprintkdbg(DBG_0, "msgin_phase0: Identify msg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) srb->msg_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) srb->msgout_buf[0] = dcb->identify_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) DC395x_ENABLE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) srb->state |= SRB_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) /*break; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) msgin_reject(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) /* Clear counter and MsgIn state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) srb->state &= ~SRB_MSGIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) acb->msg_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) *pscsi_status = PH_BUS_FREE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important ... you know! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) static void msgin_phase1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) dprintkdbg(DBG_0, "msgin_phase1: (0x%p)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) clear_fifo(acb, "msgin_phase1");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) DC395x_write32(acb, TRM_S1040_SCSI_COUNTER, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) if (!(srb->state & SRB_MSGIN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) srb->state &= ~SRB_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) srb->state |= SRB_MSGIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) /* SCSI command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_FIFO_IN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) static void nop0(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) static void nop1(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) u16 *pscsi_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) static void set_xfer_rate(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) struct DeviceCtlBlk *i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) /* set all lun device's period, offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) if (dcb->identify_msg & 0x07)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) if (acb->scan_devices) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) current_sync_offset = dcb->sync_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) list_for_each_entry(i, &acb->dcb_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) if (i->target_id == dcb->target_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) i->sync_period = dcb->sync_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) i->sync_offset = dcb->sync_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) i->sync_mode = dcb->sync_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) i->min_nego_period = dcb->min_nego_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) static void disconnect(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) struct DeviceCtlBlk *dcb = acb->active_dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) if (!dcb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) dprintkl(KERN_ERR, "disconnect: No such device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) /* Suspend queue for a while */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) acb->last_reset =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) jiffies + HZ / 2 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) HZ * acb->eeprom.delay_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) clear_fifo(acb, "disconnectEx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) srb = dcb->active_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) acb->active_dcb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) dprintkdbg(DBG_0, "disconnect: (0x%p)\n", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) srb->scsi_phase = PH_BUS_FREE; /* initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) clear_fifo(acb, "disconnect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) if (srb->state & SRB_UNEXPECT_RESEL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) dprintkl(KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) "disconnect: Unexpected reselection <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) srb->state = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) } else if (srb->state & SRB_ABORT_SENT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) dcb->flag &= ~ABORT_DEV_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) acb->last_reset = jiffies + HZ / 2 + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) dprintkl(KERN_ERR, "disconnect: SRB_ABORT_SENT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) doing_srb_done(acb, DID_ABORT, srb->cmd, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) if ((srb->state & (SRB_START_ + SRB_MSGOUT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) || !(srb->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) state & (SRB_DISCONNECT + SRB_COMPLETED))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) * Selection time out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) * SRB_START_ || SRB_MSGOUT || (!SRB_DISCONNECT && !SRB_COMPLETED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) /* Unexp. Disc / Sel Timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) if (srb->state != SRB_START_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) && srb->state != SRB_MSGOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) srb->state = SRB_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) "disconnect: (0x%p) Unexpected\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) srb->target_status = SCSI_STAT_SEL_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) goto disc1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) /* Normal selection timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) dprintkdbg(DBG_KG, "disconnect: (0x%p) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) "<%02i-%i> SelTO\n", srb->cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) if (srb->retry_count++ > DC395x_MAX_RETRIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) || acb->scan_devices) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) srb->target_status =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) SCSI_STAT_SEL_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) goto disc1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) free_tag(dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) list_move(&srb->list, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) dprintkdbg(DBG_KG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) "disconnect: (0x%p) Retry\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) waiting_set_timer(acb, HZ / 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) } else if (srb->state & SRB_DISCONNECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) u8 bval = DC395x_read8(acb, TRM_S1040_SCSI_SIGNAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) * SRB_DISCONNECT (This is what we expect!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) if (bval & 0x40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) dprintkdbg(DBG_0, "disconnect: SCSI bus stat "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) " 0x%02x: ACK set! Other controllers?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) bval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) /* It could come from another initiator, therefore don't do much ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) } else if (srb->state & SRB_COMPLETED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) disc1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) ** SRB_COMPLETED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) free_tag(dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) dcb->active_srb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) srb->state = SRB_FREE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) srb_done(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) static void reselect(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) struct DeviceCtlBlk *dcb = acb->active_dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) struct ScsiReqBlk *srb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) u16 rsel_tar_lun_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) u8 id, lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) u8 arblostflag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) dprintkdbg(DBG_0, "reselect: acb=%p\n", acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) clear_fifo(acb, "reselect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT | DO_DATALATCH); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) /* Read Reselected Target ID and LUN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) rsel_tar_lun_id = DC395x_read16(acb, TRM_S1040_SCSI_TARGETID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) if (dcb) { /* Arbitration lost but Reselection win */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) srb = dcb->active_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) if (!srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) dprintkl(KERN_DEBUG, "reselect: Arb lost Resel won, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) "but active_srb == NULL\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) /* Why the if ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) if (!acb->scan_devices) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) dprintkdbg(DBG_KG, "reselect: (0x%p) <%02i-%i> "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) "Arb lost but Resel win rsel=%i stat=0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) srb->cmd, dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) dcb->target_lun, rsel_tar_lun_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) DC395x_read16(acb, TRM_S1040_SCSI_STATUS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) arblostflag = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) /*srb->state |= SRB_DISCONNECT; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) srb->state = SRB_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) free_tag(dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) list_move(&srb->list, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) waiting_set_timer(acb, HZ / 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) /* return; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) /* Read Reselected Target Id and LUN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) if (!(rsel_tar_lun_id & (IDENTIFY_BASE << 8)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) dprintkl(KERN_DEBUG, "reselect: Expects identify msg. "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) "Got %i!\n", rsel_tar_lun_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) id = rsel_tar_lun_id & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) lun = (rsel_tar_lun_id >> 8) & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) dcb = find_dcb(acb, id, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) if (!dcb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) dprintkl(KERN_ERR, "reselect: From non existent device "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) "<%02i-%i>\n", id, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) acb->active_dcb = dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) if (!(dcb->dev_mode & NTC_DO_DISCONNECT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) dprintkl(KERN_DEBUG, "reselect: in spite of forbidden "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) "disconnection? <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) if (dcb->sync_mode & EN_TAG_QUEUEING /*&& !arblostflag */) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) srb = acb->tmp_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) dcb->active_srb = srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) /* There can be only one! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) srb = dcb->active_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) if (!srb || !(srb->state & SRB_DISCONNECT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) * abort command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) "reselect: w/o disconnected cmds <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) srb = acb->tmp_srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) srb->state = SRB_UNEXPECT_RESEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) dcb->active_srb = srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) enable_msgout_abort(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) if (dcb->flag & ABORT_DEV_) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) /*srb->state = SRB_ABORT_SENT; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) enable_msgout_abort(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) srb->state = SRB_DATA_XFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) srb->scsi_phase = PH_BUS_FREE; /* initial phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) /* Program HA ID, target ID, period and offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) dprintkdbg(DBG_0, "reselect: select <%i>\n", dcb->target_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id); /* host ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) DC395x_write8(acb, TRM_S1040_SCSI_TARGETID, dcb->target_id); /* target ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, dcb->sync_offset); /* offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) DC395x_write8(acb, TRM_S1040_SCSI_SYNC, dcb->sync_period); /* sync period, wide */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_DATALATCH); /* it's important for atn stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) /* SCSI command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) DC395x_write8(acb, TRM_S1040_SCSI_COMMAND, SCMD_MSGACCEPT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) static inline u8 tagq_blacklist(char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) #ifndef DC395x_NO_TAGQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) for (i = 0; i < BADDEVCNT; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) if (memcmp(name, DC395x_baddevname1[i], 28) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) static void disc_tagq_set(struct DeviceCtlBlk *dcb, struct ScsiInqData *ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) /* Check for SCSI format (ANSI and Response data format) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) if ((ptr->Vers & 0x07) >= 2 || (ptr->RDF & 0x0F) == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) if ((ptr->Flags & SCSI_INQ_CMDQUEUE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) && (dcb->dev_mode & NTC_DO_TAG_QUEUEING) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) /*(dcb->dev_mode & NTC_DO_DISCONNECT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) /* ((dcb->dev_type == TYPE_DISK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) || (dcb->dev_type == TYPE_MOD)) && */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) !tagq_blacklist(((char *)ptr) + 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) if (dcb->max_command == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) dcb->max_command =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) dcb->acb->tag_max_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) dcb->sync_mode |= EN_TAG_QUEUEING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) /*dcb->tag_mask = 0; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) dcb->max_command = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) static void add_dev(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) struct ScsiInqData *ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) u8 bval1 = ptr->DevType & SCSI_DEVTYPE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) dcb->dev_type = bval1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) /* if (bval1 == TYPE_DISK || bval1 == TYPE_MOD) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) disc_tagq_set(dcb, ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) /* unmap mapped pci regions from SRB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) static void pci_unmap_srb(struct AdapterCtlBlk *acb, struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) struct scsi_cmnd *cmd = srb->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) enum dma_data_direction dir = cmd->sc_data_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) if (scsi_sg_count(cmd) && dir != DMA_NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) /* unmap DC395x SG list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) dprintkdbg(DBG_SG, "pci_unmap_srb: list=%08x(%05x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) srb->sg_bus_addr, SEGMENTX_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) dma_unmap_single(&acb->dev->dev, srb->sg_bus_addr, SEGMENTX_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) dprintkdbg(DBG_SG, "pci_unmap_srb: segs=%i buffer=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) scsi_sg_count(cmd), scsi_bufflen(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) /* unmap the sg segments */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) scsi_dma_unmap(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) /* unmap mapped pci sense buffer from SRB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) static void pci_unmap_srb_sense(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) if (!(srb->flag & AUTO_REQSENSE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) /* Unmap sense buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) dprintkdbg(DBG_SG, "pci_unmap_srb_sense: buffer=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) srb->segment_x[0].address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) dma_unmap_single(&acb->dev->dev, srb->segment_x[0].address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) srb->segment_x[0].length, DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) /* Restore SG stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) srb->total_xfer_length = srb->xferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) srb->segment_x[0].address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) srb->segment_x[0].length =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) * Complete execution of a SCSI command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) * Signal completion to the generic SCSI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) static void srb_done(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) u8 tempcnt, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) struct scsi_cmnd *cmd = srb->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) enum dma_data_direction dir = cmd->sc_data_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) int ckc_only = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) dprintkdbg(DBG_1, "srb_done: (0x%p) <%02i-%i>\n", srb->cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) srb->cmd->device->id, (u8)srb->cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) dprintkdbg(DBG_SG, "srb_done: srb=%p sg=%i(%i/%i) buf=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) srb, scsi_sg_count(cmd), srb->sg_index, srb->sg_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) scsi_sgtalbe(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) status = srb->target_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) if (srb->flag & AUTO_REQSENSE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) dprintkdbg(DBG_0, "srb_done: AUTO_REQSENSE1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) pci_unmap_srb_sense(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) ** target status..........................
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) srb->flag &= ~AUTO_REQSENSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) srb->adapter_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) srb->target_status = CHECK_CONDITION << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) if (debug_enabled(DBG_1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) switch (cmd->sense_buffer[2] & 0x0f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) case NOT_READY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) "ReqSense: NOT_READY cmnd=0x%02x <%02i-%i> stat=%i scan=%i ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) cmd->cmnd[0], dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) dcb->target_lun, status, acb->scan_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) case UNIT_ATTENTION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) "ReqSense: UNIT_ATTENTION cmnd=0x%02x <%02i-%i> stat=%i scan=%i ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) cmd->cmnd[0], dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) dcb->target_lun, status, acb->scan_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) case ILLEGAL_REQUEST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) "ReqSense: ILLEGAL_REQUEST cmnd=0x%02x <%02i-%i> stat=%i scan=%i ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) cmd->cmnd[0], dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) dcb->target_lun, status, acb->scan_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) case MEDIUM_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) "ReqSense: MEDIUM_ERROR cmnd=0x%02x <%02i-%i> stat=%i scan=%i ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) cmd->cmnd[0], dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) dcb->target_lun, status, acb->scan_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) case HARDWARE_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) "ReqSense: HARDWARE_ERROR cmnd=0x%02x <%02i-%i> stat=%i scan=%i ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) cmd->cmnd[0], dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) dcb->target_lun, status, acb->scan_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) if (cmd->sense_buffer[7] >= 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) printk("sense=0x%02x ASC=0x%02x ASCQ=0x%02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) "(0x%08x 0x%08x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) cmd->sense_buffer[2], cmd->sense_buffer[12],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) cmd->sense_buffer[13],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) *((unsigned int *)(cmd->sense_buffer + 3)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) *((unsigned int *)(cmd->sense_buffer + 8)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) printk("sense=0x%02x No ASC/ASCQ (0x%08x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) cmd->sense_buffer[2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) *((unsigned int *)(cmd->sense_buffer + 3)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) if (status == (CHECK_CONDITION << 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) cmd->result = DID_BAD_TARGET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) goto ckc_e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) dprintkdbg(DBG_0, "srb_done: AUTO_REQSENSE2\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) if (srb->total_xfer_length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) && srb->total_xfer_length >= cmd->underflow)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) cmd->result =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) MK_RES_LNX(DRIVER_SENSE, DID_OK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) srb->end_message, CHECK_CONDITION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) /*SET_RES_DID(cmd->result,DID_OK) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) cmd->result =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) MK_RES_LNX(DRIVER_SENSE, DID_OK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) srb->end_message, CHECK_CONDITION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) goto ckc_e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) /*************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) * target status..........................
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) if (status_byte(status) == CHECK_CONDITION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) request_sense(acb, dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) } else if (status_byte(status) == QUEUE_FULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) tempcnt = (u8)list_size(&dcb->srb_going_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) dprintkl(KERN_INFO, "QUEUE_FULL for dev <%02i-%i> with %i cmnds\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) dcb->target_id, dcb->target_lun, tempcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) if (tempcnt > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) tempcnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) dcb->max_command = tempcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) free_tag(dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) list_move(&srb->list, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) waiting_set_timer(acb, HZ / 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) srb->adapter_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) srb->target_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) } else if (status == SCSI_STAT_SEL_TIMEOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) srb->adapter_status = H_SEL_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) srb->target_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) cmd->result = DID_NO_CONNECT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) srb->adapter_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) SET_RES_DID(cmd->result, DID_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) SET_RES_MSG(cmd->result, srb->end_message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) SET_RES_TARGET(cmd->result, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) ** process initiator status..........................
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) status = srb->adapter_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) if (status & H_OVER_UNDER_RUN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) srb->target_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) SET_RES_DID(cmd->result, DID_OK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) SET_RES_MSG(cmd->result, srb->end_message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) } else if (srb->status & PARITY_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) SET_RES_DID(cmd->result, DID_PARITY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) SET_RES_MSG(cmd->result, srb->end_message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) } else { /* No error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) srb->adapter_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) srb->target_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) SET_RES_DID(cmd->result, DID_OK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) ckc_only = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) /* Check Error Conditions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) ckc_e:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) pci_unmap_srb(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) if (cmd->cmnd[0] == INQUIRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) unsigned char *base = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) struct ScsiInqData *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) struct scatterlist* sg = scsi_sglist(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) size_t offset = 0, len = sizeof(struct ScsiInqData);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) base = scsi_kmap_atomic_sg(sg, scsi_sg_count(cmd), &offset, &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) ptr = (struct ScsiInqData *)(base + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) if (!ckc_only && (cmd->result & RES_DID) == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) && cmd->cmnd[2] == 0 && scsi_bufflen(cmd) >= 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) && dir != DMA_NONE && ptr && (ptr->Vers & 0x07) >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) dcb->inquiry7 = ptr->Flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) /*if( srb->cmd->cmnd[0] == INQUIRY && */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) /* (host_byte(cmd->result) == DID_OK || status_byte(cmd->result) & CHECK_CONDITION) ) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) if ((cmd->result == (DID_OK << 16) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) status_byte(cmd->result) == CHECK_CONDITION)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) if (!dcb->init_tcq_flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) add_dev(acb, dcb, ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) dcb->init_tcq_flag = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) scsi_kunmap_atomic_sg(base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) /* Here is the info for Doug Gilbert's sg3 ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) scsi_set_resid(cmd, srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) /* This may be interpreted by sb. or not ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) cmd->SCp.this_residual = srb->total_xfer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) cmd->SCp.buffers_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) if (debug_enabled(DBG_KG)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) if (srb->total_xfer_length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) dprintkdbg(DBG_KG, "srb_done: (0x%p) <%02i-%i> "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) "cmnd=0x%02x Missed %i bytes\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) cmd, cmd->device->id, (u8)cmd->device->lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) cmd->cmnd[0], srb->total_xfer_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) if (srb != acb->tmp_srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) /* Add to free list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) dprintkdbg(DBG_0, "srb_done: (0x%p) done result=0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) cmd, cmd->result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) list_move_tail(&srb->list, &acb->srb_free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) dprintkl(KERN_ERR, "srb_done: ERROR! Completed cmd with tmp_srb\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) /* abort all cmds in our queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) static void doing_srb_done(struct AdapterCtlBlk *acb, u8 did_flag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) struct scsi_cmnd *cmd, u8 force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) dprintkl(KERN_INFO, "doing_srb_done: pids ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) list_for_each_entry(dcb, &acb->dcb_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) struct ScsiReqBlk *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) struct scsi_cmnd *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) list_for_each_entry_safe(srb, tmp, &dcb->srb_going_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) enum dma_data_direction dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) p = srb->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) dir = p->sc_data_direction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) result = MK_RES(0, did_flag, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) printk("G:%p(%02i-%i) ", p,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) p->device->id, (u8)p->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) list_del(&srb->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) free_tag(dcb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) list_add_tail(&srb->list, &acb->srb_free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) p->result = result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) pci_unmap_srb_sense(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) pci_unmap_srb(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) if (force) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) /* For new EH, we normally don't need to give commands back,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) * as they all complete or all time out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) p->scsi_done(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) if (!list_empty(&dcb->srb_going_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) "How could the ML send cmnds to the Going queue? <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) if (dcb->tag_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) "tag_mask for <%02i-%i> should be empty, is %08x!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) dcb->target_id, dcb->target_lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) dcb->tag_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) /* Waiting queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) list_for_each_entry_safe(srb, tmp, &dcb->srb_waiting_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) p = srb->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) result = MK_RES(0, did_flag, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) printk("W:%p<%02i-%i>", p, p->device->id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) (u8)p->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) list_move_tail(&srb->list, &acb->srb_free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) p->result = result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) pci_unmap_srb_sense(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) pci_unmap_srb(acb, srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) if (force) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) /* For new EH, we normally don't need to give commands back,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) * as they all complete or all time out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) if (!list_empty(&dcb->srb_waiting_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) dprintkl(KERN_DEBUG, "ML queued %i cmnds again to <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) list_size(&dcb->srb_waiting_list), dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445) dcb->flag &= ~ABORT_DEV_;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) static void reset_scsi_bus(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) dprintkdbg(DBG_0, "reset_scsi_bus: acb=%p\n", acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) acb->acb_flag |= RESET_DEV; /* RESET_DETECT, RESET_DONE, RESET_DEV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) while (!(DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) /* nothing */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) static void set_basic_config(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) u8 bval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) u16 wval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) DC395x_write8(acb, TRM_S1040_SCSI_TIMEOUT, acb->sel_timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) if (acb->config & HCC_PARITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) bval = PHASELATCH | INITIATOR | BLOCKRST | PARITYCHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) bval = PHASELATCH | INITIATOR | BLOCKRST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG0, bval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) /* program configuration 1: Act_Neg (+ Act_Neg_Enh? + Fast_Filter? + DataDis?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) DC395x_write8(acb, TRM_S1040_SCSI_CONFIG1, 0x03); /* was 0x13: default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) /* program Host ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) DC395x_write8(acb, TRM_S1040_SCSI_HOSTID, acb->scsi_host->this_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) /* set ansynchronous transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) DC395x_write8(acb, TRM_S1040_SCSI_OFFSET, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) /* Turn LED control off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) wval = DC395x_read16(acb, TRM_S1040_GEN_CONTROL) & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) DC395x_write16(acb, TRM_S1040_GEN_CONTROL, wval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) /* DMA config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) wval = DC395x_read16(acb, TRM_S1040_DMA_CONFIG) & ~DMA_FIFO_CTRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) wval |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) DMA_FIFO_HALF_HALF | DMA_ENHANCE /*| DMA_MEM_MULTI_READ */ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) DC395x_write16(acb, TRM_S1040_DMA_CONFIG, wval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) /* Clear pending interrupt status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) /* Enable SCSI interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x7F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) DC395x_write8(acb, TRM_S1040_DMA_INTEN, EN_SCSIINTR | EN_DMAXFERERROR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) /*| EN_DMAXFERABORT | EN_DMAXFERCOMP | EN_FORCEDMACOMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) static void scsi_reset_detect(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) dprintkl(KERN_INFO, "scsi_reset_detect: acb=%p\n", acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) /* delay half a second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) if (timer_pending(&acb->waiting_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) del_timer(&acb->waiting_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) /*DC395x_write8(acb, TRM_S1040_DMA_CONTROL,STOPDMAXFER); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) /* Maybe we locked up the bus? Then lets wait even longer ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) acb->last_reset =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) jiffies + 5 * HZ / 2 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) HZ * acb->eeprom.delay_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) clear_fifo(acb, "scsi_reset_detect");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) set_basic_config(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) /*1.25 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) /*DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_HWRESELECT); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) if (acb->acb_flag & RESET_DEV) { /* RESET_DETECT, RESET_DONE, RESET_DEV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) acb->acb_flag |= RESET_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) acb->acb_flag |= RESET_DETECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) reset_dev_param(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) doing_srb_done(acb, DID_RESET, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) /*DC395x_RecoverSRB( acb ); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) acb->active_dcb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) acb->acb_flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) waiting_process_next(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) static void request_sense(struct AdapterCtlBlk *acb, struct DeviceCtlBlk *dcb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) struct ScsiReqBlk *srb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) struct scsi_cmnd *cmd = srb->cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) dprintkdbg(DBG_1, "request_sense: (0x%p) <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538) cmd, cmd->device->id, (u8)cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) srb->flag |= AUTO_REQSENSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) srb->adapter_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) srb->target_status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) /* KG: Can this prevent crap sense data ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) /* Save some data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) srb->segment_x[0].address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) srb->segment_x[DC395x_MAX_SG_LISTENTRY - 1].length =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) srb->segment_x[0].length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) srb->xferred = srb->total_xfer_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) /* srb->segment_x : a one entry of S/G list table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) srb->total_xfer_length = SCSI_SENSE_BUFFERSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) srb->segment_x[0].length = SCSI_SENSE_BUFFERSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) /* Map sense buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) srb->segment_x[0].address = dma_map_single(&acb->dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) cmd->sense_buffer, SCSI_SENSE_BUFFERSIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) DMA_FROM_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) dprintkdbg(DBG_SG, "request_sense: map buffer %p->%08x(%05x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) cmd->sense_buffer, srb->segment_x[0].address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) SCSI_SENSE_BUFFERSIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) srb->sg_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) srb->sg_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) if (start_scsi(acb, dcb, srb)) { /* Should only happen, if sb. else grabs the bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) dprintkl(KERN_DEBUG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) "request_sense: (0x%p) failed <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) srb->cmd, dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) list_move(&srb->list, &dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) waiting_set_timer(acb, HZ / 100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) * device_alloc - Allocate a new device instance. This create the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) * devices instance and sets up all the data items. The adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) * instance is required to obtain confiuration information for this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) * device. This does *not* add this device to the adapters device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) * list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) * @acb: The adapter to obtain configuration information from.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) * @target: The target for the new device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) * @lun: The lun for the new device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) * Return the new device if successful or NULL on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) static struct DeviceCtlBlk *device_alloc(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) u8 target, u8 lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) struct NvRamType *eeprom = &acb->eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) u8 period_index = eeprom->target[target].period & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) dcb = kmalloc(sizeof(struct DeviceCtlBlk), GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) dprintkdbg(DBG_0, "device_alloc: <%02i-%i>\n", target, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) if (!dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) dcb->acb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) INIT_LIST_HEAD(&dcb->srb_going_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) INIT_LIST_HEAD(&dcb->srb_waiting_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) dcb->active_srb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) dcb->tag_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) dcb->max_command = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) dcb->target_id = target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) dcb->target_lun = lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) dcb->dev_mode = eeprom->target[target].cfg0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) #ifndef DC395x_NO_DISCONNECT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) dcb->identify_msg =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) IDENTIFY(dcb->dev_mode & NTC_DO_DISCONNECT, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) dcb->identify_msg = IDENTIFY(0, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) dcb->inquiry7 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) dcb->sync_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) dcb->min_nego_period = clock_period[period_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) dcb->sync_period = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) dcb->sync_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) dcb->flag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) #ifndef DC395x_NO_WIDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) if ((dcb->dev_mode & NTC_DO_WIDE_NEGO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) && (acb->config & HCC_WIDE_CARD))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) dcb->sync_mode |= WIDE_NEGO_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) #ifndef DC395x_NO_SYNC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) if (dcb->dev_mode & NTC_DO_SYNC_NEGO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) if (!(lun) || current_sync_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) dcb->sync_mode |= SYNC_NEGO_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) if (dcb->target_lun != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) /* Copy settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) struct DeviceCtlBlk *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) list_for_each_entry(p, &acb->dcb_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) if (p->target_id == dcb->target_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) dprintkdbg(DBG_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) "device_alloc: <%02i-%i> copy from <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) dcb->target_id, dcb->target_lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) p->target_id, p->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) dcb->sync_mode = p->sync_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) dcb->sync_period = p->sync_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) dcb->min_nego_period = p->min_nego_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) dcb->sync_offset = p->sync_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) dcb->inquiry7 = p->inquiry7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) return dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) * adapter_add_device - Adds the device instance to the adaptor instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) * @acb: The adapter device to be updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) * @dcb: A newly created and initialised device instance to add.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) static void adapter_add_device(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) struct DeviceCtlBlk *dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) /* backpointer to adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) dcb->acb = acb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) /* set run_robin to this device if it is currently empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) if (list_empty(&acb->dcb_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) acb->dcb_run_robin = dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) /* add device to list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) list_add_tail(&dcb->list, &acb->dcb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) /* update device maps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) acb->dcb_map[dcb->target_id] |= (1 << dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) acb->children[dcb->target_id][dcb->target_lun] = dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) * adapter_remove_device - Removes the device instance from the adaptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) * instance. The device instance is not check in any way or freed by this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) * The caller is expected to take care of that. This will simply remove the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) * device from the adapters data strcutures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) * @acb: The adapter device to be updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) * @dcb: A device that has previously been added to the adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) static void adapter_remove_device(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) struct DeviceCtlBlk *dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) struct DeviceCtlBlk *i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) struct DeviceCtlBlk *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) dprintkdbg(DBG_0, "adapter_remove_device: <%02i-%i>\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) dcb->target_id, dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) /* fix up any pointers to this device that we have in the adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) if (acb->active_dcb == dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) acb->active_dcb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) if (acb->dcb_run_robin == dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) acb->dcb_run_robin = dcb_get_next(&acb->dcb_list, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) /* unlink from list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) list_for_each_entry_safe(i, tmp, &acb->dcb_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) if (dcb == i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) list_del(&i->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) /* clear map and children */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) acb->dcb_map[dcb->target_id] &= ~(1 << dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) acb->children[dcb->target_id][dcb->target_lun] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) dcb->acb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) * adapter_remove_and_free_device - Removes a single device from the adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) * and then frees the device information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) * @acb: The adapter device to be updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) * @dcb: A device that has previously been added to the adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) static void adapter_remove_and_free_device(struct AdapterCtlBlk *acb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) struct DeviceCtlBlk *dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) if (list_size(&dcb->srb_going_list) > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) dprintkdbg(DBG_1, "adapter_remove_and_free_device: <%02i-%i> "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) "Won't remove because of %i active requests.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) dcb->target_id, dcb->target_lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) list_size(&dcb->srb_going_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) adapter_remove_device(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) kfree(dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) * adapter_remove_and_free_all_devices - Removes and frees all of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) * devices associated with the specified adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) * @acb: The adapter from which all devices should be removed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) static void adapter_remove_and_free_all_devices(struct AdapterCtlBlk* acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) struct DeviceCtlBlk *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) dprintkdbg(DBG_1, "adapter_remove_and_free_all_devices: num=%i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) list_size(&acb->dcb_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) list_for_each_entry_safe(dcb, tmp, &acb->dcb_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) adapter_remove_and_free_device(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) * dc395x_slave_alloc - Called by the scsi mid layer to tell us about a new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) * scsi device that we need to deal with. We allocate a new device and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) * insert that device into the adapters device list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) * @scsi_device: The new scsi device that we need to handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) static int dc395x_slave_alloc(struct scsi_device *scsi_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)scsi_device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) dcb = device_alloc(acb, scsi_device->id, scsi_device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) if (!dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) adapter_add_device(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) * dc395x_slave_destroy - Called by the scsi mid layer to tell us about a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) * device that is going away.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) * @scsi_device: The new scsi device that we need to handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) static void dc395x_slave_destroy(struct scsi_device *scsi_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)scsi_device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) struct DeviceCtlBlk *dcb = find_dcb(acb, scsi_device->id, scsi_device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) if (dcb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) adapter_remove_and_free_device(acb, dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) * trms1040_wait_30us: wait for 30 us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) * Waits for 30us (using the chip by the looks of it..)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) * @io_port: base I/O address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) static void trms1040_wait_30us(unsigned long io_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) /* ScsiPortStallExecution(30); wait 30 us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) outb(5, io_port + TRM_S1040_GEN_TIMER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) while (!(inb(io_port + TRM_S1040_GEN_STATUS) & GTIMEOUT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) /* nothing */ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809) * trms1040_write_cmd - write the secified command and address to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) * chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) * @io_port: base I/O address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) * @cmd: SB + op code (command) to send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) * @addr: address to send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) static void trms1040_write_cmd(unsigned long io_port, u8 cmd, u8 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) u8 send_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) /* program SB + OP code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) for (i = 0; i < 3; i++, cmd <<= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) send_data = NVR_SELECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) if (cmd & 0x04) /* Start from bit 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) send_data |= NVR_BITOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) outb((send_data | NVR_CLOCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) /* send address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) for (i = 0; i < 7; i++, addr <<= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) send_data = NVR_SELECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837) if (addr & 0x40) /* Start from bit 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) send_data |= NVR_BITOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) outb((send_data | NVR_CLOCK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) * trms1040_set_data - store a single byte in the eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) * Called from write all to write a single byte into the SSEEPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) * Which is done one bit at a time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) * @io_port: base I/O address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) * @addr: offset into EEPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) * @byte: bytes to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) static void trms1040_set_data(unsigned long io_port, u8 addr, u8 byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) u8 send_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) /* Send write command & address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) trms1040_write_cmd(io_port, 0x05, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) /* Write data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) for (i = 0; i < 8; i++, byte <<= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) send_data = NVR_SELECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) if (byte & 0x80) /* Start from bit 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) send_data |= NVR_BITOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) outb(send_data, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) outb((send_data | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) /* Disable chip select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) outb(0, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) /* Wait for write ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) if (inb(io_port + TRM_S1040_GEN_NVRAM) & NVR_BITIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) /* Disable chip select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) outb(0, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) * trms1040_write_all - write 128 bytes to the eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) * Write the supplied 128 bytes to the chips SEEPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) * @eeprom: the data to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) * @io_port: the base io port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) static void trms1040_write_all(struct NvRamType *eeprom, unsigned long io_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) u8 *b_eeprom = (u8 *)eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920) /* Enable SEEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) outb((inb(io_port + TRM_S1040_GEN_CONTROL) | EN_EEPROM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) io_port + TRM_S1040_GEN_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) /* write enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) trms1040_write_cmd(io_port, 0x04, 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) outb(0, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) /* write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) for (addr = 0; addr < 128; addr++, b_eeprom++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) trms1040_set_data(io_port, addr, *b_eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) /* write disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) trms1040_write_cmd(io_port, 0x04, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935) outb(0, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) /* Disable SEEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) outb((inb(io_port + TRM_S1040_GEN_CONTROL) & ~EN_EEPROM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) io_port + TRM_S1040_GEN_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945) * trms1040_get_data - get a single byte from the eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) * Called from read all to read a single byte into the SSEEPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948) * Which is done one bit at a time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) * @io_port: base I/O address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) * @addr: offset into SEEPROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) * Returns the byte read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) static u8 trms1040_get_data(unsigned long io_port, u8 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958) u8 read_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) u8 result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961) /* Send read command & address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) trms1040_write_cmd(io_port, 0x06, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) /* read data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) outb((NVR_SELECT | NVR_CLOCK), io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) outb(NVR_SELECT, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970) /* Get data bit while falling edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) read_byte = inb(io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) result <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973) if (read_byte & NVR_BITIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) result |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) trms1040_wait_30us(io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) /* Disable chip select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) outb(0, io_port + TRM_S1040_GEN_NVRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) * trms1040_read_all - read all bytes from the eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) * Read the 128 bytes from the SEEPROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) * @eeprom: where to store the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) * @io_port: the base io port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) static void trms1040_read_all(struct NvRamType *eeprom, unsigned long io_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) u8 *b_eeprom = (u8 *)eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) u8 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998) /* Enable SEEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) outb((inb(io_port + TRM_S1040_GEN_CONTROL) | EN_EEPROM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) io_port + TRM_S1040_GEN_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) /* read details */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) for (addr = 0; addr < 128; addr++, b_eeprom++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) *b_eeprom = trms1040_get_data(io_port, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) /* Disable SEEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) outb((inb(io_port + TRM_S1040_GEN_CONTROL) & ~EN_EEPROM),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008) io_port + TRM_S1040_GEN_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) * check_eeprom - get and check contents of the eeprom
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016) * Read seeprom 128 bytes into the memory provider in eeprom.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) * Checks the checksum and if it's not correct it uses a set of default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) * values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020) * @eeprom: caller allocated strcuture to read the eeprom data into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021) * @io_port: io port to read from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) static void check_eeprom(struct NvRamType *eeprom, unsigned long io_port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) u16 *w_eeprom = (u16 *)eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) u16 w_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027) u16 cksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) u32 d_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) u32 *d_eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) trms1040_read_all(eeprom, io_port); /* read eeprom */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) cksum = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034) for (w_addr = 0, w_eeprom = (u16 *)eeprom; w_addr < 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) w_addr++, w_eeprom++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) cksum += *w_eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) if (cksum != 0x1234) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) * Checksum is wrong.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) * Load a set of defaults into the eeprom buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) dprintkl(KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043) "EEProm checksum error: using default values and options.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) eeprom->sub_vendor_id[0] = (u8)PCI_VENDOR_ID_TEKRAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) eeprom->sub_vendor_id[1] = (u8)(PCI_VENDOR_ID_TEKRAM >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) eeprom->sub_sys_id[0] = (u8)PCI_DEVICE_ID_TEKRAM_TRMS1040;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047) eeprom->sub_sys_id[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) (u8)(PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) eeprom->sub_class = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) eeprom->vendor_id[0] = (u8)PCI_VENDOR_ID_TEKRAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051) eeprom->vendor_id[1] = (u8)(PCI_VENDOR_ID_TEKRAM >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) eeprom->device_id[0] = (u8)PCI_DEVICE_ID_TEKRAM_TRMS1040;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) eeprom->device_id[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) (u8)(PCI_DEVICE_ID_TEKRAM_TRMS1040 >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) eeprom->reserved = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) for (d_addr = 0, d_eeprom = (u32 *)eeprom->target;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) d_addr < 16; d_addr++, d_eeprom++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) *d_eeprom = 0x00000077; /* cfg3,cfg2,period,cfg0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) *d_eeprom++ = 0x04000F07; /* max_tag,delay_time,channel_cfg,scsi_id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) *d_eeprom++ = 0x00000015; /* reserved1,boot_lun,boot_target,reserved0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) for (d_addr = 0; d_addr < 12; d_addr++, d_eeprom++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) *d_eeprom = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) /* Now load defaults (maybe set by boot/module params) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067) set_safe_settings();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) fix_settings();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) eeprom_override(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) eeprom->cksum = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072) for (w_addr = 0, cksum = 0, w_eeprom = (u16 *)eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073) w_addr < 63; w_addr++, w_eeprom++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) cksum += *w_eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) *w_eeprom = 0x1234 - cksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077) trms1040_write_all(eeprom, io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) eeprom->delay_time = cfg_data[CFG_RESET_DELAY].value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) set_safe_settings();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) eeprom_index_to_delay(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082) eeprom_override(eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088) * print_eeprom_settings - output the eeprom settings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089) * to the kernel log so people can see what they were.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) * @eeprom: The eeprom data strucutre to show details for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093) static void print_eeprom_settings(struct NvRamType *eeprom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) dprintkl(KERN_INFO, "Used settings: AdapterID=%02i, Speed=%i(%02i.%01iMHz), dev_mode=0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) eeprom->scsi_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) eeprom->target[0].period,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) clock_speed[eeprom->target[0].period] / 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) clock_speed[eeprom->target[0].period] % 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) eeprom->target[0].cfg0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) dprintkl(KERN_INFO, " AdaptMode=0x%02x, Tags=%i(%02i), DelayReset=%is\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) eeprom->channel_cfg, eeprom->max_tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) 1 << eeprom->max_tag, eeprom->delay_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) /* Free SG tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) static void adapter_sg_tables_free(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) const unsigned srbs_per_page = PAGE_SIZE/SEGMENTX_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) for (i = 0; i < DC395x_MAX_SRB_CNT; i += srbs_per_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) kfree(acb->srb_array[i].segment_x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) * Allocate SG tables; as we have to pci_map them, an SG list (struct SGentry*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) * should never cross a page boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121) static int adapter_sg_tables_alloc(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) const unsigned mem_needed = (DC395x_MAX_SRB_CNT+1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) *SEGMENTX_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125) int pages = (mem_needed+(PAGE_SIZE-1))/PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126) const unsigned srbs_per_page = PAGE_SIZE/SEGMENTX_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127) int srb_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) unsigned i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129) struct SGentry *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131) for (i = 0; i < DC395x_MAX_SRB_CNT; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) acb->srb_array[i].segment_x = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134) dprintkdbg(DBG_1, "Allocate %i pages for SG tables\n", pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) while (pages--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) ptr = kmalloc(PAGE_SIZE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) if (!ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138) adapter_sg_tables_free(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141) dprintkdbg(DBG_1, "Allocate %li bytes at %p for SG segments %i\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) PAGE_SIZE, ptr, srb_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) while (i < srbs_per_page && srb_idx < DC395x_MAX_SRB_CNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) acb->srb_array[srb_idx++].segment_x =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) ptr + (i++ * DC395x_MAX_SG_LISTENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148) if (i < srbs_per_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) acb->srb.segment_x =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150) ptr + (i * DC395x_MAX_SG_LISTENTRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) dprintkl(KERN_DEBUG, "No space for tmsrb SG table reserved?!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159) * adapter_print_config - print adapter connection and termination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) * config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162) * The io port in the adapter needs to have been set before calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) * this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) * @acb: The adapter to print the information for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167) static void adapter_print_config(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169) u8 bval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171) bval = DC395x_read8(acb, TRM_S1040_GEN_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) dprintkl(KERN_INFO, "%sConnectors: ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) ((bval & WIDESCSI) ? "(Wide) " : ""));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) if (!(bval & CON5068))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) printk("ext%s ", !(bval & EXT68HIGH) ? "68" : "50");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) if (!(bval & CON68))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177) printk("int68%s ", !(bval & INT68HIGH) ? "" : "(50)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) if (!(bval & CON50))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179) printk("int50 ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) if ((bval & (CON5068 | CON50 | CON68)) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) 0 /*(CON5068 | CON50 | CON68) */ )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) printk(" Oops! (All 3?) ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) bval = DC395x_read8(acb, TRM_S1040_GEN_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) printk(" Termination: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) if (bval & DIS_TERM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) printk("Disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) if (bval & AUTOTERM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) printk("Auto ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) if (bval & LOW8TERM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) printk("Low ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) if (bval & UP8TERM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) printk("High ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) * adapter_init_params - Initialize the various parameters in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) * adapter structure. Note that the pointer to the scsi_host is set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) * early (when this instance is created) and the io_port and irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) * values are set later after they have been reserved. This just gets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) * everything set to a good starting position.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) * The eeprom structure in the adapter needs to have been set before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) * calling this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) * @acb: The adapter to initialize.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) static void adapter_init_params(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) struct NvRamType *eeprom = &acb->eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216) /* NOTE: acb->scsi_host is set at scsi_host/acb creation time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) /* NOTE: acb->io_port_base is set at port registration time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) /* NOTE: acb->io_port_len is set at port registration time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) INIT_LIST_HEAD(&acb->dcb_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221) acb->dcb_run_robin = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) acb->active_dcb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) INIT_LIST_HEAD(&acb->srb_free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) /* temp SRB for Q tag used or abort command used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226) acb->tmp_srb = &acb->srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227) timer_setup(&acb->waiting_timer, waiting_timeout, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) timer_setup(&acb->selto_timer, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) acb->srb_count = DC395x_MAX_SRB_CNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) acb->sel_timeout = DC395x_SEL_TIMEOUT; /* timeout=250ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233) /* NOTE: acb->irq_level is set at IRQ registration time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) acb->tag_max_num = 1 << eeprom->max_tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) if (acb->tag_max_num > 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) acb->tag_max_num = 30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) acb->acb_flag = 0; /* RESET_DETECT, RESET_DONE, RESET_DEV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) acb->gmode2 = eeprom->channel_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241) acb->config = 0; /* NOTE: actually set in adapter_init_chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) if (eeprom->channel_cfg & NAC_SCANLUN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244) acb->lun_chk = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) acb->scan_devices = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247) acb->scsi_host->this_id = eeprom->scsi_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248) acb->hostid_bit = (1 << acb->scsi_host->this_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) for (i = 0; i < DC395x_MAX_SCSI_ID; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251) acb->dcb_map[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253) acb->msg_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) /* link static array of srbs into the srb free list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) for (i = 0; i < acb->srb_count - 1; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) list_add_tail(&acb->srb_array[i].list, &acb->srb_free_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) * adapter_init_host - Initialize the scsi host instance based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263) * values that we have already stored in the adapter instance. There's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264) * some mention that a lot of these are deprecated, so we won't use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265) * them (we'll use the ones in the adapter instance) but we'll fill
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266) * them in in case something else needs them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268) * The eeprom structure, irq and io ports in the adapter need to have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269) * been set before calling this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) * @host: The scsi host instance to fill in the values for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273) static void adapter_init_scsi_host(struct Scsi_Host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275) struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276) struct NvRamType *eeprom = &acb->eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278) host->max_cmd_len = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279) host->can_queue = DC395x_MAX_CMD_QUEUE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) host->cmd_per_lun = DC395x_MAX_CMD_PER_LUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281) host->this_id = (int)eeprom->scsi_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) host->io_port = acb->io_port_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283) host->n_io_port = acb->io_port_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) host->dma_channel = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285) host->unique_id = acb->io_port_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286) host->irq = acb->irq_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) acb->last_reset = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289) host->max_id = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) if (host->max_id - 1 == eeprom->scsi_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) host->max_id--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) if (eeprom->channel_cfg & NAC_SCANLUN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) host->max_lun = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) host->max_lun = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) * adapter_init_chip - Get the chip into a know state and figure out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302) * some of the settings that apply to this adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) * The io port in the adapter needs to have been set before calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305) * this function. The config will be configured correctly on return.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) * @acb: The adapter which we are to init.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) static void adapter_init_chip(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311) struct NvRamType *eeprom = &acb->eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313) /* Mask all the interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314) DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317) /* Reset SCSI module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) DC395x_write16(acb, TRM_S1040_SCSI_CONTROL, DO_RSTMODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320) /* Reset PCI/DMA module */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) udelay(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) /* program configuration 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) acb->config = HCC_AUTOTERM | HCC_PARITY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326) if (DC395x_read8(acb, TRM_S1040_GEN_STATUS) & WIDESCSI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) acb->config |= HCC_WIDE_CARD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329) if (eeprom->channel_cfg & NAC_POWERON_SCSI_RESET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330) acb->config |= HCC_SCSI_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332) if (acb->config & HCC_SCSI_RESET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333) dprintkl(KERN_INFO, "Performing initial SCSI bus reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334) DC395x_write8(acb, TRM_S1040_SCSI_CONTROL, DO_RSTSCSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) /*while (!( DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS) & INT_SCSIRESET )); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337) /*spin_unlock_irq (&io_request_lock); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) udelay(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) acb->last_reset =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341) jiffies + HZ / 2 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) HZ * acb->eeprom.delay_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344) /*spin_lock_irq (&io_request_lock); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350) * init_adapter - Grab the resource for the card, setup the adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351) * information, set the card into a known state, create the various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352) * tables etc etc. This basically gets all adapter information all up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) * to date, initialised and gets the chip in sync with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355) * @host: This hosts adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) * @io_port: The base I/O port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) * @irq: IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) * Returns 0 if the initialization succeeds, any other value on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360) * failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362) static int adapter_init(struct AdapterCtlBlk *acb, unsigned long io_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363) u32 io_port_len, unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) if (!request_region(io_port, io_port_len, DC395X_NAME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) dprintkl(KERN_ERR, "Failed to reserve IO region 0x%lx\n", io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369) /* store port base to indicate we have registered it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) acb->io_port_base = io_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371) acb->io_port_len = io_port_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) if (request_irq(irq, dc395x_interrupt, IRQF_SHARED, DC395X_NAME, acb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374) /* release the region we just claimed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) dprintkl(KERN_INFO, "Failed to register IRQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378) /* store irq to indicate we have registered it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379) acb->irq_level = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) /* get eeprom configuration information and command line settings etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382) check_eeprom(&acb->eeprom, io_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) print_eeprom_settings(&acb->eeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385) /* setup adapter control block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386) adapter_init_params(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388) /* display card connectors/termination settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389) adapter_print_config(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391) if (adapter_sg_tables_alloc(acb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392) dprintkl(KERN_DEBUG, "Memory allocation for SG tables failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393) goto failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395) adapter_init_scsi_host(acb->scsi_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396) adapter_init_chip(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397) set_basic_config(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) dprintkdbg(DBG_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400) "adapter_init: acb=%p, pdcb_map=%p psrb_array=%p "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401) "size{acb=0x%04x dcb=0x%04x srb=0x%04x}\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) acb, acb->dcb_map, acb->srb_array, sizeof(struct AdapterCtlBlk),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) sizeof(struct DeviceCtlBlk), sizeof(struct ScsiReqBlk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406) failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) if (acb->irq_level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408) free_irq(acb->irq_level, acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409) if (acb->io_port_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) release_region(acb->io_port_base, acb->io_port_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411) adapter_sg_tables_free(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) * adapter_uninit_chip - cleanly shut down the scsi controller chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) * stopping all operations and disabling interrupt generation on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420) * card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) * @acb: The adapter which we are to shutdown.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) static void adapter_uninit_chip(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426) /* disable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) DC395x_write8(acb, TRM_S1040_DMA_INTEN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) DC395x_write8(acb, TRM_S1040_SCSI_INTEN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430) /* reset the scsi bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) if (acb->config & HCC_SCSI_RESET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) reset_scsi_bus(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434) /* clear any pending interrupt state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435) DC395x_read8(acb, TRM_S1040_SCSI_INTSTATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441) * adapter_uninit - Shut down the chip and release any resources that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442) * we had allocated. Once this returns the adapter should not be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443) * anymore.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) * @acb: The adapter which we are to un-initialize.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447) static void adapter_uninit(struct AdapterCtlBlk *acb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450) DC395x_LOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452) /* remove timers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453) if (timer_pending(&acb->waiting_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) del_timer(&acb->waiting_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455) if (timer_pending(&acb->selto_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456) del_timer(&acb->selto_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) adapter_uninit_chip(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459) adapter_remove_and_free_all_devices(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) DC395x_UNLOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) if (acb->irq_level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) free_irq(acb->irq_level, acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464) if (acb->io_port_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465) release_region(acb->io_port_base, acb->io_port_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) adapter_sg_tables_free(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) #undef YESNO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) #define YESNO(YN) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) if (YN) seq_printf(m, " Yes ");\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474) else seq_printf(m, " No ")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) static int dc395x_show_info(struct seq_file *m, struct Scsi_Host *host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478) struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479) int spd, spd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480) struct DeviceCtlBlk *dcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) int dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) seq_puts(m, DC395X_BANNER " PCI SCSI Host Adapter\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485) " Driver Version " DC395X_VERSION "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487) DC395x_LOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489) seq_printf(m, "SCSI Host Nr %i, ", host->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) seq_printf(m, "DC395U/UW/F DC315/U %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491) (acb->config & HCC_WIDE_CARD) ? "Wide" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492) seq_printf(m, "io_port_base 0x%04lx, ", acb->io_port_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493) seq_printf(m, "irq_level 0x%04x, ", acb->irq_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494) seq_printf(m, " SelTimeout %ims\n", (1638 * acb->sel_timeout) / 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) seq_printf(m, "MaxID %i, MaxLUN %llu, ", host->max_id, host->max_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497) seq_printf(m, "AdapterID %i\n", host->this_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) seq_printf(m, "tag_max_num %i", acb->tag_max_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) /*seq_printf(m, ", DMA_Status %i\n", DC395x_read8(acb, TRM_S1040_DMA_STATUS)); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501) seq_printf(m, ", FilterCfg 0x%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) DC395x_read8(acb, TRM_S1040_SCSI_CONFIG1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) seq_printf(m, ", DelayReset %is\n", acb->eeprom.delay_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504) /*seq_printf(m, "\n"); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) seq_printf(m, "Nr of DCBs: %i\n", list_size(&acb->dcb_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507) seq_printf(m, "Map of attached LUNs: %8ph\n", &acb->dcb_map[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) seq_printf(m, " %8ph\n", &acb->dcb_map[8]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510) seq_puts(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511) "Un ID LUN Prty Sync Wide DsCn SndS TagQ nego_period SyncFreq SyncOffs MaxCmd\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) dev = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514) list_for_each_entry(dcb, &acb->dcb_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515) int nego_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) seq_printf(m, "%02i %02i %02i ", dev, dcb->target_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517) dcb->target_lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518) YESNO(dcb->dev_mode & NTC_DO_PARITY_CHK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) YESNO(dcb->sync_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) YESNO(dcb->sync_period & WIDE_SYNC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521) YESNO(dcb->dev_mode & NTC_DO_DISCONNECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522) YESNO(dcb->dev_mode & NTC_DO_SEND_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523) YESNO(dcb->sync_mode & EN_TAG_QUEUEING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524) nego_period = clock_period[dcb->sync_period & 0x07] << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525) if (dcb->sync_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) seq_printf(m, " %03i ns ", nego_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) seq_printf(m, " (%03i ns)", (dcb->min_nego_period << 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) if (dcb->sync_offset & 0x0f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531) spd = 1000 / (nego_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) spd1 = 1000 % (nego_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533) spd1 = (spd1 * 10 + nego_period / 2) / (nego_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) seq_printf(m, " %2i.%1i M %02i ", spd, spd1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535) (dcb->sync_offset & 0x0f));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537) seq_puts(m, " ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539) /* Add more info ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540) seq_printf(m, " %02i\n", dcb->max_command);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) dev++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) if (timer_pending(&acb->waiting_timer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545) seq_puts(m, "Waiting queue timer running\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547) seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549) list_for_each_entry(dcb, &acb->dcb_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) struct ScsiReqBlk *srb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) if (!list_empty(&dcb->srb_waiting_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552) seq_printf(m, "DCB (%02i-%i): Waiting: %i:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553) dcb->target_id, dcb->target_lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) list_size(&dcb->srb_waiting_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555) list_for_each_entry(srb, &dcb->srb_waiting_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556) seq_printf(m, " %p", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557) if (!list_empty(&dcb->srb_going_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) seq_printf(m, "\nDCB (%02i-%i): Going : %i:",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) dcb->target_id, dcb->target_lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) list_size(&dcb->srb_going_list));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561) list_for_each_entry(srb, &dcb->srb_going_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562) seq_printf(m, " %p", srb->cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4563) if (!list_empty(&dcb->srb_waiting_list) || !list_empty(&dcb->srb_going_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4564) seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4567) if (debug_enabled(DBG_1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4568) seq_printf(m, "DCB list for ACB %p:\n", acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4569) list_for_each_entry(dcb, &acb->dcb_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4570) seq_printf(m, "%p -> ", dcb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4572) seq_puts(m, "END\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4575) DC395x_UNLOCK_IO(acb->scsi_host, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4576) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4580) static struct scsi_host_template dc395x_driver_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4581) .module = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4582) .proc_name = DC395X_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4583) .show_info = dc395x_show_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4584) .name = DC395X_BANNER " " DC395X_VERSION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4585) .queuecommand = dc395x_queue_command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4586) .slave_alloc = dc395x_slave_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4587) .slave_destroy = dc395x_slave_destroy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4588) .can_queue = DC395x_MAX_CAN_QUEUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4589) .this_id = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4590) .sg_tablesize = DC395x_MAX_SG_TABLESIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4591) .cmd_per_lun = DC395x_MAX_CMD_PER_LUN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4592) .eh_abort_handler = dc395x_eh_abort,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4593) .eh_bus_reset_handler = dc395x_eh_bus_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4594) .dma_boundary = PAGE_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4595) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4598) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4599) * banner_display - Display banner on first instance of driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4600) * initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4601) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4602) static void banner_display(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4604) static int banner_done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4605) if (!banner_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4607) dprintkl(KERN_INFO, "%s %s\n", DC395X_BANNER, DC395X_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4608) banner_done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4613) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4614) * dc395x_init_one - Initialise a single instance of the adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4615) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4616) * The PCI layer will call this once for each instance of the adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4617) * that it finds in the system. The pci_dev strcuture indicates which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4618) * instance we are being called from.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4619) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4620) * @dev: The PCI device to initialize.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4621) * @id: Looks like a pointer to the entry in our pci device table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4622) * that was actually matched by the PCI subsystem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4623) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4624) * Returns 0 on success, or an error code (-ve) on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4625) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4626) static int dc395x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4627) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4628) struct Scsi_Host *scsi_host = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4629) struct AdapterCtlBlk *acb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4630) unsigned long io_port_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4631) unsigned int io_port_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4632) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4634) dprintkdbg(DBG_0, "Init one instance (%s)\n", pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4635) banner_display();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4637) if (pci_enable_device(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4639) dprintkl(KERN_INFO, "PCI Enable device failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4640) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4641) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4642) io_port_base = pci_resource_start(dev, 0) & PCI_BASE_ADDRESS_IO_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4643) io_port_len = pci_resource_len(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4644) irq = dev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4645) dprintkdbg(DBG_0, "IO_PORT=0x%04lx, IRQ=0x%x\n", io_port_base, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4647) /* allocate scsi host information (includes out adapter) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4648) scsi_host = scsi_host_alloc(&dc395x_driver_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4649) sizeof(struct AdapterCtlBlk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4650) if (!scsi_host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4651) dprintkl(KERN_INFO, "scsi_host_alloc failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4652) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4654) acb = (struct AdapterCtlBlk*)scsi_host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4655) acb->scsi_host = scsi_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4656) acb->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4658) /* initialise the adapter and everything we need */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4659) if (adapter_init(acb, io_port_base, io_port_len, irq)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4660) dprintkl(KERN_INFO, "adapter init failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4661) acb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4662) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4665) pci_set_master(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4667) /* get the scsi mid level to scan for new devices on the bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4668) if (scsi_add_host(scsi_host, &dev->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4669) dprintkl(KERN_ERR, "scsi_add_host failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4670) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4672) pci_set_drvdata(dev, scsi_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4673) scsi_scan_host(scsi_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4675) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4677) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4678) if (acb != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4679) adapter_uninit(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4680) if (scsi_host != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4681) scsi_host_put(scsi_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4682) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4683) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4687) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4688) * dc395x_remove_one - Called to remove a single instance of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4689) * adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4690) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4691) * @dev: The PCI device to initialize.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4692) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4693) static void dc395x_remove_one(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4694) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4695) struct Scsi_Host *scsi_host = pci_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4696) struct AdapterCtlBlk *acb = (struct AdapterCtlBlk *)(scsi_host->hostdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4698) dprintkdbg(DBG_0, "dc395x_remove_one: acb=%p\n", acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4700) scsi_remove_host(scsi_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4701) adapter_uninit(acb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4702) pci_disable_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4703) scsi_host_put(scsi_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4707) static struct pci_device_id dc395x_pci_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4709) .vendor = PCI_VENDOR_ID_TEKRAM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4710) .device = PCI_DEVICE_ID_TEKRAM_TRMS1040,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4711) .subvendor = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4712) .subdevice = PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4713) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4714) {} /* Terminating entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4715) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4716) MODULE_DEVICE_TABLE(pci, dc395x_pci_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4719) static struct pci_driver dc395x_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4720) .name = DC395X_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4721) .id_table = dc395x_pci_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4722) .probe = dc395x_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4723) .remove = dc395x_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4725) module_pci_driver(dc395x_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4727) MODULE_AUTHOR("C.L. Huang / Erich Chen / Kurt Garloff");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4728) MODULE_DESCRIPTION("SCSI host adapter driver for Tekram TRM-S1040 based adapters: Tekram DC395 and DC315 series");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4729) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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