^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* bnx2i.h: QLogic NetXtreme II iSCSI driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2006 - 2013 Broadcom Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2007, 2008 Red Hat, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2007, 2008 Mike Christie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2014, QLogic Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Written by: Anil Veerabhadrappa (anilgv@broadcom.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Previously Maintained by: Eddie Wai (eddie.wai@broadcom.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Maintained by: QLogic-Storage-Upstream@qlogic.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifndef _BNX2I_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define _BNX2I_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/sched/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/kfifo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/completion.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/kthread.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <scsi/scsi_cmnd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <scsi/scsi_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <scsi/scsi_eh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <scsi/iscsi_proto.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <scsi/libiscsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <scsi/scsi_transport_iscsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include "../../net/ethernet/broadcom/cnic_if.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include "57xx_iscsi_hsi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include "57xx_iscsi_constants.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include "../../net/ethernet/broadcom/bnx2x/bnx2x_mfw_req.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define BNX2_ISCSI_DRIVER_NAME "bnx2i"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define BNX2I_MAX_ADAPTERS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define ISCSI_MAX_CONNS_PER_HBA 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define ISCSI_MAX_SESS_PER_HBA ISCSI_MAX_CONNS_PER_HBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define ISCSI_MAX_CMDS_PER_SESS 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Total active commands across all connections supported by devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define ISCSI_MAX_CMDS_PER_HBA_5708 (28 * (ISCSI_MAX_CMDS_PER_SESS - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define ISCSI_MAX_CMDS_PER_HBA_5709 (128 * (ISCSI_MAX_CMDS_PER_SESS - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define ISCSI_MAX_CMDS_PER_HBA_57710 (256 * (ISCSI_MAX_CMDS_PER_SESS - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define ISCSI_MAX_BDS_PER_CMD 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define MAX_PAGES_PER_CTRL_STRUCT_POOL 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define BNX2X_DB_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define MAX_BD_LENGTH 65535
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define BD_SPLIT_SIZE 32768
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define BNX2I_SQ_WQES_MIN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define BNX2I_570X_SQ_WQES_MAX 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define BNX2I_5770X_SQ_WQES_MAX 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define BNX2I_570X_SQ_WQES_DEFAULT 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define BNX2I_5770X_SQ_WQES_DEFAULT 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define BNX2I_570X_CQ_WQES_MAX 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define BNX2I_5770X_CQ_WQES_MAX 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define BNX2I_RQ_WQES_MIN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define BNX2I_RQ_WQES_MAX 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define BNX2I_RQ_WQES_DEFAULT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* CCELLs per conn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define BNX2I_CCELLS_MIN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define BNX2I_CCELLS_MAX 96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define BNX2I_CCELLS_DEFAULT 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define ITT_INVALID_SIGNATURE 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define ISCSI_CMD_CLEANUP_TIMEOUT 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define BNX2I_CONN_CTX_BUF_SIZE 16384
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define BNX2I_SQ_WQE_SIZE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define BNX2I_RQ_WQE_SIZE 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define BNX2I_CQE_SIZE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define MB_KERNEL_CTX_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define MB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define CTX_SHIFT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define GET_CID_NUM(cid_addr) ((cid_addr) >> CTX_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define CTX_OFFSET 0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define MAX_CID_CNT 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define BNX2I_570X_PAGE_SIZE_DEFAULT 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* 5709 context registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define BNX2_MQ_CONFIG2 0x00003d00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define BNX2_MQ_CONFIG2_CONT_SZ (0x7L<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define BNX2_MQ_CONFIG2_FIRST_L4L5 (0x1fL<<8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* 57710's BAR2 is mapped to doorbell registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define BNX2X_DOORBELL_PCI_BAR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define BNX2X_MAX_CQS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define CNIC_ARM_CQE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define CNIC_ARM_CQE_FP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define CNIC_DISARM_CQE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define REG_RD(__hba, offset) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) readl(__hba->regview + offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define REG_WR(__hba, offset, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) writel(val, __hba->regview + offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #ifdef CONFIG_32BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define GET_STATS_64(__hba, dst, field) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) spin_lock_bh(&__hba->stat_lock); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) dst->field##_lo = __hba->stats.field##_lo; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) dst->field##_hi = __hba->stats.field##_hi; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) spin_unlock_bh(&__hba->stat_lock); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define ADD_STATS_64(__hba, field, len) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (spin_trylock(&__hba->stat_lock)) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (__hba->stats.field##_lo + len < \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) __hba->stats.field##_lo) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) __hba->stats.field##_hi++; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) __hba->stats.field##_lo += len; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) spin_unlock(&__hba->stat_lock); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define GET_STATS_64(__hba, dst, field) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) u64 val, *out; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) val = __hba->bnx2i_stats.field; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) out = (u64 *)&__hba->stats.field##_lo; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) *out = cpu_to_le64(val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) out = (u64 *)&dst->field##_lo; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) *out = cpu_to_le64(val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define ADD_STATS_64(__hba, field, len) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) __hba->bnx2i_stats.field += len; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * struct generic_pdu_resc - login pdu resource structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * @req_buf: driver buffer used to stage payload associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * the login request
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * @req_dma_addr: dma address for iscsi login request payload buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * @req_buf_size: actual login request payload length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * @req_wr_ptr: pointer into login request buffer when next data is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * to be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * @resp_hdr: iscsi header where iscsi login response header is to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * be recreated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * @resp_buf: buffer to stage login response payload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * @resp_dma_addr: login response payload buffer dma address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * @resp_buf_size: login response paylod length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * @resp_wr_ptr: pointer into login response buffer when next data is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * to be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * @req_bd_tbl: iscsi login request payload BD table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * @req_bd_dma: login request BD table dma address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * @resp_bd_tbl: iscsi login response payload BD table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * @resp_bd_dma: login request BD table dma address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * following structure defines buffer info for generic pdus such as iSCSI Login,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * Logout and NOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct generic_pdu_resc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) char *req_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) dma_addr_t req_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u32 req_buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) char *req_wr_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct iscsi_hdr resp_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) char *resp_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) dma_addr_t resp_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) u32 resp_buf_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) char *resp_wr_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) char *req_bd_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) dma_addr_t req_bd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) char *resp_bd_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) dma_addr_t resp_bd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * struct bd_resc_page - tracks DMA'able memory allocated for BD tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * @link: list head to link elements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * @max_ptrs: maximun pointers that can be stored in this page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * @num_valid: number of pointer valid in this page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * @page: base addess for page pointer array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * structure to track DMA'able memory allocated for command BD tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct bd_resc_page {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct list_head link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) u32 max_ptrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) u32 num_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) void *page[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * struct io_bdt - I/O buffer destricptor table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * @bd_tbl: BD table's virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * @bd_tbl_dma: BD table's dma address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * @bd_valid: num valid BD entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * IO BD table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) struct io_bdt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct iscsi_bd *bd_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) dma_addr_t bd_tbl_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) u16 bd_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * bnx2i_cmd - iscsi command structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * @hdr: iSCSI header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * @conn: iscsi_conn pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * @scsi_cmd: SCSI-ML task pointer corresponding to this iscsi cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * @sg: SG list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * @io_tbl: buffer descriptor (BD) table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * @bd_tbl_dma: buffer descriptor (BD) table's dma address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * @req: bnx2i specific command request struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) struct bnx2i_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct iscsi_hdr hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) struct bnx2i_conn *conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) struct scsi_cmnd *scsi_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) struct io_bdt io_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) dma_addr_t bd_tbl_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct bnx2i_cmd_request req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * struct bnx2i_conn - iscsi connection structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * @cls_conn: pointer to iscsi cls conn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * @hba: adapter structure pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * @iscsi_conn_cid: iscsi conn id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * @fw_cid: firmware iscsi context id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * @ep: endpoint structure pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * @gen_pdu: login/nopout/logout pdu resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * @violation_notified: bit mask used to track iscsi error/warning messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * already printed out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * @work_cnt: keeps track of the number of outstanding work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * iSCSI connection structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct bnx2i_conn {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct iscsi_cls_conn *cls_conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct bnx2i_hba *hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct completion cmd_cleanup_cmpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u32 iscsi_conn_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define BNX2I_CID_RESERVED 0x5AFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u32 fw_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct timer_list poll_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * Queue Pair (QP) related structure elements.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct bnx2i_endpoint *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * Buffer for login negotiation process
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) struct generic_pdu_resc gen_pdu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) u64 violation_notified;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) atomic_t work_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * struct iscsi_cid_queue - Per adapter iscsi cid queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * @cid_que_base: queue base memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * @cid_que: queue memory pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * @cid_q_prod_idx: produce index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * @cid_q_cons_idx: consumer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * @cid_q_max_idx: max index. used to detect wrap around condition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * @cid_free_cnt: queue size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * @conn_cid_tbl: iscsi cid to conn structure mapping table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * Per adapter iSCSI CID Queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct iscsi_cid_queue {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) void *cid_que_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u32 *cid_que;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u32 cid_q_prod_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u32 cid_q_cons_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u32 cid_q_max_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u32 cid_free_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct bnx2i_conn **conn_cid_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) struct bnx2i_stats_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) u64 rx_pdus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) u64 rx_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) u64 tx_pdus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) u64 tx_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * struct bnx2i_hba - bnx2i adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * @link: list head to link elements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * @cnic: pointer to cnic device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * @pcidev: pointer to pci dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * @netdev: pointer to netdev structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * @regview: mapped PCI register space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * @age: age, incremented by every recovery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) * @cnic_dev_type: cnic device type, 5706/5708/5709/57710
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * @mail_queue_access: mailbox queue access mode, applicable to 5709 only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * @reg_with_cnic: indicates whether the device is register with CNIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * @adapter_state: adapter state, UP, GOING_DOWN, LINK_DOWN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * @mtu_supported: Ethernet MTU supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * @shost: scsi host pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * @max_sqes: SQ size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) * @max_rqes: RQ size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) * @max_cqes: CQ size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) * @num_ccell: number of command cells per connection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * @ofld_conns_active: active connection list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * @eh_wait: wait queue for the endpoint to shutdown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * @max_active_conns: max offload connections supported by this device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * @cid_que: iscsi cid queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * @ep_rdwr_lock: read / write lock to synchronize various ep lists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * @ep_ofld_list: connection list for pending offload completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * @ep_active_list: connection list for active offload endpoints
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * @ep_destroy_list: connection list for pending offload completion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * @mp_bd_tbl: BD table to be used with middle path requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * @mp_bd_dma: DMA address of 'mp_bd_tbl' memory buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * @dummy_buffer: Dummy buffer to be used with zero length scsicmd reqs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * @dummy_buf_dma: DMA address of 'dummy_buffer' memory buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * @lock: lock to synchonize access to hba structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * @hba_shutdown_tmo: Timeout value to shutdown each connection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * @conn_teardown_tmo: Timeout value to tear down each connection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * @conn_ctx_destroy_tmo: Timeout value to destroy context of each connection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * @pci_did: PCI device ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * @pci_vid: PCI vendor ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * @pci_sdid: PCI subsystem device ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * @pci_svid: PCI subsystem vendor ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * @pci_func: PCI function number in system pci tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * @pci_devno: PCI device number in system pci tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * @num_wqe_sent: statistic counter, total wqe's sent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) * @num_cqe_rcvd: statistic counter, total cqe's received
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * @num_intr_claimed: statistic counter, total interrupts claimed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) * @link_changed_count: statistic counter, num of link change notifications
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) * received
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * @ipaddr_changed_count: statistic counter, num times IP address changed while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * at least one connection is offloaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * @num_sess_opened: statistic counter, total num sessions opened
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * @num_conn_opened: statistic counter, total num conns opened on this hba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * @ctx_ccell_tasks: captures number of ccells and tasks supported by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * currently offloaded connection, used to decode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * context memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * @stat_lock: spin lock used by the statistic collector (32 bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * @stats: local iSCSI statistic collection place holder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * Adapter Data Structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) struct bnx2i_hba {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct list_head link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct cnic_dev *cnic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct pci_dev *pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct net_device *netdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) void __iomem *regview;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) resource_size_t reg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) u32 age;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) unsigned long cnic_dev_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #define BNX2I_NX2_DEV_5706 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) #define BNX2I_NX2_DEV_5708 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) #define BNX2I_NX2_DEV_5709 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #define BNX2I_NX2_DEV_57710 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) u32 mail_queue_access;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #define BNX2I_MQ_KERNEL_MODE 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #define BNX2I_MQ_KERNEL_BYPASS_MODE 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #define BNX2I_MQ_BIN_MODE 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) unsigned long reg_with_cnic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) #define BNX2I_CNIC_REGISTERED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) unsigned long adapter_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define ADAPTER_STATE_UP 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #define ADAPTER_STATE_GOING_DOWN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #define ADAPTER_STATE_LINK_DOWN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) #define ADAPTER_STATE_INIT_FAILED 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) unsigned int mtu_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) #define BNX2I_MAX_MTU_SUPPORTED 9000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) u32 max_sqes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) u32 max_rqes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u32 max_cqes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) u32 num_ccell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) int ofld_conns_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) wait_queue_head_t eh_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) int max_active_conns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) struct iscsi_cid_queue cid_que;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) rwlock_t ep_rdwr_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct list_head ep_ofld_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct list_head ep_active_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) struct list_head ep_destroy_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * BD table to be used with MP (Middle Path requests.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) char *mp_bd_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) dma_addr_t mp_bd_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) char *dummy_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) dma_addr_t dummy_buf_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) spinlock_t lock; /* protects hba structure access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct mutex net_dev_lock;/* sync net device access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) int hba_shutdown_tmo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) int conn_teardown_tmo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) int conn_ctx_destroy_tmo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * PCI related info.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) u16 pci_did;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) u16 pci_vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u16 pci_sdid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) u16 pci_svid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) u16 pci_func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) u16 pci_devno;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * Following are a bunch of statistics useful during development
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * and later stage for score boarding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u32 num_wqe_sent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) u32 num_cqe_rcvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u32 num_intr_claimed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) u32 link_changed_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u32 ipaddr_changed_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) u32 num_sess_opened;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) u32 num_conn_opened;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) unsigned int ctx_ccell_tasks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #ifdef CONFIG_32BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) spinlock_t stat_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) struct bnx2i_stats_info bnx2i_stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) struct iscsi_stats_info stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /*******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) * QP [ SQ / RQ / CQ ] info.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) * SQ/RQ/CQ generic structure definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) struct sqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) u8 sqe_byte[BNX2I_SQ_WQE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct rqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) u8 rqe_byte[BNX2I_RQ_WQE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct cqe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u8 cqe_byte[BNX2I_CQE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #if defined(__LITTLE_ENDIAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) CNIC_EVENT_COAL_INDEX = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) CNIC_SEND_DOORBELL = 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) CNIC_EVENT_CQ_ARM = 0x7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) CNIC_RECV_DOORBELL = 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) #elif defined(__BIG_ENDIAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) CNIC_EVENT_COAL_INDEX = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) CNIC_SEND_DOORBELL = 0x6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) CNIC_EVENT_CQ_ARM = 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) CNIC_RECV_DOORBELL = 0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) * CQ DB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct bnx2x_iscsi_cq_pend_cmpl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /* CQ producer, updated by Ustorm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) u16 ustrom_prod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /* CQ pending completion counter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) u16 pend_cntr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct bnx2i_5771x_cq_db {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) /* CQ pending completion ITT array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) u16 itt[BNX2X_MAX_CQS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* Cstorm CQ sequence to notify array, updated by driver */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u16 sqn[BNX2X_MAX_CQS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) u32 reserved[4] /* 16 byte allignment */;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct bnx2i_5771x_sq_rq_db {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) u16 prod_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) u8 reserved0[62]; /* Pad structure size to 64 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) struct bnx2i_5771x_dbell_hdr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) u8 header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) /* 1 for rx doorbell, 0 for tx doorbell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) #define B577XX_DOORBELL_HDR_RX (0x1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) #define B577XX_DOORBELL_HDR_RX_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* 0 for normal doorbell, 1 for advertise wnd doorbell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) #define B577XX_DOORBELL_HDR_DB_TYPE (0x1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) #define B577XX_DOORBELL_HDR_DPM_SIZE (0x3<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* connection type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) #define B577XX_DOORBELL_HDR_CONN_TYPE (0xF<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) struct bnx2i_5771x_dbell {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) struct bnx2i_5771x_dbell_hdr dbell;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) u8 pad[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * struct qp_info - QP (share queue region) atrributes structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * @ctx_base: ioremapped pci register base to access doorbell register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * pertaining to this offloaded connection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * @sq_virt: virtual address of send queue (SQ) region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) * @sq_phys: DMA address of SQ memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) * @sq_mem_size: SQ size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) * @sq_prod_qe: SQ producer entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * @sq_cons_qe: SQ consumer entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * @sq_first_qe: virtual address of first entry in SQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * @sq_last_qe: virtual address of last entry in SQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * @sq_prod_idx: SQ producer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * @sq_cons_idx: SQ consumer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * @sqe_left: number sq entry left
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * @sq_pgtbl_virt: page table describing buffer consituting SQ region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * @sq_pgtbl_phys: dma address of 'sq_pgtbl_virt'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * @sq_pgtbl_size: SQ page table size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * @cq_virt: virtual address of completion queue (CQ) region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * @cq_phys: DMA address of RQ memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * @cq_mem_size: CQ size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * @cq_prod_qe: CQ producer entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) * @cq_cons_qe: CQ consumer entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) * @cq_first_qe: virtual address of first entry in CQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) * @cq_last_qe: virtual address of last entry in CQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) * @cq_prod_idx: CQ producer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) * @cq_cons_idx: CQ consumer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * @cqe_left: number cq entry left
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) * @cqe_size: size of each CQ entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) * @cqe_exp_seq_sn: next expected CQE sequence number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) * @cq_pgtbl_virt: page table describing buffer consituting CQ region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) * @cq_pgtbl_phys: dma address of 'cq_pgtbl_virt'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * @cq_pgtbl_size: CQ page table size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) * @rq_virt: virtual address of receive queue (RQ) region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) * @rq_phys: DMA address of RQ memory region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) * @rq_mem_size: RQ size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) * @rq_prod_qe: RQ producer entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) * @rq_cons_qe: RQ consumer entry pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) * @rq_first_qe: virtual address of first entry in RQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) * @rq_last_qe: virtual address of last entry in RQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * @rq_prod_idx: RQ producer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * @rq_cons_idx: RQ consumer index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) * @rqe_left: number rq entry left
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) * @rq_pgtbl_virt: page table describing buffer consituting RQ region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * @rq_pgtbl_phys: dma address of 'rq_pgtbl_virt'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * @rq_pgtbl_size: RQ page table size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * queue pair (QP) is a per connection shared data structure which is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * to send work requests (SQ), receive completion notifications (CQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * below holds queue memory, consumer/producer indexes and page table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) struct qp_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) void __iomem *ctx_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) #define DPM_TRIGER_TYPE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) #define BNX2I_570x_QUE_DB_SIZE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) #define BNX2I_5771x_QUE_DB_SIZE 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct sqe *sq_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) dma_addr_t sq_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) u32 sq_mem_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) struct sqe *sq_prod_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct sqe *sq_cons_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) struct sqe *sq_first_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) struct sqe *sq_last_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) u16 sq_prod_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) u16 sq_cons_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) u32 sqe_left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) void *sq_pgtbl_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) dma_addr_t sq_pgtbl_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) u32 sq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) struct cqe *cq_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) dma_addr_t cq_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) u32 cq_mem_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) struct cqe *cq_prod_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) struct cqe *cq_cons_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) struct cqe *cq_first_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) struct cqe *cq_last_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) u16 cq_prod_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) u16 cq_cons_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) u32 cqe_left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) u32 cqe_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) u32 cqe_exp_seq_sn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) void *cq_pgtbl_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) dma_addr_t cq_pgtbl_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) u32 cq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) struct rqe *rq_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) dma_addr_t rq_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) u32 rq_mem_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) struct rqe *rq_prod_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) struct rqe *rq_cons_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) struct rqe *rq_first_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) struct rqe *rq_last_qe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) u16 rq_prod_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) u16 rq_cons_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) u32 rqe_left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) void *rq_pgtbl_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) dma_addr_t rq_pgtbl_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) u32 rq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * CID handles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) struct ep_handles {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) u32 fw_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) u32 drv_iscsi_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) u16 pg_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) u16 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) EP_STATE_IDLE = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) EP_STATE_PG_OFLD_START = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) EP_STATE_PG_OFLD_COMPL = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) EP_STATE_OFLD_START = 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) EP_STATE_OFLD_COMPL = 0x8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) EP_STATE_CONNECT_START = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) EP_STATE_CONNECT_COMPL = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) EP_STATE_ULP_UPDATE_START = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) EP_STATE_ULP_UPDATE_COMPL = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) EP_STATE_DISCONN_START = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) EP_STATE_DISCONN_COMPL = 0x200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) EP_STATE_CLEANUP_START = 0x400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) EP_STATE_CLEANUP_CMPL = 0x800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) EP_STATE_TCP_FIN_RCVD = 0x1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) EP_STATE_TCP_RST_RCVD = 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) EP_STATE_LOGOUT_SENT = 0x4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) EP_STATE_LOGOUT_RESP_RCVD = 0x8000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) EP_STATE_PG_OFLD_FAILED = 0x1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) EP_STATE_ULP_UPDATE_FAILED = 0x2000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) EP_STATE_CLEANUP_FAILED = 0x4000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) EP_STATE_OFLD_FAILED = 0x8000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) EP_STATE_CONNECT_FAILED = 0x10000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) EP_STATE_DISCONN_TIMEDOUT = 0x20000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) EP_STATE_OFLD_FAILED_CID_BUSY = 0x80000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * struct bnx2i_endpoint - representation of tcp connection in NX2 world
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * @link: list head to link elements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) * @hba: adapter to which this connection belongs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) * @conn: iscsi connection this EP is linked to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) * @cls_ep: associated iSCSI endpoint pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * @cm_sk: cnic sock struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * @hba_age: age to detect if 'iscsid' issues ep_disconnect()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * after HBA reset is completed by bnx2i/cnic/bnx2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) * modules
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) * @state: tracks offload connection state machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) * @timestamp: tracks the start time when the ep begins to connect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) * @num_active_cmds: tracks the number of outstanding commands for this ep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) * @ec_shift: the amount of shift as part of the event coal calc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) * @qp: QP information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * @ids: contains chip allocated *context id* & driver assigned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) * *iscsi cid*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) * @ofld_timer: offload timer to detect timeout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * @ofld_wait: wait queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * Endpoint Structure - equivalent of tcp socket structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) struct bnx2i_endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) struct list_head link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) struct bnx2i_hba *hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) struct bnx2i_conn *conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) struct iscsi_endpoint *cls_ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) struct cnic_sock *cm_sk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) u32 hba_age;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) u32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) unsigned long timestamp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) atomic_t num_active_cmds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) u32 ec_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) struct qp_info qp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) struct ep_handles ids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) #define ep_iscsi_cid ids.drv_iscsi_cid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) #define ep_cid ids.fw_cid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) #define ep_pg_cid ids.pg_cid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) struct timer_list ofld_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) wait_queue_head_t ofld_wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) struct bnx2i_work {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct iscsi_session *session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) struct bnx2i_conn *bnx2i_conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) struct cqe cqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) struct bnx2i_percpu_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) struct task_struct *iothread;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) struct list_head work_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) spinlock_t p_work_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) /* Global variables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) extern unsigned int error_mask1, error_mask2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) extern u64 iscsi_error_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) extern unsigned int en_tcp_dack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) extern unsigned int event_coal_div;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) extern unsigned int event_coal_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) extern struct scsi_transport_template *bnx2i_scsi_xport_template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) extern struct iscsi_transport bnx2i_iscsi_transport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) extern struct cnic_ulp_ops bnx2i_cnic_cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) extern unsigned int sq_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) extern unsigned int rq_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) extern struct device_attribute *bnx2i_dev_attributes[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) * Function Prototypes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) extern void bnx2i_identify_device(struct bnx2i_hba *hba, struct cnic_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) extern void bnx2i_ulp_init(struct cnic_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) extern void bnx2i_ulp_exit(struct cnic_dev *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) extern void bnx2i_start(void *handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) extern void bnx2i_stop(void *handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) extern int bnx2i_get_stats(void *handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) extern struct bnx2i_hba *get_adapter_list_head(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) u16 iscsi_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) int bnx2i_alloc_ep_pool(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) void bnx2i_release_ep_pool(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) void bnx2i_free_hba(struct bnx2i_hba *hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) void bnx2i_drop_session(struct iscsi_cls_session *session);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) struct iscsi_task *mtask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) struct iscsi_task *mtask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) extern int bnx2i_send_iscsi_text(struct bnx2i_conn *conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) struct iscsi_task *mtask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) struct bnx2i_cmd *cmnd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) struct iscsi_task *mtask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) char *datap, int data_len, int unsol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) struct iscsi_task *mtask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) struct bnx2i_cmd *cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) extern int bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) struct bnx2i_endpoint *ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) extern int bnx2i_send_conn_destroy(struct bnx2i_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) struct bnx2i_endpoint *ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) struct bnx2i_endpoint *ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) struct bnx2i_endpoint *ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) extern void bnx2i_ep_ofld_timer(struct timer_list *t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) struct bnx2i_hba *hba, u32 iscsi_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) struct bnx2i_hba *hba, u32 iscsi_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) extern int bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) extern int bnx2i_hw_ep_disconnect(struct bnx2i_endpoint *bnx2i_ep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) /* Debug related function prototypes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) extern void bnx2i_print_recv_state(struct bnx2i_conn *conn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) extern int bnx2i_percpu_io_thread(void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) extern int bnx2i_process_scsi_cmd_resp(struct iscsi_session *session,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) struct bnx2i_conn *bnx2i_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) struct cqe *cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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