^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2014- QLogic Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * All rights reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * www.qlogic.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __BFA_DEFS_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __BFA_DEFS_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "bfa_fc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "bfad_drv.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define BFA_MFG_SERIALNUM_SIZE 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define STRSZ(_n) (((_n) + 4) & ~3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Manufacturing card type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) BFA_MFG_TYPE_CB_MAX = 825, /* Crossbow card type max */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) BFA_MFG_TYPE_FC8P2 = 825, /* 8G 2port FC card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) BFA_MFG_TYPE_FC8P1 = 815, /* 8G 1port FC card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) BFA_MFG_TYPE_FC4P2 = 425, /* 4G 2port FC card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) BFA_MFG_TYPE_FC4P1 = 415, /* 4G 1port FC card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) BFA_MFG_TYPE_CNA10P2 = 1020, /* 10G 2port CNA card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) BFA_MFG_TYPE_CNA10P1 = 1010, /* 10G 1port CNA card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) BFA_MFG_TYPE_JAYHAWK = 804, /* Jayhawk mezz card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) BFA_MFG_TYPE_WANCHESE = 1007, /* Wanchese mezz card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) BFA_MFG_TYPE_ASTRA = 807, /* Astra mezz card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) BFA_MFG_TYPE_LIGHTNING_P0 = 902, /* Lightning mezz card - old */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) BFA_MFG_TYPE_LIGHTNING = 1741, /* Lightning mezz card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) BFA_MFG_TYPE_PROWLER_F = 1560, /* Prowler FC only cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) BFA_MFG_TYPE_PROWLER_N = 1410, /* Prowler NIC only cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) BFA_MFG_TYPE_PROWLER_C = 1710, /* Prowler CNA only cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) BFA_MFG_TYPE_PROWLER_D = 1860, /* Prowler Dual cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) BFA_MFG_TYPE_CHINOOK = 1867, /* Chinook cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) BFA_MFG_TYPE_CHINOOK2 = 1869, /*!< Chinook2 cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) BFA_MFG_TYPE_INVALID = 0, /* Invalid card type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * Check if Mezz card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define bfa_mfg_is_mezz(type) (( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) (type) == BFA_MFG_TYPE_JAYHAWK || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) (type) == BFA_MFG_TYPE_WANCHESE || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) (type) == BFA_MFG_TYPE_ASTRA || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) (type) == BFA_MFG_TYPE_LIGHTNING_P0 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) (type) == BFA_MFG_TYPE_LIGHTNING || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) (type) == BFA_MFG_TYPE_CHINOOK || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) (type) == BFA_MFG_TYPE_CHINOOK2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Check if the card having old wwn/mac handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define bfa_mfg_is_old_wwn_mac_model(type) (( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) (type) == BFA_MFG_TYPE_FC8P2 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) (type) == BFA_MFG_TYPE_FC8P1 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) (type) == BFA_MFG_TYPE_FC4P2 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) (type) == BFA_MFG_TYPE_FC4P1 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) (type) == BFA_MFG_TYPE_CNA10P2 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) (type) == BFA_MFG_TYPE_CNA10P1 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) (type) == BFA_MFG_TYPE_JAYHAWK || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) (type) == BFA_MFG_TYPE_WANCHESE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define bfa_mfg_increment_wwn_mac(m, i) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u32 t = ((u32)(m)[0] << 16) | ((u32)(m)[1] << 8) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) (u32)(m)[2]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) t += (i); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) (m)[0] = (t >> 16) & 0xFF; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) (m)[1] = (t >> 8) & 0xFF; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) (m)[2] = t & 0xFF; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * VPD data length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define BFA_MFG_VPD_LEN 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * VPD vendor tag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) BFA_MFG_VPD_UNKNOWN = 0, /* vendor unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) BFA_MFG_VPD_IBM = 1, /* vendor IBM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) BFA_MFG_VPD_HP = 2, /* vendor HP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) BFA_MFG_VPD_DELL = 3, /* vendor DELL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) BFA_MFG_VPD_PCI_IBM = 0x08, /* PCI VPD IBM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) BFA_MFG_VPD_PCI_HP = 0x10, /* PCI VPD HP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) BFA_MFG_VPD_PCI_DELL = 0x20, /* PCI VPD DELL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) BFA_MFG_VPD_PCI_BRCD = 0xf8, /* PCI VPD Brocade */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * All numerical fields are in big-endian format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct bfa_mfg_vpd_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) u8 version; /* vpd data version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) u8 vpd_sig[3]; /* characters 'V', 'P', 'D' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) u8 chksum; /* u8 checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) u8 vendor; /* vendor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u8 len; /* vpd data length excluding header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u8 rsv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u8 data[BFA_MFG_VPD_LEN]; /* vpd data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * Status return values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) enum bfa_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) BFA_STATUS_OK = 0, /* Success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) BFA_STATUS_FAILED = 1, /* Operation failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) BFA_STATUS_EINVAL = 2, /* Invalid params Check input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) BFA_STATUS_ENOMEM = 3, /* Out of resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) BFA_STATUS_ETIMER = 5, /* Timer expired - Retry, if persists,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * contact support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) BFA_STATUS_EPROTOCOL = 6, /* Protocol error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) BFA_STATUS_BADFLASH = 9, /* Flash is bad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) BFA_STATUS_SFP_UNSUPP = 10, /* Unsupported SFP - Replace SFP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) BFA_STATUS_UNKNOWN_VFID = 11, /* VF_ID not found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) BFA_STATUS_DATACORRUPTED = 12, /* Diag returned data corrupted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) BFA_STATUS_DEVBUSY = 13, /* Device busy - Retry operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) BFA_STATUS_HDMA_FAILED = 16, /* Host dma failed contact support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) BFA_STATUS_FLASH_BAD_LEN = 17, /* Flash bad length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) BFA_STATUS_UNKNOWN_LWWN = 18, /* LPORT PWWN not found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) BFA_STATUS_UNKNOWN_RWWN = 19, /* RPORT PWWN not found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) BFA_STATUS_VPORT_EXISTS = 21, /* VPORT already exists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) BFA_STATUS_VPORT_MAX = 22, /* Reached max VPORT supported limit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) BFA_STATUS_UNSUPP_SPEED = 23, /* Invalid Speed Check speed setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) BFA_STATUS_INVLD_DFSZ = 24, /* Invalid Max data field size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) BFA_STATUS_CMD_NOTSUPP = 26, /* Command/API not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) BFA_STATUS_FABRIC_RJT = 29, /* Reject from attached fabric */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) BFA_STATUS_UNKNOWN_VWWN = 30, /* VPORT PWWN not found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) BFA_STATUS_PORT_OFFLINE = 34, /* Port is not online */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) BFA_STATUS_VPORT_WWN_BP = 46, /* WWN is same as base port's WWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) BFA_STATUS_PORT_NOT_DISABLED = 47, /* Port not disabled disable port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) BFA_STATUS_NO_FCPIM_NEXUS = 52, /* No FCP Nexus exists with the rport */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) BFA_STATUS_IOC_FAILURE = 56, /* IOC failure - Retry, if persists
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * contact support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) BFA_STATUS_INVALID_WWN = 57, /* Invalid WWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) BFA_STATUS_ADAPTER_ENABLED = 60, /* Adapter is not disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) BFA_STATUS_IOC_NON_OP = 61, /* IOC is not operational */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) BFA_STATUS_VERSION_FAIL = 70, /* Application/Driver version mismatch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) BFA_STATUS_DIAG_BUSY = 71, /* diag busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) BFA_STATUS_BEACON_ON = 72, /* Port Beacon already on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) BFA_STATUS_ENOFSAVE = 78, /* No saved firmware trace */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) BFA_STATUS_IOC_DISABLED = 82, /* IOC is already disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) BFA_STATUS_ERROR_TRL_ENABLED = 87, /* TRL is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) BFA_STATUS_ERROR_QOS_ENABLED = 88, /* QoS is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) BFA_STATUS_NO_SFP_DEV = 89, /* No SFP device check or replace SFP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) BFA_STATUS_MEMTEST_FAILED = 90, /* Memory test failed contact support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) BFA_STATUS_LEDTEST_OP = 109, /* LED test is operating */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) BFA_STATUS_INVALID_MAC = 134, /* Invalid MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) BFA_STATUS_CMD_NOTSUPP_CNA = 146, /* Command not supported for CNA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) BFA_STATUS_PBC = 154, /* Operation not allowed for pre-boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) BFA_STATUS_BAD_FWCFG = 156, /* Bad firmware configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) BFA_STATUS_INVALID_VENDOR = 158, /* Invalid switch vendor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) BFA_STATUS_SFP_NOT_READY = 159, /* SFP info is not ready. Retry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) BFA_STATUS_TRUNK_ENABLED = 164, /* Trunk is already enabled on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * this adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) BFA_STATUS_TRUNK_DISABLED = 165, /* Trunking is disabled on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * the adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) BFA_STATUS_IOPROFILE_OFF = 175, /* IO profile OFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) BFA_STATUS_PHY_NOT_PRESENT = 183, /* PHY module not present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) BFA_STATUS_FEATURE_NOT_SUPPORTED = 192, /* Feature not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) BFA_STATUS_ENTRY_EXISTS = 193, /* Entry already exists */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) BFA_STATUS_ENTRY_NOT_EXISTS = 194, /* Entry does not exist */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) BFA_STATUS_NO_CHANGE = 195, /* Feature already in that state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) BFA_STATUS_FAA_ENABLED = 197, /* FAA is already enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) BFA_STATUS_FAA_DISABLED = 198, /* FAA is already disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) BFA_STATUS_FAA_ACQUIRED = 199, /* FAA is already acquired */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) BFA_STATUS_FAA_ACQ_ADDR = 200, /* Acquiring addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) BFA_STATUS_BBCR_FC_ONLY = 201, /*!< BBCredit Recovery is supported for *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * FC mode only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) BFA_STATUS_ERROR_TRUNK_ENABLED = 203, /* Trunk enabled on adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) BFA_STATUS_MAX_ENTRY_REACHED = 212, /* MAX entry reached */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) BFA_STATUS_TOPOLOGY_LOOP = 230, /* Topology is set to Loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) BFA_STATUS_LOOP_UNSUPP_MEZZ = 231, /* Loop topology is not supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * on mezz cards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) BFA_STATUS_INVALID_BW = 233, /* Invalid bandwidth value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) BFA_STATUS_QOS_BW_INVALID = 234, /* Invalid QOS bandwidth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) BFA_STATUS_DPORT_ENABLED = 235, /* D-port mode is already enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) BFA_STATUS_DPORT_DISABLED = 236, /* D-port mode is already disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) BFA_STATUS_CMD_NOTSUPP_MEZZ = 239, /* Cmd not supported for MEZZ card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) BFA_STATUS_FRU_NOT_PRESENT = 240, /* fru module not present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) BFA_STATUS_DPORT_NO_SFP = 243, /* SFP is not present.\n D-port will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * enabled but it will be operational
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * only after inserting a valid SFP. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) BFA_STATUS_DPORT_ERR = 245, /* D-port mode is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) BFA_STATUS_DPORT_ENOSYS = 254, /* Switch has no D_Port functionality */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) BFA_STATUS_DPORT_CANT_PERF = 255, /* Switch port is not D_Port capable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * or D_Port is disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) BFA_STATUS_DPORT_LOGICALERR = 256, /* Switch D_Port fail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) BFA_STATUS_DPORT_SWBUSY = 257, /* Switch port busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) BFA_STATUS_ERR_BBCR_SPEED_UNSUPPORT = 258, /*!< BB credit recovery is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * supported at max port speed alone */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) BFA_STATUS_ERROR_BBCR_ENABLED = 259, /*!< BB credit recovery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) BFA_STATUS_INVALID_BBSCN = 260, /*!< Invalid BBSCN value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * Valid range is [1-15] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) BFA_STATUS_DDPORT_ERR = 261, /* Dynamic D_Port mode is active.\n To
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * exit dynamic mode, disable D_Port on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * the remote port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) BFA_STATUS_DPORT_SFPWRAP_ERR = 262, /* Clear e/o_wrap fail, check or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * replace SFP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) BFA_STATUS_BBCR_CFG_NO_CHANGE = 265, /*!< BBCR is operational.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * Disable BBCR and try this operation again. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) BFA_STATUS_DPORT_SW_NOTREADY = 268, /* Remote port is not ready to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * start dport test. Check remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * port status. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) BFA_STATUS_DPORT_INV_SFP = 271, /* Invalid SFP for D-PORT mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) BFA_STATUS_DPORT_CMD_NOTSUPP = 273, /* Dport is not supported by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * remote port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) BFA_STATUS_MAX_VAL /* Unknown error code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define bfa_status_t enum bfa_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) enum bfa_eproto_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) BFA_EPROTO_BAD_ACCEPT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) BFA_EPROTO_UNKNOWN_RSP = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define bfa_eproto_status_t enum bfa_eproto_status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) enum bfa_boolean {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) BFA_FALSE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) BFA_TRUE = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define bfa_boolean_t enum bfa_boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define BFA_STRING_32 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define BFA_VERSION_LEN 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * ---------------------- adapter definitions ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * BFA adapter level attributes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) *!< adapter serial num length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) BFA_ADAPTER_MODEL_NAME_LEN = 16, /* model name length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) BFA_ADAPTER_MODEL_DESCR_LEN = 128, /* model description length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) BFA_ADAPTER_MFG_NAME_LEN = 8, /* manufacturer name length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) BFA_ADAPTER_SYM_NAME_LEN = 64, /* adapter symbolic name length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) BFA_ADAPTER_OS_TYPE_LEN = 64, /* adapter os type length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) BFA_ADAPTER_UUID_LEN = 16, /* adapter uuid length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct bfa_adapter_attr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) char manufacturer[BFA_ADAPTER_MFG_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) u32 card_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) char model[BFA_ADAPTER_MODEL_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) char model_descr[BFA_ADAPTER_MODEL_DESCR_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) wwn_t pwwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) char node_symname[FC_SYMNAME_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) char hw_ver[BFA_VERSION_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) char fw_ver[BFA_VERSION_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) char optrom_ver[BFA_VERSION_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) char os_type[BFA_ADAPTER_OS_TYPE_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct bfa_mfg_vpd_s vpd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct mac_s mac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) u8 nports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) u8 max_speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) u8 prototype;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) char asic_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) u8 pcie_gen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) u8 pcie_lanes_orig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 pcie_lanes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) u8 cna_capable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u8 is_mezz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) u8 trunk_capable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u8 mfg_day; /* manufacturing day */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u8 mfg_month; /* manufacturing month */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) u16 mfg_year; /* manufacturing year */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) u16 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) u8 uuid[BFA_ADAPTER_UUID_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * ---------------------- IOC definitions ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) BFA_IOC_DRIVER_LEN = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) BFA_IOC_CHIP_REV_LEN = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * Driver and firmware versions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct bfa_ioc_driver_attr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) char driver[BFA_IOC_DRIVER_LEN]; /* driver name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) char driver_ver[BFA_VERSION_LEN]; /* driver version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) char fw_ver[BFA_VERSION_LEN]; /* firmware version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) char bios_ver[BFA_VERSION_LEN]; /* bios version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) char efi_ver[BFA_VERSION_LEN]; /* EFI version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) char ob_ver[BFA_VERSION_LEN]; /* openboot version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * IOC PCI device attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct bfa_ioc_pci_attr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) u16 vendor_id; /* PCI vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u16 device_id; /* PCI device ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) u16 ssid; /* subsystem ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) u16 ssvid; /* subsystem vendor ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u32 pcifn; /* PCI device function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) u32 rsvd; /* padding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) char chip_rev[BFA_IOC_CHIP_REV_LEN]; /* chip revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * IOC states
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) enum bfa_ioc_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) BFA_IOC_UNINIT = 1, /* IOC is in uninit state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) BFA_IOC_RESET = 2, /* IOC is in reset state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) BFA_IOC_SEMWAIT = 3, /* Waiting for IOC h/w semaphore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) BFA_IOC_HWINIT = 4, /* IOC h/w is being initialized */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) BFA_IOC_GETATTR = 5, /* IOC is being configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) BFA_IOC_OPERATIONAL = 6, /* IOC is operational */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) BFA_IOC_INITFAIL = 7, /* IOC hardware failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) BFA_IOC_FAIL = 8, /* IOC heart-beat failure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) BFA_IOC_DISABLING = 9, /* IOC is being disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) BFA_IOC_DISABLED = 10, /* IOC is disabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) BFA_IOC_FWMISMATCH = 11, /* IOC f/w different from drivers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) BFA_IOC_ENABLING = 12, /* IOC is being enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) BFA_IOC_HWFAIL = 13, /* PCI mapping doesn't exist */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) BFA_IOC_ACQ_ADDR = 14, /* Acquiring addr from fabric */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * IOC firmware stats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct bfa_fw_ioc_stats_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u32 enable_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u32 disable_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) u32 get_attr_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) u32 dbg_sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u32 dbg_dump;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) u32 unknown_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * IOC driver stats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct bfa_ioc_drv_stats_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) u32 ioc_isrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) u32 ioc_enables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) u32 ioc_disables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) u32 ioc_hbfails;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u32 ioc_boots;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u32 stats_tmos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) u32 hb_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) u32 disable_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) u32 enable_reqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) u32 disable_replies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u32 enable_replies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) u32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * IOC statistics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct bfa_ioc_stats_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) struct bfa_ioc_drv_stats_s drv_stats; /* driver IOC stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct bfa_fw_ioc_stats_s fw_stats; /* firmware IOC stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) enum bfa_ioc_type_e {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) BFA_IOC_TYPE_FC = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) BFA_IOC_TYPE_FCoE = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) BFA_IOC_TYPE_LL = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * IOC attributes returned in queries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct bfa_ioc_attr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) enum bfa_ioc_type_e ioc_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) enum bfa_ioc_state state; /* IOC state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) struct bfa_adapter_attr_s adapter_attr; /* HBA attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct bfa_ioc_driver_attr_s driver_attr; /* driver attr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) struct bfa_ioc_pci_attr_s pci_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) u8 port_id; /* port number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) u8 port_mode; /* bfa_mode_s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) u8 cap_bm; /* capability */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) u8 port_mode_cfg; /* bfa_mode_s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) u8 def_fn; /* 1 if default fn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) u8 rsvd[3]; /* 64bit align */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * AEN related definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) enum bfa_aen_category {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) BFA_AEN_CAT_ADAPTER = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) BFA_AEN_CAT_PORT = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) BFA_AEN_CAT_LPORT = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) BFA_AEN_CAT_RPORT = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) BFA_AEN_CAT_ITNIM = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) BFA_AEN_CAT_AUDIT = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) BFA_AEN_CAT_IOC = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) /* BFA adapter level events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) enum bfa_adapter_aen_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) BFA_ADAPTER_AEN_ADD = 1, /* New Adapter found event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) BFA_ADAPTER_AEN_REMOVE = 2, /* Adapter removed event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct bfa_adapter_aen_data_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) char serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) u32 nports; /* Number of NPorts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) wwn_t pwwn; /* WWN of one of its physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) /* BFA physical port Level events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) enum bfa_port_aen_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) BFA_PORT_AEN_ONLINE = 1, /* Physical Port online event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) BFA_PORT_AEN_OFFLINE = 2, /* Physical Port offline event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) BFA_PORT_AEN_RLIR = 3, /* RLIR event, not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) BFA_PORT_AEN_SFP_INSERT = 4, /* SFP inserted event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) BFA_PORT_AEN_SFP_REMOVE = 5, /* SFP removed event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) BFA_PORT_AEN_SFP_POM = 6, /* SFP POM event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) BFA_PORT_AEN_ENABLE = 7, /* Physical Port enable event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) BFA_PORT_AEN_DISABLE = 8, /* Physical Port disable event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) BFA_PORT_AEN_AUTH_ON = 9, /* Physical Port auth success event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) BFA_PORT_AEN_AUTH_OFF = 10, /* Physical Port auth fail event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) BFA_PORT_AEN_DISCONNECT = 11, /* Physical Port disconnect event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) BFA_PORT_AEN_QOS_NEG = 12, /* Base Port QOS negotiation event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) BFA_PORT_AEN_FABRIC_NAME_CHANGE = 13, /* Fabric Name/WWN change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) BFA_PORT_AEN_SFP_ACCESS_ERROR = 14, /* SFP read error event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) BFA_PORT_AEN_SFP_UNSUPPORT = 15, /* Unsupported SFP event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) enum bfa_port_aen_sfp_pom {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) BFA_PORT_AEN_SFP_POM_GREEN = 1, /* Normal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) BFA_PORT_AEN_SFP_POM_AMBER = 2, /* Warning */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) BFA_PORT_AEN_SFP_POM_RED = 3, /* Critical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) BFA_PORT_AEN_SFP_POM_MAX = BFA_PORT_AEN_SFP_POM_RED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) struct bfa_port_aen_data_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) wwn_t pwwn; /* WWN of the physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) wwn_t fwwn; /* WWN of the fabric port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) u32 phy_port_num; /* For SFP related events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) u16 ioc_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) u16 level; /* Only transitions will be informed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) mac_t mac; /* MAC address of the ethernet port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) u16 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* BFA AEN logical port events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) enum bfa_lport_aen_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) BFA_LPORT_AEN_NEW = 1, /* LPort created event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) BFA_LPORT_AEN_DELETE = 2, /* LPort deleted event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) BFA_LPORT_AEN_ONLINE = 3, /* LPort online event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) BFA_LPORT_AEN_OFFLINE = 4, /* LPort offline event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) BFA_LPORT_AEN_DISCONNECT = 5, /* LPort disconnect event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) BFA_LPORT_AEN_NEW_PROP = 6, /* VPort created event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) BFA_LPORT_AEN_DELETE_PROP = 7, /* VPort deleted event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) BFA_LPORT_AEN_NEW_STANDARD = 8, /* VPort created event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) BFA_LPORT_AEN_DELETE_STANDARD = 9, /* VPort deleted event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) BFA_LPORT_AEN_NPIV_DUP_WWN = 10, /* VPort with duplicate WWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) BFA_LPORT_AEN_NPIV_FABRIC_MAX = 11, /* Max NPIV in fabric/fport */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) BFA_LPORT_AEN_NPIV_UNKNOWN = 12, /* Unknown NPIV Error code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) struct bfa_lport_aen_data_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) u16 vf_id; /* vf_id of this logical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) u16 roles; /* Logical port mode,IM/TM/IP etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) u32 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) wwn_t ppwwn; /* WWN of its physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) wwn_t lpwwn; /* WWN of this logical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) /* BFA ITNIM events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) enum bfa_itnim_aen_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) BFA_ITNIM_AEN_ONLINE = 1, /* Target online */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) BFA_ITNIM_AEN_OFFLINE = 2, /* Target offline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) BFA_ITNIM_AEN_DISCONNECT = 3, /* Target disconnected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) struct bfa_itnim_aen_data_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u16 vf_id; /* vf_id of the IT nexus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) u16 rsvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) wwn_t ppwwn; /* WWN of its physical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) wwn_t lpwwn; /* WWN of logical port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) wwn_t rpwwn; /* WWN of remote(target) port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) /* BFA audit events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) enum bfa_audit_aen_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) BFA_AUDIT_AEN_AUTH_ENABLE = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) BFA_AUDIT_AEN_AUTH_DISABLE = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) BFA_AUDIT_AEN_FLASH_ERASE = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) BFA_AUDIT_AEN_FLASH_UPDATE = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) struct bfa_audit_aen_data_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) wwn_t pwwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) int partition_inst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) int partition_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /* BFA IOC level events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) enum bfa_ioc_aen_event {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) BFA_IOC_AEN_HBGOOD = 1, /* Heart Beat restore event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) BFA_IOC_AEN_HBFAIL = 2, /* Heart Beat failure event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) BFA_IOC_AEN_ENABLE = 3, /* IOC enabled event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) BFA_IOC_AEN_DISABLE = 4, /* IOC disabled event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) BFA_IOC_AEN_FWMISMATCH = 5, /* IOC firmware mismatch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) BFA_IOC_AEN_FWCFG_ERROR = 6, /* IOC firmware config error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) BFA_IOC_AEN_INVALID_VENDOR = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) BFA_IOC_AEN_INVALID_NWWN = 8, /* Zero NWWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) BFA_IOC_AEN_INVALID_PWWN = 9 /* Zero PWWN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct bfa_ioc_aen_data_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) wwn_t pwwn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) u16 ioc_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) mac_t mac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * ---------------------- mfg definitions ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * Checksum size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) #define BFA_MFG_CHKSUM_SIZE 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) #define BFA_MFG_PARTNUM_SIZE 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) #define BFA_MFG_SUPPLIER_ID_SIZE 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) #define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) #define BFA_MFG_SUPPLIER_REVISION_SIZE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * Initial capability definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) #define BFA_MFG_IC_FC 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) #define BFA_MFG_IC_ETH 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * Adapter capability mask definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) #define BFA_CM_HBA 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) #define BFA_CM_CNA 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) #define BFA_CM_NIC 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) #define BFA_CM_FC16G 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) #define BFA_CM_SRIOV 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) #define BFA_CM_MEZZ 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * All numerical fields are in big-endian format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) struct bfa_mfg_block_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) u8 version; /*!< manufacturing block version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) u8 mfg_sig[3]; /*!< characters 'M', 'F', 'G' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) u16 mfgsize; /*!< mfg block size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) u16 u16_chksum; /*!< old u16 checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) char brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) u8 mfg_day; /*!< manufacturing day */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) u8 mfg_month; /*!< manufacturing month */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) u16 mfg_year; /*!< manufacturing year */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) wwn_t mfg_wwn; /*!< wwn base for this adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) u8 num_wwn; /*!< number of wwns assigned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) u8 mfg_speeds; /*!< speeds allowed for this adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) u8 rsv[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) char supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) char supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) char supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) char supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) mac_t mfg_mac; /*!< base mac address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) u8 num_mac; /*!< number of mac addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) u8 rsv2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) u32 card_type; /*!< card type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) char cap_nic; /*!< capability nic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) char cap_cna; /*!< capability cna */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) char cap_hba; /*!< capability hba */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) char cap_fc16g; /*!< capability fc 16g */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) char cap_sriov; /*!< capability sriov */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) char cap_mezz; /*!< capability mezz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) u8 rsv3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) u8 mfg_nports; /*!< number of ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) char media[8]; /*!< xfi/xaui */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) char initial_mode[8]; /*!< initial mode: hba/cna/nic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u8 rsv4[84];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /*!< md5 checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * ---------------------- pci definitions ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * PCI device and vendor ID information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) BFA_PCI_VENDOR_ID_BROCADE = 0x1657,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) BFA_PCI_DEVICE_ID_FC_8G2P = 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) BFA_PCI_DEVICE_ID_FC_8G1P = 0x17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) BFA_PCI_DEVICE_ID_CT = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) BFA_PCI_DEVICE_ID_CT_FC = 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) BFA_PCI_DEVICE_ID_CT2 = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) BFA_PCI_DEVICE_ID_CT2_QUAD = 0x23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) #define bfa_asic_id_cb(__d) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ((__d) == BFA_PCI_DEVICE_ID_FC_8G2P || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) (__d) == BFA_PCI_DEVICE_ID_FC_8G1P)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) #define bfa_asic_id_ct(__d) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ((__d) == BFA_PCI_DEVICE_ID_CT || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) (__d) == BFA_PCI_DEVICE_ID_CT_FC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) #define bfa_asic_id_ct2(__d) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) ((__d) == BFA_PCI_DEVICE_ID_CT2 || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) (__d) == BFA_PCI_DEVICE_ID_CT2_QUAD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) #define bfa_asic_id_ctc(__d) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) (bfa_asic_id_ct(__d) || bfa_asic_id_ct2(__d))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) * PCI sub-system device and vendor ID information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) BFA_PCI_FCOE_SSDEVICE_ID = 0x14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) BFA_PCI_CT2_SSID_FCoE = 0x22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) BFA_PCI_CT2_SSID_ETH = 0x23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) BFA_PCI_CT2_SSID_FC = 0x24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) * Maximum number of device address ranges mapped through different BAR(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) #define BFA_PCI_ACCESS_RANGES 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) * Port speed settings. Each specific speed is a bit field. Use multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) * bits to specify speeds to be selected for auto-negotiation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) enum bfa_port_speed {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) BFA_PORT_SPEED_UNKNOWN = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) BFA_PORT_SPEED_1GBPS = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) BFA_PORT_SPEED_2GBPS = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) BFA_PORT_SPEED_4GBPS = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) BFA_PORT_SPEED_8GBPS = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) BFA_PORT_SPEED_10GBPS = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) BFA_PORT_SPEED_16GBPS = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) BFA_PORT_SPEED_AUTO = 0xf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) #define bfa_port_speed_t enum bfa_port_speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) BFA_BOOT_BOOTLUN_MAX = 4, /* maximum boot lun per IOC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) BFA_PREBOOT_BOOTLUN_MAX = 8, /* maximum preboot lun per IOC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) #define BOOT_CFG_REV1 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) #define BOOT_CFG_VLAN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) * Boot options setting. Boot options setting determines from where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) * to get the boot lun information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) enum bfa_boot_bootopt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) BFA_BOOT_AUTO_DISCOVER = 0, /* Boot from blun provided by fabric */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) BFA_BOOT_STORED_BLUN = 1, /* Boot from bluns stored in flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) BFA_BOOT_FIRST_LUN = 2, /* Boot from first discovered blun */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) BFA_BOOT_PBC = 3, /* Boot from pbc configured blun */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * Boot lun information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) struct bfa_boot_bootlun_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) wwn_t pwwn; /* port wwn of target */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) struct scsi_lun lun; /* 64-bit lun */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) * BOOT boot configuraton
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) struct bfa_boot_cfg_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) u8 rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) u16 chksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) u8 enable; /* enable/disable SAN boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) u8 speed; /* boot speed settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) u8 topology; /* boot topology setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) u8 bootopt; /* bfa_boot_bootopt_t */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) u32 nbluns; /* number of boot luns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) u32 rsvd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) struct bfa_boot_bootlun_s blun[BFA_BOOT_BOOTLUN_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) struct bfa_boot_bootlun_s blun_disc[BFA_BOOT_BOOTLUN_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) struct bfa_boot_pbc_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) u8 enable; /* enable/disable SAN boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) u8 speed; /* boot speed settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) u8 topology; /* boot topology setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) u8 rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) u32 nbluns; /* number of boot luns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) struct bfa_boot_bootlun_s pblun[BFA_PREBOOT_BOOTLUN_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) struct bfa_ethboot_cfg_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) u8 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) u8 rsvd1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) u16 chksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) u8 enable; /* enable/disable Eth/PXE boot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) u8 rsvd2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) u16 vlan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * ASIC block configuration related structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) #define BFA_ABLK_MAX_PORTS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) #define BFA_ABLK_MAX_PFS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) #define BFA_ABLK_MAX 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) #pragma pack(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) enum bfa_mode_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) BFA_MODE_HBA = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) BFA_MODE_CNA = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) BFA_MODE_NIC = 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) struct bfa_adapter_cfg_mode_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) u16 max_pf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) u16 max_vf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) enum bfa_mode_s mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) struct bfa_ablk_cfg_pf_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) u16 pers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) u8 port_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) u8 optrom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) u8 valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) u8 sriov;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) u8 max_vfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) u8 rsvd[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) u16 num_qpairs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) u16 num_vectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) u16 bw_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) u16 bw_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) struct bfa_ablk_cfg_port_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) u8 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) u8 max_pfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) u8 rsvd[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) struct bfa_ablk_cfg_inst_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) u8 nports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) u8 max_pfs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) u8 rsvd[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) struct bfa_ablk_cfg_pf_s pf_cfg[BFA_ABLK_MAX_PFS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) struct bfa_ablk_cfg_port_s port_cfg[BFA_ABLK_MAX_PORTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) struct bfa_ablk_cfg_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) struct bfa_ablk_cfg_inst_s inst[BFA_ABLK_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) * SFP module specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) #define SFP_DIAGMON_SIZE 10 /* num bytes of diag monitor data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) /* SFP state change notification event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) #define BFA_SFP_SCN_REMOVED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) #define BFA_SFP_SCN_INSERTED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) #define BFA_SFP_SCN_POM 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) #define BFA_SFP_SCN_FAILED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) #define BFA_SFP_SCN_UNSUPPORT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) #define BFA_SFP_SCN_VALID 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) enum bfa_defs_sfp_media_e {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) BFA_SFP_MEDIA_UNKNOWN = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) BFA_SFP_MEDIA_CU = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) BFA_SFP_MEDIA_LW = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) BFA_SFP_MEDIA_SW = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) BFA_SFP_MEDIA_EL = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) BFA_SFP_MEDIA_UNSUPPORT = 0x05,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) * values for xmtr_tech above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) SFP_XMTR_TECH_CU = (1 << 0), /* copper FC-BaseT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) SFP_XMTR_TECH_CP = (1 << 1), /* copper passive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) SFP_XMTR_TECH_CA = (1 << 2), /* copper active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) SFP_XMTR_TECH_LL = (1 << 3), /* longwave laser */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) SFP_XMTR_TECH_SL = (1 << 4), /* shortwave laser w/ OFC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) SFP_XMTR_TECH_SN = (1 << 5), /* shortwave laser w/o OFC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) SFP_XMTR_TECH_EL_INTRA = (1 << 6), /* elec intra-enclosure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) SFP_XMTR_TECH_EL_INTER = (1 << 7), /* elec inter-enclosure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) SFP_XMTR_TECH_LC = (1 << 8), /* longwave laser */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) SFP_XMTR_TECH_SA = (1 << 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) * Serial ID: Data Fields -- Address A0h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) * Basic ID field total 64 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) struct sfp_srlid_base_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) u8 id; /* 00: Identifier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) u8 extid; /* 01: Extended Identifier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) u8 connector; /* 02: Connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) u8 xcvr[8]; /* 03-10: Transceiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) u8 encoding; /* 11: Encoding */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) u8 br_norm; /* 12: BR, Nominal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) u8 rate_id; /* 13: Rate Identifier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) u8 len_km; /* 14: Length single mode km */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) u8 len_100m; /* 15: Length single mode 100m */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) u8 len_om2; /* 16: Length om2 fiber 10m */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) u8 len_om1; /* 17: Length om1 fiber 10m */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) u8 len_cu; /* 18: Length copper 1m */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) u8 len_om3; /* 19: Length om3 fiber 10m */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) u8 vendor_name[16];/* 20-35 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) u8 unalloc1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) u8 vendor_oui[3]; /* 37-39 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) u8 vendor_pn[16]; /* 40-55 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) u8 vendor_rev[4]; /* 56-59 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) u8 wavelen[2]; /* 60-61 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) u8 unalloc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) u8 cc_base; /* 63: check code for base id field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) * Serial ID: Data Fields -- Address A0h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) * Extended id field total 32 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) struct sfp_srlid_ext_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) u8 options[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) u8 br_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) u8 br_min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) u8 vendor_sn[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) u8 date_code[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) u8 diag_mon_type; /* 92: Diagnostic Monitoring type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) u8 en_options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) u8 sff_8472;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) u8 cc_ext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) * Diagnostic: Data Fields -- Address A2h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) * Diagnostic and control/status base field total 96 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) struct sfp_diag_base_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) * Alarm and warning Thresholds 40 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) u8 temp_high_alarm[2]; /* 00-01 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) u8 temp_low_alarm[2]; /* 02-03 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) u8 temp_high_warning[2]; /* 04-05 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) u8 temp_low_warning[2]; /* 06-07 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) u8 volt_high_alarm[2]; /* 08-09 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) u8 volt_low_alarm[2]; /* 10-11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) u8 volt_high_warning[2]; /* 12-13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) u8 volt_low_warning[2]; /* 14-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) u8 bias_high_alarm[2]; /* 16-17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) u8 bias_low_alarm[2]; /* 18-19 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) u8 bias_high_warning[2]; /* 20-21 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) u8 bias_low_warning[2]; /* 22-23 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) u8 tx_pwr_high_alarm[2]; /* 24-25 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) u8 tx_pwr_low_alarm[2]; /* 26-27 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) u8 tx_pwr_high_warning[2]; /* 28-29 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) u8 tx_pwr_low_warning[2]; /* 30-31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) u8 rx_pwr_high_alarm[2]; /* 32-33 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) u8 rx_pwr_low_alarm[2]; /* 34-35 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) u8 rx_pwr_high_warning[2]; /* 36-37 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) u8 rx_pwr_low_warning[2]; /* 38-39 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) u8 unallocate_1[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) * ext_cal_const[36]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) u8 rx_pwr[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) u8 tx_i[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) u8 tx_pwr[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) u8 temp[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) u8 volt[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) u8 unallocate_2[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) u8 cc_dmi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) * Diagnostic: Data Fields -- Address A2h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) * Diagnostic and control/status extended field total 24 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) struct sfp_diag_ext_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) u8 diag[SFP_DIAGMON_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) u8 unalloc1[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) u8 status_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) u8 rsvd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) u8 alarm_flags[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) u8 unalloc2[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) u8 warning_flags[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) u8 ext_status_ctl[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) * Diagnostic: Data Fields -- Address A2h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) * General Use Fields: User Writable Table - Features's Control Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) * Total 32 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) struct sfp_usr_eeprom_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) u8 rsvd1[2]; /* 128-129 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) u8 ewrap; /* 130 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) u8 rsvd2[2]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) u8 owrap; /* 133 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) u8 rsvd3[2]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) u8 prbs; /* 136: PRBS 7 generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) u8 rsvd4[2]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) u8 tx_eqz_16; /* 139: TX Equalizer (16xFC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) u8 tx_eqz_8; /* 140: TX Equalizer (8xFC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) u8 rsvd5[2]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) u8 rx_emp_16; /* 143: RX Emphasis (16xFC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) u8 rx_emp_8; /* 144: RX Emphasis (8xFC) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) u8 rsvd6[2]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) u8 tx_eye_adj; /* 147: TX eye Threshold Adjust */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) u8 rsvd7[3]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) u8 tx_eye_qctl; /* 151: TX eye Quality Control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) u8 tx_eye_qres; /* 152: TX eye Quality Result */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) u8 rsvd8[2]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) u8 poh[3]; /* 155-157: Power On Hours */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) u8 rsvd9[2]; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) struct sfp_mem_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) struct sfp_srlid_base_s srlid_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) struct sfp_srlid_ext_s srlid_ext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) struct sfp_diag_base_s diag_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) struct sfp_diag_ext_s diag_ext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) struct sfp_usr_eeprom_s usr_eeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) * transceiver codes (SFF-8472 Rev 10.2 Table 3.5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) union sfp_xcvr_e10g_code_u {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) #ifdef __BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) u8 e10g_unall:1; /* 10G Ethernet compliance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) u8 e10g_lrm:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) u8 e10g_lr:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) u8 e10g_sr:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) u8 ib_sx:1; /* Infiniband compliance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) u8 ib_lx:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) u8 ib_cu_a:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) u8 ib_cu_p:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) u8 ib_cu_p:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) u8 ib_cu_a:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) u8 ib_lx:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) u8 ib_sx:1; /* Infiniband compliance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) u8 e10g_sr:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) u8 e10g_lr:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) u8 e10g_lrm:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) u8 e10g_unall:1; /* 10G Ethernet compliance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) } r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) union sfp_xcvr_so1_code_u {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) u8 escon:2; /* ESCON compliance code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) u8 oc192_reach:1; /* SONET compliance code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) u8 so_reach:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) u8 oc48_reach:3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) } r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) union sfp_xcvr_so2_code_u {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) u8 reserved:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) u8 oc12_reach:3; /* OC12 reach */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) u8 reserved1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) u8 oc3_reach:3; /* OC3 reach */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) } r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) union sfp_xcvr_eth_code_u {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) u8 base_px:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) u8 base_bx10:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) u8 e100base_fx:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) u8 e100base_lx:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) u8 e1000base_t:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) u8 e1000base_cx:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) u8 e1000base_lx:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) u8 e1000base_sx:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) } r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) struct sfp_xcvr_fc1_code_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) u8 link_len:5; /* FC link length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) u8 xmtr_tech2:3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) u8 xmtr_tech1:7; /* FC transmitter technology */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) u8 reserved1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) union sfp_xcvr_fc2_code_u {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) u8 tw_media:1; /* twin axial pair (tw) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) u8 tp_media:1; /* shielded twisted pair (sp) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) u8 mi_media:1; /* miniature coax (mi) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) u8 tv_media:1; /* video coax (tv) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) u8 m6_media:1; /* multimode, 62.5m (m6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) u8 m5_media:1; /* multimode, 50m (m5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) u8 reserved:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) u8 sm_media:1; /* single mode (sm) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) } r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) union sfp_xcvr_fc3_code_u {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) u8 b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) #ifdef __BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) u8 rsv4:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) u8 mb800:1; /* 800 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) u8 mb1600:1; /* 1600 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) u8 mb400:1; /* 400 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) u8 rsv2:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) u8 mb200:1; /* 200 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) u8 rsv1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) u8 mb100:1; /* 100 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) u8 mb100:1; /* 100 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) u8 rsv1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) u8 mb200:1; /* 200 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) u8 rsv2:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) u8 mb400:1; /* 400 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) u8 mb1600:1; /* 1600 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) u8 mb800:1; /* 800 Mbytes/sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) u8 rsv4:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) } r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) struct sfp_xcvr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) union sfp_xcvr_e10g_code_u e10g;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) union sfp_xcvr_so1_code_u so1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) union sfp_xcvr_so2_code_u so2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) union sfp_xcvr_eth_code_u eth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) struct sfp_xcvr_fc1_code_s fc1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) union sfp_xcvr_fc2_code_u fc2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) union sfp_xcvr_fc3_code_u fc3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) * Flash module specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) #define BFA_FLASH_PART_ENTRY_SIZE 32 /* partition entry size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) #define BFA_FLASH_PART_MAX 32 /* maximal # of partitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) enum bfa_flash_part_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) BFA_FLASH_PART_OPTROM = 1, /* option rom partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) BFA_FLASH_PART_FWIMG = 2, /* firmware image partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) BFA_FLASH_PART_FWCFG = 3, /* firmware tuneable config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) BFA_FLASH_PART_DRV = 4, /* IOC driver config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) BFA_FLASH_PART_BOOT = 5, /* boot config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) BFA_FLASH_PART_ASIC = 6, /* asic bootstrap configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) BFA_FLASH_PART_MFG = 7, /* manufacturing block partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) BFA_FLASH_PART_OPTROM2 = 8, /* 2nd option rom partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) BFA_FLASH_PART_VPD = 9, /* vpd data of OEM info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) BFA_FLASH_PART_PBC = 10, /* pre-boot config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) BFA_FLASH_PART_BOOTOVL = 11, /* boot overlay partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) BFA_FLASH_PART_LOG = 12, /* firmware log partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) BFA_FLASH_PART_PXECFG = 13, /* pxe boot config partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) BFA_FLASH_PART_PXEOVL = 14, /* pxe boot overlay partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) BFA_FLASH_PART_PORTCFG = 15, /* port cfg partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) BFA_FLASH_PART_ASICBK = 16, /* asic backup partition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) * flash partition attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) struct bfa_flash_part_attr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) u32 part_type; /* partition type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) u32 part_instance; /* partition instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) u32 part_off; /* partition offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) u32 part_size; /* partition size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) u32 part_len; /* partition content length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) u32 part_status; /* partition status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) char rsv[BFA_FLASH_PART_ENTRY_SIZE - 24];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) * flash attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) struct bfa_flash_attr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) u32 status; /* flash overall status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) u32 npart; /* num of partitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) struct bfa_flash_part_attr_s part[BFA_FLASH_PART_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) * DIAG module specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) #define LB_PATTERN_DEFAULT 0xB5B5B5B5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) #define QTEST_CNT_DEFAULT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) #define QTEST_PAT_DEFAULT LB_PATTERN_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) #define DPORT_ENABLE_LOOPCNT_DEFAULT (1024 * 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) struct bfa_diag_memtest_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) u8 algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) u8 rsvd[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) struct bfa_diag_memtest_result {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) u32 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) u32 exp; /* expect value read from reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) u32 act; /* actually value read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) u32 err_status; /* error status reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) u32 err_status1; /* extra error info reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) u32 err_addr; /* error address reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) u8 algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) u8 rsv[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) struct bfa_diag_loopback_result_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) u32 numtxmfrm; /* no. of transmit frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) u32 numosffrm; /* no. of outstanding frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) u32 numrcvfrm; /* no. of received good frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) u32 badfrminf; /* mis-match info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) u32 badfrmnum; /* mis-match fram number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) u8 status; /* loopback test result */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) u8 rsvd[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) enum bfa_diag_dport_test_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) DPORT_TEST_ST_IDLE = 0, /* the test has not started yet. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) DPORT_TEST_ST_FINAL = 1, /* the test done successfully */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) DPORT_TEST_ST_SKIP = 2, /* the test skipped */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) DPORT_TEST_ST_FAIL = 3, /* the test failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) DPORT_TEST_ST_INPRG = 4, /* the testing is in progress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) DPORT_TEST_ST_RESPONDER = 5, /* test triggered from remote port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) DPORT_TEST_ST_STOPPED = 6, /* the test stopped by user. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) DPORT_TEST_ST_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) enum bfa_diag_dport_test_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) DPORT_TEST_ELOOP = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) DPORT_TEST_OLOOP = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) DPORT_TEST_ROLOOP = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) DPORT_TEST_LINK = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) DPORT_TEST_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) enum bfa_diag_dport_test_opmode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) BFA_DPORT_OPMODE_AUTO = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) BFA_DPORT_OPMODE_MANU = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) struct bfa_diag_dport_subtest_result_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) u8 status; /* bfa_diag_dport_test_status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) u8 rsvd[7]; /* 64bit align */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) u64 start_time; /* timestamp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) struct bfa_diag_dport_result_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) wwn_t rp_pwwn; /* switch port wwn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) wwn_t rp_nwwn; /* switch node wwn */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) u64 start_time; /* user/sw start time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) u64 end_time; /* timestamp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) u8 status; /* bfa_diag_dport_test_status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) u8 mode; /* bfa_diag_dport_test_opmode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) u8 rsvd; /* 64bit align */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) u8 speed; /* link speed for buf_reqd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) u16 buffer_required;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) u16 frmsz; /* frame size for buf_reqd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) u32 lpcnt; /* Frame count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) u32 pat; /* Pattern */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) u32 roundtrip_latency; /* in nano sec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) u32 est_cable_distance; /* in meter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) struct bfa_diag_dport_subtest_result_s subtest[DPORT_TEST_MAX];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) struct bfa_diag_ledtest_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) u32 cmd; /* bfa_led_op_t */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) u32 color; /* bfa_led_color_t */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) u16 freq; /* no. of blinks every 10 secs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) u8 led; /* bitmap of LEDs to be tested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) u8 rsvd[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) struct bfa_diag_loopback_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) u32 loopcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) u32 pattern;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) u8 lb_mode; /* bfa_port_opmode_t */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) u8 speed; /* bfa_port_speed_t */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) u8 rsvd[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) * PHY module specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) enum bfa_phy_status_e {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) BFA_PHY_STATUS_GOOD = 0, /* phy is good */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) BFA_PHY_STATUS_NOT_PRESENT = 1, /* phy does not exist */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) BFA_PHY_STATUS_BAD = 2, /* phy is bad */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) * phy attributes for phy query
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) struct bfa_phy_attr_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) u32 status; /* phy present/absent status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) u32 length; /* firmware length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) u32 fw_ver; /* firmware version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) u32 an_status; /* AN status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) u32 pma_pmd_status; /* PMA/PMD link status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) u32 pma_pmd_signal; /* PMA/PMD signal detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) u32 pcs_status; /* PCS link status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) * phy stats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) struct bfa_phy_stats_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) u32 status; /* phy stats status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) u32 link_breaks; /* Num of link breaks after linkup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) u32 pma_pmd_fault; /* NPMA/PMD fault */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) u32 pcs_fault; /* PCS fault */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) u32 speed_neg; /* Num of speed negotiation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) u32 tx_eq_training; /* Num of TX EQ training */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) u32 tx_eq_timeout; /* Num of TX EQ timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) u32 crc_error; /* Num of CRC errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) #pragma pack()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) #endif /* __BFA_DEFS_H__ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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