^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is part of the Emulex Linux Device Driver for Enterprise iSCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Host Bus Adapters. Refer to the README file included with this package
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * for driver version and adapter compatibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2018 Broadcom. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * under the terms of version 2 of the GNU General Public License as published
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is distributed in the hope that it will be useful. ALL EXPRESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, INCLUDING ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * OR NON-INFRINGEMENT, ARE DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * DISCLAIMERS ARE HELD TO BE LEGALLY INVALID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * See the GNU General Public License for more details, a copy of which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * can be found in the file COPYING included with this package.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Contact Information:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * linux-drivers@broadcom.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/semaphore.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/iscsi_boot_sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/bsg-lib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/irq_poll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <scsi/libiscsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <scsi/scsi_bsg_iscsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <scsi/scsi_netlink.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <scsi/scsi_transport_iscsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <scsi/scsi_transport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <scsi/scsi_cmnd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <scsi/scsi_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include "be_main.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include "be_iscsi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include "be_mgmt.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include "be_cmds.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static unsigned int be_iopoll_budget = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static unsigned int be_max_phys_size = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static unsigned int enable_msix = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) MODULE_VERSION(BUILD_STR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) MODULE_AUTHOR("Emulex Corporation");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) module_param(be_iopoll_budget, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) module_param(enable_msix, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) module_param(be_max_phys_size, uint, S_IRUGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) MODULE_PARM_DESC(be_max_phys_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "Maximum Size (In Kilobytes) of physically contiguous "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) "memory that can be allocated. Range is 16 - 128");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define beiscsi_disp_param(_name)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static ssize_t \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) beiscsi_##_name##_disp(struct device *dev,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct device_attribute *attrib, char *buf) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct Scsi_Host *shost = class_to_shost(dev);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct beiscsi_hba *phba = iscsi_host_priv(shost); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return snprintf(buf, PAGE_SIZE, "%d\n",\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) phba->attr_##_name);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static int \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (val >= _minval && val <= _maxval) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) "BA_%d : beiscsi_"#_name" updated "\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) "from 0x%x ==> 0x%x\n",\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) phba->attr_##_name, val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) phba->attr_##_name = val;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return 0;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) "BA_%d beiscsi_"#_name" attribute "\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) "cannot be updated to 0x%x, "\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) "range allowed is ["#_minval" - "#_maxval"]\n", val);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return -EINVAL;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define beiscsi_store_param(_name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static ssize_t \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) beiscsi_##_name##_store(struct device *dev,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct device_attribute *attr, const char *buf,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) size_t count) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct Scsi_Host *shost = class_to_shost(dev);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct beiscsi_hba *phba = iscsi_host_priv(shost);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) uint32_t param_val = 0;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (!isdigit(buf[0]))\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -EINVAL;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (sscanf(buf, "%i", ¶m_val) != 1)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return -EINVAL;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (beiscsi_##_name##_change(phba, param_val) == 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return strlen(buf);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) else \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return -EINVAL;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static int \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (val >= _minval && val <= _maxval) {\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) phba->attr_##_name = val;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) "BA_%d beiscsi_"#_name" attribute " \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) "cannot be updated to 0x%x, "\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) "range allowed is ["#_minval" - "#_maxval"]\n", val);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) phba->attr_##_name = _defval;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return -EINVAL;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static uint beiscsi_##_name = _defval;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) module_param(beiscsi_##_name, uint, S_IRUGO);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) MODULE_PARM_DESC(beiscsi_##_name, _descp);\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) beiscsi_disp_param(_name)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) beiscsi_change_param(_name, _minval, _maxval, _defval)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) beiscsi_store_param(_name)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) beiscsi_init_param(_name, _minval, _maxval, _defval)\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) beiscsi_##_name##_disp, beiscsi_##_name##_store)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * When new log level added update the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * the MAX allowed value for log_enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) BEISCSI_RW_ATTR(log_enable, 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 0xFF, 0x00, "Enable logging Bit Mask\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) "\t\t\t\tInitialization Events : 0x01\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) "\t\t\t\tMailbox Events : 0x02\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) "\t\t\t\tMiscellaneous Events : 0x04\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) "\t\t\t\tError Handling : 0x08\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) "\t\t\t\tIO Path Events : 0x10\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) "\t\t\t\tConfiguration Path : 0x20\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) "\t\t\t\tiSCSI Protocol : 0x40\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) beiscsi_active_session_disp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) beiscsi_free_session_disp, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct device_attribute *beiscsi_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) &dev_attr_beiscsi_log_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) &dev_attr_beiscsi_drvr_ver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) &dev_attr_beiscsi_adapter_family,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) &dev_attr_beiscsi_fw_ver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) &dev_attr_beiscsi_active_session_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) &dev_attr_beiscsi_free_session_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) &dev_attr_beiscsi_phys_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static char const *cqe_desc[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) "RESERVED_DESC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) "SOL_CMD_COMPLETE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) "SOL_CMD_KILLED_DATA_DIGEST_ERR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) "CXN_KILLED_BURST_LEN_MISMATCH",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "CXN_KILLED_AHS_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) "CXN_KILLED_HDR_DIGEST_ERR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) "CXN_KILLED_UNKNOWN_HDR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) "CXN_KILLED_STALE_ITT_TTT_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) "CXN_KILLED_INVALID_ITT_TTT_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) "CXN_KILLED_RST_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) "CXN_KILLED_TIMED_OUT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) "CXN_KILLED_RST_SENT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) "CXN_KILLED_FIN_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) "CXN_KILLED_BAD_WRB_INDEX_ERROR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) "CXN_KILLED_OVER_RUN_RESIDUAL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) "CXN_KILLED_UNDER_RUN_RESIDUAL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) "CMD_KILLED_INVALID_STATSN_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) "CMD_KILLED_INVALID_R2T_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) "CMD_CXN_KILLED_LUN_INVALID",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) "CMD_CXN_KILLED_ICD_INVALID",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) "CMD_CXN_KILLED_ITT_INVALID",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) "CMD_CXN_KILLED_SEQ_OUTOFORDER",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) "CXN_INVALIDATE_NOTIFY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) "CXN_INVALIDATE_INDEX_NOTIFY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) "CMD_INVALIDATED_NOTIFY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) "UNSOL_HDR_NOTIFY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) "UNSOL_DATA_NOTIFY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) "DRIVERMSG_NOTIFY",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) "SOL_CMD_KILLED_DIF_ERR",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) "CXN_KILLED_SYN_RCVD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) "CXN_KILLED_IMM_DATA_RCVD"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static int beiscsi_eh_abort(struct scsi_cmnd *sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct iscsi_task *abrt_task = (struct iscsi_task *)sc->SCp.ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct iscsi_cls_session *cls_session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct beiscsi_io_task *abrt_io_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) struct beiscsi_conn *beiscsi_conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct iscsi_session *session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct invldt_cmd_tbl inv_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct iscsi_conn *conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) cls_session = starget_to_session(scsi_target(sc->device));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) session = cls_session->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* check if we raced, task just got cleaned up under us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) spin_lock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!abrt_task || !abrt_task->sc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) spin_unlock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) /* get a task ref till FW processes the req for the ICD used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) __iscsi_get_task(abrt_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) abrt_io_task = abrt_task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) conn = abrt_task->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) beiscsi_conn = conn->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* mark WRB invalid which have been not processed by FW yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (is_chip_be2_be3r(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) abrt_io_task->pwrb_handle->pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) abrt_io_task->pwrb_handle->pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) inv_tbl.cid = beiscsi_conn->beiscsi_conn_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) inv_tbl.icd = abrt_io_task->psgl_handle->sgl_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) spin_unlock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) rc = beiscsi_mgmt_invalidate_icds(phba, &inv_tbl, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) iscsi_put_task(abrt_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) "BM_%d : sc %p invalidation failed %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) sc, rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return iscsi_eh_abort(sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct beiscsi_invldt_cmd_tbl {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct invldt_cmd_tbl tbl[BE_INVLDT_CMD_TBL_SZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct iscsi_task *task[BE_INVLDT_CMD_TBL_SZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) } *inv_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) struct iscsi_cls_session *cls_session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct beiscsi_conn *beiscsi_conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct beiscsi_io_task *io_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct iscsi_session *session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct iscsi_conn *conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) struct iscsi_task *task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) unsigned int i, nents;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int rc, more = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) cls_session = starget_to_session(scsi_target(sc->device));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) session = cls_session->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) spin_lock_bh(&session->frwd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) spin_unlock_bh(&session->frwd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) conn = session->leadconn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) beiscsi_conn = conn->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) inv_tbl = kzalloc(sizeof(*inv_tbl), GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (!inv_tbl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) spin_unlock_bh(&session->frwd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) "BM_%d : invldt_cmd_tbl alloc failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) nents = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* take back_lock to prevent task from getting cleaned up under us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) spin_lock(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) for (i = 0; i < conn->session->cmds_max; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) task = conn->session->cmds[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (!task->sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (sc->device->lun != task->sc->device->lun)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * Can't fit in more cmds? Normally this won't happen b'coz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * BEISCSI_CMD_PER_LUN is same as BE_INVLDT_CMD_TBL_SZ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (nents == BE_INVLDT_CMD_TBL_SZ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) more = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /* get a task ref till FW processes the req for the ICD used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) __iscsi_get_task(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* mark WRB invalid which have been not processed by FW yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (is_chip_be2_be3r(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) io_task->pwrb_handle->pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) io_task->pwrb_handle->pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) inv_tbl->tbl[nents].cid = beiscsi_conn->beiscsi_conn_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) inv_tbl->tbl[nents].icd = io_task->psgl_handle->sgl_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) inv_tbl->task[nents] = task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) nents++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) spin_unlock(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) spin_unlock_bh(&session->frwd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) rc = SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (!nents)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) goto end_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (more) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) "BM_%d : number of cmds exceeds size of invalidation table\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) rc = FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) goto end_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (beiscsi_mgmt_invalidate_icds(phba, &inv_tbl->tbl[0], nents)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) "BM_%d : cid %u scmds invalidation failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) rc = FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) end_reset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) for (i = 0; i < nents; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) iscsi_put_task(inv_tbl->task[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) kfree(inv_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (rc == SUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) rc = iscsi_eh_device_reset(sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /*------------------- PCI Driver operations and data ----------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static const struct pci_device_id beiscsi_pci_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) { 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) static struct scsi_host_template beiscsi_sht = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .module = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .name = "Emulex 10Gbe open-iscsi Initiator Driver",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .proc_name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .queuecommand = iscsi_queuecommand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .change_queue_depth = scsi_change_queue_depth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .target_alloc = iscsi_target_alloc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .eh_timed_out = iscsi_eh_cmd_timed_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .eh_abort_handler = beiscsi_eh_abort,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .eh_device_reset_handler = beiscsi_eh_device_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .eh_target_reset_handler = iscsi_eh_session_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .shost_attrs = beiscsi_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) .can_queue = BE2_IO_DEPTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .this_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .max_sectors = BEISCSI_MAX_SECTORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .max_segment_size = 65536,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .cmd_per_lun = BEISCSI_CMD_PER_LUN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .track_queue_depth = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) static struct scsi_transport_template *beiscsi_scsi_transport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (!shost) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) dev_err(&pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) shost->max_id = BE2_MAX_SESSIONS - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) shost->max_channel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) shost->max_lun = BEISCSI_NUM_MAX_LUN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) shost->transportt = beiscsi_scsi_transport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) phba = iscsi_host_priv(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) memset(phba, 0, sizeof(*phba));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) phba->shost = shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) phba->pcidev = pci_dev_get(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) pci_set_drvdata(pcidev, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) phba->interface_handle = 0xFFFFFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (phba->csr_va) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) iounmap(phba->csr_va);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) phba->csr_va = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (phba->db_va) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) iounmap(phba->db_va);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) phba->db_va = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (phba->pci_va) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) iounmap(phba->pci_va);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) phba->pci_va = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) struct pci_dev *pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) u8 __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) int pcicfg_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) addr = ioremap(pci_resource_start(pcidev, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) pci_resource_len(pcidev, 2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) if (addr == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) phba->ctrl.csr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) phba->csr_va = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) addr = ioremap(pci_resource_start(pcidev, 4), 128 * 1024);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if (addr == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) goto pci_map_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) phba->ctrl.db = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) phba->db_va = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (phba->generation == BE_GEN2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) pcicfg_reg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) pcicfg_reg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) addr = ioremap(pci_resource_start(pcidev, pcicfg_reg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) pci_resource_len(pcidev, pcicfg_reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) if (addr == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) goto pci_map_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) phba->ctrl.pcicfg = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) phba->pci_va = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) pci_map_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) beiscsi_unmap_pci_function(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int beiscsi_enable_pci(struct pci_dev *pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ret = pci_enable_device(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) dev_err(&pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) "beiscsi_enable_pci - enable device failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) ret = pci_request_regions(pcidev, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) dev_err(&pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) "beiscsi_enable_pci - request region failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) goto pci_dev_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) pci_set_master(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ret = dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ret = dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) goto pci_region_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) pci_region_release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) pci_release_regions(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) pci_dev_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) pci_disable_device(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) struct be_ctrl_info *ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) ctrl->pdev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) status = beiscsi_map_pci_bars(phba, pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) mbox_mem_alloc->va = dma_alloc_coherent(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) mbox_mem_alloc->size, &mbox_mem_alloc->dma, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (!mbox_mem_alloc->va) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) beiscsi_unmap_pci_function(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) mutex_init(&ctrl->mbox_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) spin_lock_init(&phba->ctrl.mcc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) * beiscsi_get_params()- Set the config paramters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) * @phba: ptr device priv structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static void beiscsi_get_params(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) uint32_t total_cid_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) uint32_t total_icd_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) uint8_t ulp_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) uint32_t align_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) uint32_t icd_post_per_page = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) uint32_t icd_count_unavailable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) uint32_t icd_start = 0, icd_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) uint32_t icd_start_align = 0, icd_count_align = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) /* Get ICD count that can be posted on each page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) sizeof(struct iscsi_sge)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) align_mask = (icd_post_per_page - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /* Check if icd_start is aligned ICD per page posting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (icd_start % icd_post_per_page) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) icd_start_align = ((icd_start +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) icd_post_per_page) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) ~(align_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) phba->fw_config.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) iscsi_icd_start[ulp_num] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) icd_start_align;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) icd_count_align = (icd_count & ~align_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /* ICD discarded in the process of alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (icd_start_align)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) icd_count_unavailable = ((icd_start_align -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) icd_start) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) (icd_count -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) icd_count_align));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /* Updated ICD count available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) icd_count_unavailable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) "BM_%d : Aligned ICD values\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) "\t ICD Start : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) "\t ICD Count : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) "\t ICD Discarded : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) phba->fw_config.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) iscsi_icd_start[ulp_num],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) phba->fw_config.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) iscsi_icd_count[ulp_num],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) icd_count_unavailable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) phba->params.ios_per_ctrl = (total_icd_count -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) (total_cid_count +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) BE2_TMFS + BE2_NOPOUT_REQ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) phba->params.cxns_per_ctrl = total_cid_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) phba->params.icds_per_ctrl = total_icd_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) phba->params.num_sge_per_io = BE2_SGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) phba->params.num_eq_entries = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) phba->params.num_cq_entries = 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) phba->params.wrbs_per_cxn = 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) static void hwi_ring_eq_db(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) unsigned int id, unsigned int clr_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) unsigned int num_processed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) unsigned char rearm, unsigned char event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (rearm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) val |= 1 << DB_EQ_REARM_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (clr_interrupt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) val |= 1 << DB_EQ_CLR_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) val |= 1 << DB_EQ_EVNT_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /* Setting lower order EQ_ID Bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) val |= (id & DB_EQ_RING_ID_LOW_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) /* Setting Higher order EQ_ID Bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) DB_EQ_RING_ID_HIGH_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) << DB_EQ_HIGH_SET_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) iowrite32(val, phba->db_va + DB_EQ_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) * be_isr_mcc - The isr routine of the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) * @irq: Not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) * @dev_id: Pointer to host adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) static irqreturn_t be_isr_mcc(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) struct be_eq_entry *eqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) struct be_queue_info *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) struct be_queue_info *mcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) unsigned int mcc_events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) pbe_eq = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) eq = &pbe_eq->q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) phba = pbe_eq->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) mcc = &phba->ctrl.mcc_obj.cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) mcc_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) & EQE_VALID_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) if (((eqe->dw[offsetof(struct amap_eq_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) resource_id) / 32] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) EQE_RESID_MASK) >> 16) == mcc->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) mcc_events++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) queue_tail_inc(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (mcc_events) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) queue_work(phba->wq, &pbe_eq->mcc_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) hwi_ring_eq_db(phba, eq->id, 1, mcc_events, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * be_isr_msix - The isr routine of the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) * @irq: Not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) * @dev_id: Pointer to host adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) static irqreturn_t be_isr_msix(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) struct be_queue_info *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) pbe_eq = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) eq = &pbe_eq->q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) phba = pbe_eq->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) /* disable interrupt till iopoll completes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) irq_poll_sched(&pbe_eq->iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * be_isr - The isr routine of the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) * @irq: Not used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * @dev_id: Pointer to host adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) static irqreturn_t be_isr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) struct be_eq_entry *eqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) struct be_queue_info *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) struct be_queue_info *mcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) unsigned int mcc_events, io_events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) struct be_ctrl_info *ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) int isr, rearm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) phba = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) if (!isr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) pbe_eq = &phwi_context->be_eq[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) eq = &phwi_context->be_eq[0].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) mcc = &phba->ctrl.mcc_obj.cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) io_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) mcc_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) & EQE_VALID_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) if (((eqe->dw[offsetof(struct amap_eq_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) resource_id) / 32] & EQE_RESID_MASK) >> 16) == mcc->id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) mcc_events++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) io_events++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) queue_tail_inc(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (!io_events && !mcc_events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) /* no need to rearm if interrupt is only for IOs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) rearm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (mcc_events) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) queue_work(phba->wq, &pbe_eq->mcc_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) /* rearm for MCCQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) rearm = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (io_events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) irq_poll_sched(&pbe_eq->iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) hwi_ring_eq_db(phba, eq->id, 0, (io_events + mcc_events), rearm, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static void beiscsi_free_irqs(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (!phba->pcidev->msix_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) if (phba->pcidev->irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) free_irq(phba->pcidev->irq, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) phwi_context = phba->phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) for (i = 0; i <= phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) free_irq(pci_irq_vector(phba->pcidev, i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) &phwi_context->be_eq[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) kfree(phba->msi_name[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) static int beiscsi_init_irqs(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) struct pci_dev *pcidev = phba->pcidev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) int ret, i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (pcidev->msix_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) phba->msi_name[i] = kasprintf(GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) "beiscsi_%02x_%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) phba->shost->host_no, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (!phba->msi_name[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) goto free_msix_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) ret = request_irq(pci_irq_vector(pcidev, i),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) be_isr_msix, 0, phba->msi_name[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) &phwi_context->be_eq[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) "BM_%d : beiscsi_init_irqs-Failed to"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) "register msix for i = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) kfree(phba->msi_name[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) goto free_msix_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) phba->msi_name[i] = kasprintf(GFP_KERNEL, "beiscsi_mcc_%02x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) phba->shost->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) if (!phba->msi_name[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) goto free_msix_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) ret = request_irq(pci_irq_vector(pcidev, i), be_isr_mcc, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) phba->msi_name[i], &phwi_context->be_eq[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) "BM_%d : beiscsi_init_irqs-"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) "Failed to register beiscsi_msix_mcc\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) kfree(phba->msi_name[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) goto free_msix_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) "beiscsi", phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) "BM_%d : beiscsi_init_irqs-"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) "Failed to register irq\\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) free_msix_irqs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) for (j = i - 1; j >= 0; j--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) free_irq(pci_irq_vector(pcidev, i), &phwi_context->be_eq[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) kfree(phba->msi_name[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) void hwi_ring_cq_db(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) unsigned int id, unsigned int num_processed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) unsigned char rearm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) if (rearm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) val |= 1 << DB_CQ_REARM_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) /* Setting lower order CQ_ID Bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) val |= (id & DB_CQ_RING_ID_LOW_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) /* Setting Higher order CQ_ID Bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) DB_CQ_RING_ID_HIGH_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) << DB_CQ_HIGH_SET_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) iowrite32(val, phba->db_va + DB_CQ_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) struct sgl_handle *psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) spin_lock_irqsave(&phba->io_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) if (phba->io_sgl_hndl_avbl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) "BM_%d : In alloc_io_sgl_handle,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) " io_sgl_alloc_index=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) phba->io_sgl_alloc_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) psgl_handle = phba->io_sgl_hndl_base[phba->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) io_sgl_alloc_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) phba->io_sgl_hndl_avbl--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) if (phba->io_sgl_alloc_index == (phba->params.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) ios_per_ctrl - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) phba->io_sgl_alloc_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) phba->io_sgl_alloc_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) psgl_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) return psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) spin_lock_irqsave(&phba->io_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) "BM_%d : In free_,io_sgl_free_index=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) phba->io_sgl_free_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) * this can happen if clean_task is called on a task that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) * failed in xmit_task or alloc_pdu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) "BM_%d : Double Free in IO SGL io_sgl_free_index=%d, value there=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) phba->io_sgl_free_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) phba->io_sgl_hndl_base[phba->io_sgl_free_index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) phba->io_sgl_hndl_avbl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) phba->io_sgl_free_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) phba->io_sgl_free_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) static inline struct wrb_handle *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) unsigned int wrbs_per_cxn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) struct wrb_handle *pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) if (!pwrb_context->wrb_handles_available) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) pwrb_context->wrb_handles_available--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) pwrb_context->alloc_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) pwrb_context->alloc_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) if (pwrb_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) memset(pwrb_handle->pwrb, 0, sizeof(*pwrb_handle->pwrb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) return pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) * alloc_wrb_handle - To allocate a wrb handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) * @phba: The hba pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) * @cid: The cid to use for allocation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) * @pcontext: ptr to ptr to wrb context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) * This happens under session_lock until submission to chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) struct hwi_wrb_context **pcontext)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) /* return the context address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) *pcontext = pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) struct wrb_handle *pwrb_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) unsigned int wrbs_per_cxn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) pwrb_context->wrb_handles_available++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) if (pwrb_context->free_index == (wrbs_per_cxn - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) pwrb_context->free_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) pwrb_context->free_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) pwrb_handle->pio_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * free_wrb_handle - To free the wrb handle back to pool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * @phba: The hba pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) * @pwrb_context: The context to free from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) * @pwrb_handle: The wrb_handle to free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * This happens under session_lock until submission to chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) struct wrb_handle *pwrb_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) beiscsi_put_wrb_handle(pwrb_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) pwrb_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) phba->params.wrbs_per_cxn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) "wrb_handles_available=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) pwrb_handle, pwrb_context->free_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) pwrb_context->wrb_handles_available);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) struct sgl_handle *psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) if (phba->eh_sgl_hndl_avbl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) phba->eh_sgl_alloc_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) phba->eh_sgl_alloc_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) phba->eh_sgl_hndl_avbl--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) if (phba->eh_sgl_alloc_index ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) phba->eh_sgl_alloc_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) phba->eh_sgl_alloc_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) psgl_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) return psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) "BM_%d : In free_mgmt_sgl_handle,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) "eh_sgl_free_index=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) phba->eh_sgl_free_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) * this can happen if clean_task is called on a task that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) * failed in xmit_task or alloc_pdu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) "BM_%d : Double Free in eh SGL ,"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) "eh_sgl_free_index=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) phba->eh_sgl_free_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) phba->eh_sgl_hndl_avbl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) if (phba->eh_sgl_free_index ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) phba->eh_sgl_free_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) phba->eh_sgl_free_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) be_complete_io(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) struct iscsi_task *task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) struct common_sol_cqe *csol_cqe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) struct be_status_bhs *sts_bhs =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) (struct be_status_bhs *)io_task->cmd_bhs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) struct iscsi_conn *conn = beiscsi_conn->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) unsigned char *sense;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) u32 resid = 0, exp_cmdsn, max_cmdsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) u8 rsp, status, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) exp_cmdsn = csol_cqe->exp_cmdsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) max_cmdsn = (csol_cqe->exp_cmdsn +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) csol_cqe->cmd_wnd - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) rsp = csol_cqe->i_resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) status = csol_cqe->i_sts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) flags = csol_cqe->i_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) resid = csol_cqe->res_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) if (!task->sc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) if (io_task->scsi_cmnd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) scsi_dma_unmap(io_task->scsi_cmnd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) io_task->scsi_cmnd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) task->sc->result = (DID_OK << 16) | status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) task->sc->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) goto unmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) /* bidi not initially supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) task->sc->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) scsi_set_resid(task->sc, resid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) if (!status && (scsi_bufflen(task->sc) - resid <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) task->sc->underflow))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) task->sc->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) if (status == SAM_STAT_CHECK_CONDITION) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) u16 sense_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) sense = sts_bhs->sense_info + sizeof(unsigned short);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) sense_len = be16_to_cpu(*slen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) memcpy(task->sc->sense_buffer, sense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) conn->rxdata_octets += resid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) unmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) if (io_task->scsi_cmnd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) scsi_dma_unmap(io_task->scsi_cmnd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) io_task->scsi_cmnd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) be_complete_logout(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) struct iscsi_task *task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) struct common_sol_cqe *csol_cqe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) struct iscsi_logout_rsp *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) struct iscsi_conn *conn = beiscsi_conn->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) hdr = (struct iscsi_logout_rsp *)task->hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) hdr->opcode = ISCSI_OP_LOGOUT_RSP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) hdr->t2wait = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) hdr->t2retain = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) hdr->flags = csol_cqe->i_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) hdr->response = csol_cqe->i_resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) csol_cqe->cmd_wnd - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) hdr->dlength[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) hdr->dlength[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) hdr->dlength[2] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) hdr->hlength = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) hdr->itt = io_task->libiscsi_itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) struct iscsi_task *task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) struct common_sol_cqe *csol_cqe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) struct iscsi_tm_rsp *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) struct iscsi_conn *conn = beiscsi_conn->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) hdr = (struct iscsi_tm_rsp *)task->hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) hdr->flags = csol_cqe->i_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) hdr->response = csol_cqe->i_resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) csol_cqe->cmd_wnd - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) hdr->itt = io_task->libiscsi_itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) struct beiscsi_hba *phba, struct sol_cqe *psol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) uint16_t wrb_index, cid, cri_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) struct wrb_handle *pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) struct iscsi_session *session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) struct iscsi_task *task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) if (is_chip_be2_be3r(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) wrb_idx, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) cid, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) wrb_idx, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) cid, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) cri_index = BE_GET_CRI_FROM_CID(cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) session = beiscsi_conn->conn->session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) spin_lock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) task = pwrb_handle->pio_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) if (task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) __iscsi_put_task(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) spin_unlock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) struct iscsi_task *task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) struct common_sol_cqe *csol_cqe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) struct iscsi_nopin *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) struct iscsi_conn *conn = beiscsi_conn->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) hdr = (struct iscsi_nopin *)task->hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) hdr->flags = csol_cqe->i_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) csol_cqe->cmd_wnd - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) hdr->opcode = ISCSI_OP_NOOP_IN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) hdr->itt = io_task->libiscsi_itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) struct sol_cqe *psol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) struct common_sol_cqe *csol_cqe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) if (is_chip_be2_be3r(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) i_exp_cmd_sn, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) i_res_cnt, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) i_cmd_wnd, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) wrb_index, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) cid, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) hw_sts, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) i_resp, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) i_sts, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) i_flags, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) i_exp_cmd_sn, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) i_res_cnt, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) wrb_index, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) cid, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) hw_sts, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) i_cmd_wnd, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) cmd_cmpl, psol))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) i_sts, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) i_sts, psol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) u, psol))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) o, psol))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) struct beiscsi_hba *phba, struct sol_cqe *psol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) struct iscsi_conn *conn = beiscsi_conn->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) struct iscsi_session *session = conn->session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) struct common_sol_cqe csol_cqe = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) struct wrb_handle *pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) struct iscsi_task *task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) uint16_t cri_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) uint8_t type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) /* Copy the elements to a common structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) adapter_get_sol_cqe(phba, psol, &csol_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) pwrb_handle = pwrb_context->pwrb_handle_basestd[
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) csol_cqe.wrb_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) spin_lock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) task = pwrb_handle->pio_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) if (!task) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) spin_unlock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) case HWH_TYPE_IO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) case HWH_TYPE_IO_RD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) ISCSI_OP_NOOP_OUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) be_complete_io(beiscsi_conn, task, &csol_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) case HWH_TYPE_LOGOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) be_complete_logout(beiscsi_conn, task, &csol_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) be_complete_tmf(beiscsi_conn, task, &csol_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) case HWH_TYPE_LOGIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) " hwi_complete_cmd- Solicited path\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) case HWH_TYPE_NOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) "BM_%d : In hwi_complete_cmd, unknown type = %d"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) "wrb_index 0x%x CID 0x%x\n", type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) csol_cqe.wrb_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) csol_cqe.cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) spin_unlock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) * ASYNC PDUs include
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) * a. Unsolicited NOP-In (target initiated NOP-In)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) * b. ASYNC Messages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) * c. Reject PDU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) * d. Login response
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) * These headers arrive unprocessed by the EP firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) * iSCSI layer processes them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) static unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) beiscsi_complete_pdu(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) struct pdu_base *phdr, void *pdata, unsigned int dlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) struct iscsi_conn *conn = beiscsi_conn->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) struct beiscsi_io_task *io_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) struct iscsi_hdr *login_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) struct iscsi_task *task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) u8 code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) code = AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) switch (code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) case ISCSI_OP_NOOP_IN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) pdata = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) dlen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) case ISCSI_OP_ASYNC_EVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) case ISCSI_OP_REJECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) WARN_ON(!pdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) WARN_ON(!(dlen == 48));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) "BM_%d : In ISCSI_OP_REJECT\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) case ISCSI_OP_LOGIN_RSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) case ISCSI_OP_TEXT_RSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) task = conn->login_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) login_hdr = (struct iscsi_hdr *)phdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) login_hdr->itt = io_task->libiscsi_itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) "BM_%d : unrecognized async PDU opcode 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) __iscsi_complete_pdu(conn, (struct iscsi_hdr *)phdr, pdata, dlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) beiscsi_hdl_put_handle(struct hd_async_context *pasync_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) struct hd_async_handle *pasync_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) pasync_handle->is_final = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) pasync_handle->buffer_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) pasync_handle->in_use = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) list_del_init(&pasync_handle->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) beiscsi_hdl_purge_handles(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) struct hd_async_context *pasync_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) u16 cri)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) struct hd_async_handle *pasync_handle, *tmp_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) struct list_head *plist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) plist = &pasync_ctx->async_entry[cri].wq.list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wq.list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) pasync_ctx->async_entry[cri].wq.hdr_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) pasync_ctx->async_entry[cri].wq.bytes_received = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) pasync_ctx->async_entry[cri].wq.bytes_needed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) static struct hd_async_handle *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) struct hd_async_context *pasync_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) struct i_t_dpdu_cqe *pdpdu_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) u8 *header)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) struct hd_async_handle *pasync_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) struct be_bus_address phys_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) u16 cid, code, ci, cri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) u8 final, error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) u32 dpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) cid = beiscsi_conn->beiscsi_conn_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) cri = BE_GET_ASYNC_CRI_FROM_CID(cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) * This function is invoked to get the right async_handle structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) * from a given DEF PDU CQ entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) * - index in CQ entry gives the vertical index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) * - address in CQ entry is the offset where the DMA last ended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) * - final - no more notifications for this PDU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) if (is_chip_be2_be3r(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) dpl, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) index, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) final, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) dpl, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) index, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) final, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) * DB addr Hi/Lo is same for BE and SKH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) * Subtract the dataplacementlength to get to the base.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) phys_addr.u.a32.address_lo = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) db_addr_lo, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) phys_addr.u.a32.address_lo -= dpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) phys_addr.u.a32.address_hi = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) db_addr_hi, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) code = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe, code, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) switch (code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) case UNSOL_HDR_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) pasync_handle = pasync_ctx->async_entry[ci].header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) *header = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) case UNSOL_DATA_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) pasync_handle = pasync_ctx->async_entry[ci].data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) /* called only for above codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) if (pasync_handle->pa.u.a64.address != phys_addr.u.a64.address ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) pasync_handle->index != ci) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) /* driver bug - if ci does not match async handle index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) error = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) "BM_%d : cid %u async PDU handle mismatch - addr in %cQE %llx at %u:addr in CQE %llx ci %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) cid, pasync_handle->is_header ? 'H' : 'D',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) pasync_handle->pa.u.a64.address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) pasync_handle->index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) phys_addr.u.a64.address, ci);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) /* FW has stale address - attempt continuing by dropping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) * DEF PDU header and data buffers with errors should be simply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) * dropped as there are no consumers for it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) if (pasync_handle->in_use || !list_empty(&pasync_handle->link)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) "BM_%d : cid %d async PDU handle in use - code %d ci %d addr %llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) cid, code, ci, phys_addr.u.a64.address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) list_del_init(&pasync_handle->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) * Each CID is associated with unique CRI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) * ASYNC_CRI_FROM_CID mapping and CRI_FROM_CID are totaly different.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) pasync_handle->cri = cri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) pasync_handle->is_final = final;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) pasync_handle->buffer_len = dpl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) pasync_handle->in_use = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) return pasync_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) static unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) beiscsi_hdl_fwd_pdu(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) struct hd_async_context *pasync_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) u16 cri)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) struct iscsi_session *session = beiscsi_conn->conn->session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) struct hd_async_handle *pasync_handle, *plast_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) void *phdr = NULL, *pdata = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) u32 dlen = 0, status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) struct list_head *plist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) plist = &pasync_ctx->async_entry[cri].wq.list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) plast_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) list_for_each_entry(pasync_handle, plist, link) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) plast_handle = pasync_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) /* get the header, the first entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) if (!phdr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) phdr = pasync_handle->pbuffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) /* use first buffer to collect all the data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) if (!pdata) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) pdata = pasync_handle->pbuffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) dlen = pasync_handle->buffer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) if (!pasync_handle->buffer_len ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) (dlen + pasync_handle->buffer_len) >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) pasync_ctx->async_data.buffer_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) memcpy(pdata + dlen, pasync_handle->pbuffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) pasync_handle->buffer_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) dlen += pasync_handle->buffer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) if (!plast_handle->is_final) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) /* last handle should have final PDU notification from FW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) "BM_%d : cid %u %p fwd async PDU opcode %x with last handle missing - HL%u:DN%u:DR%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) beiscsi_conn->beiscsi_conn_cid, plast_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) pasync_ctx->async_entry[cri].wq.hdr_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) pasync_ctx->async_entry[cri].wq.bytes_needed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) pasync_ctx->async_entry[cri].wq.bytes_received);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) spin_lock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) status = beiscsi_complete_pdu(beiscsi_conn, phdr, pdata, dlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) spin_unlock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) static unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) beiscsi_hdl_gather_pdu(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) struct hd_async_context *pasync_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) struct hd_async_handle *pasync_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) unsigned int bytes_needed = 0, status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) u16 cri = pasync_handle->cri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) struct cri_wait_queue *wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) struct pdu_base *ppdu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) char *err = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) wq = &pasync_ctx->async_entry[cri].wq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) if (pasync_handle->is_header) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) /* check if PDU hdr is rcv'd when old hdr not completed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) if (wq->hdr_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) err = "incomplete";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) goto drop_pdu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) ppdu = pasync_handle->pbuffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) bytes_needed = AMAP_GET_BITS(struct amap_pdu_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) data_len_hi, ppdu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) bytes_needed <<= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) bytes_needed |= be16_to_cpu(AMAP_GET_BITS(struct amap_pdu_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) data_len_lo, ppdu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) wq->hdr_len = pasync_handle->buffer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) wq->bytes_received = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) wq->bytes_needed = bytes_needed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) list_add_tail(&pasync_handle->link, &wq->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) if (!bytes_needed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) pasync_ctx, cri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) /* check if data received has header and is needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) if (!wq->hdr_len || !wq->bytes_needed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) err = "header less";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) goto drop_pdu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) wq->bytes_received += pasync_handle->buffer_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) /* Something got overwritten? Better catch it here. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) if (wq->bytes_received > wq->bytes_needed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) err = "overflow";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) goto drop_pdu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) list_add_tail(&pasync_handle->link, &wq->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) if (wq->bytes_received == wq->bytes_needed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) pasync_ctx, cri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) drop_pdu:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) "BM_%d : cid %u async PDU %s - def-%c:HL%u:DN%u:DR%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) beiscsi_conn->beiscsi_conn_cid, err,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) pasync_handle->is_header ? 'H' : 'D',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) wq->hdr_len, wq->bytes_needed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) pasync_handle->buffer_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) /* discard this handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) /* free all the other handles in cri_wait_queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) /* try continuing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) beiscsi_hdq_post_handles(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) u8 header, u8 ulp_num, u16 nbuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) struct hd_async_handle *pasync_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) struct hd_async_context *pasync_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) struct phys_addr *pasync_sge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) u32 ring_id, doorbell = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) u32 doorbell_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) u16 prod, pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) if (header) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) pasync_sge = pasync_ctx->async_header.ring_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) pi = pasync_ctx->async_header.pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) doorbell_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) pasync_sge = pasync_ctx->async_data.ring_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) pi = pasync_ctx->async_data.pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) doorbell_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) for (prod = 0; prod < nbuf; prod++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) if (header)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) pasync_handle = pasync_ctx->async_entry[pi].header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) pasync_handle = pasync_ctx->async_entry[pi].data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) WARN_ON(pasync_handle->is_header != header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) WARN_ON(pasync_handle->index != pi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) /* setup the ring only once */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) if (nbuf == pasync_ctx->num_entries) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) /* note hi is lo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) pasync_sge[pi].hi = pasync_handle->pa.u.a32.address_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) pasync_sge[pi].lo = pasync_handle->pa.u.a32.address_hi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) if (++pi == pasync_ctx->num_entries)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) pi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) if (header)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) pasync_ctx->async_header.pi = pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) pasync_ctx->async_data.pi = pi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) doorbell |= (prod & DB_DEF_PDU_CQPROC_MASK) << DB_DEF_PDU_CQPROC_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) iowrite32(doorbell, phba->db_va + doorbell_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) beiscsi_hdq_process_compl(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) struct i_t_dpdu_cqe *pdpdu_cqe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) struct hd_async_handle *pasync_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) struct hd_async_context *pasync_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) u8 ulp_num, consumed, header = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) u16 cid_cri;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) cid_cri = BE_GET_CRI_FROM_CID(beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) ulp_num = BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cid_cri);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) pasync_handle = beiscsi_hdl_get_handle(beiscsi_conn, pasync_ctx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) pdpdu_cqe, &header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) if (is_chip_be2_be3r(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) num_cons, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) num_cons, pdpdu_cqe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) if (pasync_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) beiscsi_hdl_gather_pdu(beiscsi_conn, pasync_ctx, pasync_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) /* num_cons indicates number of 8 RQEs consumed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) if (consumed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) struct be_queue_info *mcc_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) struct be_mcc_compl *mcc_compl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) unsigned int num_processed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) mcc_cq = &phba->ctrl.mcc_obj.cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) mcc_compl = queue_tail_node(mcc_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) if (beiscsi_hba_in_error(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) if (num_processed >= 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) hwi_ring_cq_db(phba, mcc_cq->id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) num_processed, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) num_processed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) beiscsi_process_async_event(phba, mcc_compl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) beiscsi_process_mcc_compl(&phba->ctrl, mcc_compl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) mcc_compl->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) queue_tail_inc(mcc_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) mcc_compl = queue_tail_node(mcc_cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) num_processed++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) if (num_processed > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) static void beiscsi_mcc_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) pbe_eq = container_of(work, struct be_eq_obj, mcc_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) phba = pbe_eq->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) beiscsi_process_mcc_cq(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) /* rearm EQ for further interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) if (!beiscsi_hba_in_error(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) * beiscsi_process_cq()- Process the Completion Queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) * @pbe_eq: Event Q on which the Completion has come
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) * @budget: Max number of events to processed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) * return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) * Number of Completion Entries processed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) struct be_queue_info *cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) struct sol_cqe *sol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) unsigned int total = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) unsigned int num_processed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) unsigned short code = 0, cid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) uint16_t cri_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) struct beiscsi_conn *beiscsi_conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) struct beiscsi_endpoint *beiscsi_ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) struct iscsi_endpoint *ep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) cq = pbe_eq->cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) sol = queue_tail_node(cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) phba = pbe_eq->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) CQE_VALID_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) if (beiscsi_hba_in_error(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) code = (sol->dw[offsetof(struct amap_sol_cqe, code) / 32] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) CQE_CODE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) /* Get the CID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) if (is_chip_be2_be3r(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) if ((code == DRIVERMSG_NOTIFY) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) (code == UNSOL_HDR_NOTIFY) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) (code == UNSOL_DATA_NOTIFY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) cid = AMAP_GET_BITS(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) struct amap_i_t_dpdu_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) cid, sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) cid, sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) cri_index = BE_GET_CRI_FROM_CID(cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) ep = phba->ep_array[cri_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) if (ep == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) /* connection has already been freed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) * just move on to next one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) "BM_%d : proc cqe of disconn ep: cid %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) goto proc_next_cqe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) beiscsi_ep = ep->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) beiscsi_conn = beiscsi_ep->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) /* replenish cq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) if (num_processed == 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) hwi_ring_cq_db(phba, cq->id, 32, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) num_processed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) total++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) switch (code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) case SOL_CMD_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) hwi_complete_cmd(beiscsi_conn, phba, sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) case DRIVERMSG_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) "BM_%d : Received %s[%d] on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) case UNSOL_HDR_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) "BM_%d : Received %s[%d] on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) spin_lock_bh(&phba->async_pdu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) beiscsi_hdq_process_compl(beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) (struct i_t_dpdu_cqe *)sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) spin_unlock_bh(&phba->async_pdu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) case UNSOL_DATA_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) "BM_%d : Received %s[%d] on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) spin_lock_bh(&phba->async_pdu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) beiscsi_hdq_process_compl(beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) (struct i_t_dpdu_cqe *)sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) spin_unlock_bh(&phba->async_pdu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) case CXN_INVALIDATE_INDEX_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) case CMD_INVALIDATED_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) case CXN_INVALIDATE_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) "BM_%d : Ignoring %s[%d] on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) case CXN_KILLED_HDR_DIGEST_ERR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) case SOL_CMD_KILLED_DATA_DIGEST_ERR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) case CMD_KILLED_INVALID_STATSN_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) case CMD_KILLED_INVALID_R2T_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) case CMD_CXN_KILLED_LUN_INVALID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) case CMD_CXN_KILLED_ICD_INVALID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) case CMD_CXN_KILLED_ITT_INVALID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) case CMD_CXN_KILLED_SEQ_OUTOFORDER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) "BM_%d : Dropping %s[%d] on DPDU ring on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) spin_lock_bh(&phba->async_pdu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) /* driver consumes the entry and drops the contents */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) beiscsi_hdq_process_compl(beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) (struct i_t_dpdu_cqe *)sol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) spin_unlock_bh(&phba->async_pdu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) case CXN_KILLED_BURST_LEN_MISMATCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) case CXN_KILLED_AHS_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) case CXN_KILLED_UNKNOWN_HDR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) case CXN_KILLED_STALE_ITT_TTT_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) case CXN_KILLED_INVALID_ITT_TTT_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) case CXN_KILLED_TIMED_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) case CXN_KILLED_FIN_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) case CXN_KILLED_RST_SENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) case CXN_KILLED_RST_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) case CXN_KILLED_BAD_WRB_INDEX_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) case CXN_KILLED_OVER_RUN_RESIDUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) case CXN_KILLED_UNDER_RUN_RESIDUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) "BM_%d : Event %s[%d] received on CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) cqe_desc[code], code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) if (beiscsi_conn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) iscsi_conn_failure(beiscsi_conn->conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) ISCSI_ERR_CONN_FAILED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) "BM_%d : Invalid CQE Event Received Code : %d"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) "CID 0x%x...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) code, cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) proc_next_cqe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) queue_tail_inc(cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) sol = queue_tail_node(cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) num_processed++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) if (total == budget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) hwi_ring_cq_db(phba, cq->id, num_processed, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) return total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) static int be_iopoll(struct irq_poll *iop, int budget)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) unsigned int ret, io_events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) struct be_eq_entry *eqe = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) struct be_queue_info *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) phba = pbe_eq->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) if (beiscsi_hba_in_error(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) irq_poll_complete(iop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) io_events = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) eq = &pbe_eq->q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) EQE_VALID_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) queue_tail_inc(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) io_events++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) hwi_ring_eq_db(phba, eq->id, 1, io_events, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) ret = beiscsi_process_cq(pbe_eq, budget);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) pbe_eq->cq_count += ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) if (ret < budget) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) irq_poll_complete(iop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) pbe_eq->q.id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) if (!beiscsi_hba_in_error(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) unsigned int num_sg, struct beiscsi_io_task *io_task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) struct iscsi_sge *psgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) unsigned int sg_len, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) unsigned int sge_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) unsigned long long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) struct scatterlist *l_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) unsigned int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) io_task->bhs_pa.u.a32.address_lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) io_task->bhs_pa.u.a32.address_hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) l_sg = sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) for (index = 0; (index < num_sg) && (index < 2); index++,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) sg = sg_next(sg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) if (index == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) sg_len = sg_dma_len(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) addr = (u64) sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) sge0_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) lower_32_bits(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) sge0_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) upper_32_bits(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) sge0_len, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) sge_len = sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) pwrb, sge_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) sg_len = sg_dma_len(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) addr = (u64) sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) sge1_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) lower_32_bits(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) sge1_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) upper_32_bits(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) sge1_len, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) io_task->bhs_pa.u.a32.address_hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) io_task->bhs_pa.u.a32.address_lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) if (num_sg == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) } else if (num_sg == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) sg = l_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) psgl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) psgl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) sg_len = sg_dma_len(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) addr = (u64) sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) lower_32_bits(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) upper_32_bits(addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) offset += sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) psgl--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) unsigned int num_sg, struct beiscsi_io_task *io_task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) struct iscsi_sge *psgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) unsigned int sg_len, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) unsigned int sge_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) unsigned long long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) struct scatterlist *l_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) unsigned int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) io_task->bhs_pa.u.a32.address_lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) io_task->bhs_pa.u.a32.address_hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) l_sg = sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) for (index = 0; (index < num_sg) && (index < 2); index++,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) sg = sg_next(sg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) if (index == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) sg_len = sg_dma_len(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) addr = (u64) sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) ((u32)(addr & 0xFFFFFFFF)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) ((u32)(addr >> 32)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) sge_len = sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) pwrb, sge_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) sg_len = sg_dma_len(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) addr = (u64) sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) ((u32)(addr & 0xFFFFFFFF)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) ((u32)(addr >> 32)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) io_task->bhs_pa.u.a32.address_hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) io_task->bhs_pa.u.a32.address_lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) if (num_sg == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) } else if (num_sg == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) sg = l_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) psgl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) psgl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) sg_len = sg_dma_len(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) addr = (u64) sg_dma_address(sg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) (addr & 0xFFFFFFFF));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) (addr >> 32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) offset += sg_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) psgl--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) * hwi_write_buffer()- Populate the WRB with task info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) * @pwrb: ptr to the WRB entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) * @task: iscsi task which is to be executed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) struct iscsi_sge *psgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) struct beiscsi_conn *beiscsi_conn = io_task->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) uint8_t dsp_value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) io_task->bhs_pa.u.a32.address_lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) io_task->bhs_pa.u.a32.address_hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) if (task->data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) /* Check for the data_count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) dsp_value = (task->data_count) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) if (is_chip_be2_be3r(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) pwrb, dsp_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) pwrb, dsp_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) /* Map addr only if there is data_count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) if (dsp_value) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) io_task->mtask_addr = dma_map_single(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) task->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) task->data_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) if (dma_mapping_error(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) io_task->mtask_addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) io_task->mtask_data_count = task->data_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) io_task->mtask_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) lower_32_bits(io_task->mtask_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) upper_32_bits(io_task->mtask_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) task->data_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) io_task->mtask_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) io_task->bhs_pa.u.a32.address_hi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) io_task->bhs_pa.u.a32.address_lo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) if (task->data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) psgl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) psgl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) if (task->data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) lower_32_bits(io_task->mtask_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) upper_32_bits(io_task->mtask_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) * beiscsi_find_mem_req()- Find mem needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) * @phba: ptr to HBA struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) uint8_t mem_descr_index, ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) unsigned int num_async_pdu_buf_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) BE_ISCSI_PDU_HEADER_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) sizeof(struct hwi_context_memory);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) * (phba->params.wrbs_per_cxn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) * phba->params.cxns_per_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) wrb_sz_per_cxn = sizeof(struct wrb_handle) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) (phba->params.wrbs_per_cxn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) phba->params.cxns_per_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) phba->params.icds_per_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) num_async_pdu_buf_sgl_pages =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) sizeof(struct phys_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) num_async_pdu_buf_pages =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) phba->params.defpdu_hdr_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) num_async_pdu_data_pages =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) phba->params.defpdu_data_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) num_async_pdu_data_sgl_pages =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) sizeof(struct phys_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) BEISCSI_GET_CID_COUNT(phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) num_async_pdu_buf_pages *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) num_async_pdu_data_pages *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) num_async_pdu_buf_sgl_pages *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) num_async_pdu_data_sgl_pages *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) sizeof(struct hd_async_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) sizeof(struct hd_async_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) phba->mem_req[mem_descr_index] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) sizeof(struct hd_async_context) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) sizeof(struct hd_async_entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) dma_addr_t bus_add;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) struct mem_array *mem_arr, *mem_arr_orig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) unsigned int i, j, alloc_size, curr_alloc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) if (!phba->phwi_ctrlr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) /* Allocate memory for wrb_context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) phwi_ctrlr->wrb_context = kcalloc(phba->params.cxns_per_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) sizeof(struct hwi_wrb_context),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) if (!phwi_ctrlr->wrb_context) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) kfree(phba->phwi_ctrlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) if (!phba->init_mem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) kfree(phwi_ctrlr->wrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) kfree(phba->phwi_ctrlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) mem_arr_orig = kmalloc_array(BEISCSI_MAX_FRAGS_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) sizeof(*mem_arr_orig),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) if (!mem_arr_orig) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) kfree(phba->init_mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) kfree(phwi_ctrlr->wrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) kfree(phba->phwi_ctrlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) mem_descr = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) for (i = 0; i < SE_MEM_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) if (!phba->mem_req[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) mem_descr->mem_array = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) mem_descr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) mem_arr = mem_arr_orig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) alloc_size = phba->mem_req[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) memset(mem_arr, 0, sizeof(struct mem_array) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) BEISCSI_MAX_FRAGS_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) mem_arr->virtual_address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) dma_alloc_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) curr_alloc_size, &bus_add, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) if (!mem_arr->virtual_address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) if (curr_alloc_size <= BE_MIN_MEM_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) goto free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) if (curr_alloc_size -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) rounddown_pow_of_two(curr_alloc_size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) curr_alloc_size = rounddown_pow_of_two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) (curr_alloc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) curr_alloc_size = curr_alloc_size / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) mem_arr->bus_address.u.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) a64.address = (__u64) bus_add;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) mem_arr->size = curr_alloc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) alloc_size -= curr_alloc_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) curr_alloc_size = min(be_max_phys_size *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) 1024, alloc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) j++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) mem_arr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) } while (alloc_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) mem_descr->num_elements = j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) mem_descr->size_in_bytes = phba->mem_req[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) mem_descr->mem_array = kmalloc_array(j, sizeof(*mem_arr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) if (!mem_descr->mem_array)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) goto free_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) memcpy(mem_descr->mem_array, mem_arr_orig,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) sizeof(struct mem_array) * j);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) mem_descr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) kfree(mem_arr_orig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) free_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) mem_descr->num_elements = j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) while ((i) || (j)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) for (j = mem_descr->num_elements; j > 0; j--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) dma_free_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) mem_descr->mem_array[j - 1].size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) mem_descr->mem_array[j - 1].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) virtual_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) (unsigned long)mem_descr->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) mem_array[j - 1].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) bus_address.u.a64.address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) if (i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) i--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) kfree(mem_descr->mem_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) mem_descr--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) kfree(mem_arr_orig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) kfree(phba->init_mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) kfree(phba->phwi_ctrlr->wrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) kfree(phba->phwi_ctrlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) static int beiscsi_get_memory(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) beiscsi_find_mem_req(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) return beiscsi_alloc_mem(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) static void iscsi_init_global_templates(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) struct pdu_data_out *pdata_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) struct pdu_nop_out *pnop_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) mem_descr = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) mem_descr += ISCSI_MEM_GLOBAL_HEADER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) pdata_out =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) IIOC_SCSI_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) pnop_out =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) struct hwi_context_memory *phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) struct wrb_handle *pwrb_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) struct iscsi_wrb *pwrb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) unsigned int num_cxn_wrbh = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) unsigned int num_cxn_wrb = 0, j, idx = 0, index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) mem_descr_wrbh = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) mem_descr_wrbh += HWI_MEM_WRBH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) mem_descr_wrb = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) mem_descr_wrb += HWI_MEM_WRB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) /* Allocate memory for WRBQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) phwi_ctxt = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) phwi_ctxt->be_wrbq = kcalloc(phba->params.cxns_per_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) sizeof(struct be_queue_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) if (!phwi_ctxt->be_wrbq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) "BM_%d : WRBQ Mem Alloc Failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) pwrb_context = &phwi_ctrlr->wrb_context[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) pwrb_context->pwrb_handle_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) kcalloc(phba->params.wrbs_per_cxn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) sizeof(struct wrb_handle *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) if (!pwrb_context->pwrb_handle_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) "BM_%d : Mem Alloc Failed. Failing to load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) goto init_wrb_hndl_failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) pwrb_context->pwrb_handle_basestd =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) kcalloc(phba->params.wrbs_per_cxn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) sizeof(struct wrb_handle *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) if (!pwrb_context->pwrb_handle_basestd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) "BM_%d : Mem Alloc Failed. Failing to load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) goto init_wrb_hndl_failed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) if (!num_cxn_wrbh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) pwrb_handle =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) mem_descr_wrbh->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) ((sizeof(struct wrb_handle)) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) phba->params.wrbs_per_cxn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) pwrb_context->alloc_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) pwrb_context->wrb_handles_available = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) pwrb_context->free_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) if (num_cxn_wrbh) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) pwrb_context->pwrb_handle_base[j] = pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) pwrb_context->pwrb_handle_basestd[j] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) pwrb_context->wrb_handles_available++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) pwrb_handle->wrb_index = j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) pwrb_handle++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) num_cxn_wrbh--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) spin_lock_init(&pwrb_context->wrb_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) pwrb_context = &phwi_ctrlr->wrb_context[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) if (!num_cxn_wrb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) ((sizeof(struct iscsi_wrb) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) phba->params.wrbs_per_cxn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) if (num_cxn_wrb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) pwrb_handle = pwrb_context->pwrb_handle_base[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) pwrb_handle->pwrb = pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) pwrb++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) num_cxn_wrb--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) init_wrb_hndl_failed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) for (j = index; j > 0; j--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) pwrb_context = &phwi_ctrlr->wrb_context[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) kfree(pwrb_context->pwrb_handle_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) kfree(pwrb_context->pwrb_handle_basestd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) uint8_t ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) struct hba_parameters *p = &phba->params;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) struct hd_async_context *pasync_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) struct hd_async_handle *pasync_header_h, *pasync_data_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) unsigned int index, idx, num_per_mem, num_async_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) /* get async_ctx for each ULP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) (ulp_num * MEM_DESCR_OFFSET));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) (struct hd_async_context *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) mem_descr->mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) memset(pasync_ctx, 0, sizeof(*pasync_ctx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) pasync_ctx->async_entry =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) (struct hd_async_entry *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) ((long unsigned int)pasync_ctx +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) sizeof(struct hd_async_context));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) pasync_ctx->num_entries = BEISCSI_ASYNC_HDQ_SIZE(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) /* setup header buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) if (mem_descr->mem_array[0].virtual_address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) "BM_%d : hwi_init_async_pdu_ctx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) ulp_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) mem_descr->mem_array[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) virtual_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) "BM_%d : No Virtual address for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) pasync_ctx->async_header.pi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) pasync_ctx->async_header.buffer_size = p->defpdu_hdr_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) pasync_ctx->async_header.va_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) mem_descr->mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) pasync_ctx->async_header.pa_base.u.a64.address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) mem_descr->mem_array[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) bus_address.u.a64.address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) /* setup header buffer sgls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) if (mem_descr->mem_array[0].virtual_address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) "BM_%d : hwi_init_async_pdu_ctx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) ulp_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) mem_descr->mem_array[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) virtual_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) "BM_%d : No Virtual address for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) pasync_ctx->async_header.ring_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) mem_descr->mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) /* setup header buffer handles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) if (mem_descr->mem_array[0].virtual_address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) "BM_%d : hwi_init_async_pdu_ctx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) ulp_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) mem_descr->mem_array[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) virtual_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) "BM_%d : No Virtual address for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) pasync_ctx->async_header.handle_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) mem_descr->mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) /* setup data buffer sgls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) if (mem_descr->mem_array[0].virtual_address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) "BM_%d : hwi_init_async_pdu_ctx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) ulp_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) mem_descr->mem_array[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) virtual_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) "BM_%d : No Virtual address for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) pasync_ctx->async_data.ring_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) mem_descr->mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) /* setup data buffer handles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) if (!mem_descr->mem_array[0].virtual_address)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) "BM_%d : No Virtual address for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) pasync_ctx->async_data.handle_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) mem_descr->mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) pasync_header_h =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) (struct hd_async_handle *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) pasync_ctx->async_header.handle_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) pasync_data_h =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) (struct hd_async_handle *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) pasync_ctx->async_data.handle_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) /* setup data buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) if (mem_descr->mem_array[0].virtual_address) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) "BM_%d : hwi_init_async_pdu_ctx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) ulp_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) mem_descr->mem_array[0].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) virtual_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) beiscsi_log(phba, KERN_WARNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) "BM_%d : No Virtual address for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) pasync_ctx->async_data.pi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) pasync_ctx->async_data.buffer_size = p->defpdu_data_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) pasync_ctx->async_data.va_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) mem_descr->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) pasync_ctx->async_data.pa_base.u.a64.address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) mem_descr->mem_array[idx].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) bus_address.u.a64.address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) num_async_data = ((mem_descr->mem_array[idx].size) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) phba->params.defpdu_data_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) num_per_mem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) for (index = 0; index < BEISCSI_ASYNC_HDQ_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) (phba, ulp_num); index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) pasync_header_h->cri = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) pasync_header_h->is_header = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) pasync_header_h->index = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) INIT_LIST_HEAD(&pasync_header_h->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) pasync_header_h->pbuffer =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) (void *)((unsigned long)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) (pasync_ctx->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) async_header.va_base) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) (p->defpdu_hdr_sz * index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) pasync_header_h->pa.u.a64.address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) pasync_ctx->async_header.pa_base.u.a64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) address + (p->defpdu_hdr_sz * index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) pasync_ctx->async_entry[index].header =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) pasync_header_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) pasync_header_h++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) wq.list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) pasync_data_h->cri = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) pasync_data_h->is_header = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) pasync_data_h->index = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) INIT_LIST_HEAD(&pasync_data_h->link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) if (!num_async_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) num_per_mem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) pasync_ctx->async_data.va_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) mem_descr->mem_array[idx].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) pasync_ctx->async_data.pa_base.u.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) a64.address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) mem_descr->mem_array[idx].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) bus_address.u.a64.address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) num_async_data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) ((mem_descr->mem_array[idx].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) size) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) phba->params.defpdu_data_sz);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) pasync_data_h->pbuffer =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) (void *)((unsigned long)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) (pasync_ctx->async_data.va_base) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) (p->defpdu_data_sz * num_per_mem));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) pasync_data_h->pa.u.a64.address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) pasync_ctx->async_data.pa_base.u.a64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) address + (p->defpdu_data_sz *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) num_per_mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) num_per_mem++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) num_async_data--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) pasync_ctx->async_entry[index].data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) pasync_data_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) pasync_data_h++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) be_sgl_create_contiguous(void *virtual_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) u64 physical_address, u32 length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) struct be_dma_mem *sgl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) WARN_ON(!virtual_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) WARN_ON(!physical_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) WARN_ON(!length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) WARN_ON(!sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) sgl->va = virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) sgl->dma = (unsigned long)physical_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) sgl->size = length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) memset(sgl, 0, sizeof(*sgl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) struct mem_array *pmem, struct be_dma_mem *sgl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) if (sgl->va)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) be_sgl_destroy_contiguous(sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) be_sgl_create_contiguous(pmem->virtual_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) pmem->bus_address.u.a64.address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) pmem->size, sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) struct mem_array *pmem, struct be_dma_mem *sgl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) if (sgl->va)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) be_sgl_destroy_contiguous(sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) pmem->bus_address.u.a64.address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) pmem->size, sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) static int be_fill_queue(struct be_queue_info *q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) u16 len, u16 entry_size, void *vaddress)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) struct be_dma_mem *mem = &q->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) memset(q, 0, sizeof(*q));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) q->len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) q->entry_size = entry_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) mem->size = len * entry_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) mem->va = vaddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) if (!mem->va)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) memset(mem->va, 0, mem->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) static int beiscsi_create_eqs(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) struct hwi_context_memory *phwi_context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) int ret = -ENOMEM, eq_for_mcc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) unsigned int i, num_eq_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) struct be_queue_info *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) struct be_dma_mem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) void *eq_vaddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) dma_addr_t paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) sizeof(struct be_eq_entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) if (phba->pcidev->msix_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) eq_for_mcc = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) eq_for_mcc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) eq = &phwi_context->be_eq[i].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) mem = &eq->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) phwi_context->be_eq[i].phba = phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) eq_vaddress = dma_alloc_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) num_eq_pages * PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) &paddr, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) if (!eq_vaddress) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) goto create_eq_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) mem->va = eq_vaddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) ret = be_fill_queue(eq, phba->params.num_eq_entries,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) sizeof(struct be_eq_entry), eq_vaddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) "BM_%d : be_fill_queue Failed for EQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) goto create_eq_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) mem->dma = paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) BEISCSI_EQ_DELAY_DEF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) "BM_%d : beiscsi_cmd_eq_create"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) "Failed for EQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) goto create_eq_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) "BM_%d : eqid = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) phwi_context->be_eq[i].q.id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) create_eq_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) eq = &phwi_context->be_eq[i].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) mem = &eq->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) if (mem->va)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) dma_free_coherent(&phba->pcidev->dev, num_eq_pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) * PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) mem->va, mem->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) static int beiscsi_create_cqs(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) struct hwi_context_memory *phwi_context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) unsigned int i, num_cq_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) struct be_queue_info *cq, *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065) struct be_dma_mem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) void *cq_vaddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) int ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) dma_addr_t paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) sizeof(struct sol_cqe));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) cq = &phwi_context->be_cq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) eq = &phwi_context->be_eq[i].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) pbe_eq->cq = cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) pbe_eq->phba = phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) mem = &cq->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) cq_vaddress = dma_alloc_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) num_cq_pages * PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) &paddr, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) if (!cq_vaddress) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) goto create_cq_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) ret = be_fill_queue(cq, phba->params.num_cq_entries,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) sizeof(struct sol_cqe), cq_vaddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) "BM_%d : be_fill_queue Failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) "for ISCSI CQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) goto create_cq_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) mem->dma = paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) false, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) "BM_%d : beiscsi_cmd_eq_create"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) "Failed for ISCSI CQ\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) goto create_cq_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) "BM_%d : iscsi cq_id is %d for eq_id %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) "iSCSI CQ CREATED\n", cq->id, eq->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) create_cq_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) cq = &phwi_context->be_cq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) mem = &cq->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) if (mem->va)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) dma_free_coherent(&phba->pcidev->dev, num_cq_pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) * PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) mem->va, mem->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) beiscsi_create_def_hdr(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) struct hwi_context_memory *phwi_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) struct hwi_controller *phwi_ctrlr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) unsigned int def_pdu_ring_sz, uint8_t ulp_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) unsigned int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) struct be_queue_info *dq, *cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) struct be_dma_mem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) void *dq_vaddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) dq = &phwi_context->be_def_hdrq[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) cq = &phwi_context->be_cq[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) mem = &dq->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) mem_descr = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) dq_vaddress = mem_descr->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) sizeof(struct phys_addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) sizeof(struct phys_addr), dq_vaddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) mem->dma = (unsigned long)mem_descr->mem_array[idx].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) bus_address.u.a64.address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) def_pdu_ring_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) phba->params.defpdu_hdr_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) BEISCSI_DEFQ_HDR, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) ulp_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) phwi_context->be_def_hdrq[ulp_num].id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) beiscsi_create_def_data(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) struct hwi_context_memory *phwi_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) struct hwi_controller *phwi_ctrlr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) unsigned int def_pdu_ring_sz, uint8_t ulp_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) unsigned int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) struct be_queue_info *dataq, *cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) struct be_dma_mem *mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) void *dq_vaddress;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) dataq = &phwi_context->be_def_dataq[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) cq = &phwi_context->be_cq[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) mem = &dataq->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) mem_descr = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) dq_vaddress = mem_descr->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) sizeof(struct phys_addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) sizeof(struct phys_addr), dq_vaddress);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) "BM_%d : be_fill_queue Failed for DEF PDU "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) "DATA on ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) mem->dma = (unsigned long)mem_descr->mem_array[idx].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) bus_address.u.a64.address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) def_pdu_ring_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) phba->params.defpdu_data_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) BEISCSI_DEFQ_DATA, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) "BM_%d be_cmd_create_default_pdu_queue"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) " Failed for DEF PDU DATA on ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) "BM_%d : iscsi def data id on ULP : %d is %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) ulp_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) phwi_context->be_def_dataq[ulp_num].id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) "BM_%d : DEFAULT PDU DATA RING CREATED"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) "on ULP : %d\n", ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) beiscsi_post_template_hdr(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) struct mem_array *pm_arr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) struct be_dma_mem sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) int status, ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) mem_descr = (struct be_mem_descriptor *)phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) (ulp_num * MEM_DESCR_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) pm_arr = mem_descr->mem_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) status = be_cmd_iscsi_post_template_hdr(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) &phba->ctrl, &sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) "BM_%d : Post Template HDR Failed for"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) "ULP_%d\n", ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) "BM_%d : Template HDR Pages Posted for"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) "ULP_%d\n", ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) beiscsi_post_pages(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) struct mem_array *pm_arr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) unsigned int page_offset, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) struct be_dma_mem sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) int status, ulp_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) mem_descr = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) mem_descr += HWI_MEM_SGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) pm_arr = mem_descr->mem_array;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) for (i = 0; i < mem_descr->num_elements; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) page_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) (pm_arr->size / PAGE_SIZE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) page_offset += pm_arr->size / PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) "BM_%d : post sgl failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) pm_arr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) "BM_%d : POSTED PAGES\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) struct be_dma_mem *mem = &q->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) if (mem->va) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) dma_free_coherent(&phba->pcidev->dev, mem->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) mem->va, mem->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) mem->va = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) u16 len, u16 entry_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) struct be_dma_mem *mem = &q->dma_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) memset(q, 0, sizeof(*q));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) q->len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) q->entry_size = entry_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) mem->size = len * entry_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) mem->va = dma_alloc_coherent(&phba->pcidev->dev, mem->size, &mem->dma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) if (!mem->va)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) struct hwi_context_memory *phwi_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) struct hwi_controller *phwi_ctrlr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) unsigned int num_wrb_rings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) u64 pa_addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) unsigned int idx, num, i, ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) struct mem_array *pwrb_arr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) void *wrb_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) struct be_dma_mem sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) uint8_t ulp_count = 0, ulp_base_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) mem_descr = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) mem_descr += HWI_MEM_WRB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) pwrb_arr = kmalloc_array(phba->params.cxns_per_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) sizeof(*pwrb_arr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) if (!pwrb_arr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) "BM_%d : Memory alloc failed in create wrb ring.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) num_wrb_rings = mem_descr->mem_array[idx].size /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) if (num_wrb_rings) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) pwrb_arr[num].virtual_address = wrb_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) pwrb_arr[num].size = phba->params.wrbs_per_cxn *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) sizeof(struct iscsi_wrb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) wrb_vaddr += pwrb_arr[num].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) pa_addr_lo += pwrb_arr[num].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) num_wrb_rings--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) pa_addr_lo = mem_descr->mem_array[idx].\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) bus_address.u.a64.address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) num_wrb_rings = mem_descr->mem_array[idx].size /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) (phba->params.wrbs_per_cxn *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) sizeof(struct iscsi_wrb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) pwrb_arr[num].virtual_address = wrb_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) pwrb_arr[num].bus_address.u.a64.address\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) = pa_addr_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) pwrb_arr[num].size = phba->params.wrbs_per_cxn *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) sizeof(struct iscsi_wrb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) wrb_vaddr += pwrb_arr[num].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) pa_addr_lo += pwrb_arr[num].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) num_wrb_rings--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) /* Get the ULP Count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) ulp_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) ulp_base_num = ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) cid_count_ulp[ulp_num] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) BEISCSI_GET_CID_COUNT(phba, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) if (ulp_count > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) if (!cid_count_ulp[ulp_base_num])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) ulp_base_num = (ulp_base_num + 1) %
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) BEISCSI_ULP_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) cid_count_ulp[ulp_base_num]--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) &phwi_context->be_wrbq[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) &phwi_ctrlr->wrb_context[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) ulp_base_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) "BM_%d : wrbq create failed.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) kfree(pwrb_arr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) pwrb_context = &phwi_ctrlr->wrb_context[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) BE_SET_CID_TO_CRI(i, pwrb_context->cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) kfree(pwrb_arr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) static void free_wrb_handles(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) pwrb_context = &phwi_ctrlr->wrb_context[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) kfree(pwrb_context->pwrb_handle_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) kfree(pwrb_context->pwrb_handle_basestd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) struct be_ctrl_info *ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) struct be_dma_mem *ptag_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) struct be_queue_info *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) int i, tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) q = &phba->ctrl.mcc_obj.q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) for (i = 0; i < MAX_MCC_CMD; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) tag = i + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) if (!test_bit(MCC_TAG_STATE_RUNNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) &ctrl->ptag_state[tag].tag_state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) if (test_bit(MCC_TAG_STATE_TIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) &ctrl->ptag_state[tag].tag_state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) ptag_mem = &ctrl->ptag_state[tag].tag_mem_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) if (ptag_mem->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) dma_free_coherent(&ctrl->pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) ptag_mem->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) ptag_mem->va,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) ptag_mem->dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) ptag_mem->size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) * If MCC is still active and waiting then wake up the process.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) * We are here only because port is going offline. The process
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) * sees that (BEISCSI_HBA_ONLINE is cleared) and EIO error is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) * returned for the operation and allocated memory cleaned up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) if (waitqueue_active(&ctrl->mcc_wait[tag])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) ctrl->mcc_tag_status[tag] = MCC_STATUS_FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) ctrl->mcc_tag_status[tag] |= CQE_VALID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) wake_up_interruptible(&ctrl->mcc_wait[tag]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) * Control tag info gets reinitialized in enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) * so wait for the process to clear running state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) while (test_bit(MCC_TAG_STATE_RUNNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) &ctrl->ptag_state[tag].tag_state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) schedule_timeout_uninterruptible(HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) * For MCC with tag_states MCC_TAG_STATE_ASYNC and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) * MCC_TAG_STATE_IGNORE nothing needs to done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) if (q->created) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) be_queue_free(phba, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) q = &phba->ctrl.mcc_obj.cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) if (q->created) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) be_queue_free(phba, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) static int be_mcc_queues_create(struct beiscsi_hba *phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) struct hwi_context_memory *phwi_context)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) struct be_queue_info *q, *cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) struct be_ctrl_info *ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) /* Alloc MCC compl queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) cq = &phba->ctrl.mcc_obj.cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) sizeof(struct be_mcc_compl)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) /* Ask BE to create MCC compl queue; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) if (phba->pcidev->msix_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) if (beiscsi_cmd_cq_create(ctrl, cq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) &phwi_context->be_eq[phba->num_cpus].q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) false, true, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) goto mcc_cq_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) false, true, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) goto mcc_cq_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) /* Alloc MCC queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) q = &phba->ctrl.mcc_obj.q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) goto mcc_cq_destroy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) /* Ask BE to create MCC queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) if (beiscsi_cmd_mccq_create(phba, q, cq))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) goto mcc_q_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) mcc_q_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) be_queue_free(phba, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) mcc_cq_destroy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) mcc_cq_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) be_queue_free(phba, cq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) static void be2iscsi_enable_msix(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) int nvec = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) switch (phba->generation) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) case BE_GEN2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) case BE_GEN3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) nvec = BEISCSI_MAX_NUM_CPUS + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) case BE_GEN4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) nvec = phba->fw_config.eqid_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) nvec = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) /* if eqid_count == 1 fall back to INTX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) if (enable_msix && nvec > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) struct irq_affinity desc = { .post_vectors = 1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) if (pci_alloc_irq_vectors_affinity(phba->pcidev, 2, nvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, &desc) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) phba->num_cpus = nvec - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) phba->num_cpus = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) static void hwi_purge_eq(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) struct be_queue_info *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) struct be_eq_entry *eqe = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) int i, eq_msix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) unsigned int num_processed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) if (beiscsi_hba_in_error(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) if (phba->pcidev->msix_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) eq_msix = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) eq_msix = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) eq = &phwi_context->be_eq[i].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) num_processed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) & EQE_VALID_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) queue_tail_inc(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) eqe = queue_tail_node(eq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) num_processed++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) if (num_processed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) static void hwi_cleanup_port(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) struct be_queue_info *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) struct be_ctrl_info *ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) int i, eq_for_mcc, ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) * Purge all EQ entries that may have been left out. This is to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) * workaround a problem we've seen occasionally where driver gets an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) * interrupt with EQ entry bit set after stopping the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) hwi_purge_eq(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) be_cmd_iscsi_remove_template_hdr(ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) q = &phwi_context->be_wrbq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) if (q->created)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) kfree(phwi_context->be_wrbq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) free_wrb_handles(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) q = &phwi_context->be_def_hdrq[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) if (q->created)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) q = &phwi_context->be_def_dataq[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) if (q->created)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) for (i = 0; i < (phba->num_cpus); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) q = &phwi_context->be_cq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) if (q->created) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) be_queue_free(phba, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) be_mcc_queues_destroy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) if (phba->pcidev->msix_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) eq_for_mcc = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) eq_for_mcc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) q = &phwi_context->be_eq[i].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) if (q->created) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) be_queue_free(phba, q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) /* this ensures complete FW cleanup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) beiscsi_cmd_function_reset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) /* last communication, indicate driver is unloading */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) beiscsi_cmd_special_wrb(&phba->ctrl, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) static int hwi_init_port(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) unsigned int def_pdu_ring_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) struct be_ctrl_info *ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) int status, ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) u16 nbufs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) /* set port optic state to unknown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) phba->optic_state = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) status = beiscsi_create_eqs(phba, phwi_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) "BM_%d : EQ not created\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) status = be_mcc_queues_create(phba, phwi_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) if (status != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) status = beiscsi_check_supported_fw(ctrl, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) "BM_%d : Unsupported fw version\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) status = beiscsi_create_cqs(phba, phwi_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) "BM_%d : CQ not created\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) nbufs = phwi_context->pasync_ctx[ulp_num]->num_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) def_pdu_ring_sz = nbufs * sizeof(struct phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) status = beiscsi_create_def_hdr(phba, phwi_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) phwi_ctrlr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) def_pdu_ring_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) "BM_%d : Default Header not created for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) status = beiscsi_create_def_data(phba, phwi_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) phwi_ctrlr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) def_pdu_ring_sz,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) "BM_%d : Default Data not created for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) * Now that the default PDU rings have been created,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) * let EP know about it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_HDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) ulp_num, nbufs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_DATA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) ulp_num, nbufs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) status = beiscsi_post_pages(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) "BM_%d : Post SGL Pages Failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) status = beiscsi_post_template_hdr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) "BM_%d : Template HDR Posting for CXN Failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) "BM_%d : WRB Rings not created\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) goto error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) uint16_t async_arr_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) uint16_t cri = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) struct hd_async_context *pasync_ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) phwi_ctrlr, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) for (cri = 0; cri <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) phba->params.cxns_per_ctrl; cri++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) (phwi_ctrlr, cri))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) pasync_ctx->cid_to_async_cri_map[
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) phwi_ctrlr->wrb_context[cri].cid] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) async_arr_idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) "BM_%d : hwi_init_port success\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) "BM_%d : hwi_init_port failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) hwi_cleanup_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) static int hwi_init_controller(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) "BM_%d : phwi_ctrlr->phwi_ctxt=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) phwi_ctrlr->phwi_ctxt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) "than one element.Failing to load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) iscsi_init_global_templates(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837) if (beiscsi_init_wrb_handle(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) if (hwi_init_async_pdu_ctx(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) "BM_%d : hwi_init_async_pdu_ctx failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) if (hwi_init_port(phba) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) "BM_%d : hwi_init_controller failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) static void beiscsi_free_mem(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) struct be_mem_descriptor *mem_descr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) mem_descr = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) j = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) for (i = 0; i < SE_MEM_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) for (j = mem_descr->num_elements; j > 0; j--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) dma_free_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) mem_descr->mem_array[j - 1].size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) mem_descr->mem_array[j - 1].virtual_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) (unsigned long)mem_descr->mem_array[j - 1].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) bus_address.u.a64.address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) kfree(mem_descr->mem_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) mem_descr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) kfree(phba->init_mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876) kfree(phba->phwi_ctrlr->wrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) kfree(phba->phwi_ctrlr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) struct sgl_handle *psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) struct iscsi_sge *pfrag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) unsigned int arr_index, i, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) unsigned int ulp_icd_start, ulp_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) phba->io_sgl_hndl_avbl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889) phba->eh_sgl_hndl_avbl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) mem_descr_sglh = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) mem_descr_sglh += HWI_MEM_SGLH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) if (1 == mem_descr_sglh->num_elements) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) phba->io_sgl_hndl_base = kcalloc(phba->params.ios_per_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) sizeof(struct sgl_handle *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897) if (!phba->io_sgl_hndl_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) "BM_%d : Mem Alloc Failed. Failing to load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) phba->eh_sgl_hndl_base =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) kcalloc(phba->params.icds_per_ctrl -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) phba->params.ios_per_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) sizeof(struct sgl_handle *), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) if (!phba->eh_sgl_hndl_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) kfree(phba->io_sgl_hndl_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) "BM_%d : Mem Alloc Failed. Failing to load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) "BM_%d : HWI_MEM_SGLH is more than one element."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) "Failing to load\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) arr_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) while (idx < mem_descr_sglh->num_elements) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) sizeof(struct sgl_handle)); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) if (arr_index < phba->params.ios_per_ctrl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927) phba->io_sgl_hndl_base[arr_index] = psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) phba->io_sgl_hndl_avbl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) arr_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) phba->eh_sgl_hndl_base[arr_index -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) phba->params.ios_per_ctrl] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) arr_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935) phba->eh_sgl_hndl_avbl++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) psgl_handle++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942) "BM_%d : phba->io_sgl_hndl_avbl=%d"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) "phba->eh_sgl_hndl_avbl=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) phba->io_sgl_hndl_avbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945) phba->eh_sgl_hndl_avbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947) mem_descr_sg = phba->init_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948) mem_descr_sg += HWI_MEM_SGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) "\n BM_%d : mem_descr_sg->num_elements=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) mem_descr_sg->num_elements);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) arr_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961) while (idx < mem_descr_sg->num_elements) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) pfrag = mem_descr_sg->mem_array[idx].virtual_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) for (i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) i < (mem_descr_sg->mem_array[idx].size) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) if (arr_index < phba->params.ios_per_ctrl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) psgl_handle = phba->io_sgl_hndl_base[arr_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) psgl_handle = phba->eh_sgl_hndl_base[arr_index -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) phba->params.ios_per_ctrl];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973) psgl_handle->pfrag = pfrag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975) AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) pfrag += phba->params.num_sge_per_io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) psgl_handle->sgl_index = ulp_icd_start + arr_index++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) idx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) phba->io_sgl_free_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) phba->io_sgl_alloc_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983) phba->eh_sgl_free_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984) phba->eh_sgl_alloc_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) uint16_t i, ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) struct ulp_cid_info *ptr_cid_info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) if (!ptr_cid_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001) "BM_%d : Failed to allocate memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) "for ULP_CID_INFO for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) goto free_memory;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) /* Allocate memory for CID array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010) ptr_cid_info->cid_array =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) kcalloc(BEISCSI_GET_CID_COUNT(phba, ulp_num),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) sizeof(*ptr_cid_info->cid_array),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) if (!ptr_cid_info->cid_array) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016) "BM_%d : Failed to allocate memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017) "for CID_ARRAY for ULP : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) kfree(ptr_cid_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020) ptr_cid_info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) goto free_memory;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) phba, ulp_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) /* Save the cid_info_array ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) phba->cid_array_info[ulp_num] = ptr_cid_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032) phba->ep_array = kcalloc(phba->params.cxns_per_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) sizeof(struct iscsi_endpoint *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) if (!phba->ep_array) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) "BM_%d : Failed to allocate memory in "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) "hba_setup_cid_tbls\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) goto free_memory;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044) phba->conn_table = kcalloc(phba->params.cxns_per_ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) sizeof(struct beiscsi_conn *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047) if (!phba->conn_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) "BM_%d : Failed to allocate memory in"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) "hba_setup_cid_tbls\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) kfree(phba->ep_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) phba->ep_array = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) goto free_memory;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060) ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) ptr_cid_info = phba->cid_array_info[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) phba->phwi_ctrlr->wrb_context[i].cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) ptr_cid_info = phba->cid_array_info[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072) ptr_cid_info->cid_alloc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073) ptr_cid_info->cid_free = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) free_memory:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) ptr_cid_info = phba->cid_array_info[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) if (ptr_cid_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) kfree(ptr_cid_info->cid_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) kfree(ptr_cid_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086) phba->cid_array_info[ulp_num] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094) static void hwi_enable_intr(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) struct be_ctrl_info *ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) struct be_queue_info *eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) u8 __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101) u32 reg, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) u32 enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107) addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) reg = ioread32(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) if (!enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) "BM_%d : reg =x%08x addr=%p\n", reg, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) iowrite32(reg, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) if (!phba->pcidev->msix_enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) eq = &phwi_context->be_eq[0].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) "BM_%d : eq->id=%d\n", eq->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126) for (i = 0; i <= phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127) eq = &phwi_context->be_eq[i].q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129) "BM_%d : eq->id=%d\n", eq->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130) hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) static void hwi_disable_intr(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) struct be_ctrl_info *ctrl = &phba->ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) u32 reg = ioread32(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) if (enabled) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) iowrite32(reg, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148) "BM_%d : In hwi_disable_intr, Already Disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) static int beiscsi_init_port(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155) ret = hwi_init_controller(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) "BM_%d : init controller failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) ret = beiscsi_init_sgl_handle(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) "BM_%d : init sgl handles failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) goto cleanup_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) ret = hba_setup_cid_tbls(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171) "BM_%d : setup CID table failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) kfree(phba->io_sgl_hndl_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) kfree(phba->eh_sgl_hndl_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) goto cleanup_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) cleanup_port:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179) hwi_cleanup_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) static void beiscsi_cleanup_port(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) struct ulp_cid_info *ptr_cid_info = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) int ulp_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) kfree(phba->io_sgl_hndl_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) kfree(phba->eh_sgl_hndl_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) kfree(phba->ep_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) kfree(phba->conn_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) ptr_cid_info = phba->cid_array_info[ulp_num];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197) if (ptr_cid_info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) kfree(ptr_cid_info->cid_array);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) kfree(ptr_cid_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) phba->cid_array_info[ulp_num] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) * @beiscsi_conn: ptr to the conn to be cleaned up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) * @task: ptr to iscsi_task resource to be freed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) * Free driver mgmt resources binded to CXN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214) beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) struct iscsi_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) struct beiscsi_io_task *io_task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221) uint16_t cri_index = BE_GET_CRI_FROM_CID(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227) io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229) if (io_task->pwrb_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231) io_task->pwrb_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234) if (io_task->psgl_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) free_mgmt_sgl_handle(phba, io_task->psgl_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) io_task->psgl_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) if (io_task->mtask_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) dma_unmap_single(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241) io_task->mtask_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242) io_task->mtask_data_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244) io_task->mtask_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249) * beiscsi_cleanup_task()- Free driver resources of the task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) * @task: ptr to the iscsi task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253) static void beiscsi_cleanup_task(struct iscsi_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) struct iscsi_conn *conn = task->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) struct beiscsi_conn *beiscsi_conn = conn->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259) struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) uint16_t cri_index = BE_GET_CRI_FROM_CID(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263) beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266) pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268) if (io_task->cmd_bhs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269) dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270) io_task->bhs_pa.u.a64.address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) io_task->cmd_bhs = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) task->hdr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275) if (task->sc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276) if (io_task->pwrb_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277) free_wrb_handle(phba, pwrb_context,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278) io_task->pwrb_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279) io_task->pwrb_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) if (io_task->psgl_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283) free_io_sgl_handle(phba, io_task->psgl_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) io_task->psgl_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) if (io_task->scsi_cmnd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288) if (io_task->num_sg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289) scsi_dma_unmap(io_task->scsi_cmnd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) io_task->scsi_cmnd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) if (!beiscsi_conn->login_in_progress)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299) beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) struct beiscsi_offload_params *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302) struct wrb_handle *pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303) struct hwi_wrb_context *pwrb_context = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305) struct iscsi_task *task = beiscsi_conn->task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) struct iscsi_session *session = task->conn->session;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) u32 doorbell = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310) * We can always use 0 here because it is reserved by libiscsi for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311) * login/startup related tasks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313) beiscsi_conn->login_in_progress = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314) spin_lock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) beiscsi_cleanup_task(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316) spin_unlock_bh(&session->back_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319) &pwrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) /* Check for the adapter family */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) if (is_chip_be2_be3r(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323) beiscsi_offload_cxn_v0(params, pwrb_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) phba->init_mem,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) pwrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) beiscsi_offload_cxn_v2(params, pwrb_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328) pwrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330) be_dws_le_to_cpu(pwrb_handle->pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331) sizeof(struct iscsi_target_context_update_wrb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333) doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334) doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335) << DB_DEF_PDU_WRB_INDEX_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337) iowrite32(doorbell, phba->db_va +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) beiscsi_conn->doorbell_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341) * There is no completion for CONTEXT_UPDATE. The completion of next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) * WRB posted guarantees FW's processing and DMA'ing of it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343) * Use beiscsi_put_wrb_handle to put it back in the pool which makes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344) * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347) phba->params.wrbs_per_cxn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348) beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350) "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351) pwrb_handle, pwrb_context->free_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352) pwrb_context->wrb_handles_available);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355) static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) int *index, int *age)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358) *index = (int)itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) if (age)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360) *age = conn->session->age;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) * beiscsi_alloc_pdu - allocates pdu and related resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) * @task: libiscsi task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) * @opcode: opcode of pdu for task
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368) * This is called with the session lock held. It will allocate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369) * the wrb and sgl if needed for the command. And it will prep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) * the pdu's itt. beiscsi_parse_pdu will later translate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371) * the pdu itt to the libiscsi task itt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376) struct iscsi_conn *conn = task->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) struct beiscsi_conn *beiscsi_conn = conn->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379) struct hwi_wrb_context *pwrb_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) itt_t itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382) uint16_t cri_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384) dma_addr_t paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386) io_task->cmd_bhs = dma_pool_alloc(beiscsi_sess->bhs_pool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387) GFP_ATOMIC, &paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388) if (!io_task->cmd_bhs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390) io_task->bhs_pa.u.a64.address = paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391) io_task->libiscsi_itt = (itt_t)task->itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392) io_task->conn = beiscsi_conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394) task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395) task->hdr_max = sizeof(struct be_cmd_bhs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396) io_task->psgl_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397) io_task->pwrb_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) if (task->sc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400) io_task->psgl_handle = alloc_io_sgl_handle(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401) if (!io_task->psgl_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) "BM_%d : Alloc of IO_SGL_ICD Failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405) "for the CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406) beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) goto free_hndls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409) io_task->pwrb_handle = alloc_wrb_handle(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) beiscsi_conn->beiscsi_conn_cid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411) &io_task->pwrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412) if (!io_task->pwrb_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415) "BM_%d : Alloc of WRB_HANDLE Failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416) "for the CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) goto free_io_hndls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421) io_task->scsi_cmnd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423) beiscsi_conn->task = task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) if (!beiscsi_conn->login_in_progress) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) io_task->psgl_handle = (struct sgl_handle *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426) alloc_mgmt_sgl_handle(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) if (!io_task->psgl_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429) BEISCSI_LOG_IO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430) BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) "BM_%d : Alloc of MGMT_SGL_ICD Failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) "for the CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433) beiscsi_conn->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434) beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435) goto free_hndls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438) beiscsi_conn->login_in_progress = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439) beiscsi_conn->plogin_sgl_handle =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) io_task->psgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441) io_task->pwrb_handle =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442) alloc_wrb_handle(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443) beiscsi_conn->beiscsi_conn_cid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444) &io_task->pwrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) if (!io_task->pwrb_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447) BEISCSI_LOG_IO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448) BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) "BM_%d : Alloc of WRB_HANDLE Failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450) "for the CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451) beiscsi_conn->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452) beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453) goto free_mgmt_hndls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455) beiscsi_conn->plogin_wrb_handle =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456) io_task->pwrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459) io_task->psgl_handle =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) beiscsi_conn->plogin_sgl_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461) io_task->pwrb_handle =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) beiscsi_conn->plogin_wrb_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465) io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466) if (!io_task->psgl_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) BEISCSI_LOG_IO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469) BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470) "BM_%d : Alloc of MGMT_SGL_ICD Failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) "for the CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) beiscsi_conn->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474) goto free_hndls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) io_task->pwrb_handle =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477) alloc_wrb_handle(phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478) beiscsi_conn->beiscsi_conn_cid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479) &io_task->pwrb_context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480) if (!io_task->pwrb_handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483) "BM_%d : Alloc of WRB_HANDLE Failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) "for the CID : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485) beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486) goto free_mgmt_hndls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491) itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492) wrb_index << 16) | (unsigned int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493) (io_task->psgl_handle->sgl_index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494) io_task->pwrb_handle->pio_handle = task;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) io_task->cmd_bhs->iscsi_hdr.itt = itt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) free_io_hndls:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) free_io_sgl_handle(phba, io_task->psgl_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501) goto free_hndls;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) free_mgmt_hndls:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) free_mgmt_sgl_handle(phba, io_task->psgl_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504) io_task->psgl_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505) free_hndls:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507) cri_index = BE_GET_CRI_FROM_CID(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) beiscsi_conn->beiscsi_conn_cid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509) pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510) if (io_task->pwrb_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511) free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512) io_task->pwrb_handle = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514) io_task->bhs_pa.u.a64.address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515) io_task->cmd_bhs = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518) static int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) unsigned int num_sg, unsigned int xferlen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) unsigned int writedir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524) struct iscsi_conn *conn = task->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525) struct beiscsi_conn *beiscsi_conn = conn->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527) struct iscsi_wrb *pwrb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) unsigned int doorbell = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) pwrb = io_task->pwrb_handle->pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) io_task->bhs_len = sizeof(struct be_cmd_bhs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) if (writedir) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) INI_WR_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540) INI_RD_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545) type, pwrb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548) cpu_to_be16(*(unsigned short *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549) &io_task->cmd_bhs->iscsi_hdr.lun));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) be32_to_cpu(task->cmdsn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556) io_task->psgl_handle->sgl_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561) if (io_task->pwrb_context->plast_wrb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4563) io_task->pwrb_context->plast_wrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4564) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4565) io_task->pwrb_context->plast_wrb = pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4567) be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4569) doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4570) doorbell |= (io_task->pwrb_handle->wrb_index &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4571) DB_DEF_PDU_WRB_INDEX_MASK) <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4572) DB_DEF_PDU_WRB_INDEX_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4573) doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4574) iowrite32(doorbell, phba->db_va +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4575) beiscsi_conn->doorbell_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4576) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4579) static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4580) unsigned int num_sg, unsigned int xferlen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4581) unsigned int writedir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4584) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4585) struct iscsi_conn *conn = task->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4586) struct beiscsi_conn *beiscsi_conn = conn->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4587) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4588) struct iscsi_wrb *pwrb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4589) unsigned int doorbell = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4591) pwrb = io_task->pwrb_handle->pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4592) io_task->bhs_len = sizeof(struct be_cmd_bhs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4594) if (writedir) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4595) AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4596) INI_WR_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4597) AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4598) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4599) AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4600) INI_RD_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4601) AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4604) io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4605) type, pwrb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4607) AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4608) cpu_to_be16(*(unsigned short *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4609) &io_task->cmd_bhs->iscsi_hdr.lun));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4610) AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4611) AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4612) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4613) AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4614) be32_to_cpu(task->cmdsn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4615) AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4616) io_task->psgl_handle->sgl_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4618) hwi_write_sgl(pwrb, sg, num_sg, io_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4620) AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4621) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4622) if (io_task->pwrb_context->plast_wrb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4623) AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4624) io_task->pwrb_context->plast_wrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4625) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4626) io_task->pwrb_context->plast_wrb = pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4628) be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4630) doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4631) doorbell |= (io_task->pwrb_handle->wrb_index &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4632) DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4633) doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4635) iowrite32(doorbell, phba->db_va +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4636) beiscsi_conn->doorbell_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4637) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4640) static int beiscsi_mtask(struct iscsi_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4642) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4643) struct iscsi_conn *conn = task->conn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4644) struct beiscsi_conn *beiscsi_conn = conn->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4645) struct beiscsi_hba *phba = beiscsi_conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4646) struct iscsi_wrb *pwrb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4647) unsigned int doorbell = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4648) unsigned int cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4649) unsigned int pwrb_typeoffset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4650) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4652) cid = beiscsi_conn->beiscsi_conn_cid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4653) pwrb = io_task->pwrb_handle->pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4655) if (is_chip_be2_be3r(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4656) AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4657) be32_to_cpu(task->cmdsn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4658) AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4659) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4660) AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4661) io_task->psgl_handle->sgl_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4662) AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4663) task->data_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4664) AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4665) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4666) if (io_task->pwrb_context->plast_wrb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4667) AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4668) io_task->pwrb_context->plast_wrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4669) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4670) io_task->pwrb_context->plast_wrb = pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4672) pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4673) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4674) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4675) be32_to_cpu(task->cmdsn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4676) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4677) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4678) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4679) io_task->psgl_handle->sgl_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4680) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4681) task->data_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4682) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4683) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4684) if (io_task->pwrb_context->plast_wrb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4685) AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4686) io_task->pwrb_context->plast_wrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4687) io_task->pwrb_handle->wrb_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4688) io_task->pwrb_context->plast_wrb = pwrb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4690) pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4694) switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4695) case ISCSI_OP_LOGIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4696) AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4697) ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4698) ret = hwi_write_buffer(pwrb, task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4699) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4700) case ISCSI_OP_NOOP_OUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4701) if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4702) ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4703) if (is_chip_be2_be3r(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4704) AMAP_SET_BITS(struct amap_iscsi_wrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4705) dmsg, pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4706) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4707) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4708) dmsg, pwrb, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4709) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4710) ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4711) if (is_chip_be2_be3r(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4712) AMAP_SET_BITS(struct amap_iscsi_wrb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4713) dmsg, pwrb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4714) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4715) AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4716) dmsg, pwrb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4718) ret = hwi_write_buffer(pwrb, task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4719) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4720) case ISCSI_OP_TEXT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4721) ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4722) ret = hwi_write_buffer(pwrb, task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4723) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4724) case ISCSI_OP_SCSI_TMFUNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4725) ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4726) ret = hwi_write_buffer(pwrb, task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4727) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4728) case ISCSI_OP_LOGOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4729) ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4730) ret = hwi_write_buffer(pwrb, task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4731) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4733) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4734) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4735) "BM_%d : opcode =%d Not supported\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4736) task->hdr->opcode & ISCSI_OPCODE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4738) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4741) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4742) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4744) /* Set the task type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4745) io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4746) AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4747) AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4749) doorbell |= cid & DB_WRB_POST_CID_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4750) doorbell |= (io_task->pwrb_handle->wrb_index &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4751) DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4752) doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4753) iowrite32(doorbell, phba->db_va +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4754) beiscsi_conn->doorbell_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4755) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4758) static int beiscsi_task_xmit(struct iscsi_task *task)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4759) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4760) struct beiscsi_io_task *io_task = task->dd_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4761) struct scsi_cmnd *sc = task->sc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4762) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4763) struct scatterlist *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4764) int num_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4765) unsigned int writedir = 0, xferlen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4767) phba = io_task->conn->phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4768) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4769) * HBA in error includes BEISCSI_HBA_FW_TIMEOUT. IO path might be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4770) * operational if FW still gets heartbeat from EP FW. Is management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4771) * path really needed to continue further?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4772) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4773) if (!beiscsi_hba_is_online(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4774) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4776) if (!io_task->conn->login_in_progress)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4777) task->hdr->exp_statsn = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4779) if (!sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4780) return beiscsi_mtask(task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4782) io_task->scsi_cmnd = sc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4783) io_task->num_sg = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4784) num_sg = scsi_dma_map(sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4785) if (num_sg < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4786) beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4787) BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4788) "BM_%d : scsi_dma_map Failed "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4789) "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4790) be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4791) io_task->libiscsi_itt, scsi_bufflen(sc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4793) return num_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4795) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4796) * For scsi cmd task, check num_sg before unmapping in cleanup_task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4797) * For management task, cleanup_task checks mtask_addr before unmapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4798) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4799) io_task->num_sg = num_sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4800) xferlen = scsi_bufflen(sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4801) sg = scsi_sglist(sc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4802) if (sc->sc_data_direction == DMA_TO_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4803) writedir = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4804) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4805) writedir = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4807) return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4810) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4811) * beiscsi_bsg_request - handle bsg request from ISCSI transport
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4812) * @job: job to handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4813) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4814) static int beiscsi_bsg_request(struct bsg_job *job)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4815) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4816) struct Scsi_Host *shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4817) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4818) struct iscsi_bsg_request *bsg_req = job->request;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4819) int rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4820) unsigned int tag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4821) struct be_dma_mem nonemb_cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4822) struct be_cmd_resp_hdr *resp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4823) struct iscsi_bsg_reply *bsg_reply = job->reply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4824) unsigned short status, extd_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4826) shost = iscsi_job_to_shost(job);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4827) phba = iscsi_host_priv(shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4829) if (!beiscsi_hba_is_online(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4830) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4831) "BM_%d : HBA in error 0x%lx\n", phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4832) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4835) switch (bsg_req->msgcode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4836) case ISCSI_BSG_HST_VENDOR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4837) nonemb_cmd.va = dma_alloc_coherent(&phba->ctrl.pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4838) job->request_payload.payload_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4839) &nonemb_cmd.dma, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4840) if (nonemb_cmd.va == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4841) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4842) "BM_%d : Failed to allocate memory for "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4843) "beiscsi_bsg_request\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4844) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4846) tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4847) &nonemb_cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4848) if (!tag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4849) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4850) "BM_%d : MBX Tag Allocation Failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4852) dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4853) nonemb_cmd.va, nonemb_cmd.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4854) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4857) rc = wait_event_interruptible_timeout(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4858) phba->ctrl.mcc_wait[tag],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4859) phba->ctrl.mcc_tag_status[tag],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4860) msecs_to_jiffies(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4861) BEISCSI_HOST_MBX_TIMEOUT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4863) if (!test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4864) clear_bit(MCC_TAG_STATE_RUNNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4865) &phba->ctrl.ptag_state[tag].tag_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4866) dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4867) nonemb_cmd.va, nonemb_cmd.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4868) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4870) extd_status = (phba->ctrl.mcc_tag_status[tag] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4871) CQE_STATUS_ADDL_MASK) >> CQE_STATUS_ADDL_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4872) status = phba->ctrl.mcc_tag_status[tag] & CQE_STATUS_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4873) free_mcc_wrb(&phba->ctrl, tag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4874) resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4875) sg_copy_from_buffer(job->reply_payload.sg_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4876) job->reply_payload.sg_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4877) nonemb_cmd.va, (resp->response_length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4878) + sizeof(*resp)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4879) bsg_reply->reply_payload_rcv_len = resp->response_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4880) bsg_reply->result = status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4881) bsg_job_done(job, bsg_reply->result,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4882) bsg_reply->reply_payload_rcv_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4883) dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4884) nonemb_cmd.va, nonemb_cmd.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4885) if (status || extd_status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4886) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4887) "BM_%d : MBX Cmd Failed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4888) " status = %d extd_status = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4889) status, extd_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4891) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4892) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4893) rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4895) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4897) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4898) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4899) "BM_%d : Unsupported bsg command: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4900) bsg_req->msgcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4901) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4904) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4907) static void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4909) /* Set the logging parameter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4910) beiscsi_log_enable_init(phba, beiscsi_log_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4913) void beiscsi_start_boot_work(struct beiscsi_hba *phba, unsigned int s_handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4914) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4915) if (phba->boot_struct.boot_kset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4916) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4918) /* skip if boot work is already in progress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4919) if (test_and_set_bit(BEISCSI_HBA_BOOT_WORK, &phba->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4920) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4922) phba->boot_struct.retry = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4923) phba->boot_struct.tag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4924) phba->boot_struct.s_handle = s_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4925) phba->boot_struct.action = BEISCSI_BOOT_GET_SHANDLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4926) schedule_work(&phba->boot_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4927) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4929) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4930) * Boot flag info for iscsi-utilities
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4931) * Bit 0 Block valid flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4932) * Bit 1 Firmware booting selected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4933) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4934) #define BEISCSI_SYSFS_ISCSI_BOOT_FLAGS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4936) static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4937) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4938) struct beiscsi_hba *phba = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4939) struct mgmt_session_info *boot_sess = &phba->boot_struct.boot_sess;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4940) struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4941) char *str = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4942) int rc = -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4944) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4945) case ISCSI_BOOT_TGT_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4946) rc = sprintf(buf, "%.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4947) (int)strlen(boot_sess->target_name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4948) (char *)&boot_sess->target_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4949) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4950) case ISCSI_BOOT_TGT_IP_ADDR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4951) if (boot_conn->dest_ipaddr.ip_type == BEISCSI_IP_TYPE_V4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4952) rc = sprintf(buf, "%pI4\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4953) (char *)&boot_conn->dest_ipaddr.addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4954) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4955) rc = sprintf(str, "%pI6\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4956) (char *)&boot_conn->dest_ipaddr.addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4957) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4958) case ISCSI_BOOT_TGT_PORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4959) rc = sprintf(str, "%d\n", boot_conn->dest_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4960) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4962) case ISCSI_BOOT_TGT_CHAP_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4963) rc = sprintf(str, "%.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4964) boot_conn->negotiated_login_options.auth_data.chap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4965) target_chap_name_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4966) (char *)&boot_conn->negotiated_login_options.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4967) auth_data.chap.target_chap_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4968) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4969) case ISCSI_BOOT_TGT_CHAP_SECRET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4970) rc = sprintf(str, "%.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4971) boot_conn->negotiated_login_options.auth_data.chap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4972) target_secret_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4973) (char *)&boot_conn->negotiated_login_options.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4974) auth_data.chap.target_secret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4975) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4976) case ISCSI_BOOT_TGT_REV_CHAP_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4977) rc = sprintf(str, "%.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4978) boot_conn->negotiated_login_options.auth_data.chap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4979) intr_chap_name_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4980) (char *)&boot_conn->negotiated_login_options.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4981) auth_data.chap.intr_chap_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4982) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4983) case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4984) rc = sprintf(str, "%.*s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4985) boot_conn->negotiated_login_options.auth_data.chap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4986) intr_secret_length,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4987) (char *)&boot_conn->negotiated_login_options.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4988) auth_data.chap.intr_secret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4989) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4990) case ISCSI_BOOT_TGT_FLAGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4991) rc = sprintf(str, "%d\n", BEISCSI_SYSFS_ISCSI_BOOT_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4992) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4993) case ISCSI_BOOT_TGT_NIC_ASSOC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4994) rc = sprintf(str, "0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4995) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4996) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4997) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4998) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5000) static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5002) struct beiscsi_hba *phba = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5003) char *str = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5004) int rc = -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5006) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5007) case ISCSI_BOOT_INI_INITIATOR_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5008) rc = sprintf(str, "%s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5009) phba->boot_struct.boot_sess.initiator_iscsiname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5010) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5012) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5013) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5015) static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5016) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5017) struct beiscsi_hba *phba = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5018) char *str = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5019) int rc = -EPERM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5021) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5022) case ISCSI_BOOT_ETH_FLAGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5023) rc = sprintf(str, "%d\n", BEISCSI_SYSFS_ISCSI_BOOT_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5024) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5025) case ISCSI_BOOT_ETH_INDEX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5026) rc = sprintf(str, "0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5027) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5028) case ISCSI_BOOT_ETH_MAC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5029) rc = beiscsi_get_macaddr(str, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5030) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5032) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5033) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5035) static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5036) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5037) umode_t rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5039) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5040) case ISCSI_BOOT_TGT_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5041) case ISCSI_BOOT_TGT_IP_ADDR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5042) case ISCSI_BOOT_TGT_PORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5043) case ISCSI_BOOT_TGT_CHAP_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5044) case ISCSI_BOOT_TGT_CHAP_SECRET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5045) case ISCSI_BOOT_TGT_REV_CHAP_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5046) case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5047) case ISCSI_BOOT_TGT_NIC_ASSOC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5048) case ISCSI_BOOT_TGT_FLAGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5049) rc = S_IRUGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5050) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5051) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5052) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5053) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5055) static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5056) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5057) umode_t rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5059) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5060) case ISCSI_BOOT_INI_INITIATOR_NAME:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5061) rc = S_IRUGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5062) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5063) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5064) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5065) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5067) static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5068) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5069) umode_t rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5071) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5072) case ISCSI_BOOT_ETH_FLAGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5073) case ISCSI_BOOT_ETH_MAC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5074) case ISCSI_BOOT_ETH_INDEX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5075) rc = S_IRUGO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5076) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5078) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5079) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5081) static void beiscsi_boot_kobj_release(void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5082) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5083) struct beiscsi_hba *phba = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5085) scsi_host_put(phba->shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5086) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5088) static int beiscsi_boot_create_kset(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5089) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5090) struct boot_struct *bs = &phba->boot_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5091) struct iscsi_boot_kobj *boot_kobj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5093) if (bs->boot_kset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5094) __beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5095) "BM_%d: boot_kset already created\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5096) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5097) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5099) bs->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5100) if (!bs->boot_kset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5101) __beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5102) "BM_%d: boot_kset alloc failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5103) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5106) /* get shost ref because the show function will refer phba */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5107) if (!scsi_host_get(phba->shost))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5108) goto free_kset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5110) boot_kobj = iscsi_boot_create_target(bs->boot_kset, 0, phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5111) beiscsi_show_boot_tgt_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5112) beiscsi_tgt_get_attr_visibility,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5113) beiscsi_boot_kobj_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5114) if (!boot_kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5115) goto put_shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5117) if (!scsi_host_get(phba->shost))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5118) goto free_kset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5120) boot_kobj = iscsi_boot_create_initiator(bs->boot_kset, 0, phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5121) beiscsi_show_boot_ini_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5122) beiscsi_ini_get_attr_visibility,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5123) beiscsi_boot_kobj_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5124) if (!boot_kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5125) goto put_shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5127) if (!scsi_host_get(phba->shost))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5128) goto free_kset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5130) boot_kobj = iscsi_boot_create_ethernet(bs->boot_kset, 0, phba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5131) beiscsi_show_boot_eth_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5132) beiscsi_eth_get_attr_visibility,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5133) beiscsi_boot_kobj_release);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5134) if (!boot_kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5135) goto put_shost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5139) put_shost:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5140) scsi_host_put(phba->shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5141) free_kset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5142) iscsi_boot_destroy_kset(bs->boot_kset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5143) bs->boot_kset = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5144) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5147) static void beiscsi_boot_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5149) struct beiscsi_hba *phba =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5150) container_of(work, struct beiscsi_hba, boot_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5151) struct boot_struct *bs = &phba->boot_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5152) unsigned int tag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5154) if (!beiscsi_hba_is_online(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5155) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5157) beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5158) BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5159) "BM_%d : %s action %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5160) __func__, phba->boot_struct.action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5162) switch (phba->boot_struct.action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5163) case BEISCSI_BOOT_REOPEN_SESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5164) tag = beiscsi_boot_reopen_sess(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5165) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5166) case BEISCSI_BOOT_GET_SHANDLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5167) tag = __beiscsi_boot_get_shandle(phba, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5168) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5169) case BEISCSI_BOOT_GET_SINFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5170) tag = beiscsi_boot_get_sinfo(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5171) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5172) case BEISCSI_BOOT_LOGOUT_SESS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5173) tag = beiscsi_boot_logout_sess(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5174) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5175) case BEISCSI_BOOT_CREATE_KSET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5176) beiscsi_boot_create_kset(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5177) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5178) * updated boot_kset is made visible to all before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5179) * ending the boot work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5180) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5181) mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5182) clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5183) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5185) if (!tag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5186) if (bs->retry--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5187) schedule_work(&phba->boot_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5188) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5189) clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5193) static void beiscsi_eqd_update_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5195) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5196) struct be_set_eqd set_eqd[MAX_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5197) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5198) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5199) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5200) unsigned int pps, delta;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5201) struct be_aic_obj *aic;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5202) int eqd, i, num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5203) unsigned long now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5205) phba = container_of(work, struct beiscsi_hba, eqd_update.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5206) if (!beiscsi_hba_is_online(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5207) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5209) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5210) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5212) for (i = 0; i <= phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5213) aic = &phba->aic_obj[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5214) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5215) now = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5216) if (!aic->jiffies || time_before(now, aic->jiffies) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5217) pbe_eq->cq_count < aic->eq_prev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5218) aic->jiffies = now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5219) aic->eq_prev = pbe_eq->cq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5220) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5222) delta = jiffies_to_msecs(now - aic->jiffies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5223) pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5224) eqd = (pps / 1500) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5226) if (eqd < 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5227) eqd = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5228) eqd = min_t(u32, eqd, BEISCSI_EQ_DELAY_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5229) eqd = max_t(u32, eqd, BEISCSI_EQ_DELAY_MIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5231) aic->jiffies = now;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5232) aic->eq_prev = pbe_eq->cq_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5234) if (eqd != aic->prev_eqd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5235) set_eqd[num].delay_multiplier = (eqd * 65)/100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5236) set_eqd[num].eq_id = pbe_eq->q.id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5237) aic->prev_eqd = eqd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5238) num++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5241) if (num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5242) /* completion of this is ignored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5243) beiscsi_modify_eq_delay(phba, set_eqd, num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5245) schedule_delayed_work(&phba->eqd_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5246) msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5249) static void beiscsi_hw_tpe_check(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5250) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5251) struct beiscsi_hba *phba = from_timer(phba, t, hw_check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5252) u32 wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5254) /* if not TPE, do nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5255) if (!beiscsi_detect_tpe(phba))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5256) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5258) /* wait default 4000ms before recovering */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5259) wait = 4000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5260) if (phba->ue2rp > BEISCSI_UE_DETECT_INTERVAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5261) wait = phba->ue2rp - BEISCSI_UE_DETECT_INTERVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5262) queue_delayed_work(phba->wq, &phba->recover_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5263) msecs_to_jiffies(wait));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5266) static void beiscsi_hw_health_check(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5268) struct beiscsi_hba *phba = from_timer(phba, t, hw_check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5270) beiscsi_detect_ue(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5271) if (beiscsi_detect_ue(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5272) __beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5273) "BM_%d : port in error: %lx\n", phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5274) /* sessions are no longer valid, so first fail the sessions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5275) queue_work(phba->wq, &phba->sess_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5277) /* detect UER supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5278) if (!test_bit(BEISCSI_HBA_UER_SUPP, &phba->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5279) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5280) /* modify this timer to check TPE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5281) phba->hw_check.function = beiscsi_hw_tpe_check;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5284) mod_timer(&phba->hw_check,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5285) jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5288) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5289) * beiscsi_enable_port()- Enables the disabled port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5290) * Only port resources freed in disable function are reallocated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5291) * This is called in HBA error handling path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5292) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5293) * @phba: Instance of driver private structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5294) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5295) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5296) static int beiscsi_enable_port(struct beiscsi_hba *phba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5298) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5299) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5300) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5301) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5303) if (test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5304) __beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5305) "BM_%d : %s : port is online %lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5306) __func__, phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5307) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5310) ret = beiscsi_init_sliport(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5311) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5312) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5314) be2iscsi_enable_msix(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5316) beiscsi_get_params(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5317) beiscsi_set_host_data(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5318) /* Re-enable UER. If different TPE occurs then it is recoverable. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5319) beiscsi_set_uer_feature(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5321) phba->shost->max_id = phba->params.cxns_per_ctrl - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5322) phba->shost->can_queue = phba->params.ios_per_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5323) ret = beiscsi_init_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5324) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5325) __beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5326) "BM_%d : init port failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5327) goto disable_msix;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5330) for (i = 0; i < MAX_MCC_CMD; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5331) init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5332) phba->ctrl.mcc_tag[i] = i + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5333) phba->ctrl.mcc_tag_status[i + 1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5334) phba->ctrl.mcc_tag_available++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5337) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5338) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5339) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5340) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5341) irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5344) i = (phba->pcidev->msix_enabled) ? i : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5345) /* Work item for MCC handling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5346) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5347) INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5349) ret = beiscsi_init_irqs(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5350) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5351) __beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5352) "BM_%d : setup IRQs failed %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5353) goto cleanup_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5355) hwi_enable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5356) /* port operational: clear all error bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5357) set_bit(BEISCSI_HBA_ONLINE, &phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5358) __beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5359) "BM_%d : port online: 0x%lx\n", phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5361) /* start hw_check timer and eqd_update work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5362) schedule_delayed_work(&phba->eqd_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5363) msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5365) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5366) * Timer function gets modified for TPE detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5367) * Always reinit to do health check first.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5368) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5369) phba->hw_check.function = beiscsi_hw_health_check;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5370) mod_timer(&phba->hw_check,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5371) jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5372) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5374) cleanup_port:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5375) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5376) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5377) irq_poll_disable(&pbe_eq->iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5379) hwi_cleanup_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5381) disable_msix:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5382) pci_free_irq_vectors(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5383) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5386) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5387) * beiscsi_disable_port()- Disable port and cleanup driver resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5388) * This is called in HBA error handling and driver removal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5389) * @phba: Instance Priv structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5390) * @unload: indicate driver is unloading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5391) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5392) * Free the OS and HW resources held by the driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5393) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5394) static void beiscsi_disable_port(struct beiscsi_hba *phba, int unload)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5396) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5397) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5398) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5399) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5401) if (!test_and_clear_bit(BEISCSI_HBA_ONLINE, &phba->state))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5402) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5404) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5405) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5406) hwi_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5407) beiscsi_free_irqs(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5408) pci_free_irq_vectors(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5410) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5411) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5412) irq_poll_disable(&pbe_eq->iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5414) cancel_delayed_work_sync(&phba->eqd_update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5415) cancel_work_sync(&phba->boot_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5416) /* WQ might be running cancel queued mcc_work if we are not exiting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5417) if (!unload && beiscsi_hba_in_error(phba)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5418) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5419) cancel_work_sync(&pbe_eq->mcc_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5421) hwi_cleanup_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5422) beiscsi_cleanup_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5425) static void beiscsi_sess_work(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5427) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5429) phba = container_of(work, struct beiscsi_hba, sess_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5431) * This work gets scheduled only in case of HBA error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5432) * Old sessions are gone so need to be re-established.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5433) * iscsi_session_failure needs process context hence this work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5434) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5435) iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5438) static void beiscsi_recover_port(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5440) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5442) phba = container_of(work, struct beiscsi_hba, recover_port.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5443) beiscsi_disable_port(phba, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5444) beiscsi_enable_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5447) static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5448) pci_channel_state_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5450) struct beiscsi_hba *phba = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5452) phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5453) set_bit(BEISCSI_HBA_PCI_ERR, &phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5455) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5456) "BM_%d : EEH error detected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5458) /* first stop UE detection when PCI error detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5459) del_timer_sync(&phba->hw_check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5460) cancel_delayed_work_sync(&phba->recover_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5462) /* sessions are no longer valid, so first fail the sessions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5463) iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5464) beiscsi_disable_port(phba, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5466) if (state == pci_channel_io_perm_failure) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5467) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5468) "BM_%d : EEH : State PERM Failure");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5469) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5472) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5474) /* The error could cause the FW to trigger a flash debug dump.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5475) * Resetting the card while flash dump is in progress
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5476) * can cause it not to recover; wait for it to finish.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5477) * Wait only for first function as it is needed only once per
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5478) * adapter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5479) **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5480) if (pdev->devfn == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5481) ssleep(30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5483) return PCI_ERS_RESULT_NEED_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5486) static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5488) struct beiscsi_hba *phba = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5489) int status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5491) phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5493) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5494) "BM_%d : EEH Reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5496) status = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5497) if (status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5498) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5500) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5501) pci_set_power_state(pdev, PCI_D0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5502) pci_restore_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5504) status = beiscsi_check_fw_rdy(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5505) if (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5506) beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5507) "BM_%d : EEH Reset Completed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5508) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5509) beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5510) "BM_%d : EEH Reset Completion Failure\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5511) return PCI_ERS_RESULT_DISCONNECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5514) return PCI_ERS_RESULT_RECOVERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5517) static void beiscsi_eeh_resume(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5518) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5519) struct beiscsi_hba *phba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5520) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5522) phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5523) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5525) ret = beiscsi_enable_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5526) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5527) __beiscsi_log(phba, KERN_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5528) "BM_%d : AER EEH resume failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5531) static int beiscsi_dev_probe(struct pci_dev *pcidev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5532) const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5534) struct hwi_context_memory *phwi_context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5535) struct hwi_controller *phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5536) struct beiscsi_hba *phba = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5537) struct be_eq_obj *pbe_eq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5538) unsigned int s_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5539) char wq_name[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5540) int ret, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5542) ret = beiscsi_enable_pci(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5543) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5544) dev_err(&pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5545) "beiscsi_dev_probe - Failed to enable pci device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5546) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5549) phba = beiscsi_hba_alloc(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5550) if (!phba) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5551) dev_err(&pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5552) "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5553) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5554) goto disable_pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5557) /* Enable EEH reporting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5558) ret = pci_enable_pcie_error_reporting(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5559) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5560) beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5561) "BM_%d : PCIe Error Reporting "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5562) "Enabling Failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5564) pci_save_state(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5566) /* Initialize Driver configuration Paramters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5567) beiscsi_hba_attrs_init(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5569) phba->mac_addr_set = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5571) switch (pcidev->device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5572) case BE_DEVICE_ID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5573) case OC_DEVICE_ID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5574) case OC_DEVICE_ID2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5575) phba->generation = BE_GEN2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5576) phba->iotask_fn = beiscsi_iotask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5577) dev_warn(&pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5578) "Obsolete/Unsupported BE2 Adapter Family\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5579) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5580) case BE_DEVICE_ID2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5581) case OC_DEVICE_ID3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5582) phba->generation = BE_GEN3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5583) phba->iotask_fn = beiscsi_iotask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5584) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5585) case OC_SKH_ID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5586) phba->generation = BE_GEN4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5587) phba->iotask_fn = beiscsi_iotask_v2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5588) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5589) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5590) phba->generation = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5593) ret = be_ctrl_init(phba, pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5594) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5595) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5596) "BM_%d : be_ctrl_init failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5597) goto free_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5600) ret = beiscsi_init_sliport(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5601) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5602) goto free_hba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5604) spin_lock_init(&phba->io_sgl_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5605) spin_lock_init(&phba->mgmt_sgl_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5606) spin_lock_init(&phba->async_pdu_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5607) ret = beiscsi_get_fw_config(&phba->ctrl, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5608) if (ret != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5609) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5610) "BM_%d : Error getting fw config\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5611) goto free_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5613) beiscsi_get_port_name(&phba->ctrl, phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5614) beiscsi_get_params(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5615) beiscsi_set_host_data(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5616) beiscsi_set_uer_feature(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5618) be2iscsi_enable_msix(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5620) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5621) "BM_%d : num_cpus = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5622) phba->num_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5624) phba->shost->max_id = phba->params.cxns_per_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5625) phba->shost->can_queue = phba->params.ios_per_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5626) ret = beiscsi_get_memory(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5627) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5628) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5629) "BM_%d : alloc host mem failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5630) goto free_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5633) ret = beiscsi_init_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5634) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5635) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5636) "BM_%d : init port failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5637) beiscsi_free_mem(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5638) goto free_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5639) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5641) for (i = 0; i < MAX_MCC_CMD; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5642) init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5643) phba->ctrl.mcc_tag[i] = i + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5644) phba->ctrl.mcc_tag_status[i + 1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5645) phba->ctrl.mcc_tag_available++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5646) memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5647) sizeof(struct be_dma_mem));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5650) phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5652) snprintf(wq_name, sizeof(wq_name), "beiscsi_%02x_wq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5653) phba->shost->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5654) phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, wq_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5655) if (!phba->wq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5656) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5657) "BM_%d : beiscsi_dev_probe-"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5658) "Failed to allocate work queue\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5659) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5660) goto free_twq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5661) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5663) INIT_DELAYED_WORK(&phba->eqd_update, beiscsi_eqd_update_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5665) phwi_ctrlr = phba->phwi_ctrlr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5666) phwi_context = phwi_ctrlr->phwi_ctxt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5668) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5669) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5670) irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5673) i = (phba->pcidev->msix_enabled) ? i : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5674) /* Work item for MCC handling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5675) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5676) INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5678) ret = beiscsi_init_irqs(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5679) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5680) beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5681) "BM_%d : beiscsi_dev_probe-"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5682) "Failed to beiscsi_init_irqs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5683) goto disable_iopoll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5684) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5685) hwi_enable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5687) ret = iscsi_host_add(phba->shost, &phba->pcidev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5688) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5689) goto free_irqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5691) /* set online bit after port is operational */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5692) set_bit(BEISCSI_HBA_ONLINE, &phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5693) __beiscsi_log(phba, KERN_INFO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5694) "BM_%d : port online: 0x%lx\n", phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5696) INIT_WORK(&phba->boot_work, beiscsi_boot_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5697) ret = beiscsi_boot_get_shandle(phba, &s_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5698) if (ret > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5699) beiscsi_start_boot_work(phba, s_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5700) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5701) * Set this bit after starting the work to let
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5702) * probe handle it first.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5703) * ASYNC event can too schedule this work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5704) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5705) set_bit(BEISCSI_HBA_BOOT_FOUND, &phba->state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5706) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5708) beiscsi_iface_create_default(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5709) schedule_delayed_work(&phba->eqd_update,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5710) msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5712) INIT_WORK(&phba->sess_work, beiscsi_sess_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5713) INIT_DELAYED_WORK(&phba->recover_port, beiscsi_recover_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5714) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5715) * Start UE detection here. UE before this will cause stall in probe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5716) * and eventually fail the probe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5717) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5718) timer_setup(&phba->hw_check, beiscsi_hw_health_check, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5719) mod_timer(&phba->hw_check,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5720) jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5721) beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5722) "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5723) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5725) free_irqs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5726) hwi_disable_intr(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5727) beiscsi_free_irqs(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5728) disable_iopoll:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5729) for (i = 0; i < phba->num_cpus; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5730) pbe_eq = &phwi_context->be_eq[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5731) irq_poll_disable(&pbe_eq->iopoll);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5733) destroy_workqueue(phba->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5734) free_twq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5735) hwi_cleanup_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5736) beiscsi_cleanup_port(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5737) beiscsi_free_mem(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5738) free_port:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5739) dma_free_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5740) phba->ctrl.mbox_mem_alloced.size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5741) phba->ctrl.mbox_mem_alloced.va,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5742) phba->ctrl.mbox_mem_alloced.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5743) beiscsi_unmap_pci_function(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5744) free_hba:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5745) pci_disable_msix(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5746) pci_dev_put(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5747) iscsi_host_free(phba->shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5748) pci_disable_pcie_error_reporting(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5749) pci_set_drvdata(pcidev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5750) disable_pci:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5751) pci_release_regions(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5752) pci_disable_device(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5753) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5756) static void beiscsi_remove(struct pci_dev *pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5757) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5758) struct beiscsi_hba *phba = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5760) phba = pci_get_drvdata(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5761) if (!phba) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5762) dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5763) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5764) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5766) /* first stop UE detection before unloading */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5767) del_timer_sync(&phba->hw_check);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5768) cancel_delayed_work_sync(&phba->recover_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5769) cancel_work_sync(&phba->sess_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5771) beiscsi_iface_destroy_default(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5772) iscsi_host_remove(phba->shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5773) beiscsi_disable_port(phba, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5775) /* after cancelling boot_work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5776) iscsi_boot_destroy_kset(phba->boot_struct.boot_kset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5778) /* free all resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5779) destroy_workqueue(phba->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5780) beiscsi_free_mem(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5782) /* ctrl uninit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5783) beiscsi_unmap_pci_function(phba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5784) dma_free_coherent(&phba->pcidev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5785) phba->ctrl.mbox_mem_alloced.size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5786) phba->ctrl.mbox_mem_alloced.va,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5787) phba->ctrl.mbox_mem_alloced.dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5789) pci_dev_put(phba->pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5790) iscsi_host_free(phba->shost);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5791) pci_disable_pcie_error_reporting(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5792) pci_set_drvdata(pcidev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5793) pci_release_regions(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5794) pci_disable_device(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5798) static struct pci_error_handlers beiscsi_eeh_handlers = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5799) .error_detected = beiscsi_eeh_err_detected,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5800) .slot_reset = beiscsi_eeh_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5801) .resume = beiscsi_eeh_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5802) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5804) struct iscsi_transport beiscsi_iscsi_transport = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5805) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5806) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5807) .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5808) CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5809) .create_session = beiscsi_session_create,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5810) .destroy_session = beiscsi_session_destroy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5811) .create_conn = beiscsi_conn_create,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5812) .bind_conn = beiscsi_conn_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5813) .destroy_conn = iscsi_conn_teardown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5814) .attr_is_visible = beiscsi_attr_is_visible,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5815) .set_iface_param = beiscsi_iface_set_param,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5816) .get_iface_param = beiscsi_iface_get_param,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5817) .set_param = beiscsi_set_param,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5818) .get_conn_param = iscsi_conn_get_param,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5819) .get_session_param = iscsi_session_get_param,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5820) .get_host_param = beiscsi_get_host_param,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5821) .start_conn = beiscsi_conn_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5822) .stop_conn = iscsi_conn_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5823) .send_pdu = iscsi_conn_send_pdu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5824) .xmit_task = beiscsi_task_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5825) .cleanup_task = beiscsi_cleanup_task,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5826) .alloc_pdu = beiscsi_alloc_pdu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5827) .parse_pdu_itt = beiscsi_parse_pdu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5828) .get_stats = beiscsi_conn_get_stats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5829) .get_ep_param = beiscsi_ep_get_param,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5830) .ep_connect = beiscsi_ep_connect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5831) .ep_poll = beiscsi_ep_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5832) .ep_disconnect = beiscsi_ep_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5833) .session_recovery_timedout = iscsi_session_recovery_timedout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5834) .bsg_request = beiscsi_bsg_request,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5835) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5837) static struct pci_driver beiscsi_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5838) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5839) .probe = beiscsi_dev_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5840) .remove = beiscsi_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5841) .id_table = beiscsi_pci_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5842) .err_handler = &beiscsi_eeh_handlers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5843) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5845) static int __init beiscsi_module_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5846) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5847) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5849) beiscsi_scsi_transport =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5850) iscsi_register_transport(&beiscsi_iscsi_transport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5851) if (!beiscsi_scsi_transport) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5852) printk(KERN_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5853) "beiscsi_module_init - Unable to register beiscsi transport.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5854) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5856) printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5857) &beiscsi_iscsi_transport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5859) ret = pci_register_driver(&beiscsi_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5860) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5861) printk(KERN_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5862) "beiscsi_module_init - Unable to register beiscsi pci driver.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5863) goto unregister_iscsi_transport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5865) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5867) unregister_iscsi_transport:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5868) iscsi_unregister_transport(&beiscsi_iscsi_transport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5869) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5870) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5872) static void __exit beiscsi_module_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5874) pci_unregister_driver(&beiscsi_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5875) iscsi_unregister_transport(&beiscsi_iscsi_transport);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5878) module_init(beiscsi_module_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5879) module_exit(beiscsi_module_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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