^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * atari_scsi.c -- Device dependent functions for the Atari generic SCSI port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 1994 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Loosely based on the work of Robert De Vries' team and added:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * - working real DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * - Falcon support (untested yet!) ++bjoern fixed and now it works
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * - lots of extensions and bug fixes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * License. See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Notes for Falcon SCSI DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * The 5380 device is one of several that all share the DMA chip. Hence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * "locking" and "unlocking" access to this chip is required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Two possible schemes for ST DMA acquisition by atari_scsi are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * 1) The lock is taken for each command separately (i.e. can_queue == 1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * 2) The lock is taken when the first command arrives and released
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * when the last command is finished (i.e. can_queue > 1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * The first alternative limits SCSI bus utilization, since interleaving
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * commands is not possible. The second gives better performance but is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * unfair to other drivers needing to use the ST DMA chip. In order to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * allow the IDE and floppy drivers equal access to the ST DMA chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * the default is can_queue == 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/blkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/nvram.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/atarihw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/atariints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <asm/atari_stdma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <asm/atari_stram.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define DMA_MIN_SIZE 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Definitions for the core NCR5380 driver. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define NCR5380_implementation_fields /* none */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static u8 (*atari_scsi_reg_read)(unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static void (*atari_scsi_reg_write)(unsigned int, u8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define NCR5380_read(reg) atari_scsi_reg_read(reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define NCR5380_write(reg, value) atari_scsi_reg_write(reg, value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define NCR5380_queue_command atari_scsi_queue_command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define NCR5380_abort atari_scsi_abort
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define NCR5380_info atari_scsi_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define NCR5380_dma_xfer_len atari_scsi_dma_xfer_len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define NCR5380_dma_recv_setup atari_scsi_dma_recv_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define NCR5380_dma_send_setup atari_scsi_dma_send_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define NCR5380_dma_residual atari_scsi_dma_residual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define NCR5380_acquire_dma_irq(instance) falcon_get_lock(instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define NCR5380_release_dma_irq(instance) falcon_release_lock()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #include "NCR5380.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define IS_A_TT() ATARIHW_PRESENT(TT_SCSI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define SCSI_DMA_WRITE_P(elt,val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned long v = val; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) tt_scsi_dma.elt##_lo = v & 0xff; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) v >>= 8; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) tt_scsi_dma.elt##_lmd = v & 0xff; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) v >>= 8; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) tt_scsi_dma.elt##_hmd = v & 0xff; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) v >>= 8; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) tt_scsi_dma.elt##_hi = v & 0xff; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) } while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define SCSI_DMA_READ_P(elt) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) (((((((unsigned long)tt_scsi_dma.elt##_hi << 8) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) (unsigned long)tt_scsi_dma.elt##_hmd) << 8) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) (unsigned long)tt_scsi_dma.elt##_lmd) << 8) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) (unsigned long)tt_scsi_dma.elt##_lo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static inline void SCSI_DMA_SETADR(unsigned long adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) st_dma.dma_lo = (unsigned char)adr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) adr >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) st_dma.dma_md = (unsigned char)adr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) adr >>= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) st_dma.dma_hi = (unsigned char)adr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static inline unsigned long SCSI_DMA_GETADR(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned long adr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) adr = st_dma.dma_lo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) adr |= (st_dma.dma_md & 0xff) << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) adr |= (st_dma.dma_hi & 0xff) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return adr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static void atari_scsi_fetch_restbytes(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static unsigned long atari_dma_residual, atari_dma_startaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static short atari_dma_active;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* pointer to the dribble buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static char *atari_dma_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* precalculated physical address of the dribble buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static unsigned long atari_dma_phys_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* != 0 tells the Falcon int handler to copy data from the dribble buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static char *atari_dma_orig_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* size of the dribble buffer; 4k seems enough, since the Falcon cannot use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * scatter-gather anyway, so most transfers are 1024 byte only. In the rare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * cases where requests to physical contiguous buffers have been merged, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * request is <= 4k (one page). So I don't think we have to split transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * just due to this buffer size...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define STRAM_BUFFER_SIZE (4096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* mask for address bits that can't be used with the ST-DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static unsigned long atari_dma_stram_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define STRAM_ADDR(a) (((a) & atari_dma_stram_mask) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int setup_can_queue = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) module_param(setup_can_queue, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int setup_cmd_per_lun = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) module_param(setup_cmd_per_lun, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static int setup_sg_tablesize = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) module_param(setup_sg_tablesize, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static int setup_hostid = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) module_param(setup_hostid, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static int setup_toshiba_delay = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) module_param(setup_toshiba_delay, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int scsi_dma_is_ignored_buserr(unsigned char dma_stat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned long addr = SCSI_DMA_READ_P(dma_addr), end_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (dma_stat & 0x01) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* A bus error happens when DMA-ing from the last page of a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * physical memory chunk (DMA prefetch!), but that doesn't hurt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * Check for this case:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) for (i = 0; i < m68k_num_memory; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) end_addr = m68k_memory[i].addr + m68k_memory[i].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (end_addr <= addr && addr <= end_addr + 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static irqreturn_t scsi_tt_intr(int irq, void *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct Scsi_Host *instance = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int dma_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) dma_stat = tt_scsi_dma.dma_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) dsprintk(NDEBUG_INTR, instance, "NCR5380 interrupt, DMA status = %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) dma_stat & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* Look if it was the DMA that has interrupted: First possibility
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * is that a bus error occurred...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (dma_stat & 0x80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (!scsi_dma_is_ignored_buserr(dma_stat)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) printk(KERN_ERR "SCSI DMA caused bus error near 0x%08lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) SCSI_DMA_READ_P(dma_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) printk(KERN_CRIT "SCSI DMA bus error -- bad DMA programming!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* If the DMA is active but not finished, we have the case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * that some other 5380 interrupt occurred within the DMA transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * This means we have residual bytes, if the desired end address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * is not yet reached. Maybe we have to fetch some bytes from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * rest data register, too. The residual must be calculated from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * the address pointer, not the counter register, because only the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * addr reg counts bytes not yet written and pending in the rest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * data reg!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if ((dma_stat & 0x02) && !(dma_stat & 0x40)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) atari_dma_residual = hostdata->dma_len -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) (SCSI_DMA_READ_P(dma_addr) - atari_dma_startaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) dprintk(NDEBUG_DMA, "SCSI DMA: There are %ld residual bytes.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) atari_dma_residual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if ((signed int)atari_dma_residual < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) atari_dma_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if ((dma_stat & 1) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * After read operations, we maybe have to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * transport some rest bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) atari_scsi_fetch_restbytes();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * There seems to be a nasty bug in some SCSI-DMA/NCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * combinations: If a target disconnects while a write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * operation is going on, the address register of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * DMA may be a few bytes farer than it actually read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * This is probably due to DMA prefetching and a delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * between DMA and NCR. Experiments showed that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * dma_addr is 9 bytes to high, but this could vary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * The problem is, that the residual is thus calculated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * wrong and the next transfer will start behind where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * it should. So we round up the residual to the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * multiple of a sector size, if it isn't already a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * multiple and the originally expected transfer size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * was. The latter condition is there to ensure that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * the correction is taken only for "real" data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * transfers and not for, e.g., the parameters of some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * other command. These shouldn't disconnect anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (atari_dma_residual & 0x1ff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) dprintk(NDEBUG_DMA, "SCSI DMA: DMA bug corrected, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) "difference %ld bytes\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 512 - (atari_dma_residual & 0x1ff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) atari_dma_residual = (atari_dma_residual + 511) & ~0x1ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) tt_scsi_dma.dma_ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* If the DMA is finished, fetch the rest bytes and turn it off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (dma_stat & 0x40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) atari_dma_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if ((dma_stat & 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) atari_scsi_fetch_restbytes();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) tt_scsi_dma.dma_ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) NCR5380_intr(irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static irqreturn_t scsi_falcon_intr(int irq, void *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct Scsi_Host *instance = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) int dma_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* Turn off DMA and select sector counter register before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * accessing the status register (Atari recommendation!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) st_dma.dma_mode_status = 0x90;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dma_stat = st_dma.dma_mode_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* Bit 0 indicates some error in the DMA process... don't know
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * what happened exactly (no further docu).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (!(dma_stat & 0x01)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* DMA error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) printk(KERN_CRIT "SCSI DMA error near 0x%08lx!\n", SCSI_DMA_GETADR());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /* If the DMA was active, but now bit 1 is not clear, it is some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * other 5380 interrupt that finishes the DMA transfer. We have to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * calculate the number of residual bytes and give a warning if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * bytes are stuck in the ST-DMA fifo (there's no way to reach them!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (atari_dma_active && (dma_stat & 0x02)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) unsigned long transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) transferred = SCSI_DMA_GETADR() - atari_dma_startaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* The ST-DMA address is incremented in 2-byte steps, but the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * data are written only in 16-byte chunks. If the number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * transferred bytes is not divisible by 16, the remainder is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * lost somewhere in outer space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (transferred & 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) printk(KERN_ERR "SCSI DMA error: %ld bytes lost in "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) "ST-DMA fifo\n", transferred & 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) atari_dma_residual = hostdata->dma_len - transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dprintk(NDEBUG_DMA, "SCSI DMA: There are %ld residual bytes.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) atari_dma_residual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) atari_dma_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) atari_dma_active = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (atari_dma_orig_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /* If the dribble buffer was used on a read operation, copy the DMA-ed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * data to the original destination address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) memcpy(atari_dma_orig_addr, phys_to_virt(atari_dma_startaddr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) hostdata->dma_len - atari_dma_residual);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) atari_dma_orig_addr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) NCR5380_intr(irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static void atari_scsi_fetch_restbytes(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) int nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) char *src, *dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) unsigned long phys_dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* fetch rest bytes in the DMA register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) phys_dst = SCSI_DMA_READ_P(dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) nr = phys_dst & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (nr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* there are 'nr' bytes left for the last long address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) before the DMA pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) phys_dst ^= nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) dprintk(NDEBUG_DMA, "SCSI DMA: there are %d rest bytes for phys addr 0x%08lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) nr, phys_dst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* The content of the DMA pointer is a physical address! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) dst = phys_to_virt(phys_dst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dprintk(NDEBUG_DMA, " = virt addr %p\n", dst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) for (src = (char *)&tt_scsi_dma.dma_restdata; nr != 0; --nr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) *dst++ = *src++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* This function releases the lock on the DMA chip if there is no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * connected command and the disconnected queue is empty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static void falcon_release_lock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (IS_A_TT())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (stdma_is_locked_by(scsi_falcon_intr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) stdma_release();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* This function manages the locking of the ST-DMA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * If the DMA isn't locked already for SCSI, it tries to lock it by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * calling stdma_lock(). But if the DMA is locked by the SCSI code and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * there are other drivers waiting for the chip, we do not issue the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * command immediately but tell the SCSI mid-layer to defer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static int falcon_get_lock(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (IS_A_TT())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (stdma_is_locked_by(scsi_falcon_intr) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) instance->hostt->can_queue > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (in_interrupt())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return stdma_try_lock(scsi_falcon_intr, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) stdma_lock(scsi_falcon_intr, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #ifndef MODULE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) static int __init atari_scsi_setup(char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* Format of atascsi parameter is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * atascsi=<can_queue>,<cmd_per_lun>,<sg_tablesize>,<hostid>,<use_tags>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * Defaults depend on TT or Falcon, determined at run time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * Negative values mean don't change.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) int ints[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) get_options(str, ARRAY_SIZE(ints), ints);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (ints[0] < 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) printk("atari_scsi_setup: no arguments!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (ints[0] >= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) setup_can_queue = ints[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (ints[0] >= 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) setup_cmd_per_lun = ints[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (ints[0] >= 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) setup_sg_tablesize = ints[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) if (ints[0] >= 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) setup_hostid = ints[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /* ints[5] (use_tagged_queuing) is ignored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) /* ints[6] (use_pdma) is ignored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (ints[0] >= 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) setup_toshiba_delay = ints[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) __setup("atascsi=", atari_scsi_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #endif /* !MODULE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static unsigned long atari_scsi_dma_setup(struct NCR5380_hostdata *hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) void *data, unsigned long count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) int dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) unsigned long addr = virt_to_phys(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) dprintk(NDEBUG_DMA, "scsi%d: setting up dma, data = %p, phys = %lx, count = %ld, dir = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) hostdata->host->host_no, data, addr, count, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) if (!IS_A_TT() && !STRAM_ADDR(addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* If we have a non-DMAable address on a Falcon, use the dribble
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * buffer; 'orig_addr' != 0 in the read case tells the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) * handler to copy data from the dribble buffer to the originally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * wanted address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) memcpy(atari_dma_buffer, data, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) atari_dma_orig_addr = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) addr = atari_dma_phys_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) atari_dma_startaddr = addr; /* Needed for calculating residual later. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* Cache cleanup stuff: On writes, push any dirty cache out before sending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * it to the peripheral. (Must be done before DMA setup, since at least
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * the ST-DMA begins to fill internal buffers right after setup. For
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) * reads, invalidate any cache, may be altered after DMA without CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * knowledge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * ++roman: For the Medusa, there's no need at all for that cache stuff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * because the hardware does bus snooping (fine!).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) dma_cache_maintenance(addr, count, dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (IS_A_TT()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) tt_scsi_dma.dma_ctrl = dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) SCSI_DMA_WRITE_P(dma_addr, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) SCSI_DMA_WRITE_P(dma_cnt, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) tt_scsi_dma.dma_ctrl = dir | 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) } else { /* ! IS_A_TT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /* set address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) SCSI_DMA_SETADR(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) /* toggle direction bit to clear FIFO and set DMA direction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) dir <<= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) st_dma.dma_mode_status = 0x90 | dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) st_dma.dma_mode_status = 0x90 | (dir ^ 0x100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) st_dma.dma_mode_status = 0x90 | dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) udelay(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /* On writes, round up the transfer length to the next multiple of 512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * (see also comment at atari_dma_xfer_len()). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) st_dma.fdc_acces_seccount = (count + (dir ? 511 : 0)) >> 9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) udelay(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) st_dma.dma_mode_status = 0x10 | dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) udelay(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* need not restore value of dir, only boolean value is tested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) atari_dma_active = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) return count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static inline int atari_scsi_dma_recv_setup(struct NCR5380_hostdata *hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) unsigned char *data, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return atari_scsi_dma_setup(hostdata, data, count, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static inline int atari_scsi_dma_send_setup(struct NCR5380_hostdata *hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) unsigned char *data, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return atari_scsi_dma_setup(hostdata, data, count, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static int atari_scsi_dma_residual(struct NCR5380_hostdata *hostdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return atari_dma_residual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #define CMD_SURELY_BLOCK_MODE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #define CMD_SURELY_BYTE_MODE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) #define CMD_MODE_UNKNOWN 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static int falcon_classify_cmd(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) unsigned char opcode = cmd->cmnd[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (opcode == READ_DEFECT_DATA || opcode == READ_LONG ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) opcode == READ_BUFFER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return CMD_SURELY_BYTE_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) else if (opcode == READ_6 || opcode == READ_10 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) opcode == 0xa8 /* READ_12 */ || opcode == READ_REVERSE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) opcode == RECOVER_BUFFERED_DATA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* In case of a sequential-access target (tape), special care is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * needed here: The transfer is block-mode only if the 'fixed' bit is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * set! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (cmd->device->type == TYPE_TAPE && !(cmd->cmnd[1] & 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return CMD_SURELY_BYTE_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return CMD_SURELY_BLOCK_MODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return CMD_MODE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) /* This function calculates the number of bytes that can be transferred via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * DMA. On the TT, this is arbitrary, but on the Falcon we have to use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) * ST-DMA chip. There are only multiples of 512 bytes possible and max.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * 255*512 bytes :-( This means also, that defining READ_OVERRUNS is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) * possible on the Falcon, since that would require to program the DMA for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * n*512 - atari_read_overrun bytes. But it seems that the Falcon doesn't have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * the overrun problem, so this question is academic :-)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) static int atari_scsi_dma_xfer_len(struct NCR5380_hostdata *hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) int wanted_len = cmd->SCp.this_residual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) int possible_len, limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (wanted_len < DMA_MIN_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (IS_A_TT())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* TT SCSI DMA can transfer arbitrary #bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return wanted_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) /* ST DMA chip is stupid -- only multiples of 512 bytes! (and max.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) * 255*512 bytes, but this should be enough)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * ++roman: Aaargl! Another Falcon-SCSI problem... There are some commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * that return a number of bytes which cannot be known beforehand. In this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * case, the given transfer length is an "allocation length". Now it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * can happen that this allocation length is a multiple of 512 bytes and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * the DMA is used. But if not n*512 bytes really arrive, some input data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * will be lost in the ST-DMA's FIFO :-( Thus, we have to distinguish
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * between commands that do block transfers and those that do byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * transfers. But this isn't easy... there are lots of vendor specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * commands, and the user can issue any command via the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * SCSI_IOCTL_SEND_COMMAND.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * The solution: We classify SCSI commands in 1) surely block-mode cmd.s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) * 2) surely byte-mode cmd.s and 3) cmd.s with unknown mode. In case 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * and 3), the thing to do is obvious: allow any number of blocks via DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * or none. In case 2), we apply some heuristic: Byte mode is assumed if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) * the transfer (allocation) length is < 1024, hoping that no cmd. not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) * explicitly known as byte mode have such big allocation lengths...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * BTW, all the discussion above applies only to reads. DMA writes are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * unproblematic anyways, since the targets aborts the transfer after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * receiving a sufficient number of bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * Another point: If the transfer is from/to an non-ST-RAM address, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * use the dribble buffer and thus can do only STRAM_BUFFER_SIZE bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (cmd->sc_data_direction == DMA_TO_DEVICE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) /* Write operation can always use the DMA, but the transfer size must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * be rounded up to the next multiple of 512 (atari_dma_setup() does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * this).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) possible_len = wanted_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) /* Read operations: if the wanted transfer length is not a multiple of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * 512, we cannot use DMA, since the ST-DMA cannot split transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * (no interrupt on DMA finished!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (wanted_len & 0x1ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) possible_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* Now classify the command (see above) and decide whether it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) * allowed to do DMA at all */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) switch (falcon_classify_cmd(cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) case CMD_SURELY_BLOCK_MODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) possible_len = wanted_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) case CMD_SURELY_BYTE_MODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) possible_len = 0; /* DMA prohibited */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) case CMD_MODE_UNKNOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /* For unknown commands assume block transfers if the transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) * size/allocation length is >= 1024 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) possible_len = (wanted_len < 1024) ? 0 : wanted_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) /* Last step: apply the hard limit on DMA transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) limit = (atari_dma_buffer && !STRAM_ADDR(virt_to_phys(cmd->SCp.ptr))) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) STRAM_BUFFER_SIZE : 255*512;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if (possible_len > limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) possible_len = limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) if (possible_len != wanted_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) dprintk(NDEBUG_DMA, "DMA transfer now %d bytes instead of %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) possible_len, wanted_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) return possible_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) /* NCR5380 register access functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * There are separate functions for TT and Falcon, because the access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) * methods are quite different. The calling macros NCR5380_read and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) * NCR5380_write call these functions via function pointers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static u8 atari_scsi_tt_reg_read(unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) return tt_scsi_regp[reg * 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static void atari_scsi_tt_reg_write(unsigned int reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) tt_scsi_regp[reg * 2] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static u8 atari_scsi_falcon_reg_read(unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) u8 result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) reg += 0x88;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) dma_wd.dma_mode_status = (u_short)reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) result = (u8)dma_wd.fdc_acces_seccount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) static void atari_scsi_falcon_reg_write(unsigned int reg, u8 value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) reg += 0x88;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) dma_wd.dma_mode_status = (u_short)reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) dma_wd.fdc_acces_seccount = (u_short)value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) #include "NCR5380.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) static int atari_scsi_host_reset(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) int rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) /* Abort a maybe active DMA transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) if (IS_A_TT()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) tt_scsi_dma.dma_ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (stdma_is_locked_by(scsi_falcon_intr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) st_dma.dma_mode_status = 0x90;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) atari_dma_active = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) atari_dma_orig_addr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) rv = NCR5380_host_reset(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) /* The 5380 raises its IRQ line while _RST is active but the ST DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) * "lock" has been released so this interrupt may end up handled by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * floppy or IDE driver (if one of them holds the lock). The NCR5380
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) * interrupt flag has been cleared already.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) #define DRV_MODULE_NAME "atari_scsi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) #define PFX DRV_MODULE_NAME ": "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static struct scsi_host_template atari_scsi_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) .module = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) .proc_name = DRV_MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) .name = "Atari native SCSI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) .info = atari_scsi_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .queuecommand = atari_scsi_queue_command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .eh_abort_handler = atari_scsi_abort,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .eh_host_reset_handler = atari_scsi_host_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) .this_id = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) .cmd_per_lun = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .dma_boundary = PAGE_SIZE - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .cmd_size = NCR5380_CMD_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static int __init atari_scsi_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) struct Scsi_Host *instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) struct resource *irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) int host_flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) if (!irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (ATARIHW_PRESENT(TT_SCSI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) atari_scsi_reg_read = atari_scsi_tt_reg_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) atari_scsi_reg_write = atari_scsi_tt_reg_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) atari_scsi_reg_read = atari_scsi_falcon_reg_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) atari_scsi_reg_write = atari_scsi_falcon_reg_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (ATARIHW_PRESENT(TT_SCSI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) atari_scsi_template.can_queue = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) atari_scsi_template.sg_tablesize = SG_ALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) atari_scsi_template.can_queue = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) atari_scsi_template.sg_tablesize = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (setup_can_queue > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) atari_scsi_template.can_queue = setup_can_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if (setup_cmd_per_lun > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) atari_scsi_template.cmd_per_lun = setup_cmd_per_lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) /* Don't increase sg_tablesize on Falcon! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) if (ATARIHW_PRESENT(TT_SCSI) && setup_sg_tablesize > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) atari_scsi_template.sg_tablesize = setup_sg_tablesize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (setup_hostid >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) atari_scsi_template.this_id = setup_hostid & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) } else if (IS_REACHABLE(CONFIG_NVRAM)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) /* Test if a host id is set in the NVRam */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (ATARIHW_PRESENT(TT_CLK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) unsigned char b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) loff_t offset = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) ssize_t count = nvram_read(&b, 1, &offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) /* Arbitration enabled? (for TOS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) * If yes, use configured host ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) if ((count == 1) && (b & 0x80))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) atari_scsi_template.this_id = b & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) /* If running on a Falcon and if there's TT-Ram (i.e., more than one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) * memory block, since there's always ST-Ram in a Falcon), then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) * allocate a STRAM_BUFFER_SIZE byte dribble buffer for transfers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * from/to alternative Ram.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) if (ATARIHW_PRESENT(ST_SCSI) && !ATARIHW_PRESENT(EXTD_DMA) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) m68k_realnum_memory > 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) atari_dma_buffer = atari_stram_alloc(STRAM_BUFFER_SIZE, "SCSI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if (!atari_dma_buffer) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) pr_err(PFX "can't allocate ST-RAM double buffer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) atari_dma_phys_buffer = atari_stram_to_phys(atari_dma_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) atari_dma_orig_addr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) instance = scsi_host_alloc(&atari_scsi_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) sizeof(struct NCR5380_hostdata));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (!instance) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) error = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) goto fail_alloc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) instance->irq = irq->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) host_flags |= IS_A_TT() ? 0 : FLAG_LATE_DMA_SETUP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) host_flags |= setup_toshiba_delay > 0 ? FLAG_TOSHIBA_DELAY : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) error = NCR5380_init(instance, host_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) goto fail_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (IS_A_TT()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) error = request_irq(instance->irq, scsi_tt_intr, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) "NCR5380", instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) pr_err(PFX "request irq %d failed, aborting\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) instance->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) goto fail_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) tt_mfp.active_edge |= 0x80; /* SCSI int on L->H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) tt_scsi_dma.dma_ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) atari_dma_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) /* While the read overruns (described by Drew Eckhardt in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) * NCR5380.c) never happened on TTs, they do in fact on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) * Medusa (This was the cause why SCSI didn't work right for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) * so long there.) Since handling the overruns slows down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) * a bit, I turned the #ifdef's into a runtime condition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) * In principle it should be sufficient to do max. 1 byte with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) * PIO, but there is another problem on the Medusa with the DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) * rest data register. So read_overruns is currently set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) * to 4 to avoid having transfers that aren't a multiple of 4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) * If the rest data bug is fixed, this can be lowered to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) if (MACH_IS_MEDUSA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) struct NCR5380_hostdata *hostdata =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) hostdata->read_overruns = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) /* Nothing to do for the interrupt: the ST-DMA is initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) * already.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) atari_dma_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) atari_dma_active = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) atari_dma_stram_mask = (ATARIHW_PRESENT(EXTD_DMA) ? 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) : 0xff000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) NCR5380_maybe_reset_bus(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) error = scsi_add_host(instance, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) goto fail_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) platform_set_drvdata(pdev, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) scsi_scan_host(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) fail_host:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) if (IS_A_TT())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) free_irq(instance->irq, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) fail_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) NCR5380_exit(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) fail_init:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) scsi_host_put(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) fail_alloc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (atari_dma_buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) atari_stram_free(atari_dma_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) static int __exit atari_scsi_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) struct Scsi_Host *instance = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) scsi_remove_host(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if (IS_A_TT())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) free_irq(instance->irq, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) NCR5380_exit(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) scsi_host_put(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) if (atari_dma_buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) atari_stram_free(atari_dma_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static struct platform_driver atari_scsi_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .remove = __exit_p(atari_scsi_remove),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .name = DRV_MODULE_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) module_platform_driver_probe(atari_scsi_driver, atari_scsi_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) MODULE_ALIAS("platform:" DRV_MODULE_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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