^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Aic94xx SAS/SATA driver dump interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2004 Adaptec, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2004 David Chaw <david_chaw@adaptec.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * 2005/07/14/LT Complete overhaul of this file. Update pages, register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * locations, names, etc. Make use of macros. Print more information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Print all cseq and lseq mip and mdp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "aic94xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "aic94xx_reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "aic94xx_reg_def.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "aic94xx_sas.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "aic94xx_dump.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifdef ASD_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MD(x) (1 << (x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MODE_COMMON (1 << 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MODE_0_7 (0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static const struct lseq_cio_regs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u32 offs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u8 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u32 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) } LSEQmCIOREGS[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {"LmMnSCBPTR", 0x20, 16, MD(0)|MD(1)|MD(2)|MD(3)|MD(4) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {"LmMnDDBPTR", 0x22, 16, MD(0)|MD(1)|MD(2)|MD(3)|MD(4) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {"LmREQMBX", 0x30, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {"LmRSPMBX", 0x34, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {"LmMnINT", 0x38, 32, MODE_0_7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {"LmMnINTEN", 0x3C, 32, MODE_0_7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {"LmXMTPRIMD", 0x40, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {"LmXMTPRIMCS", 0x44, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {"LmCONSTAT", 0x45, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {"LmMnDMAERRS", 0x46, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {"LmMnSGDMAERRS", 0x47, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {"LmMnEXPHDRP", 0x48, 8, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {"LmMnSASAALIGN", 0x48, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {"LmMnMSKHDRP", 0x49, 8, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {"LmMnSTPALIGN", 0x49, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {"LmMnRCVHDRP", 0x4A, 8, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {"LmMnXMTHDRP", 0x4A, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {"LmALIGNMODE", 0x4B, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {"LmMnEXPRCVCNT", 0x4C, 32, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {"LmMnXMTCNT", 0x4C, 32, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {"LmMnCURRTAG", 0x54, 16, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {"LmMnPREVTAG", 0x56, 16, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {"LmMnACKOFS", 0x58, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {"LmMnXFRLVL", 0x59, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {"LmMnSGDMACTL", 0x5A, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {"LmMnSGDMASTAT", 0x5B, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {"LmMnDDMACTL", 0x5C, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {"LmMnDDMASTAT", 0x5D, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {"LmMnDDMAMODE", 0x5E, 16, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {"LmMnPIPECTL", 0x61, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {"LmMnACTSCB", 0x62, 16, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {"LmMnSGBHADR", 0x64, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {"LmMnSGBADR", 0x65, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {"LmMnSGDCNT", 0x66, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {"LmMnSGDMADR", 0x68, 32, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {"LmMnSGDMADR", 0x6C, 32, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {"LmMnXFRCNT", 0x70, 32, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {"LmMnXMTCRC", 0x74, 32, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {"LmCURRTAG", 0x74, 16, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {"LmPREVTAG", 0x76, 16, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {"LmMnDPSEL", 0x7B, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {"LmDPTHSTAT", 0x7C, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {"LmMnHOLDLVL", 0x7D, 8, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {"LmMnSATAFS", 0x7E, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {"LmMnCMPLTSTAT", 0x7F, 8, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {"LmPRMSTAT0", 0x80, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {"LmPRMSTAT1", 0x84, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {"LmGPRMINT", 0x88, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {"LmMnCURRSCB", 0x8A, 16, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {"LmPRMICODE", 0x8C, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {"LmMnRCVCNT", 0x90, 16, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {"LmMnBUFSTAT", 0x92, 16, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {"LmMnXMTHDRSIZE",0x92, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {"LmMnXMTSIZE", 0x93, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {"LmMnTGTXFRCNT", 0x94, 32, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {"LmMnEXPROFS", 0x98, 32, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {"LmMnXMTROFS", 0x98, 32, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {"LmMnRCVROFS", 0x9C, 32, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {"LmCONCTL", 0xA0, 16, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {"LmBITLTIMER", 0xA2, 16, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {"LmWWNLOW", 0xA8, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {"LmWWNHIGH", 0xAC, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {"LmMnFRMERR", 0xB0, 32, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {"LmMnFRMERREN", 0xB4, 32, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {"LmAWTIMER", 0xB8, 16, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {"LmAWTCTL", 0xBA, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {"LmMnHDRCMPS", 0xC0, 32, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {"LmMnXMTSTAT", 0xC4, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {"LmHWTSTATEN", 0xC5, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {"LmMnRRDYRC", 0xC6, 8, MD(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {"LmMnRRDYTC", 0xC6, 8, MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {"LmHWTSTAT", 0xC7, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {"LmMnDATABUFADR",0xC8, 16, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {"LmDWSSTATUS", 0xCB, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {"LmMnACTSTAT", 0xCE, 16, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {"LmMnREQSCB", 0xD2, 16, MD(0)|MD(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {"LmXXXPRIM", 0xD4, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {"LmRCVASTAT", 0xD9, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {"LmINTDIS1", 0xDA, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {"LmPSTORESEL", 0xDB, 8, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {"LmPSTORE", 0xDC, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {"LmPRIMSTAT0EN", 0xE0, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {"LmPRIMSTAT1EN", 0xE4, 32, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {"LmDONETCTL", 0xF2, 16, MODE_COMMON },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {NULL, 0, 0, 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static struct lseq_cio_regs LSEQmOOBREGS[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {"OOB_BFLTR" ,0x100, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {"OOB_INIT_MIN" ,0x102,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {"OOB_INIT_MAX" ,0x104,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {"OOB_INIT_NEG" ,0x106,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {"OOB_SAS_MIN" ,0x108,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {"OOB_SAS_MAX" ,0x10A,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {"OOB_SAS_NEG" ,0x10C,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {"OOB_WAKE_MIN" ,0x10E,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {"OOB_WAKE_MAX" ,0x110,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {"OOB_WAKE_NEG" ,0x112,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {"OOB_IDLE_MAX" ,0x114,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {"OOB_BURST_MAX" ,0x116,16, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {"OOB_XMIT_BURST" ,0x118, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {"OOB_SEND_PAIRS" ,0x119, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {"OOB_INIT_IDLE" ,0x11A, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {"OOB_INIT_NEGO" ,0x11C, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {"OOB_SAS_IDLE" ,0x11E, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {"OOB_SAS_NEGO" ,0x120, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {"OOB_WAKE_IDLE" ,0x122, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {"OOB_WAKE_NEGO" ,0x124, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {"OOB_DATA_KBITS" ,0x126, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {"OOB_BURST_DATA" ,0x128,32, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {"OOB_ALIGN_0_DATA" ,0x12C,32, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {"OOB_ALIGN_1_DATA" ,0x130,32, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {"OOB_SYNC_DATA" ,0x134,32, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {"OOB_D10_2_DATA" ,0x138,32, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {"OOB_PHY_RST_CNT" ,0x13C,32, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {"OOB_SIG_GEN" ,0x140, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {"OOB_XMIT" ,0x141, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {"FUNCTION_MAKS" ,0x142, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {"OOB_MODE" ,0x143, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {"CURRENT_STATUS" ,0x144, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {"SPEED_MASK" ,0x145, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {"PRIM_COUNT" ,0x146, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {"OOB_SIGNALS" ,0x148, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {"OOB_DATA_DET" ,0x149, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {"OOB_TIME_OUT" ,0x14C, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {"OOB_TIMER_ENABLE" ,0x14D, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {"OOB_STATUS" ,0x14E, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {"HOT_PLUG_DELAY" ,0x150, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {"RCD_DELAY" ,0x151, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {"COMSAS_TIMER" ,0x152, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {"SNTT_DELAY" ,0x153, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {"SPD_CHNG_DELAY" ,0x154, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {"SNLT_DELAY" ,0x155, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {"SNWT_DELAY" ,0x156, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {"ALIGN_DELAY" ,0x157, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {"INT_ENABLE_0" ,0x158, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {"INT_ENABLE_1" ,0x159, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {"INT_ENABLE_2" ,0x15A, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {"INT_ENABLE_3" ,0x15B, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {"OOB_TEST_REG" ,0x15C, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {"PHY_CONTROL_0" ,0x160, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {"PHY_CONTROL_1" ,0x161, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {"PHY_CONTROL_2" ,0x162, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {"PHY_CONTROL_3" ,0x163, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {"PHY_OOB_CAL_TX" ,0x164, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {"PHY_OOB_CAL_RX" ,0x165, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {"OOB_PHY_CAL_TX" ,0x166, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {"OOB_PHY_CAL_RX" ,0x167, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {"PHY_CONTROL_4" ,0x168, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {"PHY_TEST" ,0x169, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {"PHY_PWR_CTL" ,0x16A, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {"PHY_PWR_DELAY" ,0x16B, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {"OOB_SM_CON" ,0x16C, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {"ADDR_TRAP_1" ,0x16D, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {"ADDR_NEXT_1" ,0x16E, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {"NEXT_ST_1" ,0x16F, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {"OOB_SM_STATE" ,0x170, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {"ADDR_TRAP_2" ,0x171, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {"ADDR_NEXT_2" ,0x172, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {"NEXT_ST_2" ,0x173, 8, MD(5)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {NULL, 0, 0, 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define STR_8BIT " %30s[0x%04x]:0x%02x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define STR_16BIT " %30s[0x%04x]:0x%04x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define STR_32BIT " %30s[0x%04x]:0x%08x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define STR_64BIT " %30s[0x%04x]:0x%llx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define PRINT_REG_8bit(_ha, _n, _r) asd_printk(STR_8BIT, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) asd_read_reg_byte(_ha, _r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define PRINT_REG_16bit(_ha, _n, _r) asd_printk(STR_16BIT, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) asd_read_reg_word(_ha, _r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define PRINT_REG_32bit(_ha, _n, _r) asd_printk(STR_32BIT, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) asd_read_reg_dword(_ha, _r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define PRINT_CREG_8bit(_ha, _n) asd_printk(STR_8BIT, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) asd_read_reg_byte(_ha, C##_n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define PRINT_CREG_16bit(_ha, _n) asd_printk(STR_16BIT, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) asd_read_reg_word(_ha, C##_n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define PRINT_CREG_32bit(_ha, _n) asd_printk(STR_32BIT, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) asd_read_reg_dword(_ha, C##_n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define MSTR_8BIT " Mode:%02d %30s[0x%04x]:0x%02x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define MSTR_16BIT " Mode:%02d %30s[0x%04x]:0x%04x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define MSTR_32BIT " Mode:%02d %30s[0x%04x]:0x%08x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define PRINT_MREG_8bit(_ha, _m, _n, _r) asd_printk(MSTR_8BIT, _m, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) asd_read_reg_byte(_ha, _r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define PRINT_MREG_16bit(_ha, _m, _n, _r) asd_printk(MSTR_16BIT, _m, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) asd_read_reg_word(_ha, _r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define PRINT_MREG_32bit(_ha, _m, _n, _r) asd_printk(MSTR_32BIT, _m, #_n, _n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) asd_read_reg_dword(_ha, _r))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* can also be used for MD when the register is mode aware already */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define PRINT_MIS_byte(_ha, _n) asd_printk(STR_8BIT, #_n,CSEQ_##_n-CMAPPEDSCR,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) asd_read_reg_byte(_ha, CSEQ_##_n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define PRINT_MIS_word(_ha, _n) asd_printk(STR_16BIT,#_n,CSEQ_##_n-CMAPPEDSCR,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) asd_read_reg_word(_ha, CSEQ_##_n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define PRINT_MIS_dword(_ha, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) asd_printk(STR_32BIT,#_n,CSEQ_##_n-CMAPPEDSCR,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) asd_read_reg_dword(_ha, CSEQ_##_n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define PRINT_MIS_qword(_ha, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) asd_printk(STR_64BIT, #_n,CSEQ_##_n-CMAPPEDSCR, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) (unsigned long long)(((u64)asd_read_reg_dword(_ha, CSEQ_##_n)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) | (((u64)asd_read_reg_dword(_ha, (CSEQ_##_n)+4))<<32)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define CMDP_REG(_n, _m) (_m*(CSEQ_PAGE_SIZE*2)+CSEQ_##_n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define PRINT_CMDP_word(_ha, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) asd_printk("%20s 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #_n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) asd_read_reg_word(_ha, CMDP_REG(_n, 0)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) asd_read_reg_word(_ha, CMDP_REG(_n, 1)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) asd_read_reg_word(_ha, CMDP_REG(_n, 2)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) asd_read_reg_word(_ha, CMDP_REG(_n, 3)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) asd_read_reg_word(_ha, CMDP_REG(_n, 4)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) asd_read_reg_word(_ha, CMDP_REG(_n, 5)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) asd_read_reg_word(_ha, CMDP_REG(_n, 6)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) asd_read_reg_word(_ha, CMDP_REG(_n, 7)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define PRINT_CMDP_byte(_ha, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) asd_printk("%20s 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x\n", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #_n, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) asd_read_reg_byte(_ha, CMDP_REG(_n, 0)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) asd_read_reg_byte(_ha, CMDP_REG(_n, 1)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) asd_read_reg_byte(_ha, CMDP_REG(_n, 2)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) asd_read_reg_byte(_ha, CMDP_REG(_n, 3)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) asd_read_reg_byte(_ha, CMDP_REG(_n, 4)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) asd_read_reg_byte(_ha, CMDP_REG(_n, 5)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) asd_read_reg_byte(_ha, CMDP_REG(_n, 6)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) asd_read_reg_byte(_ha, CMDP_REG(_n, 7)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static void asd_dump_cseq_state(struct asd_ha_struct *asd_ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) asd_printk("CSEQ STATE\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) asd_printk("ARP2 REGISTERS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) PRINT_CREG_32bit(asd_ha, ARP2CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) PRINT_CREG_32bit(asd_ha, ARP2INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) PRINT_CREG_32bit(asd_ha, ARP2INTEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) PRINT_CREG_8bit(asd_ha, MODEPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) PRINT_CREG_8bit(asd_ha, ALTMODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) PRINT_CREG_8bit(asd_ha, FLAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) PRINT_CREG_8bit(asd_ha, ARP2INTCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) PRINT_CREG_16bit(asd_ha, STACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) PRINT_CREG_16bit(asd_ha, PRGMCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) PRINT_CREG_16bit(asd_ha, ACCUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) PRINT_CREG_16bit(asd_ha, SINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) PRINT_CREG_16bit(asd_ha, DINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) PRINT_CREG_8bit(asd_ha, SINDIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) PRINT_CREG_8bit(asd_ha, DINDIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) PRINT_CREG_8bit(asd_ha, JUMLDIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) PRINT_CREG_8bit(asd_ha, ARP2HALTCODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) PRINT_CREG_16bit(asd_ha, CURRADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) PRINT_CREG_16bit(asd_ha, LASTADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) PRINT_CREG_16bit(asd_ha, NXTLADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) asd_printk("IOP REGISTERS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) PRINT_REG_32bit(asd_ha, BISTCTL1, CBISTCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) PRINT_CREG_32bit(asd_ha, MAPPEDSCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) asd_printk("CIO REGISTERS\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) for (mode = 0; mode < 9; mode++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) PRINT_MREG_16bit(asd_ha, mode, MnSCBPTR, CMnSCBPTR(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) PRINT_MREG_16bit(asd_ha, 15, MnSCBPTR, CMnSCBPTR(15));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) for (mode = 0; mode < 9; mode++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) PRINT_MREG_16bit(asd_ha, mode, MnDDBPTR, CMnDDBPTR(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) PRINT_MREG_16bit(asd_ha, 15, MnDDBPTR, CMnDDBPTR(15));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) for (mode = 0; mode < 8; mode++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) PRINT_MREG_32bit(asd_ha, mode, MnREQMBX, CMnREQMBX(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) for (mode = 0; mode < 8; mode++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) PRINT_MREG_32bit(asd_ha, mode, MnRSPMBX, CMnRSPMBX(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) for (mode = 0; mode < 8; mode++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) PRINT_MREG_32bit(asd_ha, mode, MnINT, CMnINT(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) for (mode = 0; mode < 8; mode++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) PRINT_MREG_32bit(asd_ha, mode, MnINTEN, CMnINTEN(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) PRINT_CREG_8bit(asd_ha, SCRATCHPAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) for (mode = 0; mode < 8; mode++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) PRINT_MREG_8bit(asd_ha, mode, MnSCRATCHPAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) CMnSCRATCHPAGE(mode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) PRINT_REG_32bit(asd_ha, CLINKCON, CLINKCON);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) PRINT_REG_8bit(asd_ha, CCONMSK, CCONMSK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) PRINT_REG_8bit(asd_ha, CCONEXIST, CCONEXIST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) PRINT_REG_16bit(asd_ha, CCONMODE, CCONMODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) PRINT_REG_32bit(asd_ha, CTIMERCALC, CTIMERCALC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) PRINT_REG_8bit(asd_ha, CINTDIS, CINTDIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) asd_printk("SCRATCH MEMORY\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) asd_printk("MIP 4 >>>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) PRINT_MIS_word(asd_ha, Q_EXE_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) PRINT_MIS_word(asd_ha, Q_EXE_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) PRINT_MIS_word(asd_ha, Q_DONE_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) PRINT_MIS_word(asd_ha, Q_DONE_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) PRINT_MIS_word(asd_ha, Q_SEND_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) PRINT_MIS_word(asd_ha, Q_SEND_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) PRINT_MIS_word(asd_ha, Q_DMA2CHIM_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) PRINT_MIS_word(asd_ha, Q_DMA2CHIM_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) PRINT_MIS_word(asd_ha, Q_COPY_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) PRINT_MIS_word(asd_ha, Q_COPY_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) PRINT_MIS_word(asd_ha, REG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) PRINT_MIS_word(asd_ha, REG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) PRINT_MIS_dword(asd_ha, REG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) PRINT_MIS_byte(asd_ha, LINK_CTL_Q_MAP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) PRINT_MIS_byte(asd_ha, MAX_CSEQ_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) PRINT_MIS_byte(asd_ha, FREE_LIST_HACK_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) asd_printk("MIP 5 >>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) PRINT_MIS_qword(asd_ha, EST_NEXUS_REQ_QUEUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) PRINT_MIS_qword(asd_ha, EST_NEXUS_REQ_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) PRINT_MIS_word(asd_ha, Q_EST_NEXUS_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) PRINT_MIS_word(asd_ha, Q_EST_NEXUS_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) PRINT_MIS_word(asd_ha, NEED_EST_NEXUS_SCB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) PRINT_MIS_byte(asd_ha, EST_NEXUS_REQ_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) PRINT_MIS_byte(asd_ha, EST_NEXUS_REQ_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) PRINT_MIS_byte(asd_ha, EST_NEXUS_SCB_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) asd_printk("MIP 6 >>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) PRINT_MIS_word(asd_ha, INT_ROUT_RET_ADDR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) PRINT_MIS_word(asd_ha, INT_ROUT_RET_ADDR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) PRINT_MIS_word(asd_ha, INT_ROUT_SCBPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) PRINT_MIS_byte(asd_ha, INT_ROUT_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) PRINT_MIS_byte(asd_ha, ISR_SCRATCH_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) PRINT_MIS_word(asd_ha, ISR_SAVE_SINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) PRINT_MIS_word(asd_ha, ISR_SAVE_DINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) PRINT_MIS_word(asd_ha, Q_MONIRTT_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) PRINT_MIS_word(asd_ha, Q_MONIRTT_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) PRINT_MIS_byte(asd_ha, FREE_SCB_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) PRINT_MIS_word(asd_ha, BUILTIN_FREE_SCB_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) PRINT_MIS_word(asd_ha, BUILTIN_FREE_SCB_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) PRINT_MIS_word(asd_ha, EXTENDED_FREE_SCB_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) PRINT_MIS_word(asd_ha, EXTENDED_FREE_SCB_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) asd_printk("MIP 7 >>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) PRINT_MIS_qword(asd_ha, EMPTY_REQ_QUEUE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) PRINT_MIS_qword(asd_ha, EMPTY_REQ_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) PRINT_MIS_word(asd_ha, Q_EMPTY_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) PRINT_MIS_word(asd_ha, Q_EMPTY_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) PRINT_MIS_word(asd_ha, NEED_EMPTY_SCB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) PRINT_MIS_byte(asd_ha, EMPTY_REQ_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) PRINT_MIS_byte(asd_ha, EMPTY_REQ_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) PRINT_MIS_byte(asd_ha, EMPTY_SCB_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) PRINT_MIS_word(asd_ha, PRIMITIVE_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) PRINT_MIS_dword(asd_ha, TIMEOUT_CONST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) asd_printk("MDP 0 >>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) asd_printk("%-20s %6s %6s %6s %6s %6s %6s %6s %6s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) "Mode: ", "0", "1", "2", "3", "4", "5", "6", "7");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) PRINT_CMDP_word(asd_ha, LRM_SAVE_SINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) PRINT_CMDP_word(asd_ha, LRM_SAVE_SCBPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) PRINT_CMDP_word(asd_ha, Q_LINK_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) PRINT_CMDP_word(asd_ha, Q_LINK_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) PRINT_CMDP_byte(asd_ha, LRM_SAVE_SCRPAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) asd_printk("MDP 0 Mode 8 >>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) PRINT_MIS_word(asd_ha, RET_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) PRINT_MIS_word(asd_ha, RET_SCBPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) PRINT_MIS_word(asd_ha, SAVE_SCBPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) PRINT_MIS_word(asd_ha, EMPTY_TRANS_CTX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) PRINT_MIS_word(asd_ha, RESP_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) PRINT_MIS_word(asd_ha, TMF_SCBPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) PRINT_MIS_word(asd_ha, GLOBAL_PREV_SCB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) PRINT_MIS_word(asd_ha, GLOBAL_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) PRINT_MIS_word(asd_ha, CLEAR_LU_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) PRINT_MIS_byte(asd_ha, TMF_OPCODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) PRINT_MIS_byte(asd_ha, SCRATCH_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) PRINT_MIS_word(asd_ha, HSB_SITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) PRINT_MIS_word(asd_ha, FIRST_INV_SCB_SITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) PRINT_MIS_word(asd_ha, FIRST_INV_DDB_SITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) asd_printk("MDP 1 Mode 8 >>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) PRINT_MIS_qword(asd_ha, LUN_TO_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) PRINT_MIS_qword(asd_ha, LUN_TO_CHECK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) asd_printk("MDP 2 Mode 8 >>>>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) PRINT_MIS_qword(asd_ha, HQ_NEW_POINTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) PRINT_MIS_qword(asd_ha, HQ_DONE_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) PRINT_MIS_dword(asd_ha, HQ_DONE_POINTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) PRINT_MIS_byte(asd_ha, HQ_DONE_PASS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #define PRINT_LREG_8bit(_h, _lseq, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) asd_printk(STR_8BIT, #_n, _n, asd_read_reg_byte(_h, Lm##_n(_lseq)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) #define PRINT_LREG_16bit(_h, _lseq, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) asd_printk(STR_16BIT, #_n, _n, asd_read_reg_word(_h, Lm##_n(_lseq)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) #define PRINT_LREG_32bit(_h, _lseq, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) asd_printk(STR_32BIT, #_n, _n, asd_read_reg_dword(_h, Lm##_n(_lseq)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) #define PRINT_LMIP_byte(_h, _lseq, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) asd_printk(STR_8BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) asd_read_reg_byte(_h, LmSEQ_##_n(_lseq)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) #define PRINT_LMIP_word(_h, _lseq, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) asd_printk(STR_16BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) asd_read_reg_word(_h, LmSEQ_##_n(_lseq)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #define PRINT_LMIP_dword(_h, _lseq, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) asd_printk(STR_32BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) asd_read_reg_dword(_h, LmSEQ_##_n(_lseq)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) #define PRINT_LMIP_qword(_h, _lseq, _n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) asd_printk(STR_64BIT, #_n, LmSEQ_##_n(_lseq)-LmSCRATCH(_lseq), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) (unsigned long long)(((unsigned long long) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) asd_read_reg_dword(_h, LmSEQ_##_n(_lseq))) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) | (((unsigned long long) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) asd_read_reg_dword(_h, LmSEQ_##_n(_lseq)+4))<<32)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static void asd_print_lseq_cio_reg(struct asd_ha_struct *asd_ha,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) u32 lseq_cio_addr, int i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) switch (LSEQmCIOREGS[i].width) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) asd_printk("%20s[0x%x]: 0x%02x\n", LSEQmCIOREGS[i].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) LSEQmCIOREGS[i].offs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) asd_read_reg_byte(asd_ha, lseq_cio_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) LSEQmCIOREGS[i].offs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) case 16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) asd_printk("%20s[0x%x]: 0x%04x\n", LSEQmCIOREGS[i].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) LSEQmCIOREGS[i].offs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) asd_read_reg_word(asd_ha, lseq_cio_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) LSEQmCIOREGS[i].offs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) case 32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) asd_printk("%20s[0x%x]: 0x%08x\n", LSEQmCIOREGS[i].name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) LSEQmCIOREGS[i].offs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) asd_read_reg_dword(asd_ha, lseq_cio_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) LSEQmCIOREGS[i].offs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static void asd_dump_lseq_state(struct asd_ha_struct *asd_ha, int lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) u32 moffs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) asd_printk("LSEQ %d STATE\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) asd_printk("LSEQ%d: ARP2 REGISTERS\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) PRINT_LREG_32bit(asd_ha, lseq, ARP2CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) PRINT_LREG_32bit(asd_ha, lseq, ARP2INT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) PRINT_LREG_32bit(asd_ha, lseq, ARP2INTEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) PRINT_LREG_8bit(asd_ha, lseq, MODEPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) PRINT_LREG_8bit(asd_ha, lseq, ALTMODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) PRINT_LREG_8bit(asd_ha, lseq, FLAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) PRINT_LREG_8bit(asd_ha, lseq, ARP2INTCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) PRINT_LREG_16bit(asd_ha, lseq, STACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) PRINT_LREG_16bit(asd_ha, lseq, PRGMCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) PRINT_LREG_16bit(asd_ha, lseq, ACCUM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) PRINT_LREG_16bit(asd_ha, lseq, SINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) PRINT_LREG_16bit(asd_ha, lseq, DINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) PRINT_LREG_8bit(asd_ha, lseq, SINDIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) PRINT_LREG_8bit(asd_ha, lseq, DINDIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) PRINT_LREG_8bit(asd_ha, lseq, JUMLDIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) PRINT_LREG_8bit(asd_ha, lseq, ARP2HALTCODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) PRINT_LREG_16bit(asd_ha, lseq, CURRADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) PRINT_LREG_16bit(asd_ha, lseq, LASTADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) PRINT_LREG_16bit(asd_ha, lseq, NXTLADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) asd_printk("LSEQ%d: IOP REGISTERS\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) PRINT_LREG_32bit(asd_ha, lseq, MODECTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) PRINT_LREG_32bit(asd_ha, lseq, DBGMODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) PRINT_LREG_32bit(asd_ha, lseq, CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) PRINT_REG_32bit(asd_ha, BISTCTL0, LmBISTCTL0(lseq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) PRINT_REG_32bit(asd_ha, BISTCTL1, LmBISTCTL1(lseq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) asd_printk("LSEQ%d: CIO REGISTERS\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) asd_printk("Mode common:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) for (mode = 0; mode < 8; mode++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) u32 lseq_cio_addr = LmSEQ_PHY_BASE(mode, lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) for (i = 0; LSEQmCIOREGS[i].name; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (LSEQmCIOREGS[i].mode == MODE_COMMON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) asd_print_lseq_cio_reg(asd_ha,lseq_cio_addr,i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) asd_printk("Mode unique:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) for (mode = 0; mode < 8; mode++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) u32 lseq_cio_addr = LmSEQ_PHY_BASE(mode, lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) asd_printk("Mode %d\n", mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) for (i = 0; LSEQmCIOREGS[i].name; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (!(LSEQmCIOREGS[i].mode & (1 << mode)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) asd_print_lseq_cio_reg(asd_ha, lseq_cio_addr, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) asd_printk("SCRATCH MEMORY\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) asd_printk("LSEQ%d MIP 0 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) PRINT_LMIP_word(asd_ha, lseq, Q_TGTXFR_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) PRINT_LMIP_word(asd_ha, lseq, Q_TGTXFR_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) PRINT_LMIP_byte(asd_ha, lseq, LINK_NUMBER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PRINT_LMIP_byte(asd_ha, lseq, SCRATCH_FLAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) PRINT_LMIP_dword(asd_ha, lseq, CONNECTION_STATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) PRINT_LMIP_word(asd_ha, lseq, CONCTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) PRINT_LMIP_byte(asd_ha, lseq, CONSTAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) PRINT_LMIP_byte(asd_ha, lseq, CONNECTION_MODES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) PRINT_LMIP_word(asd_ha, lseq, REG1_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) PRINT_LMIP_word(asd_ha, lseq, REG2_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) PRINT_LMIP_word(asd_ha, lseq, REG3_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) PRINT_LMIP_qword(asd_ha, lseq,REG0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) asd_printk("LSEQ%d MIP 1 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) PRINT_LMIP_word(asd_ha, lseq, EST_NEXUS_SCBPTR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_OPCODE3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_SCB_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) PRINT_LMIP_byte(asd_ha, lseq, EST_NEXUS_BUF_AVAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) PRINT_LMIP_dword(asd_ha, lseq, TIMEOUT_CONST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) PRINT_LMIP_word(asd_ha, lseq, ISR_SAVE_SINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) PRINT_LMIP_word(asd_ha, lseq, ISR_SAVE_DINDEX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) asd_printk("LSEQ%d MIP 2 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) PRINT_LMIP_word(asd_ha, lseq, EMPTY_SCB_PTR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_OPCD3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) PRINT_LMIP_byte(asd_ha, lseq, EMPTY_SCB_TAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) PRINT_LMIP_byte(asd_ha, lseq, EMPTY_BUFS_AVAIL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) asd_printk("LSEQ%d MIP 3 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) PRINT_LMIP_dword(asd_ha, lseq, DEV_PRES_TMR_TOUT_CONST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) PRINT_LMIP_dword(asd_ha, lseq, SATA_INTERLOCK_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) PRINT_LMIP_dword(asd_ha, lseq, SRST_ASSERT_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) PRINT_LMIP_dword(asd_ha, lseq, RCV_FIS_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) PRINT_LMIP_dword(asd_ha, lseq, ONE_MILLISEC_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) PRINT_LMIP_dword(asd_ha, lseq, TEN_MS_COMINIT_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) PRINT_LMIP_dword(asd_ha, lseq, SMP_RCV_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) for (mode = 0; mode < 3; mode++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) asd_printk("LSEQ%d MDP 0 MODE %d >>>>\n", lseq, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) moffs = mode * LSEQ_MODE_SCRATCH_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) asd_printk(STR_16BIT, "RET_ADDR", 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR(lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) asd_printk(STR_16BIT, "REG0_MODE", 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) asd_read_reg_word(asd_ha, LmSEQ_REG0_MODE(lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) asd_printk(STR_16BIT, "MODE_FLAGS", 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) asd_read_reg_word(asd_ha, LmSEQ_MODE_FLAGS(lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) asd_printk(STR_16BIT, "RET_ADDR2", 0x6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR2(lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) asd_printk(STR_16BIT, "RET_ADDR1", 0x8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR1(lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) asd_printk(STR_8BIT, "OPCODE_TO_CSEQ", 0xB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) asd_read_reg_byte(asd_ha, LmSEQ_OPCODE_TO_CSEQ(lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) asd_printk(STR_16BIT, "DATA_TO_CSEQ", 0xC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) asd_read_reg_word(asd_ha, LmSEQ_DATA_TO_CSEQ(lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) asd_printk("LSEQ%d MDP 0 MODE 5 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) moffs = LSEQ_MODE5_PAGE0_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) asd_printk(STR_16BIT, "RET_ADDR", 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR(lseq) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) asd_printk(STR_16BIT, "REG0_MODE", 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) asd_read_reg_word(asd_ha, LmSEQ_REG0_MODE(lseq) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) asd_printk(STR_16BIT, "MODE_FLAGS", 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) asd_read_reg_word(asd_ha, LmSEQ_MODE_FLAGS(lseq) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) asd_printk(STR_16BIT, "RET_ADDR2", 0x6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR2(lseq) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) asd_printk(STR_16BIT, "RET_ADDR1", 0x8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) asd_read_reg_word(asd_ha, LmSEQ_RET_ADDR1(lseq) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) asd_printk(STR_8BIT, "OPCODE_TO_CSEQ", 0xB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) asd_read_reg_byte(asd_ha, LmSEQ_OPCODE_TO_CSEQ(lseq) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) asd_printk(STR_16BIT, "DATA_TO_CSEQ", 0xC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) asd_read_reg_word(asd_ha, LmSEQ_DATA_TO_CSEQ(lseq) + moffs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) asd_printk("LSEQ%d MDP 0 MODE 0 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) PRINT_LMIP_word(asd_ha, lseq, FIRST_INV_DDB_SITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) PRINT_LMIP_word(asd_ha, lseq, EMPTY_TRANS_CTX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) PRINT_LMIP_word(asd_ha, lseq, RESP_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) PRINT_LMIP_word(asd_ha, lseq, FIRST_INV_SCB_SITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) PRINT_LMIP_dword(asd_ha, lseq, INTEN_SAVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_FRM_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_PROTOCOL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) PRINT_LMIP_byte(asd_ha, lseq, RESP_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) PRINT_LMIP_byte(asd_ha, lseq, LAST_LOADED_SGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) PRINT_LMIP_byte(asd_ha, lseq, SAVE_SCBPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) asd_printk("LSEQ%d MDP 0 MODE 1 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) PRINT_LMIP_word(asd_ha, lseq, Q_XMIT_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) PRINT_LMIP_word(asd_ha, lseq, M1_EMPTY_TRANS_CTX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) PRINT_LMIP_word(asd_ha, lseq, INI_CONN_TAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) PRINT_LMIP_byte(asd_ha, lseq, FAILED_OPEN_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) PRINT_LMIP_byte(asd_ha, lseq, XMIT_REQUEST_TYPE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) PRINT_LMIP_byte(asd_ha, lseq, M1_RESP_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) PRINT_LMIP_byte(asd_ha, lseq, M1_LAST_LOADED_SGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) PRINT_LMIP_word(asd_ha, lseq, M1_SAVE_SCBPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) asd_printk("LSEQ%d MDP 0 MODE 2 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) PRINT_LMIP_word(asd_ha, lseq, PORT_COUNTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) PRINT_LMIP_word(asd_ha, lseq, PM_TABLE_PTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) PRINT_LMIP_word(asd_ha, lseq, SATA_INTERLOCK_TMR_SAVE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) PRINT_LMIP_word(asd_ha, lseq, IP_BITL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) PRINT_LMIP_word(asd_ha, lseq, COPY_SMP_CONN_TAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) PRINT_LMIP_byte(asd_ha, lseq, P0M2_OFFS1AH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) asd_printk("LSEQ%d MDP 0 MODE 4/5 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) PRINT_LMIP_word(asd_ha, lseq, Q_LINK_HEAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) PRINT_LMIP_byte(asd_ha, lseq, LINK_RST_ERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) PRINT_LMIP_byte(asd_ha, lseq, SAVED_OOB_SIGNALS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) PRINT_LMIP_byte(asd_ha, lseq, SAS_RESET_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) PRINT_LMIP_byte(asd_ha, lseq, LINK_RESET_RETRY_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) PRINT_LMIP_byte(asd_ha, lseq, NUM_LINK_RESET_RETRIES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) PRINT_LMIP_word(asd_ha, lseq, OOB_INT_ENABLES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) PRINT_LMIP_word(asd_ha, lseq, NOTIFY_TIMER_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) PRINT_LMIP_word(asd_ha, lseq, NOTIFY_TIMER_DOWN_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) asd_printk("LSEQ%d MDP 1 MODE 0 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) PRINT_LMIP_qword(asd_ha, lseq, SG_LIST_PTR_ADDR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) PRINT_LMIP_qword(asd_ha, lseq, SG_LIST_PTR_ADDR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) asd_printk("LSEQ%d MDP 1 MODE 1 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) PRINT_LMIP_qword(asd_ha, lseq, M1_SG_LIST_PTR_ADDR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) PRINT_LMIP_qword(asd_ha, lseq, M1_SG_LIST_PTR_ADDR1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) asd_printk("LSEQ%d MDP 1 MODE 2 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) PRINT_LMIP_dword(asd_ha, lseq, INVALID_DWORD_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) PRINT_LMIP_dword(asd_ha, lseq, DISPARITY_ERROR_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) PRINT_LMIP_dword(asd_ha, lseq, LOSS_OF_SYNC_COUNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) asd_printk("LSEQ%d MDP 1 MODE 4/5 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) PRINT_LMIP_dword(asd_ha, lseq, FRAME_TYPE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) PRINT_LMIP_dword(asd_ha, lseq, HASHED_SRC_ADDR_MASK_PRINT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) PRINT_LMIP_byte(asd_ha, lseq, NUM_FILL_BYTES_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) PRINT_LMIP_word(asd_ha, lseq, TAG_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) PRINT_LMIP_word(asd_ha, lseq, TARGET_PORT_XFER_TAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) PRINT_LMIP_dword(asd_ha, lseq, DATA_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) asd_printk("LSEQ%d MDP 2 MODE 0 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) PRINT_LMIP_dword(asd_ha, lseq, SMP_RCV_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) PRINT_LMIP_byte(asd_ha, lseq, DEVICE_BITS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) PRINT_LMIP_word(asd_ha, lseq, SDB_DDB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) PRINT_LMIP_word(asd_ha, lseq, SDB_NUM_TAGS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) PRINT_LMIP_word(asd_ha, lseq, SDB_CURR_TAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) asd_printk("LSEQ%d MDP 2 MODE 1 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) PRINT_LMIP_qword(asd_ha, lseq, TX_ID_ADDR_FRAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) PRINT_LMIP_dword(asd_ha, lseq, OPEN_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) PRINT_LMIP_dword(asd_ha, lseq, SRST_AS_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) PRINT_LMIP_dword(asd_ha, lseq, LAST_LOADED_SG_EL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) asd_printk("LSEQ%d MDP 2 MODE 2 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) PRINT_LMIP_dword(asd_ha, lseq, CLOSE_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) PRINT_LMIP_dword(asd_ha, lseq, BREAK_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) PRINT_LMIP_dword(asd_ha, lseq, DWS_RESET_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) PRINT_LMIP_dword(asd_ha, lseq, SATA_INTERLOCK_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) PRINT_LMIP_dword(asd_ha, lseq, MCTL_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) asd_printk("LSEQ%d MDP 2 MODE 4/5 >>>>\n", lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) PRINT_LMIP_dword(asd_ha, lseq, COMINIT_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) PRINT_LMIP_dword(asd_ha, lseq, RCV_ID_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) PRINT_LMIP_dword(asd_ha, lseq, RCV_FIS_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) PRINT_LMIP_dword(asd_ha, lseq, DEV_PRES_TIMER_TERM_TS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * asd_dump_ddb_site -- dump a CSEQ DDB site
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * @asd_ha: pointer to host adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * @site_no: site number of interest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) void asd_dump_target_ddb(struct asd_ha_struct *asd_ha, u16 site_no)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (site_no >= asd_ha->hw_prof.max_ddbs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) #define DDB_FIELDB(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) asd_ddbsite_read_byte(asd_ha, site_no, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) offsetof(struct asd_ddb_ssp_smp_target_port, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) #define DDB2_FIELDB(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) asd_ddbsite_read_byte(asd_ha, site_no, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) offsetof(struct asd_ddb_stp_sata_target_port, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) #define DDB_FIELDW(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) asd_ddbsite_read_word(asd_ha, site_no, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) offsetof(struct asd_ddb_ssp_smp_target_port, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) #define DDB_FIELDD(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) asd_ddbsite_read_dword(asd_ha, site_no, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) offsetof(struct asd_ddb_ssp_smp_target_port, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) asd_printk("DDB: 0x%02x\n", site_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) asd_printk("conn_type: 0x%02x\n", DDB_FIELDB(conn_type));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) asd_printk("conn_rate: 0x%02x\n", DDB_FIELDB(conn_rate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) asd_printk("init_conn_tag: 0x%04x\n", be16_to_cpu(DDB_FIELDW(init_conn_tag)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) asd_printk("send_queue_head: 0x%04x\n", be16_to_cpu(DDB_FIELDW(send_queue_head)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) asd_printk("sq_suspended: 0x%02x\n", DDB_FIELDB(sq_suspended));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) asd_printk("DDB Type: 0x%02x\n", DDB_FIELDB(ddb_type));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) asd_printk("AWT Default: 0x%04x\n", DDB_FIELDW(awt_def));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) asd_printk("compat_features: 0x%02x\n", DDB_FIELDB(compat_features));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) asd_printk("Pathway Blocked Count: 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) DDB_FIELDB(pathway_blocked_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) asd_printk("arb_wait_time: 0x%04x\n", DDB_FIELDW(arb_wait_time));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) asd_printk("more_compat_features: 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) DDB_FIELDD(more_compat_features));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) asd_printk("Conn Mask: 0x%02x\n", DDB_FIELDB(conn_mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) asd_printk("flags: 0x%02x\n", DDB_FIELDB(flags));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) asd_printk("flags2: 0x%02x\n", DDB2_FIELDB(flags2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) asd_printk("ExecQ Tail: 0x%04x\n",DDB_FIELDW(exec_queue_tail));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) asd_printk("SendQ Tail: 0x%04x\n",DDB_FIELDW(send_queue_tail));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) asd_printk("Active Task Count: 0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) DDB_FIELDW(active_task_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) asd_printk("ITNL Reason: 0x%02x\n", DDB_FIELDB(itnl_reason));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) asd_printk("ITNL Timeout Const: 0x%04x\n", DDB_FIELDW(itnl_timeout));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) asd_printk("ITNL timestamp: 0x%08x\n", DDB_FIELDD(itnl_timestamp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) void asd_dump_ddb_0(struct asd_ha_struct *asd_ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) #define DDB0_FIELDB(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) asd_ddbsite_read_byte(asd_ha, 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) offsetof(struct asd_ddb_seq_shared, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) #define DDB0_FIELDW(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) asd_ddbsite_read_word(asd_ha, 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) offsetof(struct asd_ddb_seq_shared, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) #define DDB0_FIELDD(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) asd_ddbsite_read_dword(asd_ha,0 , \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) offsetof(struct asd_ddb_seq_shared, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) #define DDB0_FIELDA(__name, _o) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) asd_ddbsite_read_byte(asd_ha, 0, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) offsetof(struct asd_ddb_seq_shared, __name)+_o)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) asd_printk("DDB: 0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) asd_printk("q_free_ddb_head:%04x\n", DDB0_FIELDW(q_free_ddb_head));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) asd_printk("q_free_ddb_tail:%04x\n", DDB0_FIELDW(q_free_ddb_tail));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) asd_printk("q_free_ddb_cnt:%04x\n", DDB0_FIELDW(q_free_ddb_cnt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) asd_printk("q_used_ddb_head:%04x\n", DDB0_FIELDW(q_used_ddb_head));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) asd_printk("q_used_ddb_tail:%04x\n", DDB0_FIELDW(q_used_ddb_tail));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) asd_printk("shared_mem_lock:%04x\n", DDB0_FIELDW(shared_mem_lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) asd_printk("smp_conn_tag:%04x\n", DDB0_FIELDW(smp_conn_tag));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) asd_printk("est_nexus_buf_cnt:%04x\n", DDB0_FIELDW(est_nexus_buf_cnt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) asd_printk("est_nexus_buf_thresh:%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) DDB0_FIELDW(est_nexus_buf_thresh));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) asd_printk("conn_not_active:%02x\n", DDB0_FIELDB(conn_not_active));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) asd_printk("phy_is_up:%02x\n", DDB0_FIELDB(phy_is_up));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) asd_printk("port_map_by_links:%02x %02x %02x %02x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) "%02x %02x %02x %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) DDB0_FIELDA(port_map_by_links, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) DDB0_FIELDA(port_map_by_links, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) DDB0_FIELDA(port_map_by_links, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) DDB0_FIELDA(port_map_by_links, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) DDB0_FIELDA(port_map_by_links, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) DDB0_FIELDA(port_map_by_links, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) DDB0_FIELDA(port_map_by_links, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) DDB0_FIELDA(port_map_by_links, 7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) static void asd_dump_scb_site(struct asd_ha_struct *asd_ha, u16 site_no)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) #define SCB_FIELDB(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) asd_scbsite_read_byte(asd_ha, site_no, sizeof(struct scb_header) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) + offsetof(struct initiate_ssp_task, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) #define SCB_FIELDW(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) asd_scbsite_read_word(asd_ha, site_no, sizeof(struct scb_header) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) + offsetof(struct initiate_ssp_task, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) #define SCB_FIELDD(__name) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) asd_scbsite_read_dword(asd_ha, site_no, sizeof(struct scb_header) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) + offsetof(struct initiate_ssp_task, __name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) asd_printk("Total Xfer Len: 0x%08x.\n", SCB_FIELDD(total_xfer_len));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) asd_printk("Frame Type: 0x%02x.\n", SCB_FIELDB(ssp_frame.frame_type));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) asd_printk("Tag: 0x%04x.\n", SCB_FIELDW(ssp_frame.tag));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) asd_printk("Target Port Xfer Tag: 0x%04x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) SCB_FIELDW(ssp_frame.tptt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) asd_printk("Data Offset: 0x%08x.\n", SCB_FIELDW(ssp_frame.data_offs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) asd_printk("Retry Count: 0x%02x.\n", SCB_FIELDB(retry_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) * asd_dump_scb_sites -- dump currently used CSEQ SCB sites
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) * @asd_ha: pointer to host adapter struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) void asd_dump_scb_sites(struct asd_ha_struct *asd_ha)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) u16 site_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) for (site_no = 0; site_no < asd_ha->hw_prof.max_scbs; site_no++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) if (!SCB_SITE_VALID(site_no))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) /* We are only interested in SCB sites currently used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) opcode = asd_scbsite_read_byte(asd_ha, site_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) offsetof(struct scb_header,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) opcode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) if (opcode == 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) asd_printk("\nSCB: 0x%x\n", site_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) asd_dump_scb_site(asd_ha, site_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) #endif /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) * ads_dump_seq_state -- dump CSEQ and LSEQ states
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * @asd_ha: pointer to host adapter structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) * @lseq_mask: mask of LSEQs of interest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) void asd_dump_seq_state(struct asd_ha_struct *asd_ha, u8 lseq_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) int lseq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) asd_dump_cseq_state(asd_ha);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (lseq_mask != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) for_each_sequencer(lseq_mask, lseq_mask, lseq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) asd_dump_lseq_state(asd_ha, lseq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) void asd_dump_frame_rcvd(struct asd_phy *phy,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) struct done_list_struct *dl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) switch ((dl->status_block[1] & 0x70) >> 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) case SAS_PROTOCOL_STP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) ASD_DPRINTK("STP proto device-to-host FIS:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) case SAS_PROTOCOL_SSP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) ASD_DPRINTK("SAS proto IDENTIFY:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) for (i = 0; i < phy->sas_phy.frame_rcvd_size; i+=4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) ASD_DPRINTK("%02x: %02x %02x %02x %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) phy->frame_rcvd[i],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) phy->frame_rcvd[i+1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) phy->frame_rcvd[i+2],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) phy->frame_rcvd[i+3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) static void asd_dump_scb(struct asd_ascb *ascb, int ind)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) asd_printk("scb%d: vaddr: 0x%p, dma_handle: 0x%llx, next: 0x%llx, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) "index:%d, opcode:0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) ind, ascb->dma_scb.vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) (unsigned long long)ascb->dma_scb.dma_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) (unsigned long long)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) le64_to_cpu(ascb->scb->header.next_scb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) le16_to_cpu(ascb->scb->header.index),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) ascb->scb->header.opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) void asd_dump_scb_list(struct asd_ascb *ascb, int num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) asd_printk("dumping %d scbs:\n", num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) asd_dump_scb(ascb, i++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) --num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) if (num > 0 && !list_empty(&ascb->list)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) struct list_head *el;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) list_for_each(el, &ascb->list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) struct asd_ascb *s = list_entry(el, struct asd_ascb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) asd_dump_scb(s, i++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) if (--num <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) #endif /* 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) #endif /* ASD_DEBUG */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags