^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Aic7xxx register and scratch ram definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 1994-2001 Justin T. Gibbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2000-2001 Adaptec Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * notice, this list of conditions, and the following disclaimer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * without modification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * 2. Redistributions in binary form must reproduce at minimum a disclaimer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * substantially similar to the "NO WARRANTY" disclaimer below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * ("Disclaimer") and any redistribution must be conditioned upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * including a substantially similar Disclaimer requirement for further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * binary redistribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * 3. Neither the names of the above-listed copyright holders nor the names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * of any contributors may be used to endorse or promote products derived
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Alternatively, this software may be distributed under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * GNU General Public License ("GPL") version 2 as published by the Free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * POSSIBILITY OF SUCH DAMAGES.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * $FreeBSD$
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * This file is processed by the aic7xxx_asm utility for use in assembling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * firmware for the aic7xxx family of SCSI host adapters as well as to generate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * a C header file for use in the kernel portion of the Aic7xxx driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * All page numbers refer to the Adaptec AIC-7770 Data Book available from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * Adaptec's Technical Documents Department 1-800-934-2766
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * Registers marked "dont_generate_debug_code" are not (yet) referenced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * from the driver code, and this keyword inhibit generation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * of debug code for them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * REG_PRETTY_PRINT config will complain if dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * is added to the register which is referenced in the driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Unreferenced register with no dont_generate_debug_code will result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * in dead code. No warning is issued.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * SCSI Sequence Control (p. 3-11).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Each bit, when set starts a specific SCSI sequence on the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) register SCSISEQ {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) address 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) field TEMODE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) field ENSELO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) field ENSELI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) field ENRSELI 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) field ENAUTOATNO 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) field ENAUTOATNI 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) field ENAUTOATNP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) field SCSIRSTO 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * SCSI Transfer Control 0 Register (pp. 3-13).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * Controls the SCSI module data path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) register SXFRCTL0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) address 0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) field DFON 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) field DFPEXP 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) field FAST20 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) field CLRSTCNT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) field SPIOEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) field SCAMEN 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) field CLRCHN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * SCSI Transfer Control 1 Register (pp. 3-14,15).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Controls the SCSI module data path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) register SXFRCTL1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) address 0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) field BITBUCKET 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) field SWRAPEN 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) field ENSPCHK 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mask STIMESEL 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) field ENSTIMER 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) field ACTNEGEN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) field STPWEN 0x01 /* Powered Termination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * SCSI Control Signal Read Register (p. 3-15).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Reads the actual state of the SCSI bus pins
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) register SCSISIGI {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) address 0x003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) field CDI 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) field IOI 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) field MSGI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) field ATNI 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) field SELI 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) field BSYI 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) field REQI 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) field ACKI 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * Possible phases in SCSISIGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) mask PHASE_MASK CDI|IOI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) mask P_DATAOUT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) mask P_DATAIN IOI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) mask P_DATAOUT_DT P_DATAOUT|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) mask P_DATAIN_DT P_DATAIN|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) mask P_COMMAND CDI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) mask P_MESGOUT CDI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) mask P_STATUS CDI|IOI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) mask P_MESGIN CDI|IOI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * SCSI Control Signal Write Register (p. 3-16).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * Writing to this register modifies the control signals on the bus. Only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * those signals that are allowed in the current mode (Initiator/Target) are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * asserted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) register SCSISIGO {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) address 0x003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) field CDO 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) field IOO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) field MSGO 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) field ATNO 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) field SELO 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) field BSYO 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) field REQO 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) field ACKO 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * Possible phases to write into SCSISIG0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mask PHASE_MASK CDI|IOI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) mask P_DATAOUT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) mask P_DATAIN IOI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) mask P_COMMAND CDI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) mask P_MESGOUT CDI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) mask P_STATUS CDI|IOI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) mask P_MESGIN CDI|IOI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * SCSI Rate Control (p. 3-17).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * Contents of this register determine the Synchronous SCSI data transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * rate and the maximum synchronous Req/Ack offset. An offset of 0 in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * SOFS (3:0) bits disables synchronous data transfers. Any offset value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * greater than 0 enables synchronous transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) register SCSIRATE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) address 0x004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) field WIDEXFER 0x80 /* Wide transfer control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) field ENABLE_CRC 0x40 /* CRC for D-Phases */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) field SINGLE_EDGE 0x10 /* Disable DT Transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) mask SXFR 0x70 /* Sync transfer rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) mask SXFR_ULTRA2 0x0f /* Sync transfer rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) mask SOFS 0x0f /* Sync offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * SCSI ID (p. 3-18).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * Contains the ID of the board and the current target on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * selected channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) register SCSIID {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) address 0x005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) mask TID 0xf0 /* Target ID mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) mask TWIN_TID 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) field TWIN_CHNLB 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) mask OID 0x0f /* Our ID mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * SCSI Maximum Offset (p. 4-61 aic7890/91 Data Book)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * The aic7890/91 allow an offset of up to 127 transfers in both wide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * and narrow mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) alias SCSIOFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * SCSI Latched Data (p. 3-19).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * Read/Write latches used to transfer data on the SCSI bus during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * Automatic or Manual PIO mode. SCSIDATH can be used for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * upper byte of a 16bit wide asynchronouse data phase transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) register SCSIDATL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) address 0x006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) register SCSIDATH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) address 0x007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * SCSI Transfer Count (pp. 3-19,20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * These registers count down the number of bytes transferred
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * across the SCSI bus. The counter is decremented only once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * the data has been safely transferred. SDONE in SSTAT0 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * set when STCNT goes to 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) register STCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) address 0x008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) size 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* ALT_MODE registers (Ultra2 and Ultra160 chips) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) register SXFRCTL2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) address 0x013
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) field AUTORSTDIS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) field CMDDMAEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) mask ASYNC_SETUP 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* ALT_MODE register on Ultra160 chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) register OPTIONMODE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) address 0x008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) field AUTORATEEN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) field AUTOACKEN 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) field ATNMGMNTEN 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) field BUSFREEREV 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) field EXPPHASEDIS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) field SCSIDATL_IMGEN 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) field AUTO_MSGOUT_DE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) field DIS_MSGIN_DUALEDGE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE|DIS_MSGIN_DUALEDGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* ALT_MODE register on Ultra160 chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) register TARGCRCCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) address 0x00a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) size 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * Clear SCSI Interrupt 0 (p. 3-20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) register CLRSINT0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) address 0x00b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) field CLRSELDO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) field CLRSELDI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) field CLRSELINGO 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) field CLRSWRAP 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) field CLRIOERR 0x08 /* Ultra2 Only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) field CLRSPIORDY 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * SCSI Status 0 (p. 3-21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * Contains one set of SCSI Interrupt codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * These are most likely of interest to the sequencer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) register SSTAT0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) address 0x00b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) field TARGET 0x80 /* Board acting as target */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) field SELDO 0x40 /* Selection Done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) field SELDI 0x20 /* Board has been selected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) field SELINGO 0x10 /* Selection In Progress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) field SWRAP 0x08 /* 24bit counter wrap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) field IOERR 0x08 /* LVD Tranceiver mode changed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) field SDONE 0x04 /* STCNT = 0x000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) field SPIORDY 0x02 /* SCSI PIO Ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) field DMADONE 0x01 /* DMA transfer completed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * Clear SCSI Interrupt 1 (p. 3-23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * Writing a 1 to a bit clears the associated SCSI Interrupt in SSTAT1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) register CLRSINT1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) address 0x00c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) field CLRSELTIMEO 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) field CLRATNO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) field CLRSCSIRSTI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) field CLRBUSFREE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) field CLRSCSIPERR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) field CLRPHASECHG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) field CLRREQINIT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * SCSI Status 1 (p. 3-24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) register SSTAT1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) address 0x00c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) field SELTO 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) field ATNTARG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) field SCSIRSTI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) field PHASEMIS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) field BUSFREE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) field SCSIPERR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) field PHASECHG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) field REQINIT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * SCSI Status 2 (pp. 3-25,26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) register SSTAT2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) address 0x00d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) field OVERRUN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) field SHVALID 0x40 /* Shadow Layer non-zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) field EXP_ACTIVE 0x10 /* SCSI Expander Active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) field CRCVALERR 0x08 /* CRC doesn't match (U3 only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) field CRCENDERR 0x04 /* No terminal CRC packet (U3 only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) field CRCREQERR 0x02 /* Illegal CRC packet req (U3 only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) field DUAL_EDGE_ERR 0x01 /* Incorrect data phase (U3 only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) mask SFCNT 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) * SCSI Status 3 (p. 3-26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) register SSTAT3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) address 0x00e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) mask SCSICNT 0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) mask OFFCNT 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) mask U2OFFCNT 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * SCSI ID for the aic7890/91 chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) register SCSIID_ULTRA2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) address 0x00f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) mask TID 0xf0 /* Target ID mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) mask OID 0x0f /* Our ID mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * SCSI Interrupt Mode 1 (p. 3-28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * Setting any bit will enable the corresponding function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * in SIMODE0 to interrupt via the IRQ pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) register SIMODE0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) address 0x010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) field ENSELDO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) field ENSELDI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) field ENSELINGO 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) field ENSWRAP 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) field ENIOERR 0x08 /* LVD Tranceiver mode changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) field ENSDONE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) field ENSPIORDY 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) field ENDMADONE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * SCSI Interrupt Mode 1 (pp. 3-28,29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * Setting any bit will enable the corresponding function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * in SIMODE1 to interrupt via the IRQ pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) register SIMODE1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) address 0x011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) field ENSELTIMO 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) field ENATNTARG 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) field ENSCSIRST 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) field ENPHASEMIS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) field ENBUSFREE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) field ENSCSIPERR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) field ENPHASECHG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) field ENREQINIT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * SCSI Data Bus (High) (p. 3-29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * This register reads data on the SCSI Data bus directly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) register SCSIBUSL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) address 0x012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) register SCSIBUSH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) address 0x013
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) * SCSI/Host Address (p. 3-30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * These registers hold the host address for the byte about to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) * transferred on the SCSI bus. They are counted up in the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) * manner as STCNT is counted down. SHADDR should always be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) * to determine the address of the last byte transferred since HADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) * can be skewed by write ahead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) register SHADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) address 0x014
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * Selection Timeout Timer (p. 3-30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) register SELTIMER {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) address 0x018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) field STAGE6 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) field STAGE5 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) field STAGE4 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) field STAGE3 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) field STAGE2 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) field STAGE1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) alias TARGIDIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * Selection/Reselection ID (p. 3-31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * Upper four bits are the device id. The ONEBIT is set when the re/selecting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * device did not set its own ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) register SELID {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) address 0x019
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) mask SELID_MASK 0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) field ONEBIT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) register SCAMCTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) address 0x01a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) field ENSCAMSELO 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) field CLRSCAMSELID 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) field ALTSTIM 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) field DFLTTID 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) mask SCAMLVL 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) * Target Mode Selecting in ID bitmask (aic7890/91/96/97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) register TARGID {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) address 0x01b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) size 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) count 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) * Serial Port I/O Cabability register (p. 4-95 aic7860 Data Book)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) * Indicates if external logic has been attached to the chip to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) * perform the tasks of accessing a serial eeprom, testing termination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * strength, and performing cable detection. On the aic7860, most of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * these features are handled on chip, but on the aic7855 an attached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * aic3800 does the grunt work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) register SPIOCAP {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) address 0x01b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) count 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) field SOFT1 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) field SOFT0 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) field SOFTCMDEN 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) field EXT_BRDCTL 0x10 /* External Board control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) field SEEPROM 0x08 /* External serial eeprom logic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) field EEPROM 0x04 /* Writable external BIOS ROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) field ROM 0x02 /* Logic for accessing external ROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) field SSPIOCPS 0x01 /* Termination and cable detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) register BRDCTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) address 0x01d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) count 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) field BRDDAT7 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) field BRDDAT6 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) field BRDDAT5 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) field BRDSTB 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) field BRDCS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) field BRDRW 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) field BRDCTL1 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) field BRDCTL0 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /* 7890 Definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) field BRDDAT4 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) field BRDDAT3 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) field BRDDAT2 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) field BRDRW_ULTRA2 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) field BRDSTB_ULTRA2 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * Serial EEPROM Control (p. 4-92 in 7870 Databook)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * Controls the reading and writing of an external serial 1-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * EEPROM Device. In order to access the serial EEPROM, you must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) * first set the SEEMS bit that generates a request to the memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) * port for access to the serial EEPROM device. When the memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * port is not busy servicing another request, it reconfigures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) * to allow access to the serial EEPROM. When this happens, SEERDY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) * gets set high to verify that the memory port access has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) * granted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) * After successful arbitration for the memory port, the SEECS bit of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * the SEECTL register is connected to the chip select. The SEECK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * SEEDO, and SEEDI are connected to the clock, data out, and data in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * lines respectively. The SEERDY bit of SEECTL is useful in that it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * gives us an 800 nsec timer. After a write to the SEECTL register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) * the SEERDY goes high 800 nsec later. The one exception to this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) * when we first request access to the memory port. The SEERDY goes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * high to signify that access has been granted and, for this case, has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * no implied timing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * See 93cx6.c for detailed information on the protocol necessary to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * read the serial EEPROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) register SEECTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) address 0x01e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) count 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) field EXTARBACK 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) field EXTARBREQ 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) field SEEMS 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) field SEERDY 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) field SEECS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) field SEECK 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) field SEEDO 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) field SEEDI 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * SCSI Block Control (p. 3-32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * Controls Bus type and channel selection. In a twin channel configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * addresses 0x00-0x1e are gated to the appropriate channel based on this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * register. SELWIDE allows for the coexistence of 8bit and 16bit devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * on a wide bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) register SBLKCTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) address 0x01f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) field DIAGLEDEN 0x80 /* Aic78X0 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) field DIAGLEDON 0x40 /* Aic78X0 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) field AUTOFLUSHDIS 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) field SELBUSB 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) field ENAB40 0x08 /* LVD transceiver active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) field ENAB20 0x04 /* SE/HVD transceiver active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) field SELWIDE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) field XCVR 0x01 /* External transceiver active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) * Sequencer Control (p. 3-33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) * Error detection mode and speed configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) register SEQCTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) address 0x060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) count 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) field PERRORDIS 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) field PAUSEDIS 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) field FAILDIS 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) field FASTMODE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) field BRKADRINTEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) field STEP 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) field SEQRESET 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) field LOADRAM 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * Sequencer RAM Data (p. 3-34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) * Single byte window into the Scratch Ram area starting at the address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) * specified by SEQADDR0 and SEQADDR1. To write a full word, simply write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * four bytes in succession. The SEQADDRs will increment after the most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * significant byte is written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) register SEQRAM {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) address 0x061
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) * Sequencer Address Registers (p. 3-35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) * Only the first bit of SEQADDR1 holds addressing information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) register SEQADDR0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) address 0x062
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) register SEQADDR1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) address 0x063
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) count 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) mask SEQADDR1_MASK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * Accumulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * We cheat by passing arguments in the Accumulator up to the kernel driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) register ACCUM {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) address 0x064
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) accumulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) register SINDEX {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) address 0x065
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) sindex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) register DINDEX {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) address 0x066
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) register ALLONES {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) address 0x069
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) allones
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) register ALLZEROS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) address 0x06a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) allzeros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) register NONE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) address 0x06a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) register FLAGS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) address 0x06b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) count 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) field ZERO 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) field CARRY 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) register SINDIR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) address 0x06c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) register DINDIR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) address 0x06d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) register FUNCTION1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) address 0x06e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) register STACK {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) address 0x06f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) count 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) const STACK_SIZE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * Board Control (p. 3-43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) register BCTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) address 0x084
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) field ACE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) field ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * On the aic78X0 chips, Board Control is replaced by the DSCommand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * register (p. 4-64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) register DSCOMMAND0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) address 0x084
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) count 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) field CACHETHEN 0x80 /* Cache Threshold enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) field DPARCKEN 0x40 /* Data Parity Check Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) field MPARCKEN 0x20 /* Memory Parity Check Enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) field EXTREQLCK 0x10 /* External Request Lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) /* aic7890/91/96/97 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) field INTSCBRAMSEL 0x08 /* Internal SCB RAM Select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) field RAMPS 0x04 /* External SCB RAM Present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) field USCBSIZE32 0x02 /* Use 32byte SCB Page Size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) field CIOPARCKEN 0x01 /* Internal bus parity error enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) register DSCOMMAND1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) address 0x085
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) mask DSLATT 0xfc /* PCI latency timer (non-ultra2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) field HADDLDSEL1 0x02 /* Host Address Load Select Bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) field HADDLDSEL0 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) * Bus On/Off Time (p. 3-44) aic7770 only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) register BUSTIME {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) address 0x085
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) mask BOFF 0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) mask BON 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) * Bus Speed (p. 3-45) aic7770 only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) register BUSSPD {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) address 0x086
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) mask DFTHRSH 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) mask STBOFF 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) mask STBON 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) mask DFTHRSH_100 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) mask DFTHRSH_75 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) /* aic7850/55/60/70/80/95 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) register DSPCISTATUS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) address 0x086
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) count 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) mask DFTHRSH_100 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) /* aic7890/91/96/97 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) register HS_MAILBOX {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) address 0x086
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) mask HOST_MAILBOX 0xF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) mask SEQ_MAILBOX 0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) const HOST_MAILBOX_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) const SEQ_MAILBOX_SHIFT 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) * Host Control (p. 3-47) R/W
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) * Overall host control of the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) register HCNTRL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) address 0x087
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) count 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) field POWRDN 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) field SWINT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) field IRQMS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) field PAUSE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) field INTEN 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) field CHIPRST 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) field CHIPRSTACK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) * Host Address (p. 3-48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) * This register contains the address of the byte about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) * to be transferred across the host bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) register HADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) address 0x088
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) register HCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) address 0x08c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) size 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) * SCB Pointer (p. 3-49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) * Gate one of the SCBs into the SCBARRAY window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) register SCBPTR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) address 0x090
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) * Interrupt Status (p. 3-50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) * Status for system interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) register INTSTAT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) address 0x091
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) field BRKADRINT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) field SCSIINT 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) field CMDCMPLT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) field SEQINT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) mask BAD_PHASE SEQINT /* unknown scsi bus phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) mask SEND_REJECT 0x10|SEQINT /* sending a message reject */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) mask PROTO_VIOLATION 0x20|SEQINT /* SCSI protocol violation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) mask NO_MATCH 0x30|SEQINT /* no cmd match for reconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) mask IGN_WIDE_RES 0x40|SEQINT /* Complex IGN Wide Res Msg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) mask PDATA_REINIT 0x50|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) * Returned to data phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) * that requires data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) * transfer pointers to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) * recalculated from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) * transfer residual.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) mask HOST_MSG_LOOP 0x60|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) * The bus is ready for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) * host to perform another
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) * message transaction. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) * mechanism is used for things
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) * like sync/wide negotiation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) * that require a kernel based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) * message state engine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) mask BAD_STATUS 0x70|SEQINT /* Bad status from target */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) mask PERR_DETECTED 0x80|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) * Either the phase_lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) * or inb_next routine has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) * noticed a parity error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) mask DATA_OVERRUN 0x90|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) * Target attempted to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) * beyond the bounds of its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) * command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) mask MKMSG_FAILED 0xa0|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) * Target completed command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) * without honoring our ATN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) * request to issue a message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) mask MISSED_BUSFREE 0xb0|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) * The sequencer never saw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) * the bus go free after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) * either a command complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) * or disconnect message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) mask SCB_MISMATCH 0xc0|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) * Downloaded SCB's tag does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) * not match the entry we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) * intended to download.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) mask NO_FREE_SCB 0xd0|SEQINT /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) * get_free_or_disc_scb failed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) mask OUT_OF_RANGE 0xe0|SEQINT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) * Hard Error (p. 3-53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) * Reporting of catastrophic errors. You usually cannot recover from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) * these without a full board reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) register ERROR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) address 0x092
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) count 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) field CIOPARERR 0x80 /* Ultra2 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) field PCIERRSTAT 0x40 /* PCI only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) field MPARERR 0x20 /* PCI only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) field DPARERR 0x10 /* PCI only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) field SQPARERR 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) field ILLOPCODE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) field ILLSADDR 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) field ILLHADDR 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) * Clear Interrupt Status (p. 3-52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) register CLRINT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) address 0x092
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) count 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) field CLRPARERR 0x10 /* PCI only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) field CLRBRKADRINT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) field CLRSCSIINT 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) field CLRCMDINT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) field CLRSEQINT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) register DFCNTRL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) address 0x093
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) field PRELOADEN 0x80 /* aic7890 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) field WIDEODD 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) field SCSIEN 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) field SDMAEN 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) field SDMAENACK 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) field HDMAEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) field HDMAENACK 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) field DIRECTION 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) field FIFOFLUSH 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) field FIFORESET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) register DFSTATUS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) address 0x094
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) field PRELOAD_AVAIL 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) field DFCACHETH 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) field FIFOQWDEMP 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) field MREQPEND 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) field HDONE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) field DFTHRESH 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) field FIFOFULL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) field FIFOEMP 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) register DFWADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) address 0x95
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) register DFRADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) address 0x97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) register DFDAT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) address 0x099
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) * SCB Auto Increment (p. 3-59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) * Byte offset into the SCB Array and an optional bit to allow auto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * incrementing of the address during download and upload operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) register SCBCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) address 0x09a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) field SCBAUTO 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) mask SCBCNT_MASK 0x1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * Queue In FIFO (p. 3-60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) * Input queue for queued SCBs (commands that the seqencer has yet to start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) register QINFIFO {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) address 0x09b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) count 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) * Queue In Count (p. 3-60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * Number of queued SCBs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) register QINCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) address 0x09c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) * Queue Out FIFO (p. 3-61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) * Queue of SCBs that have completed and await the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) register QOUTFIFO {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) address 0x09d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) count 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) register CRCCONTROL1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) address 0x09d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) count 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) field CRCONSEEN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) field CRCVALCHKEN 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) field CRCENDCHKEN 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) field CRCREQCHKEN 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) field TARGCRCENDEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) field TARGCRCCNTEN 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) * Queue Out Count (p. 3-61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) * Number of queued SCBs in the Out FIFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) register QOUTCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) address 0x09e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) register SCSIPHASE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) address 0x09e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) field STATUS_PHASE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) field COMMAND_PHASE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) field MSG_IN_PHASE 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) field MSG_OUT_PHASE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) field DATA_IN_PHASE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) field DATA_OUT_PHASE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) mask DATA_PHASE_MASK 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) * Special Function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) register SFUNCT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) address 0x09f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) count 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) field ALT_MODE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) * SCB Definition (p. 5-4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) scb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) address 0x0a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) size 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) SCB_CDB_PTR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) alias SCB_RESIDUAL_DATACNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) alias SCB_CDB_STORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) SCB_RESIDUAL_SGPTR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) SCB_SCSI_STATUS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) SCB_TARGET_PHASES {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) SCB_TARGET_DATA_DIR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) SCB_TARGET_ITAG {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) SCB_DATAPTR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) SCB_DATACNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) * The last byte is really the high address bits for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) * the data address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) field SG_LAST_SEG 0x80 /* In the fourth byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) mask SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) SCB_SGPTR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) field SG_RESID_VALID 0x04 /* In the first byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) field SG_FULL_RESID 0x02 /* In the first byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) field SG_LIST_NULL 0x01 /* In the first byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) SCB_CONTROL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) field TARGET_SCB 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) field STATUS_RCVD 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) field DISCENB 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) field TAG_ENB 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) field MK_MESSAGE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) field ULTRAENB 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) field DISCONNECTED 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) mask SCB_TAG_TYPE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) SCB_SCSIID {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) field TWIN_CHNLB 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) mask TWIN_TID 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) mask TID 0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) mask OID 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) SCB_LUN {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) field SCB_XFERLEN_ODD 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) mask LID 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) SCB_TAG {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) SCB_CDB_LEN {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) SCB_SCSIRATE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) SCB_SCSIOFFSET {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) SCB_NEXT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) SCB_64_SPARE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) size 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) SCB_64_BTT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) size 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) const SCB_UPLOAD_SIZE 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) const SCB_DOWNLOAD_SIZE 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) const SCB_DOWNLOAD_SIZE_64 48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) /* --------------------- AHA-2840-only definitions -------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) register SEECTL_2840 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) address 0x0c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) field CS_2840 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) field CK_2840 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) field DO_2840 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) register STATUS_2840 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) address 0x0c1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) count 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) field EEPROM_TF 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) mask BIOS_SEL 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) mask ADSEL 0x1e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) field DI_2840 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) /* --------------------- AIC-7870-only definitions -------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) register CCHADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) address 0x0E0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) size 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) register CCHCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) address 0x0E8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) register CCSGRAM {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) address 0x0E9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) register CCSGADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) address 0x0EA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) register CCSGCTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) address 0x0EB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) field CCSGDONE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) field CCSGEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) field SG_FETCH_NEEDED 0x02 /* Bit used for software state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) field CCSGRESET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) register CCSCBCNT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) address 0xEF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) register CCSCBCTL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) address 0x0EE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) field CCSCBDONE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) field ARRDONE 0x40 /* SCB Array prefetch done */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) field CCARREN 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) field CCSCBEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) field CCSCBDIR 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) field CCSCBRESET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) register CCSCBADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) address 0x0ED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) register CCSCBRAM {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) address 0xEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) * SCB bank address (7895/7896/97 only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) register SCBBADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) address 0x0F0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) access_mode RW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) count 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) register CCSCBPTR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) address 0x0F1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) register HNSCB_QOFF {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) address 0x0F4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) count 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) register SNSCB_QOFF {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) address 0x0F6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) register SDSCB_QOFF {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) address 0x0F8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) register QOFF_CTLSTA {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) address 0x0FA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) field SCB_AVAIL 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) field SNSCB_ROLLOVER 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) field SDSCB_ROLLOVER 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) mask SCB_QSIZE 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) mask SCB_QSIZE_256 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) register DFF_THRSH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) address 0x0FB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) mask WR_DFTHRSH 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) mask RD_DFTHRSH 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) mask RD_DFTHRSH_MIN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) mask RD_DFTHRSH_25 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) mask RD_DFTHRSH_50 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) mask RD_DFTHRSH_63 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) mask RD_DFTHRSH_75 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) mask RD_DFTHRSH_85 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) mask RD_DFTHRSH_90 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) mask RD_DFTHRSH_MAX 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) mask WR_DFTHRSH_MIN 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) mask WR_DFTHRSH_25 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) mask WR_DFTHRSH_50 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) mask WR_DFTHRSH_63 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) mask WR_DFTHRSH_75 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) mask WR_DFTHRSH_85 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) mask WR_DFTHRSH_90 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) mask WR_DFTHRSH_MAX 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) count 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) register SG_CACHE_PRE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) access_mode WO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) address 0x0fc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) mask SG_ADDR_MASK 0xf8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) field LAST_SEG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) field LAST_SEG_DONE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) register SG_CACHE_SHADOW {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) access_mode RO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) address 0x0fc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) mask SG_ADDR_MASK 0xf8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) field LAST_SEG 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) field LAST_SEG_DONE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) /* ---------------------- Scratch RAM Offsets ------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) /* These offsets are either to values that are initialized by the board's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) * BIOS or are specified by the sequencer code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) * The host adapter card (at least the BIOS) uses 20-2f for SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) * device information, 32-33 and 5a-5f as well. As it turns out, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) * BIOS trashes 20-2f, writing the synchronous negotiation results
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) * on top of the BIOS values, so we re-use those for our per-target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) * scratchspace (actually a value that can be copied directly into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) * SCSIRATE). The kernel driver will enable synchronous negotiation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) * for all targets that have a value other than 0 in the lower four
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) * bits of the target scratch space. This should work regardless of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) * whether the bios has been installed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) scratch_ram {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) address 0x020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) size 58
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) * 1 byte per target starting at this address for configuration values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) BUSY_TARGETS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) alias TARG_SCSIRATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) size 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) * Bit vector of targets that have ULTRA enabled as set by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) * the BIOS. The Sequencer relies on a per-SCB field to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) * control whether to enable Ultra transfers or not. During
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) * initialization, we read this field and reuse it for 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) * entries in the busy target table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) ULTRA_ENB {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) alias CMDSIZE_TABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) size 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) count 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) * Bit vector of targets that have disconnection disabled as set by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) * the BIOS. The Sequencer relies in a per-SCB field to control the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) * disconnect priveldge. During initialization, we read this field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) * and reuse it for 2 entries in the busy target table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) DISC_DSB {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) size 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) count 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) CMDSIZE_TABLE_TAIL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) * Partial transfer past cacheline end to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) * transferred using an extra S/G.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) MWI_RESIDUAL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) * SCBID of the next SCB to be started by the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) NEXT_QUEUED_SCB {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) * Single byte buffer used to designate the type or message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) * to send to a target.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) MSG_OUT {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) /* Parameters for DMA Logic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) DMAPARAMS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) count 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) field PRELOADEN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) field WIDEODD 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) field SCSIEN 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) field SDMAEN 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) field SDMAENACK 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) field HDMAEN 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) field HDMAENACK 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) field DIRECTION 0x04 /* Set indicates PCI->SCSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) field FIFOFLUSH 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) field FIFORESET 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) SEQ_FLAGS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) field NOT_IDENTIFIED 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) field NO_CDB_SENT 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) field TARGET_CMD_IS_TAGGED 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) field DPHASE 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) /* Target flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) field TARG_CMD_PENDING 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) field CMDPHASE_PENDING 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) field DPHASE_PENDING 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) field SPHASE_PENDING 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) field NO_DISCONNECT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) * Temporary storage for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) * target/channel/lun of a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) * reconnecting target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) SAVED_SCSIID {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) SAVED_LUN {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) * The last bus phase as seen by the sequencer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) LASTPHASE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) field CDI 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) field IOI 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) field MSGI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) mask PHASE_MASK CDI|IOI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) mask P_DATAOUT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) mask P_DATAIN IOI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) mask P_COMMAND CDI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) mask P_MESGOUT CDI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) mask P_STATUS CDI|IOI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) mask P_MESGIN CDI|IOI|MSGI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) mask P_BUSFREE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) * head of list of SCBs awaiting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) * selection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) WAITING_SCBH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) * head of list of SCBs that are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) * disconnected. Used for SCB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) * paging.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) DISCONNECTED_SCBH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) * head of list of SCBs that are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) * not in use. Used for SCB paging.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) FREE_SCBH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) * head of list of SCBs that have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) * completed but have not been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) * put into the qoutfifo.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) COMPLETE_SCBH {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) * Address of the hardware scb array in the host.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) HSCB_ADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) * Base address of our shared data with the kernel driver in host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) * memory. This includes the qoutfifo and target mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) * incoming command queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) SHARED_DATA_ADDR {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) KERNEL_QINPOS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) QINPOS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) QOUTPOS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) * Kernel and sequencer offsets into the queue of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) * incoming target mode command descriptors. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) * queue is full when the KERNEL_TQINPOS == TQINPOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) KERNEL_TQINPOS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) TQINPOS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) ARG_1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) mask SEND_MSG 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) mask SEND_SENSE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) mask SEND_REJ 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) mask MSGOUT_PHASEMIS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) mask EXIT_MSG_LOOP 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) mask CONT_MSG_LOOP 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) mask CONT_TARG_SESSION 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) alias RETURN_1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) ARG_2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) alias RETURN_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) * Snapshot of MSG_OUT taken after each message is sent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) LAST_MSG {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) alias TARG_IMMEDIATE_SCB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) * Sequences the kernel driver has okayed for us. This allows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) * the driver to do things like prevent initiator or target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) * operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) SCSISEQ_TEMPLATE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) field ENSELO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) field ENSELI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) field ENRSELI 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) field ENAUTOATNO 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) field ENAUTOATNI 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) field ENAUTOATNP 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) scratch_ram {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) address 0x056
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) size 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) * These scratch ram locations are initialized by the 274X BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) * We reuse them after capturing the BIOS settings during
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) * initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) * The initiator specified tag for this target mode transaction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) HA_274_BIOSGLOBAL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) field HA_274_EXTENDED_TRANS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) alias INITIATOR_TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) SEQ_FLAGS2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) field SCB_DMA 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) field TARGET_MSG_PENDING 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) scratch_ram {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) address 0x05a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) size 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) * These are reserved registers in the card's scratch ram on the 2742.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) * The EISA configuration chip is mapped here. On Rev E. of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) * aic7770, the sequencer can use this area for scratch, but the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) * host cannot directly access these registers. On later chips, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) * area can be read and written by both the host and the sequencer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) * Even on later chips, many of these locations are initialized by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) * the BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) SCSICONF {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) count 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) field TERM_ENB 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) field RESET_SCSI 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) field ENSPCHK 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) mask HSCSIID 0x07 /* our SCSI ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) mask HWSCSIID 0x0f /* our SCSI ID if Wide Bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) INTDEF {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) address 0x05c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) field EDGE_TRIG 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) mask VECTOR 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) HOSTCONF {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) address 0x05d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) HA_274_BIOSCTRL {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) address 0x05f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) size 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) mask BIOSMODE 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) mask BIOSDISABLED 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) field CHANNEL_B_PRIMARY 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) scratch_ram {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) address 0x070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) size 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) * Per target SCSI offset values for Ultra2 controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) TARG_OFFSET {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) size 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) count 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) dont_generate_debug_code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) const TID_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) const SCB_LIST_NULL 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) const TARGET_CMD_CMPLT 0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) const CCSGADDR_MAX 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) const CCSGRAM_MAXSEGS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) /* WDTR Message values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) const BUS_8_BIT 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) const BUS_16_BIT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) const BUS_32_BIT 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) /* Offset maximums */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) const MAX_OFFSET_8BIT 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) const MAX_OFFSET_16BIT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) const MAX_OFFSET_ULTRA2 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) const MAX_OFFSET 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) const HOST_MSG 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) /* Target mode command processing constants */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) const CMD_GROUP_CODE_SHIFT 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) const STATUS_BUSY 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) const STATUS_QUEUE_FULL 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) const TARGET_DATA_IN 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) * Downloaded (kernel inserted) constants
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) /* Offsets into the SCBID array where different data is stored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) const QOUTFIFO_OFFSET download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) const QINFIFO_OFFSET download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) const CACHESIZE_MASK download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) const INVERTED_CACHESIZE_MASK download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) const SG_PREFETCH_CNT download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) const SG_PREFETCH_ALIGN_MASK download
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) const SG_PREFETCH_ADDR_MASK download
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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