Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Product specific probe and attach routines for:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * 	27/284X and aic7770 motherboard SCSI controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 1994-1998, 2000, 2001 Justin T. Gibbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *    notice, this list of conditions, and the following disclaimer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *    without modification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *    substantially similar to the "NO WARRANTY" disclaimer below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *    ("Disclaimer") and any redistribution must be conditioned upon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *    including a substantially similar Disclaimer requirement for further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *    binary redistribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * 3. Neither the names of the above-listed copyright holders nor the names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *    of any contributors may be used to endorse or promote products derived
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  *    from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * Alternatively, this software may be distributed under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * GNU General Public License ("GPL") version 2 as published by the Free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * POSSIBILITY OF SUCH DAMAGES.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * $Id: //depot/aic7xxx/aic7xxx/aic7770.c#32 $
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * $FreeBSD$
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #include "aic7xxx_osm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #include "aic7xxx_inline.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #include "aic7xxx_93cx6.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ID_AIC7770	0x04907770
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ID_AHA_274x	0x04907771
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define ID_AHA_284xB	0x04907756 /* BIOS enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define ID_AHA_284x	0x04907757 /* BIOS disabled*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define	ID_OLV_274x	0x04907782 /* Olivetti OEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define	ID_OLV_274xD	0x04907783 /* Olivetti OEM (Differential) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static int aic7770_chip_init(struct ahc_softc *ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static int aha2840_load_seeprom(struct ahc_softc *ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) static ahc_device_setup_t ahc_aic7770_VL_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static ahc_device_setup_t ahc_aic7770_EISA_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static ahc_device_setup_t ahc_aic7770_setup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) struct aic7770_identity aic7770_ident_table[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		ID_AHA_274x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		0xFFFFFFFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		"Adaptec 274X SCSI adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		ahc_aic7770_EISA_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		ID_AHA_284xB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		0xFFFFFFFE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		"Adaptec 284X SCSI adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		ahc_aic7770_VL_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		ID_AHA_284x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		0xFFFFFFFE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		"Adaptec 284X SCSI adapter (BIOS Disabled)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		ahc_aic7770_VL_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		ID_OLV_274x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		0xFFFFFFFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		"Adaptec (Olivetti OEM) 274X SCSI adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		ahc_aic7770_EISA_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		ID_OLV_274xD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		0xFFFFFFFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		"Adaptec (Olivetti OEM) 274X Differential SCSI adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		ahc_aic7770_EISA_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	/* Generic chip probes for devices we don't know 'exactly' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		ID_AIC7770,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		0xFFFFFFFF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		"Adaptec aic7770 SCSI adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		ahc_aic7770_EISA_setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) const int ahc_num_aic7770_devs = ARRAY_SIZE(aic7770_ident_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct aic7770_identity *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) aic7770_find_device(uint32_t id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	struct	aic7770_identity *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	int	i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	for (i = 0; i < ahc_num_aic7770_devs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		entry = &aic7770_ident_table[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		if (entry->full_id == (id & entry->id_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 			return (entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	return (NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry, u_int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	int	error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	int	have_seeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	u_int	hostconf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	u_int   irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	u_int	intdef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	error = entry->setup(ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	have_seeprom = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	if (error != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	error = aic7770_map_registers(ahc, io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	if (error != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	 * Before we continue probing the card, ensure that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	 * its interrupts are *disabled*.  We don't want
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	 * a misstep to hang the machine in an interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	 * storm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	ahc_intr_enable(ahc, FALSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	ahc->description = entry->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	error = ahc_softc_init(ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (error != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	ahc->bus_chip_init = aic7770_chip_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	error = ahc_reset(ahc, /*reinit*/FALSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (error != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	/* Make sure we have a valid interrupt vector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	intdef = ahc_inb(ahc, INTDEF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	irq = intdef & VECTOR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	switch (irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	case 9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	case 10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	case 11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	case 12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	case 14:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	case 15:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		printk("aic7770_config: invalid irq setting %d\n", intdef);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		return (ENXIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	if ((intdef & EDGE_TRIG) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		ahc->flags |= AHC_EDGE_INTERRUPT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	switch (ahc->chip & (AHC_EISA|AHC_VL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	case AHC_EISA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		u_int biosctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		u_int scsiconf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		u_int scsiconf1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		scsiconf = ahc_inb(ahc, SCSICONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		/* Get the primary channel information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			ahc->flags |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 			ahc->flags |= AHC_USEDEFAULTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 			if ((ahc->features & AHC_WIDE) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 				ahc->our_id = scsiconf1 & HWSCSIID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				if (scsiconf & TERM_ENB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 					ahc->flags |= AHC_TERM_ENB_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 				ahc->our_id = scsiconf & HSCSIID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 				ahc->our_id_b = scsiconf1 & HSCSIID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 				if (scsiconf & TERM_ENB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 					ahc->flags |= AHC_TERM_ENB_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 				if (scsiconf1 & TERM_ENB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 					ahc->flags |= AHC_TERM_ENB_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		if ((ahc_inb(ahc, HA_274_BIOSGLOBAL) & HA_274_EXTENDED_TRANS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	case AHC_VL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		have_seeprom = aha2840_load_seeprom(ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (have_seeprom == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		kfree(ahc->seep_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		ahc->seep_config = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	 * Ensure autoflush is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	/* Setup the FIFO threshold and the bus off time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	hostconf = ahc_inb(ahc, HOSTCONF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	ahc->bus_softc.aic7770_softc.busspd = hostconf & DFTHRSH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	ahc->bus_softc.aic7770_softc.bustime = (hostconf << 2) & BOFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	 * Generic aic7xxx initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	error = ahc_init(ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	if (error != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 		return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	error = aic7770_map_int(ahc, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	if (error != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 		return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	ahc->init_level++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	 * Enable the board's BUS drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	ahc_outb(ahc, BCTL, ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return (0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) aic7770_chip_init(struct ahc_softc *ahc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	ahc_outb(ahc, BUSSPD, ahc->bus_softc.aic7770_softc.busspd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	ahc_outb(ahc, BUSTIME, ahc->bus_softc.aic7770_softc.bustime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	ahc_outb(ahc, BCTL, ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	return (ahc_chip_init(ahc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)  * Read the 284x SEEPROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) aha2840_load_seeprom(struct ahc_softc *ahc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct	seeprom_descriptor sd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	struct	seeprom_config *sc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	int	have_seeprom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	uint8_t scsi_conf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	sd.sd_ahc = ahc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	sd.sd_control_offset = SEECTL_2840;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	sd.sd_status_offset = STATUS_2840;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	sd.sd_dataout_offset = STATUS_2840;		
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	sd.sd_chip = C46;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	sd.sd_MS = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	sd.sd_RDY = EEPROM_TF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	sd.sd_CS = CS_2840;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	sd.sd_CK = CK_2840;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	sd.sd_DO = DO_2840;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	sd.sd_DI = DI_2840;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	sc = ahc->seep_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	if (bootverbose)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		printk("%s: Reading SEEPROM...", ahc_name(ahc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	have_seeprom = ahc_read_seeprom(&sd, (uint16_t *)sc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 					/*start_addr*/0, sizeof(*sc)/2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	if (have_seeprom) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		if (ahc_verify_cksum(sc) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			if(bootverbose)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 				printk ("checksum error\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			have_seeprom = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		} else if (bootverbose) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 			printk("done.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (!have_seeprom) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		if (bootverbose)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 			printk("%s: No SEEPROM available\n", ahc_name(ahc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		ahc->flags |= AHC_USEDEFAULTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		 * Put the data we've collected down into SRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		 * where ahc_init will find it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		int	 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		int	 max_targ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		uint16_t discenable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		discenable = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		for (i = 0; i < max_targ; i++){
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 			uint8_t target_settings;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 			target_settings = (sc->device_flags[i] & CFXFER) << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 			if (sc->device_flags[i] & CFSYNCH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 				target_settings |= SOFS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			if (sc->device_flags[i] & CFWIDEB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 				target_settings |= WIDEXFER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			if (sc->device_flags[i] & CFDISC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 				discenable |= (0x01 << i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 			ahc_outb(ahc, TARG_SCSIRATE + i, target_settings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 		ahc->our_id = sc->brtime_id & CFSCSIID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		scsi_conf = (ahc->our_id & 0x7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		if (sc->adapter_control & CFSPARITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 			scsi_conf |= ENSPCHK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		if (sc->adapter_control & CFRESETB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			scsi_conf |= RESET_SCSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		if (sc->bios_control & CF284XEXTEND)		
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 			ahc->flags |= AHC_EXTENDED_TRANS_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 		/* Set SCSICONF info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		ahc_outb(ahc, SCSICONF, scsi_conf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		if (sc->adapter_control & CF284XSTERM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 			ahc->flags |= AHC_TERM_ENB_A;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	return (have_seeprom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ahc_aic7770_VL_setup(struct ahc_softc *ahc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	error = ahc_aic7770_setup(ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	ahc->chip |= AHC_VL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ahc_aic7770_EISA_setup(struct ahc_softc *ahc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	error = ahc_aic7770_setup(ahc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	ahc->chip |= AHC_EISA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	return (error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ahc_aic7770_setup(struct ahc_softc *ahc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	ahc->channel = 'A';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	ahc->channel_b = 'B';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	ahc->chip = AHC_AIC7770;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	ahc->features = AHC_AIC7770_FE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	ahc->bugs |= AHC_TMODE_WIDEODD_BUG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	ahc->flags |= AHC_PAGESCBS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	ahc->instruction_ram_size = 448;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	return (0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }