Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Initio A100 device driver for Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 1994-1998 Initio Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * the Free Software Foundation; either version 2, or (at your option)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * along with this program; see the file COPYING.  If not, write to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * Revision History:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * 06/18/98 HL, Initial production Version 1.02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * 12/19/98 bv, Use spinlocks for 2.1.95 and up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  * 06/25/02 Doug Ledford <dledford@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  *	 - This and the i60uscsi.h file are almost identical,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  *	   merged them into a single header used by both .c files.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * 14/06/07 Alan Cox <alan@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  *	 - Grand cleanup and Linuxisation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define inia100_REVID "Initio INI-A100U2W SCSI device driver; Revision: 1.02d"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define ORC_MAXQUEUE		245
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define ORC_MAXTAGS		64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define ORC_MAXQUEUE		25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define ORC_MAXTAGS		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define TOTAL_SG_ENTRY		32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define MAX_TARGETS		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define IMAX_CDB			15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define SENSE_SIZE		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) /*              Scatter-Gather Element Structure                        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) /************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) struct orc_sgent {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u32 base;		/* Data Pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	u32 length;		/* Data Length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) /* SCSI related definition                                              */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define DISC_NOT_ALLOW          0x80	/* Disconnect is not allowed    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define DISC_ALLOW              0xC0	/* Disconnect is allowed        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define ORC_OFFSET_SCB			16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define ORC_MAX_SCBS		    250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define MAX_CHANNELS       2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define MAX_ESCB_ELE				64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define TCF_DRV_255_63     0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /********************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) /*      Orchid Host Command Set                         */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) /********************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define ORC_CMD_NOP		0x00	/* Host command - NOP             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define ORC_CMD_VERSION		0x01	/* Host command - Get F/W version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define ORC_CMD_ECHO		0x02	/* Host command - ECHO            */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define ORC_CMD_SET_NVM		0x03	/* Host command - Set NVRAM       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define ORC_CMD_GET_NVM		0x04	/* Host command - Get NVRAM       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define ORC_CMD_GET_BUS_STATUS	0x05	/* Host command - Get SCSI bus status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define ORC_CMD_ABORT_SCB	0x06	/* Host command - Abort SCB       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define ORC_CMD_ISSUE_SCB	0x07	/* Host command - Issue SCB       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) /********************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) /*              Orchid Register Set                     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) /********************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define ORC_GINTS	0xA0	/* Global Interrupt Status        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define QINT		0x04	/* Reply Queue Interrupt  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define ORC_GIMSK	0xA1	/* Global Interrupt MASK  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define MQINT		0x04	/* Mask Reply Queue Interrupt     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define	ORC_GCFG	0xA2	/* Global Configure               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define EEPRG		0x01	/* Enable EEPROM programming */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define	ORC_GSTAT	0xA3	/* Global status          */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define WIDEBUS		0x10	/* Wide SCSI Devices connected    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define ORC_HDATA	0xA4	/* Host Data                      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define ORC_HCTRL	0xA5	/* Host Control                   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define SCSIRST		0x80	/* SCSI bus reset         */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define HDO			0x40	/* Host data out          */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define HOSTSTOP		0x02	/* Host stop RISC engine  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define DEVRST		0x01	/* Device reset                   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define ORC_HSTUS	0xA6	/* Host Status                    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define HDI			0x02	/* Host data in                   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define RREADY		0x01	/* RISC engine is ready to receive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define	ORC_NVRAM	0xA7	/* Nvram port address             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define SE2CS		0x008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define SE2CLK		0x004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define SE2DO		0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define SE2DI		0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define ORC_PQUEUE	0xA8	/* Posting queue FIFO             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define ORC_PQCNT	0xA9	/* Posting queue FIFO Cnt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define ORC_RQUEUE	0xAA	/* Reply queue FIFO               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define ORC_RQUEUECNT	0xAB	/* Reply queue FIFO Cnt           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define	ORC_FWBASEADR	0xAC	/* Firmware base address  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define	ORC_EBIOSADR0 0xB0	/* External Bios address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define	ORC_EBIOSADR1 0xB1	/* External Bios address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define	ORC_EBIOSADR2 0xB2	/* External Bios address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define	ORC_EBIOSDATA 0xB3	/* External Bios address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define	ORC_SCBSIZE	0xB7	/* SCB size register              */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define	ORC_SCBBASE0	0xB8	/* SCB base address 0             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define	ORC_SCBBASE1	0xBC	/* SCB base address 1             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define	ORC_RISCCTL	0xE0	/* RISC Control                   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define PRGMRST		0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define DOWNLOAD		0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define	ORC_PRGMCTR0	0xE2	/* RISC program counter           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define	ORC_PRGMCTR1	0xE3	/* RISC program counter           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define	ORC_RISCRAM	0xEC	/* RISC RAM data port 4 bytes     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct orc_extended_scb {	/* Extended SCB                 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	struct orc_sgent sglist[TOTAL_SG_ENTRY];	/*0 Start of SG list              */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	struct scsi_cmnd *srb;	/*50 SRB Pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /***********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		SCSI Control Block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		0x40 bytes long, the last 8 are user bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct orc_scb {	/* Scsi_Ctrl_Blk                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	u8 opcode;	/*00 SCB command code&residual  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	u8 flags;	/*01 SCB Flags                  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	u8 target;	/*02 Target Id                  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	u8 lun;		/*03 Lun                        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	u32 reserved0;	/*04 Reserved for ORCHID must 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	u32 xferlen;	/*08 Data Transfer Length       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	u32 reserved1;	/*0C Reserved for ORCHID must 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	u32 sg_len;		/*10 SG list # * 8              */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	u32 sg_addr;	/*14 SG List Buf physical Addr  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	u32 sg_addrhigh;	/*18 SG Buffer high physical Addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	u8 hastat;	/*1C Host Status                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	u8 tastat;	/*1D Target Status              */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	u8 status;	/*1E SCB status                 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	u8 link;		/*1F Link pointer, default 0xFF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	u8 sense_len;	/*20 Sense Allocation Length    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	u8 cdb_len;	/*21 CDB Length                 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	u8 ident;	/*22 Identify                   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	u8 tag_msg;	/*23 Tag Message                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	u8 cdb[IMAX_CDB];	/*24 SCSI CDBs                  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	u8 scbidx;	/*3C Index for this ORCSCB      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	u32 sense_addr;	/*34 Sense Buffer physical Addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	struct orc_extended_scb *escb; /*38 Extended SCB Pointer       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)         /* 64bit pointer or 32bit pointer + reserved ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #ifndef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	u8 reserved2[4];	/*3E Reserved for Driver use    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* Opcodes of ORCSCB_Opcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define ORC_EXECSCSI	0x00	/* SCSI initiator command with residual */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define ORC_BUSDEVRST	0x01	/* SCSI Bus Device Reset  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* Status of ORCSCB_Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define ORCSCB_COMPLETE	0x00	/* SCB request completed  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define ORCSCB_POST	0x01	/* SCB is posted by the HOST      */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* Bit Definition for ORCSCB_Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define SCF_DISINT	0x01	/* Disable HOST interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define SCF_DIR		0x18	/* Direction bits         */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define SCF_NO_DCHK	0x00	/* Direction determined by SCSI   */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define SCF_DIN		0x08	/* From Target to Initiator       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define SCF_DOUT	0x10	/* From Initiator to Target       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define SCF_NO_XF	0x18	/* No data transfer               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define SCF_POLL   0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /* Error Codes for ORCSCB_HaStat */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define HOST_SEL_TOUT	0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define HOST_DO_DU	0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define HOST_BUS_FREE	0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define HOST_BAD_PHAS	0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define HOST_INV_CMD	0x16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define HOST_SCSI_RST	0x1B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define HOST_DEV_RST	0x1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* Error Codes for ORCSCB_TaStat */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define TARGET_CHK_COND	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define TARGET_BUSY	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define TARGET_TAG_FULL	0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /***********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		Target Device Control Structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) **********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct orc_target {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	u8 TCS_DrvDASD;	/* 6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	u8 TCS_DrvSCSI;	/* 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	u8 TCS_DrvHead;	/* 8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	u16 TCS_DrvFlags;	/* 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	u8 TCS_DrvSector;	/* 7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Bit Definition for TCF_DrvFlags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define	TCS_DF_NODASD_SUPT	0x20	/* Suppress OS/2 DASD Mgr support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define	TCS_DF_NOSCSI_SUPT	0x40	/* Suppress OS/2 SCSI Mgr support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /***********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)               Host Adapter Control Structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct orc_host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	unsigned long base;	/* Base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	u8 index;		/* Index (Channel)*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	u8 scsi_id;		/* H/A SCSI ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	u8 BIOScfg;		/*BIOS configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	u8 max_targets;		/* SCSI0MAXTags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	struct orc_scb *scb_virt;	/* Virtual Pointer to SCB array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	dma_addr_t scb_phys;	/* Scb Physical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	struct orc_extended_scb *escb_virt; /* Virtual pointer to ESCB Scatter list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	dma_addr_t escb_phys;	/* scatter list Physical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	u8 target_flag[16];	/* target configuration, TCF_EN_TAG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	u8 max_tags[16];	/* ORC_MAX_SCBS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	u32 allocation_map[MAX_CHANNELS][8];	/* Max STB is 256, So 256/32 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	spinlock_t allocation_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* Bit Definition for HCS_Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define HCF_SCSI_RESET	0x01	/* SCSI BUS RESET         */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define HCF_PARITY    	0x02	/* parity card                    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define HCF_LVDS     	0x10	/* parity card                    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* Bit Definition for TargetFlag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define TCF_EN_255	    0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define TCF_EN_TAG	    0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define TCF_BUSY	      0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #define TCF_DISCONNECT	0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define TCF_SPIN_UP	  0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* Bit Definition for HCS_AFlags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #define	HCS_AF_IGNORE		0x01	/* Adapter ignore         */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define	HCS_AF_DISABLE_RESET	0x10	/* Adapter disable reset  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #define	HCS_AF_DISABLE_ADPT	0x80	/* Adapter disable                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct orc_nvram {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /*----------header ---------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)         u8 SubVendorID0;     /* 00 - Sub Vendor ID           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)         u8 SubVendorID1;     /* 00 - Sub Vendor ID           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)         u8 SubSysID0;        /* 02 - Sub System ID           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)         u8 SubSysID1;        /* 02 - Sub System ID           */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)         u8 SubClass;         /* 04 - Sub Class               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)         u8 VendorID0;        /* 05 - Vendor ID               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)         u8 VendorID1;        /* 05 - Vendor ID               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)         u8 DeviceID0;        /* 07 - Device ID               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)         u8 DeviceID1;        /* 07 - Device ID               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)         u8 Reserved0[2];     /* 09 - Reserved                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)         u8 revision;         /* 0B - revision of data structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)         /* ----Host Adapter Structure ---- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)         u8 NumOfCh;          /* 0C - Number of SCSI channel  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)         u8 BIOSConfig1;      /* 0D - BIOS configuration 1    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)         u8 BIOSConfig2;      /* 0E - BIOS boot channel&target ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)         u8 BIOSConfig3;      /* 0F - BIOS configuration 3    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)         /* ----SCSI channel Structure ---- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)         /* from "CTRL-I SCSI Host Adapter SetUp menu "  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)         u8 scsi_id;          /* 10 - Channel 0 SCSI ID       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)         u8 SCSI0Config;      /* 11 - Channel 0 SCSI configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)         u8 SCSI0MaxTags;     /* 12 - Channel 0 Maximum tags  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)         u8 SCSI0ResetTime;   /* 13 - Channel 0 Reset recovering time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)         u8 ReservedforChannel0[2];   /* 14 - Reserved                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)         /* ----SCSI target Structure ----  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)         /* from "CTRL-I SCSI device SetUp menu "                        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)         u8 Target00Config;   /* 16 - Channel 0 Target 0 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)         u8 Target01Config;   /* 17 - Channel 0 Target 1 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)         u8 Target02Config;   /* 18 - Channel 0 Target 2 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)         u8 Target03Config;   /* 19 - Channel 0 Target 3 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)         u8 Target04Config;   /* 1A - Channel 0 Target 4 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)         u8 Target05Config;   /* 1B - Channel 0 Target 5 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)         u8 Target06Config;   /* 1C - Channel 0 Target 6 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)         u8 Target07Config;   /* 1D - Channel 0 Target 7 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)         u8 Target08Config;   /* 1E - Channel 0 Target 8 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)         u8 Target09Config;   /* 1F - Channel 0 Target 9 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)         u8 Target0AConfig;   /* 20 - Channel 0 Target A config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)         u8 Target0BConfig;   /* 21 - Channel 0 Target B config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)         u8 Target0CConfig;   /* 22 - Channel 0 Target C config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)         u8 Target0DConfig;   /* 23 - Channel 0 Target D config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)         u8 Target0EConfig;   /* 24 - Channel 0 Target E config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)         u8 Target0FConfig;   /* 25 - Channel 0 Target F config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)         u8 SCSI1Id;          /* 26 - Channel 1 SCSI ID       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)         u8 SCSI1Config;      /* 27 - Channel 1 SCSI configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)         u8 SCSI1MaxTags;     /* 28 - Channel 1 Maximum tags  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)         u8 SCSI1ResetTime;   /* 29 - Channel 1 Reset recovering time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)         u8 ReservedforChannel1[2];   /* 2A - Reserved                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)         /* ----SCSI target Structure ----  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)         /* from "CTRL-I SCSI device SetUp menu "                                          */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)         u8 Target10Config;   /* 2C - Channel 1 Target 0 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)         u8 Target11Config;   /* 2D - Channel 1 Target 1 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)         u8 Target12Config;   /* 2E - Channel 1 Target 2 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)         u8 Target13Config;   /* 2F - Channel 1 Target 3 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)         u8 Target14Config;   /* 30 - Channel 1 Target 4 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)         u8 Target15Config;   /* 31 - Channel 1 Target 5 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)         u8 Target16Config;   /* 32 - Channel 1 Target 6 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)         u8 Target17Config;   /* 33 - Channel 1 Target 7 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)         u8 Target18Config;   /* 34 - Channel 1 Target 8 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)         u8 Target19Config;   /* 35 - Channel 1 Target 9 config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)         u8 Target1AConfig;   /* 36 - Channel 1 Target A config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)         u8 Target1BConfig;   /* 37 - Channel 1 Target B config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)         u8 Target1CConfig;   /* 38 - Channel 1 Target C config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)         u8 Target1DConfig;   /* 39 - Channel 1 Target D config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)         u8 Target1EConfig;   /* 3A - Channel 1 Target E config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)         u8 Target1FConfig;   /* 3B - Channel 1 Target F config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)         u8 reserved[3];      /* 3C - Reserved                */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)         /* ---------- CheckSum ----------       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)         u8 CheckSum;         /* 3F - Checksum of NVRam       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* Bios Configuration for nvram->BIOSConfig1                            */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define NBC_BIOSENABLE  0x01    /* BIOS enable                    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #define NBC_CDROM       0x02    /* Support bootable CDROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #define NBC_REMOVABLE   0x04    /* Support removable drive        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* Bios Configuration for nvram->BIOSConfig2                            */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define NBB_TARGET_MASK 0x0F    /* Boot SCSI target ID number     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define NBB_CHANL_MASK  0xF0    /* Boot SCSI channel number       */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /* Bit definition for nvram->SCSIConfig                                 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define NCC_BUSRESET    0x01    /* Reset SCSI bus at power up     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define NCC_PARITYCHK   0x02    /* SCSI parity enable             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define NCC_LVDS        0x10    /* Enable LVDS                    */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define NCC_ACTTERM1    0x20    /* Enable active terminator 1     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define NCC_ACTTERM2    0x40    /* Enable active terminator 2     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #define NCC_AUTOTERM    0x80    /* Enable auto termination        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* Bit definition for nvram->TargetxConfig                              */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define NTC_PERIOD      0x07    /* Maximum Sync. Speed            */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define NTC_1GIGA       0x08    /* 255 head / 63 sectors (64/32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define NTC_NO_SYNC     0x10    /* NO SYNC. NEGO          */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define NTC_NO_WIDESYNC 0x20    /* NO WIDE SYNC. NEGO             */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define NTC_DISC_ENABLE 0x40    /* Enable SCSI disconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) #define NTC_SPINUP      0x80    /* Start disk drive               */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* Default NVRam values                                                 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define NBC_DEFAULT     (NBC_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define NCC_DEFAULT     (NCC_BUSRESET | NCC_AUTOTERM | NCC_PARITYCHK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #define NCC_MAX_TAGS    0x20    /* Maximum tags per target        */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define NCC_RESET_TIME  0x0A    /* SCSI RESET recovering time     */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #define NTC_DEFAULT     (NTC_1GIGA | NTC_NO_WIDESYNC | NTC_DISC_ENABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)