^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * NCR 5380 generic driver routines. These should make it *trivial*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * to implement 5380 SCSI drivers under Linux with a non-trantor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Note that these routines also work with NR53c400 family chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright 1993, Drew Eckhardt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Visionary Computing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * (Unix and Linux consulting and custom programming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * drew@colorado.edu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * +1 (303) 666-5836
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * For more information, please consult
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * NCR 5380 Family
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * SCSI Protocol Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Databook
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * NCR Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * 1635 Aeroplaza Drive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Colorado Springs, CO 80916
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * 1+ (719) 578-3400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * 1+ (800) 334-5454
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * With contributions from Ray Van Tassle, Ingmar Baumgart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Ronald van Cuijlenborg, Alan Cox and others.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Ported to Atari by Roman Hodek and others. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* Adapted for the Sun 3 by Sam Creasey. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * Design
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * This is a generic 5380 driver. To use it on a different platform,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * one simply writes appropriate system specific macros (ie, data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * transfer - some PC's will use the I/O bus, 68K's must use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * memory mapped) and drops this file in their 'C' wrapper.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * As far as command queueing, two queues are maintained for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * each 5380 in the system - commands that haven't been issued yet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * and commands that are currently executing. This means that an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * unlimited number of commands may be queued, letting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * more commands propagate from the higher driver levels giving higher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * allowing multiple commands to propagate all the way to a SCSI-II device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * while a command is already executing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * Issues specific to the NCR5380 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * piece of hardware that requires you to sit in a loop polling for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * the REQ signal as long as you are connected. Some devices are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * while doing long seek operations. [...] These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * broken devices are the exception rather than the rule and I'd rather
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * spend my time optimizing for the normal case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Architecture :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * At the heart of the design is a coroutine, NCR5380_main,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * which is started from a workqueue for each NCR5380 host in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * removing the commands from the issue queue and calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * NCR5380_select() if a nexus is not established.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * Once a nexus is established, the NCR5380_information_transfer()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * phase goes through the various phases as instructed by the target.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * if the target goes into MSG IN and sends a DISCONNECT message,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * the command structure is placed into the per instance disconnected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * queue, and NCR5380_main tries to find more work. If the target is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * idle for too long, the system will try to sleep.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * If a command has disconnected, eventually an interrupt will trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * calling NCR5380_intr() which will in turn call NCR5380_reselect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * to reestablish a nexus. This will run main if necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * On command termination, the done function will be called as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * appropriate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * SCSI pointers are maintained in the SCp field of SCSI command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * structures, being initialized after the command is connected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * Note that in violation of the standard, an implicit SAVE POINTERS operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Using this file :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * This file a skeleton Linux SCSI driver for the NCR 5380 series
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * of chips. To use it, you write an architecture specific functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * and macros and include this file in your driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * These macros MUST be defined :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * NCR5380_read(register) - read from the specified register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * NCR5380_write(register, value) - write to the specific register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * NCR5380_implementation_fields - additional fields needed for this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * specific implementation of the NCR5380
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * Either real DMA *or* pseudo DMA may be implemented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * NCR5380_dma_residual - residual byte count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * The generic driver is initialized by calling NCR5380_init(instance),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * after setting the appropriate host specific fields and ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #ifndef NCR5380_io_delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define NCR5380_io_delay(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #ifndef NCR5380_acquire_dma_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define NCR5380_acquire_dma_irq(x) (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #ifndef NCR5380_release_dma_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define NCR5380_release_dma_irq(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static unsigned int disconnect_mask = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) module_param(disconnect_mask, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int do_abort(struct Scsi_Host *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static void do_reset(struct Scsi_Host *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static void bus_reset_cleanup(struct Scsi_Host *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * initialize_SCp - init the scsi pointer field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * @cmd: command block to set up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * Set up the internal fields in the SCSI command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static inline void initialize_SCp(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * Initialize the Scsi Pointer field so that all of the commands in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * various queues are valid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (scsi_bufflen(cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) cmd->SCp.buffer = scsi_sglist(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) cmd->SCp.this_residual = cmd->SCp.buffer->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) cmd->SCp.buffer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) cmd->SCp.ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) cmd->SCp.this_residual = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) cmd->SCp.Status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) cmd->SCp.Message = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static inline void advance_sg_buffer(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct scatterlist *s = cmd->SCp.buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (!cmd->SCp.this_residual && s && !sg_is_last(s)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) cmd->SCp.buffer = sg_next(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) cmd->SCp.this_residual = cmd->SCp.buffer->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static inline void set_resid_from_SCp(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int resid = cmd->SCp.this_residual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct scatterlist *s = cmd->SCp.buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) while (!sg_is_last(s)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) s = sg_next(s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) resid += s->length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) scsi_set_resid(cmd, resid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * NCR5380_poll_politely2 - wait for two chip register values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * @hostdata: host private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * @reg1: 5380 register to poll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * @bit1: Bitmask to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * @val1: Expected value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * @reg2: Second 5380 register to poll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * @bit2: Second bitmask to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * @val2: Second expected value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * @wait: Time-out in jiffies
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * Polls the chip in a reasonably efficient manner waiting for an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * event to occur. After a short quick poll we begin to yield the CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * (if possible). In irq contexts the time-out is arbitrarily limited.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * Callers may hold locks as long as they are held in irq mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned int reg1, u8 bit1, u8 val1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned int reg2, u8 bit2, u8 val2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) unsigned long wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) unsigned long n = hostdata->poll_loops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) unsigned long deadline = jiffies + wait;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if ((NCR5380_read(reg1) & bit1) == val1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if ((NCR5380_read(reg2) & bit2) == val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) } while (n--);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (irqs_disabled() || in_interrupt())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* Repeatedly sleep for 1 ms until deadline */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) while (time_is_after_jiffies(deadline)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if ((NCR5380_read(reg1) & bit1) == val1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if ((NCR5380_read(reg2) & bit2) == val2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #if NDEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) unsigned char mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) } signals[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {SR_DBP, "PARITY"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {SR_RST, "RST"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {SR_BSY, "BSY"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {SR_REQ, "REQ"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {SR_MSG, "MSG"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {SR_CD, "CD"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {SR_IO, "IO"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {SR_SEL, "SEL"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {0, NULL}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) basrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {BASR_END_DMA_TRANSFER, "END OF DMA"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {BASR_DRQ, "DRQ"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {BASR_PARITY_ERROR, "PARITY ERROR"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {BASR_IRQ, "IRQ"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {BASR_PHASE_MATCH, "PHASE MATCH"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {BASR_BUSY_ERROR, "BUSY ERROR"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {BASR_ATN, "ATN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {BASR_ACK, "ACK"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {0, NULL}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) icrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {ICR_ASSERT_RST, "ASSERT RST"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {ICR_ARBITRATION_LOST, "LOST ARB."},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {ICR_ASSERT_ACK, "ASSERT ACK"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {ICR_ASSERT_BSY, "ASSERT BSY"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {ICR_ASSERT_SEL, "ASSERT SEL"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {ICR_ASSERT_ATN, "ASSERT ATN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {ICR_ASSERT_DATA, "ASSERT DATA"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {0, NULL}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) mrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {MR_TARGET, "TARGET"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {MR_ENABLE_PAR_INTR, "PARITY INTR"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {MR_ENABLE_EOP_INTR, "EOP INTR"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {MR_MONITOR_BSY, "MONITOR BSY"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {MR_DMA_MODE, "DMA MODE"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {MR_ARBITRATE, "ARBITRATE"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {0, NULL}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * NCR5380_print - print scsi bus signals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * @instance: adapter state to dump
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * Print the SCSI bus signals for debugging purposes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) static void NCR5380_print(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) unsigned char status, basr, mr, icr, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) status = NCR5380_read(STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) mr = NCR5380_read(MODE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) icr = NCR5380_read(INITIATOR_COMMAND_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) basr = NCR5380_read(BUS_AND_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) printk(KERN_DEBUG "SR = 0x%02x : ", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) for (i = 0; signals[i].mask; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (status & signals[i].mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) printk(KERN_CONT "%s, ", signals[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) for (i = 0; basrs[i].mask; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (basr & basrs[i].mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) printk(KERN_CONT "%s, ", basrs[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) printk(KERN_CONT "\nICR = 0x%02x : ", icr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) for (i = 0; icrs[i].mask; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (icr & icrs[i].mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) printk(KERN_CONT "%s, ", icrs[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) printk(KERN_CONT "\nMR = 0x%02x : ", mr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) for (i = 0; mrs[i].mask; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (mr & mrs[i].mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) printk(KERN_CONT "%s, ", mrs[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) printk(KERN_CONT "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) unsigned char value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) } phases[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {PHASE_DATAOUT, "DATAOUT"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {PHASE_DATAIN, "DATAIN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {PHASE_CMDOUT, "CMDOUT"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {PHASE_STATIN, "STATIN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {PHASE_MSGOUT, "MSGOUT"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {PHASE_MSGIN, "MSGIN"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {PHASE_UNKNOWN, "UNKNOWN"}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * NCR5380_print_phase - show SCSI phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * @instance: adapter to dump
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * Print the current SCSI phase for debugging purposes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static void NCR5380_print_phase(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) unsigned char status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) status = NCR5380_read(STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (!(status & SR_REQ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) (phases[i].value != (status & PHASE_MASK)); ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) * NCR5380_info - report driver and host information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) * @instance: relevant scsi host instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * For use as the host template info() handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static const char *NCR5380_info(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return hostdata->info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * NCR5380_init - initialise an NCR5380
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * @instance: adapter to configure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * @flags: control flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) * Initializes *instance and corresponding 5380 chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * with flags OR'd into the initial flags value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) * Notes : I assume that the host, hostno, and id bits have been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * set correctly. I don't care about the irq and other fields.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * Returns 0 for success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static int NCR5380_init(struct Scsi_Host *instance, int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) unsigned long deadline;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) unsigned long accesses_per_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) instance->max_lun = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) hostdata->host = instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) hostdata->id_mask = 1 << instance->this_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) hostdata->id_higher_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (i > hostdata->id_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) hostdata->id_higher_mask |= i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) for (i = 0; i < 8; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) hostdata->busy[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) hostdata->dma_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) spin_lock_init(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) hostdata->connected = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) hostdata->sensing = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) INIT_LIST_HEAD(&hostdata->autosense);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) INIT_LIST_HEAD(&hostdata->unissued);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) INIT_LIST_HEAD(&hostdata->disconnected);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) hostdata->flags = flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) INIT_WORK(&hostdata->main_task, NCR5380_main);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) hostdata->work_q = alloc_workqueue("ncr5380_%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) WQ_UNBOUND | WQ_MEM_RECLAIM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 1, instance->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (!hostdata->work_q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) snprintf(hostdata->info, sizeof(hostdata->info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) instance->hostt->name, instance->irq, hostdata->io_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) hostdata->base, instance->can_queue, instance->cmd_per_lun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) instance->sg_tablesize, instance->this_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) NCR5380_write(TARGET_COMMAND_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) NCR5380_write(SELECT_ENABLE_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /* Calibrate register polling loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) deadline = jiffies + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) } while (time_is_after_jiffies(deadline));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) deadline += msecs_to_jiffies(256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) NCR5380_read(STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ++i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) } while (time_is_after_jiffies(deadline));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) accesses_per_ms = i / 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * @instance: adapter to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * If the system crashed, it may have crashed with a connected target and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * currently established nexus, which we know nothing about. Failing that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * do a bus reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * Note that a bus reset will cause the chip to assert IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * Returns 0 if successful, otherwise -ENXIO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) int pass;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) switch (pass) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) NCR5380_poll_politely(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) STATUS_REG, SR_BSY, 0, 5 * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) do_abort(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) do_reset(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) /* Wait after a reset; the SCSI standard calls for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) * 250ms, we wait 500ms to be on the safe side.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) * But some Toshiba CD-ROMs need ten times that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) if (hostdata->flags & FLAG_TOSHIBA_DELAY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) msleep(2500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) msleep(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) shost_printk(KERN_ERR, instance, "bus locked solid\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * NCR5380_exit - remove an NCR5380
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * @instance: adapter to remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * Assumes that no more work can be queued (e.g. by NCR5380_intr).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static void NCR5380_exit(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) cancel_work_sync(&hostdata->main_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) destroy_workqueue(hostdata->work_q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) * complete_cmd - finish processing a command and return it to the SCSI ML
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) * @instance: the host instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * @cmd: command to complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static void complete_cmd(struct Scsi_Host *instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (hostdata->sensing == cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) /* Autosense processing ends here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (status_byte(cmd->result) != GOOD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) scsi_eh_restore_cmnd(cmd, &hostdata->ses);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) scsi_eh_restore_cmnd(cmd, &hostdata->ses);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) set_driver_byte(cmd, DRIVER_SENSE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) hostdata->sensing = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) * NCR5380_queue_command - queue a command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) * @instance: the relevant SCSI adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) * @cmd: SCSI command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * cmd is added to the per-instance issue queue, with minor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * twiddling done to the host specific fields of cmd. If the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * main coroutine is not running, it is restarted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) static int NCR5380_queue_command(struct Scsi_Host *instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) #if (NDEBUG & NDEBUG_NO_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) switch (cmd->cmnd[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) case WRITE_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) case WRITE_10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) cmd->result = (DID_ERROR << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) cmd->result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) if (!NCR5380_acquire_dma_irq(instance))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return SCSI_MLQUEUE_HOST_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) spin_lock_irqsave(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) * Insert the cmd into the issue queue. Note that REQUEST SENSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * commands are added to the head of the queue since any command will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * clear the contingent allegiance condition that exists and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * sense data is only guaranteed to be valid while the condition exists.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (cmd->cmnd[0] == REQUEST_SENSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) list_add(&ncmd->list, &hostdata->unissued);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) list_add_tail(&ncmd->list, &hostdata->unissued);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) spin_unlock_irqrestore(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /* Kick off command processing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) queue_work(hostdata->work_q, &hostdata->main_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) /* Caller does the locking needed to set & test these data atomically */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) if (list_empty(&hostdata->disconnected) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) list_empty(&hostdata->unissued) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) list_empty(&hostdata->autosense) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) !hostdata->connected &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) !hostdata->selecting) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) NCR5380_release_dma_irq(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * dequeue_next_cmd - dequeue a command for processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * @instance: the scsi host instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * Priority is given to commands on the autosense queue. These commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * need autosense because of a CHECK CONDITION result.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * Returns a command pointer if a command is found for a target that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * not already busy. Otherwise returns NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) struct NCR5380_cmd *ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct scsi_cmnd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (hostdata->sensing || list_empty(&hostdata->autosense)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) list_for_each_entry(ncmd, &hostdata->unissued, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) cmd = NCR5380_to_scmd(ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) list_del(&ncmd->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) dsprintk(NDEBUG_QUEUES, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) "dequeue: removed %p from issue queue\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) return cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) /* Autosense processing begins here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) ncmd = list_first_entry(&hostdata->autosense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) struct NCR5380_cmd, list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) list_del(&ncmd->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) cmd = NCR5380_to_scmd(ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) dsprintk(NDEBUG_QUEUES, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "dequeue: removed %p from autosense queue\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) hostdata->sensing = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) return cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if (hostdata->sensing == cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) scsi_eh_restore_cmnd(cmd, &hostdata->ses);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) list_add(&ncmd->list, &hostdata->autosense);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) hostdata->sensing = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) list_add(&ncmd->list, &hostdata->unissued);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * NCR5380_main - NCR state machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) * NCR5380_main is a coroutine that runs as long as more work can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) * be done on the NCR5380 host adapters in a system. Both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) * NCR5380_queue_command() and NCR5380_intr() will try to start it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) * in case it is not running.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static void NCR5380_main(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct NCR5380_hostdata *hostdata =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) container_of(work, struct NCR5380_hostdata, main_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) struct Scsi_Host *instance = hostdata->host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) int done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) done = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) while (!hostdata->connected && !hostdata->selecting) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (!cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) * Attempt to establish an I_T_L nexus here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) * On success, instance->hostdata->connected is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) * On failure, we must add the command back to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) * issue queue so we can keep trying.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) * REQUEST SENSE commands are issued without tagged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) * queueing, even on SCSI-II devices because the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * contingent allegiance condition exists for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) * entire unit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (!NCR5380_select(instance, cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) maybe_release_dma_irq(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) "main: select failed, returning %p to queue\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) requeue_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (hostdata->connected && !hostdata->dma_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) NCR5380_information_transfer(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (!hostdata->connected)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) spin_unlock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) if (!done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) cond_resched();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) } while (!done);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * NCR5380_dma_complete - finish DMA transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * @instance: the scsi host instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * Called by the interrupt handler when DMA finishes or a phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * mismatch occurs (which would end the DMA transfer).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) static void NCR5380_dma_complete(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) int transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) unsigned char **data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) int *count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) int saved_data = 0, overrun = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) unsigned char p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) if (hostdata->read_overruns) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) p = hostdata->connected->SCp.phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (p & SR_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if ((NCR5380_read(BUS_AND_STATUS_REG) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) (BASR_PHASE_MATCH | BASR_ACK)) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) (BASR_PHASE_MATCH | BASR_ACK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) saved_data = NCR5380_read(INPUT_DATA_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) overrun = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) #ifdef CONFIG_SUN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) instance->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) (BASR_PHASE_MATCH | BASR_ACK)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) pr_err("scsi%d: BASR %02x\n", instance->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) NCR5380_read(BUS_AND_STATUS_REG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) instance->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) NCR5380_read(RESET_PARITY_INTERRUPT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) hostdata->dma_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) data = (unsigned char **)&hostdata->connected->SCp.ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) count = &hostdata->connected->SCp.this_residual;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) *data += transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) *count -= transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) if (hostdata->read_overruns) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) int cnt, toPIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) cnt = toPIO = hostdata->read_overruns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) if (overrun) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) dsprintk(NDEBUG_DMA, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) "Got an input overrun, using saved byte\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) *(*data)++ = saved_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) (*count)--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) cnt--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) toPIO--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (toPIO > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) dsprintk(NDEBUG_DMA, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) "Doing %d byte PIO to 0x%p\n", cnt, *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) NCR5380_transfer_pio(instance, &p, &cnt, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) *count -= toPIO - cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) * NCR5380_intr - generic NCR5380 irq handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) * @irq: interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) * @dev_id: device info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) * from the disconnected queue, and restarting NCR5380_main()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) * as required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) * The chip can assert IRQ in any of six different conditions. The IRQ flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) * Three of these six conditions are latched in the Bus and Status Register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) * - End of DMA (cleared by ending DMA Mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) * - Parity error (cleared by reading RPIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) * - Loss of BSY (cleared by reading RPIR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) * Two conditions have flag bits that are not latched:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) * - Bus reset (non-maskable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) * The remaining condition has no flag bit at all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) * - Selection/reselection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) * Hence, establishing the cause(s) of any interrupt is partly guesswork.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) * claimed that "the design of the [DP8490] interrupt logic ensures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) * interrupts will not be lost (they can be on the DP5380)."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) * The L5380/53C80 datasheet from LOGIC Devices has more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) * Checking for bus reset by reading RST is futile because of interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) * latency, but a bus reset will reset chip logic. Checking for parity error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) * is unnecessary because that interrupt is never enabled. A Loss of BSY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) * condition will clear DMA Mode. We can tell when this occurs because the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) * the Busy Monitor interrupt is enabled together with DMA Mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) struct Scsi_Host *instance = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) int handled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) unsigned char basr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) spin_lock_irqsave(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) basr = NCR5380_read(BUS_AND_STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) if (basr & BASR_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) unsigned char mr = NCR5380_read(MODE_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) unsigned char sr = NCR5380_read(STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) irq, basr, sr, mr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) /* Probably End of DMA, Phase Mismatch or Loss of BSY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) * We ack IRQ after clearing Mode Register. Workarounds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) * for End of DMA errata need to happen in DMA Mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) if (hostdata->connected) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) NCR5380_dma_complete(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) queue_work(hostdata->work_q, &hostdata->main_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) NCR5380_read(RESET_PARITY_INTERRUPT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) /* Probably reselected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) NCR5380_write(SELECT_ENABLE_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) NCR5380_read(RESET_PARITY_INTERRUPT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) if (!hostdata->connected) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) NCR5380_reselect(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) queue_work(hostdata->work_q, &hostdata->main_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) if (!hostdata->connected)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) /* Probably Bus Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) NCR5380_read(RESET_PARITY_INTERRUPT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) if (sr & SR_RST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) /* Certainly Bus Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) shost_printk(KERN_WARNING, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) "bus reset interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) bus_reset_cleanup(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) #ifdef SUN3_SCSI_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) dregs->csr |= CSR_DMA_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) handled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) #ifdef SUN3_SCSI_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) dregs->csr |= CSR_DMA_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) spin_unlock_irqrestore(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) return IRQ_RETVAL(handled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) * NCR5380_select - attempt arbitration and selection for a given command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) * @instance: the Scsi_Host instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) * @cmd: the scsi_cmnd to execute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) * This routine establishes an I_T_L nexus for a SCSI command. This involves
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) * Returns true if the operation should be retried.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) * Returns false if it should not be retried.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) * Side effects :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) * If bus busy, arbitration failed, etc, NCR5380_select() will exit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) * with registers as they should have been on entry - ie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) * SELECT_ENABLE will be set appropriately, the NCR5380
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) * will cease to drive any SCSI bus signals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) * If successful : the I_T_L nexus will be established, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) * hostdata->connected will be set to cmd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) * SELECT interrupt will be disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) * If failed (no target) : cmd->scsi_done() will be called, and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) * cmd->result host byte set to DID_BAD_TARGET.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) __releases(&hostdata->lock) __acquires(&hostdata->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) unsigned char tmp[3], phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) unsigned char *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) bool ret = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) bool can_disconnect = instance->irq != NO_IRQ &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) cmd->cmnd[0] != REQUEST_SENSE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) (disconnect_mask & BIT(scmd_id(cmd)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) NCR5380_dprint(NDEBUG_ARBITRATION, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) instance->this_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) * Arbitration and selection phases are slow and involve dropping the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) * lock, so we have to watch out for EH. An exception handler may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) * change 'selecting' to NULL. This function will then return false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) * so that the caller will forget about 'cmd'. (During information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) * transfer phases, EH may change 'connected' to NULL.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) hostdata->selecting = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) * Set the phase bits to 0, otherwise the NCR5380 won't drive the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) * data bus during SELECTION.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) NCR5380_write(TARGET_COMMAND_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) * Start arbitration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) NCR5380_write(MODE_REG, MR_ARBITRATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) /* The chip now waits for BUS FREE phase. Then after the 800 ns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) * Bus Free Delay, arbitration will begin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) spin_unlock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) ICR_ARBITRATION_PROGRESS, HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) /* Reselection interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) if (!hostdata->selecting) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) /* Command was aborted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) shost_printk(KERN_ERR, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) "select: arbitration timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) spin_unlock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) /* The SCSI-2 arbitration delay is 2.4 us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) udelay(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) /* Check for lost arbitration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) /* After/during arbitration, BSY should be asserted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) * IBM DPES-31080 Version S31Q works now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) NCR5380_write(INITIATOR_COMMAND_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) * Again, bus clear + bus settle time is 1.2us, however, this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) * a minimum so we'll udelay ceil(1.2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) if (hostdata->flags & FLAG_TOSHIBA_DELAY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) udelay(15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) udelay(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) if (!hostdata->selecting) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) * Now that we have won arbitration, start Selection process, asserting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) * the host and target ID's on the SCSI bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) * Raise ATN while SEL is true before BSY goes false from arbitration,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) * since this is the only way to guarantee that we'll get a MESSAGE OUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) * phase immediately after selection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) * Reselect interrupts must be turned off prior to the dropping of BSY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) * otherwise we will trigger an interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) NCR5380_write(SELECT_ENABLE_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) spin_unlock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) * The initiator shall then wait at least two deskew delays and release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) * the BSY signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) /* Reset BSY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) ICR_ASSERT_ATN | ICR_ASSERT_SEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) * Something weird happens when we cease to drive BSY - looks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) * like the board/chip is letting us do another read before the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) * appropriate propagation delay has expired, and we're confusing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) * a BSY signal from ourselves as the target's response to SELECTION.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) * A small delay (the 'C++' frontend breaks the pipeline with an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) * unnecessary jump, making it work on my 386-33/Trantor T128, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) * tighter 'C' code breaks and requires this) solves the problem -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) * the 1 us delay is arbitrary, and only used because this delay will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) * be the same on other platforms and since it works here, it should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) * work there.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) * wingel suggests that this could be due to failing to wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) * one deskew delay.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) * The SCSI specification calls for a 250 ms timeout for the actual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) * selection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) msecs_to_jiffies(250));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) NCR5380_reselect(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) /* Can't touch cmd if it has been reclaimed by the scsi ML */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) if (!hostdata->selecting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) cmd->result = DID_BAD_TARGET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) dsprintk(NDEBUG_SELECTION, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) "target did not respond within 250ms\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) ret = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) * No less than two deskew delays after the initiator detects the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) * BSY signal is true, it shall release the SEL signal and may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) * change the DATA BUS. -wingel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) * Since we followed the SCSI spec, and raised ATN while SEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) * was true but before BSY was false during selection, the information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) * transfer phase should be a MESSAGE OUT phase so that we can send the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) * IDENTIFY message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) /* Wait for start of REQ/ACK handshake */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) if (!hostdata->selecting) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) do_abort(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) scmd_id(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) data = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) phase = PHASE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) if (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) cmd->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) ret = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) hostdata->connected = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) #ifdef SUN3_SCSI_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) dregs->csr |= CSR_INTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) initialize_SCp(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) ret = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) if (!hostdata->selecting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) hostdata->selecting = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) * unsigned char *phase, int *count, unsigned char **data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) * Purpose : transfers data in given phase using polled I/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) * Inputs : instance - instance of driver, *phase - pointer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) * what phase is expected, *count - pointer to number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) * bytes to transfer, **data - pointer to data pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) * Returns : -1 when different phase is entered without transferring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) * maximum number of bytes, 0 if all bytes are transferred or exit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) * is in same phase.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) * Also, *phase, *count, *data are modified in place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) * XXX Note : handling for bus free may be useful.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) * Note : this code is not as quick as it could be, however it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) * IS 100% reliable, and for the actual data transfer where speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) * counts, we will always do a pseudo DMA or DMA transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) static int NCR5380_transfer_pio(struct Scsi_Host *instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) unsigned char *phase, int *count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) unsigned char **data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) unsigned char p = *phase, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) int c = *count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) unsigned char *d = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) * The NCR5380 chip will only drive the SCSI bus when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) * phase specified in the appropriate bits of the TARGET COMMAND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) * REGISTER match the STATUS REGISTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) * Wait for assertion of REQ, after which the phase bits will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) * valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) /* Check for phase mismatch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) NCR5380_dprint_phase(NDEBUG_PIO, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) /* Do actual transfer from SCSI bus to / from memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) if (!(p & SR_IO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) NCR5380_write(OUTPUT_DATA_REG, *d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) ++d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) * The SCSI standard suggests that in MSGOUT phase, the initiator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) * should drop ATN on the last byte of the message phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) * after REQ has been asserted for the handshake but before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) * the initiator raises ACK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) if (!(p & SR_IO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) if (!((p & SR_MSG) && c > 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) NCR5380_dprint(NDEBUG_PIO, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) ICR_ASSERT_DATA | ICR_ASSERT_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) ICR_ASSERT_DATA | ICR_ASSERT_ATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) NCR5380_dprint(NDEBUG_PIO, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) NCR5380_dprint(NDEBUG_PIO, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) if (NCR5380_poll_politely(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) * We have several special cases to consider during REQ/ACK handshaking :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) * 1. We were in MSGOUT phase, and we are on the last byte of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) * message. ATN must be dropped as ACK is dropped.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) * 2. We are in a MSGIN phase, and we are on the last byte of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) * message. We must exit with ACK asserted, so that the calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) * code may raise ATN before dropping ACK to reject the message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) * 3. ACK and ATN are clear and the target may proceed as normal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) if (!(p == PHASE_MSGIN && c == 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) if (p == PHASE_MSGOUT && c > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) } while (--c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) *count = c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) *data = d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) tmp = NCR5380_read(STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) /* The phase read from the bus is valid if either REQ is (already)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) * asserted or if ACK hasn't been released yet. The latter applies if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) *phase = tmp & PHASE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) *phase = PHASE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) if (!c || (*phase == p))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) * do_reset - issue a reset command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) * @instance: adapter to reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) * Issue a reset sequence to the NCR5380 and try and get the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) * back into sane shape.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) * This clears the reset interrupt flag because there may be no handler for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) * it. When the driver is initialized, the NCR5380_intr() handler has not yet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) * been installed. And when in EH we may have released the ST DMA interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) static void do_reset(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) NCR5380_write(TARGET_COMMAND_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) * do_abort - abort the currently established nexus by going to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) * MESSAGE OUT phase and sending an ABORT message.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) * @instance: relevant scsi host instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) * Returns 0 on success, negative error code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) static int do_abort(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) unsigned char *msgptr, phase, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) /* Request message out phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) * Wait for the target to indicate a valid phase by asserting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) * REQ. Once this happens, we'll have either a MSGOUT phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) * and can immediately send the ABORT message, or we'll have some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) * other phase and will have to source/sink data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) * We really don't care what value was on the bus or what value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) * the target sees, so we just handshake.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) if (tmp != PHASE_MSGOUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) NCR5380_write(INITIATOR_COMMAND_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) tmp = ABORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) msgptr = &tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) phase = PHASE_MSGOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) if (len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) rc = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) * If we got here, and the command completed successfully,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) * we're about to go into bus free state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) * unsigned char *phase, int *count, unsigned char **data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) * Purpose : transfers data in given phase using either real
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) * or pseudo DMA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) * Inputs : instance - instance of driver, *phase - pointer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) * what phase is expected, *count - pointer to number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) * bytes to transfer, **data - pointer to data pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) * Returns : -1 when different phase is entered without transferring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) * maximum number of bytes, 0 if all bytes or transferred or exit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) * is in same phase.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) * Also, *phase, *count, *data are modified in place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) static int NCR5380_transfer_dma(struct Scsi_Host *instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) unsigned char *phase, int *count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) unsigned char **data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) int c = *count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) unsigned char p = *phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) unsigned char *d = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) unsigned char tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) int result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) *phase = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) hostdata->connected->SCp.phase = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) if (p & SR_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) if (hostdata->read_overruns)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) c -= hostdata->read_overruns;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) else if (hostdata->flags & FLAG_DMA_FIXUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) --c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) (p & SR_IO) ? "receive" : "send", c, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) #ifdef CONFIG_SUN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) /* send start chain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) sun3scsi_dma_start(c, *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) MR_ENABLE_EOP_INTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) /* On the Medusa, it is a must to initialize the DMA before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) * starting the NCR. This is also the cleaner way for the TT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) if (p & SR_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) result = NCR5380_dma_recv_setup(hostdata, d, c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) result = NCR5380_dma_send_setup(hostdata, d, c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) * On the PAS16 at least I/O recovery delays are not needed here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) * Everyone else seems to want them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) if (p & SR_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) NCR5380_io_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) NCR5380_io_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) NCR5380_io_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) NCR5380_write(START_DMA_SEND_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) NCR5380_io_delay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) #ifdef CONFIG_SUN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) #ifdef SUN3_SCSI_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) dregs->csr |= CSR_DMA_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) sun3_dma_active = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) /* On the Falcon, the DMA setup must be done after the last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) * NCR access, else the DMA setup gets trashed!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) if (p & SR_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) result = NCR5380_dma_recv_setup(hostdata, d, c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) result = NCR5380_dma_send_setup(hostdata, d, c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) /* For real DMA, result is the byte count. DMA interrupt is expected. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) if (result > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) hostdata->dma_len = result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) /* The result is zero iff pseudo DMA send/receive was completed. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) hostdata->dma_len = c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) * A note regarding the DMA errata workarounds for early NMOS silicon.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) * For DMA sends, we want to wait until the last byte has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) * transferred out over the bus before we turn off DMA mode. Alas, there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) * seems to be no terribly good way of doing this on a 5380 under all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) * conditions. For non-scatter-gather operations, we can wait until REQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) * and ACK both go false, or until a phase mismatch occurs. Gather-sends
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) * are nastier, since the device will be expecting more data than we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) * could test Last Byte Sent to assure transfer (I imagine this is precisely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) * why this signal was added to the newer chips) but on the older 538[01]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) * this signal does not exist. The workaround for this lack is a watchdog;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) * we bail out of the wait-loop after a modest amount of wait-time if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) * the usual exit conditions are not met. Not a terribly clean or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) * correct solution :-%
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) * If the chip is in DMA receive mode, it will respond to a target's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) * REQ by latching the SCSI data into the INPUT DATA register and asserting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) * ACK, even if it has _already_ been notified by the DMA controller that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) * the current DMA transfer has completed! If the NCR5380 is then taken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) * out of DMA mode, this already-acknowledged byte is lost. This is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) * not a problem for "one DMA transfer per READ command", because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) * the situation will never arise... either all of the data is DMA'ed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) * properly, or the target switches to MESSAGE IN phase to signal a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) * disconnection (either operation bringing the DMA to a clean halt).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) * However, in order to handle scatter-receive, we must work around the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) * problem. The chosen fix is to DMA fewer bytes, then check for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) * condition before taking the NCR5380 out of DMA mode. One or two extra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) * bytes are transferred via PIO as necessary to fill out the original
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) * request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) if (hostdata->flags & FLAG_DMA_FIXUP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) if (p & SR_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) * The workaround was to transfer fewer bytes than we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) * intended to with the pseudo-DMA read function, wait for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) * the chip to latch the last byte, read it, and then disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) * pseudo-DMA mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) * REQ is deasserted when ACK is asserted, and not reasserted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) * until ACK goes false. Since the NCR5380 won't lower ACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) * until DACK is asserted, which won't happen unless we twiddle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) * the DMA port or we take the NCR5380 out of DMA mode, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) * can guarantee that we won't handshake another extra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) * byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) BASR_DRQ, BASR_DRQ, HZ) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) result = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) if (NCR5380_poll_politely(hostdata, STATUS_REG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) SR_REQ, 0, HZ) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) result = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) * Wait for the last byte to be sent. If REQ is being asserted for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) * the byte we're interested, we'll ACK it and it will go false.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) if (NCR5380_poll_politely2(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) result = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) NCR5380_dma_complete(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) * Purpose : run through the various SCSI phases and do as the target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) * directs us to. Operates on the currently connected command,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) * instance->connected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) * Inputs : instance, instance for which we are doing commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) * Side effects : SCSI things happen, the disconnected queue will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) * modified if a command disconnects, *instance->connected will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) * change.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) * XXX Note : we need to watch for bus free or a reset condition here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) * to recover from an unexpected bus free condition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) static void NCR5380_information_transfer(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) __releases(&hostdata->lock) __acquires(&hostdata->lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) unsigned char msgout = NOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) int sink = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) int transfersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) unsigned char *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) struct scsi_cmnd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) #ifdef SUN3_SCSI_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) dregs->csr |= CSR_INTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) while ((cmd = hostdata->connected)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) tmp = NCR5380_read(STATUS_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) /* We only have a valid SCSI phase when REQ is asserted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) if (tmp & SR_REQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) phase = (tmp & PHASE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) if (phase != old_phase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) old_phase = phase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) #ifdef CONFIG_SUN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) if (phase == PHASE_CMDOUT &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) sun3_dma_setup_done != cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) advance_sg_buffer(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) count = sun3scsi_dma_xfer_len(hostdata, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) if (count > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) if (rq_data_dir(cmd->request))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) sun3scsi_dma_send_setup(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) cmd->SCp.ptr, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) sun3scsi_dma_recv_setup(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) cmd->SCp.ptr, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) sun3_dma_setup_done = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) #ifdef SUN3_SCSI_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) dregs->csr |= CSR_INTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) #endif /* CONFIG_SUN3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) if (sink && (phase != PHASE_MSGOUT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) ICR_ASSERT_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) while (NCR5380_read(STATUS_REG) & SR_REQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) ICR_ASSERT_ATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) sink = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) switch (phase) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) case PHASE_DATAOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) #if (NDEBUG & NDEBUG_NO_DATAOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) sink = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) do_abort(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) cmd->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) hostdata->connected = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) case PHASE_DATAIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) * If there is no room left in the current buffer in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) * scatter-gather list, move onto the next one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) advance_sg_buffer(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) dsprintk(NDEBUG_INFORMATION, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) "this residual %d, sg ents %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) cmd->SCp.this_residual,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) sg_nents(cmd->SCp.buffer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) * The preferred transfer method is going to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) * PSEUDO-DMA for systems that are strictly PIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) * since we can let the hardware do the handshaking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) * For this to work, we need to know the transfersize
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) * ahead of time, since the pseudo-DMA code will sit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) * in an unconditional loop.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) transfersize = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) if (!cmd->device->borken)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) if (transfersize > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) len = transfersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) if (NCR5380_transfer_dma(instance, &phase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) &len, (unsigned char **)&cmd->SCp.ptr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) * If the watchdog timer fires, all future
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) * accesses to this device will use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) * polled-IO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) scmd_printk(KERN_INFO, cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) "switching to slow handshake\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) cmd->device->borken = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) do_reset(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) bus_reset_cleanup(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) /* Transfer a small chunk so that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) * irq mode lock is not held too long.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) transfersize = min(cmd->SCp.this_residual,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) NCR5380_PIO_CHUNK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) len = transfersize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) NCR5380_transfer_pio(instance, &phase, &len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) (unsigned char **)&cmd->SCp.ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) cmd->SCp.this_residual -= transfersize - len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) #ifdef CONFIG_SUN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) if (sun3_dma_setup_done == cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) sun3_dma_setup_done = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) case PHASE_MSGIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) data = &tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) cmd->SCp.Message = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) switch (tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) case ABORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) case COMMAND_COMPLETE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) /* Accept message by clearing ACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) sink = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) dsprintk(NDEBUG_QUEUES, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) "COMMAND COMPLETE %p target %d lun %llu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) cmd, scmd_id(cmd), cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) hostdata->connected = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) cmd->result &= ~0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) cmd->result |= cmd->SCp.Status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) cmd->result |= cmd->SCp.Message << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) set_resid_from_SCp(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) if (cmd->cmnd[0] == REQUEST_SENSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) list_add_tail(&ncmd->list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) &hostdata->autosense);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) * Restore phase bits to 0 so an interrupted selection,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) * arbitration can resume.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) NCR5380_write(TARGET_COMMAND_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) maybe_release_dma_irq(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) case MESSAGE_REJECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) /* Accept message by clearing ACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) switch (hostdata->last_message) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) case HEAD_OF_QUEUE_TAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) case ORDERED_QUEUE_TAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) case SIMPLE_QUEUE_TAG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) cmd->device->simple_tags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) case DISCONNECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) /* Accept message by clearing ACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) hostdata->connected = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) list_add(&ncmd->list, &hostdata->disconnected);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) cmd, scmd_id(cmd), cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) * Restore phase bits to 0 so an interrupted selection,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) * arbitration can resume.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) NCR5380_write(TARGET_COMMAND_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) #ifdef SUN3_SCSI_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) dregs->csr |= CSR_DMA_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) * operation, in violation of the SCSI spec so we can safely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) * ignore SAVE/RESTORE pointers calls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) * Unfortunately, some disks violate the SCSI spec and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) * don't issue the required SAVE_POINTERS message before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) * disconnecting, and we have to break spec to remain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) * compatible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) case SAVE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) case RESTORE_POINTERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) /* Accept message by clearing ACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) case EXTENDED_MESSAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) * Start the message buffer with the EXTENDED_MESSAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) * byte, since spi_print_msg() wants the whole thing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) extended_msg[0] = EXTENDED_MESSAGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) /* Accept first byte by clearing ACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) spin_unlock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) data = extended_msg + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) phase = PHASE_MSGIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) (int)extended_msg[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) (int)extended_msg[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) if (!len && extended_msg[1] > 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) extended_msg[1] <= sizeof(extended_msg) - 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) /* Accept third byte by clearing ACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) len = extended_msg[1] - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) data = extended_msg + 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) phase = PHASE_MSGIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) switch (extended_msg[2]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) case EXTENDED_SDTR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) case EXTENDED_WDTR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) } else if (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) shost_printk(KERN_ERR, instance, "error receiving extended message\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) extended_msg[2], extended_msg[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) tmp = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) if (!hostdata->connected)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) /* Reject message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) * If we get something weird that we aren't expecting,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) * log it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) if (tmp == EXTENDED_MESSAGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) scmd_printk(KERN_INFO, cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) "rejecting unknown extended message code %02x, length %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) extended_msg[2], extended_msg[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) else if (tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) scmd_printk(KERN_INFO, cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) "rejecting unknown message code %02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) msgout = MESSAGE_REJECT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) } /* switch (tmp) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) case PHASE_MSGOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) data = &msgout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) hostdata->last_message = msgout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) if (msgout == ABORT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) hostdata->connected = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) cmd->result = DID_ERROR << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) maybe_release_dma_irq(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) msgout = NOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) case PHASE_CMDOUT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) len = cmd->cmd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) data = cmd->cmnd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) * XXX for performance reasons, on machines with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) * PSEUDO-DMA architecture we should probably
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) * use the dma transfer function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) case PHASE_STATIN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) data = &tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) cmd->SCp.Status = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) shost_printk(KERN_ERR, instance, "unknown phase\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) NCR5380_dprint(NDEBUG_ANY, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) } /* switch(phase) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) spin_unlock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) spin_lock_irq(&hostdata->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) * Function : void NCR5380_reselect (struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) * Purpose : does reselection, initializing the instance->connected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) * nexus has been reestablished,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) * Inputs : instance - this instance of the NCR5380.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) static void NCR5380_reselect(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) unsigned char target_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) unsigned char lun;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) unsigned char msg[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) struct NCR5380_cmd *ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) struct scsi_cmnd *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) * Disable arbitration, etc. since the host adapter obviously
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) * lost, and tell an interrupted NCR5380_select() to restart.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) if (!target_mask || target_mask & (target_mask - 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) shost_printk(KERN_WARNING, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) "reselect: bad target_mask 0x%02x\n", target_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) * At this point, we have detected that our SCSI ID is on the bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) * SEL is true and BSY was false for at least one bus settle delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) * (400 ns).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) * We must assert BSY ourselves, until the target drops the SEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) * signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) if (NCR5380_poll_politely(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) * Wait for target to go into MSGIN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) if (NCR5380_poll_politely(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) /* BUS FREE phase */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) do_abort(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) #ifdef CONFIG_SUN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) /* acknowledge toggle to MSGIN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) /* peek at the byte without really hitting the bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) int len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) unsigned char *data = msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) unsigned char phase = PHASE_MSGIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) NCR5380_transfer_pio(instance, &phase, &len, &data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) if (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) do_abort(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) #endif /* CONFIG_SUN3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) if (!(msg[0] & 0x80)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) spi_print_msg(msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) do_abort(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) lun = msg[0] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) * We need to add code for SCSI-II to track which devices have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) * I_T_L_Q nexuses established, and which have simple I_T_L
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) * nexuses so we can chose to do additional data transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) * just reestablished, and remove it from the disconnected queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) tmp = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) list_for_each_entry(ncmd, &hostdata->disconnected, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) if (target_mask == (1 << scmd_id(cmd)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) lun == (u8)cmd->device->lun) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) list_del(&ncmd->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) tmp = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) if (tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) "reselect: removed %p from disconnected queue\n", tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) int target = ffs(target_mask) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) target_mask, lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) * Since we have an established nexus that we can't do anything
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) * with, we must abort it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) if (do_abort(instance) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) hostdata->busy[target] &= ~(1 << lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) #ifdef CONFIG_SUN3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) if (sun3_dma_setup_done != tmp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) advance_sg_buffer(tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) count = sun3scsi_dma_xfer_len(hostdata, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) if (count > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) if (rq_data_dir(tmp->request))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) sun3scsi_dma_send_setup(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) tmp->SCp.ptr, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) sun3scsi_dma_recv_setup(hostdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) tmp->SCp.ptr, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) sun3_dma_setup_done = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) #endif /* CONFIG_SUN3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) /* Accept message by clearing ACK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) hostdata->connected = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) scmd_id(tmp), tmp->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) * list_find_cmd - test for presence of a command in a linked list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) * @haystack: list of commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) * @needle: command to search for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) static bool list_find_cmd(struct list_head *haystack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) struct scsi_cmnd *needle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) struct NCR5380_cmd *ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) list_for_each_entry(ncmd, haystack, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) if (NCR5380_to_scmd(ncmd) == needle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) * list_remove_cmd - remove a command from linked list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) * @haystack: list of commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) * @needle: command to remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) static bool list_del_cmd(struct list_head *haystack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) struct scsi_cmnd *needle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) if (list_find_cmd(haystack, needle)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) list_del(&ncmd->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) * NCR5380_abort - scsi host eh_abort_handler() method
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) * @cmd: the command to be aborted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) * Try to abort a given command by removing it from queues and/or sending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) * the target an abort message. This may not succeed in causing a target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) * to abort the command. Nonetheless, the low-level driver must forget about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) * the command because the mid-layer reclaims it and it may be re-issued.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) * The normal path taken by a command is as follows. For EH we trace this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) * same path to locate and abort the command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) * unissued -> selecting -> [unissued -> selecting ->]... connected ->
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) * [disconnected -> connected ->]...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) * [autosense -> connected ->] done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) * If cmd was not found at all then presumably it has already been completed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) * in which case return SUCCESS to try to avoid further EH measures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) * If the command has not completed yet, we must not fail to find it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) * We have no option but to forget the aborted command (even if it still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) * lacks sense data). The mid-layer may re-issue a command that is in error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) * this driver are such that a command can appear on one queue only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) * The lock protects driver data structures, but EH handlers also use it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) * to serialize their own execution and prevent their own re-entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) static int NCR5380_abort(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) struct Scsi_Host *instance = cmd->device->host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) int result = SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) spin_lock_irqsave(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) #if (NDEBUG & NDEBUG_ANY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) scmd_printk(KERN_INFO, cmd, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) NCR5380_dprint(NDEBUG_ANY, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) NCR5380_dprint_phase(NDEBUG_ANY, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) if (list_del_cmd(&hostdata->unissued, cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) dsprintk(NDEBUG_ABORT, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) "abort: removed %p from issue queue\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) cmd->result = DID_ABORT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) if (hostdata->selecting == cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) dsprintk(NDEBUG_ABORT, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) "abort: cmd %p == selecting\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) hostdata->selecting = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) cmd->result = DID_ABORT << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) if (list_del_cmd(&hostdata->disconnected, cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) dsprintk(NDEBUG_ABORT, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) "abort: removed %p from disconnected list\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) /* Can't call NCR5380_select() and send ABORT because that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) * means releasing the lock. Need a bus reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) set_host_byte(cmd, DID_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) result = FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) if (hostdata->connected == cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) hostdata->connected = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) hostdata->dma_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) if (do_abort(instance) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) set_host_byte(cmd, DID_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) result = FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) set_host_byte(cmd, DID_ABORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) if (list_del_cmd(&hostdata->autosense, cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) dsprintk(NDEBUG_ABORT, instance,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) "abort: removed %p from sense queue\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) if (result == FAILED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) queue_work(hostdata->work_q, &hostdata->main_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) maybe_release_dma_irq(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) spin_unlock_irqrestore(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) static void bus_reset_cleanup(struct Scsi_Host *instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) struct NCR5380_cmd *ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) /* reset NCR registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) NCR5380_write(MODE_REG, MR_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) NCR5380_write(TARGET_COMMAND_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) NCR5380_write(SELECT_ENABLE_REG, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) /* After the reset, there are no more connected or disconnected commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) * and no busy units; so clear the low-level status here to avoid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) * conflicts when the mid-level code tries to wake up the affected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) * commands!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) if (hostdata->selecting) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) hostdata->selecting->result = DID_RESET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) complete_cmd(instance, hostdata->selecting);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) hostdata->selecting = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) list_for_each_entry(ncmd, &hostdata->disconnected, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) set_host_byte(cmd, DID_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) complete_cmd(instance, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) INIT_LIST_HEAD(&hostdata->disconnected);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) list_for_each_entry(ncmd, &hostdata->autosense, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) INIT_LIST_HEAD(&hostdata->autosense);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) if (hostdata->connected) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) set_host_byte(hostdata->connected, DID_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) complete_cmd(instance, hostdata->connected);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) hostdata->connected = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) for (i = 0; i < 8; ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) hostdata->busy[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) hostdata->dma_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) queue_work(hostdata->work_q, &hostdata->main_task);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) maybe_release_dma_irq(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) * NCR5380_host_reset - reset the SCSI host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) * @cmd: SCSI command undergoing EH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) * Returns SUCCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) static int NCR5380_host_reset(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) struct Scsi_Host *instance = cmd->device->host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) struct NCR5380_hostdata *hostdata = shost_priv(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) struct NCR5380_cmd *ncmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) spin_lock_irqsave(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) #if (NDEBUG & NDEBUG_ANY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) shost_printk(KERN_INFO, instance, __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) NCR5380_dprint(NDEBUG_ANY, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) NCR5380_dprint_phase(NDEBUG_ANY, instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) list_for_each_entry(ncmd, &hostdata->unissued, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) scmd->result = DID_RESET << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) scmd->scsi_done(scmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) INIT_LIST_HEAD(&hostdata->unissued);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) do_reset(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) bus_reset_cleanup(instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) spin_unlock_irqrestore(&hostdata->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) return SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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