^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) 3w-9xxx.c -- 3ware 9000 Storage Controller device driver for Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Written By: Adam Radford <aradford@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Modifications By: Tom Couch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Copyright (C) 2004-2009 Applied Micro Circuits Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Copyright (C) 2010 LSI Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) it under the terms of the GNU General Public License as published by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) the Free Software Foundation; version 2 of the License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) NO WARRANTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) solely responsible for determining the appropriateness of using and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) distributing the Program and assumes all risks associated with its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) exercise of rights under this Agreement, including but not limited to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) the risks and costs of program errors, damage to or loss of data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) programs or equipment, and unavailability or interruption of operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) DISCLAIMER OF LIABILITY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Bugs/Comments/Suggestions should be mailed to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) aradford@gmail.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Note: This version of the driver does not contain a bundled firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) image.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) History
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) -------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 2.26.02.000 - Driver cleanup for kernel submission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 2.26.02.001 - Replace schedule_timeout() calls with msleep().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 2.26.02.002 - Add support for PAE mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Add lun support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Fix twa_remove() to free irq handler/unregister_chrdev()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) before shutting down card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) Change to new 'change_queue_depth' api.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) Fix 'handled=1' ISR usage, remove bogus IRQ check.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Remove un-needed eh_abort handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) Add support for embedded firmware error strings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 2.26.02.003 - Correctly handle single sgl's with use_sg=1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 2.26.02.004 - Add support for 9550SX controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 2.26.02.005 - Fix use_sg == 0 mapping on systems with 4GB or higher.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 2.26.02.006 - Fix 9550SX pchip reset timeout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Add big endian support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 2.26.02.007 - Disable local interrupts during kmap/unmap_atomic().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 2.26.02.008 - Free irq handler in __twa_shutdown().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Serialize reset code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) Add support for 9650SE controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 2.26.02.009 - Fix dma mask setting to fallback to 32-bit if 64-bit fails.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 2.26.02.010 - Add support for 9690SA controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 2.26.02.011 - Increase max AENs drained to 256.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) Add MSI support and "use_msi" module parameter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) Fix bug in twa_get_param() on 4GB+.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Use pci_resource_len() for ioremap().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 2.26.02.012 - Add power management support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 2.26.02.013 - Fix bug in twa_load_sgl().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 2.26.02.014 - Force 60 second timeout default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #include <scsi/scsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #include <scsi/scsi_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #include <scsi/scsi_tcq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #include <scsi/scsi_cmnd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #include "3w-9xxx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Globals */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define TW_DRIVER_VERSION "2.26.02.014"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static DEFINE_MUTEX(twa_chrdev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static unsigned int twa_device_extension_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static int twa_major = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) extern struct timezone sys_tz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* Module parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) MODULE_AUTHOR ("LSI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MODULE_DESCRIPTION ("3ware 9000 Storage Controller Linux Driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MODULE_VERSION(TW_DRIVER_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int use_msi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) module_param(use_msi, int, S_IRUGO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) MODULE_PARM_DESC(use_msi, "Use Message Signaled Interrupts. Default: 0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* Function prototypes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static void twa_aen_queue_event(TW_Device_Extension *tw_dev, TW_Command_Apache_Header *header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int twa_aen_read_queue(TW_Device_Extension *tw_dev, int request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static char *twa_aen_severity_lookup(unsigned char severity_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static void twa_aen_sync_time(TW_Device_Extension *tw_dev, int request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static long twa_chrdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int twa_chrdev_open(struct inode *inode, struct file *file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int twa_fill_sense(TW_Device_Extension *tw_dev, int request_id, int copy_sense, int print_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static void twa_free_request_id(TW_Device_Extension *tw_dev,int request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void twa_get_request_id(TW_Device_Extension *tw_dev, int *request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int twa_initconnection(TW_Device_Extension *tw_dev, int message_credits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u32 set_features, unsigned short current_fw_srl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned short current_fw_arch_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned short current_fw_branch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned short current_fw_build,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned short *fw_on_ctlr_srl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned short *fw_on_ctlr_arch_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned short *fw_on_ctlr_branch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned short *fw_on_ctlr_build,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) u32 *init_connect_result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static void twa_load_sgl(TW_Device_Extension *tw_dev, TW_Command_Full *full_command_packet, int request_id, dma_addr_t dma_handle, int length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static int twa_poll_response(TW_Device_Extension *tw_dev, int request_id, int seconds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static int twa_poll_status_gone(TW_Device_Extension *tw_dev, u32 flag, int seconds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int twa_post_command_packet(TW_Device_Extension *tw_dev, int request_id, char internal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int twa_reset_device_extension(TW_Device_Extension *tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int twa_reset_sequence(TW_Device_Extension *tw_dev, int soft_reset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static int twa_scsiop_execute_scsi(TW_Device_Extension *tw_dev, int request_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned char *cdb, int use_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) TW_SG_Entry *sglistarg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static void twa_scsiop_execute_scsi_complete(TW_Device_Extension *tw_dev, int request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static char *twa_string_lookup(twa_message_type *table, unsigned int aen_code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* Functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* Show some statistics about the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static ssize_t twa_show_stats(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct device_attribute *attr, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct Scsi_Host *host = class_to_shost(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) TW_Device_Extension *tw_dev = (TW_Device_Extension *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ssize_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) spin_lock_irqsave(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) len = snprintf(buf, PAGE_SIZE, "3w-9xxx Driver version: %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) "Current commands posted: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) "Max commands posted: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) "Current pending commands: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) "Max pending commands: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) "Last sgl length: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) "Max sgl length: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) "Last sector count: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) "Max sector count: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) "SCSI Host Resets: %4d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) "AEN's: %4d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) TW_DRIVER_VERSION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) tw_dev->posted_request_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) tw_dev->max_posted_request_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) tw_dev->pending_request_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) tw_dev->max_pending_request_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) tw_dev->sgl_entries,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) tw_dev->max_sgl_entries,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) tw_dev->sector_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) tw_dev->max_sector_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) tw_dev->num_resets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) tw_dev->aen_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) spin_unlock_irqrestore(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) } /* End twa_show_stats() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* Create sysfs 'stats' entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static struct device_attribute twa_host_stats_attr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) .attr = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .name = "stats",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .mode = S_IRUGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .show = twa_show_stats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* Host attributes initializer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) static struct device_attribute *twa_host_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) &twa_host_stats_attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) /* File operations struct for character device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static const struct file_operations twa_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .unlocked_ioctl = twa_chrdev_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .open = twa_chrdev_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .release = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .llseek = noop_llseek,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * The controllers use an inline buffer instead of a mapped SGL for small,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * single entry buffers. Note that we treat a zero-length transfer like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * a mapped SGL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static bool twa_command_mapped(struct scsi_cmnd *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return scsi_sg_count(cmd) != 1 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) scsi_bufflen(cmd) >= TW_MIN_SGL_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* This function will complete an aen request from the isr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int twa_aen_complete(TW_Device_Extension *tw_dev, int request_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) TW_Command *command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) TW_Command_Apache_Header *header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) unsigned short aen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) header = (TW_Command_Apache_Header *)tw_dev->generic_buffer_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) tw_dev->posted_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) aen = le16_to_cpu(header->status_block.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) command_packet = &full_command_packet->command.oldcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* First check for internal completion of set param for time sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (TW_OP_OUT(command_packet->opcode__sgloffset) == TW_OP_SET_PARAM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* Keep reading the queue in case there are more aen's */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (twa_aen_read_queue(tw_dev, request_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) goto out2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) switch (aen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) case TW_AEN_QUEUE_EMPTY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* Quit reading the queue if this is the last one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) case TW_AEN_SYNC_TIME_WITH_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) twa_aen_sync_time(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) twa_aen_queue_event(tw_dev, header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* If there are more aen's, keep reading the queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (twa_aen_read_queue(tw_dev, request_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) goto out2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) out2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) tw_dev->state[request_id] = TW_S_COMPLETED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) twa_free_request_id(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) clear_bit(TW_IN_ATTENTION_LOOP, &tw_dev->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) } /* End twa_aen_complete() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* This function will drain aen queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static int twa_aen_drain_queue(TW_Device_Extension *tw_dev, int no_check_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int request_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) unsigned char cdb[TW_MAX_CDB_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) TW_SG_Entry sglist[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) int finished = 0, count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) TW_Command_Apache_Header *header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) unsigned short aen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int first_reset = 0, queue = 0, retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (no_check_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) first_reset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) first_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) memset(full_command_packet, 0, sizeof(TW_Command_Full));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /* Initialize cdb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) memset(&cdb, 0, TW_MAX_CDB_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) cdb[0] = REQUEST_SENSE; /* opcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) cdb[4] = TW_ALLOCATION_LENGTH; /* allocation length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* Initialize sglist */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) memset(&sglist, 0, sizeof(TW_SG_Entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) sglist[0].length = TW_SECTOR_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) sglist[0].address = tw_dev->generic_buffer_phys[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (sglist[0].address & TW_ALIGNMENT_9000_SGL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x1, "Found unaligned address during AEN drain");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* Mark internal command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) tw_dev->srb[request_id] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /* Send command to the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (twa_scsiop_execute_scsi(tw_dev, request_id, cdb, 1, sglist)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x2, "Error posting request sense");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* Now poll for completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) if (twa_poll_response(tw_dev, request_id, 30)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x3, "No valid response while draining AEN queue");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) tw_dev->posted_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) tw_dev->posted_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) header = (TW_Command_Apache_Header *)tw_dev->generic_buffer_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) aen = le16_to_cpu(header->status_block.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) queue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) switch (aen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) case TW_AEN_QUEUE_EMPTY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (first_reset != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) finished = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) case TW_AEN_SOFT_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (first_reset == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) first_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) queue = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) case TW_AEN_SYNC_TIME_WITH_HOST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) queue = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* Now queue an event info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) twa_aen_queue_event(tw_dev, header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) } while ((finished == 0) && (count < TW_MAX_AEN_DRAIN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (count == TW_MAX_AEN_DRAIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) tw_dev->state[request_id] = TW_S_INITIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) } /* End twa_aen_drain_queue() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* This function will queue an event */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) static void twa_aen_queue_event(TW_Device_Extension *tw_dev, TW_Command_Apache_Header *header)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u32 local_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) TW_Event *event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) unsigned short aen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) char host[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) char *error_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) tw_dev->aen_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Fill out event info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) event = tw_dev->event_queue[tw_dev->error_index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) /* Check for clobber */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) host[0] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (tw_dev->host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) sprintf(host, " scsi%d:", tw_dev->host->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (event->retrieved == TW_AEN_NOT_RETRIEVED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) tw_dev->aen_clobber = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) aen = le16_to_cpu(header->status_block.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) memset(event, 0, sizeof(TW_Event));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) event->severity = TW_SEV_OUT(header->status_block.severity__reserved);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* event->time_stamp_sec overflows in y2106 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) local_time = (u32)(ktime_get_real_seconds() - (sys_tz.tz_minuteswest * 60));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) event->time_stamp_sec = local_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) event->aen_code = aen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) event->retrieved = TW_AEN_NOT_RETRIEVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) event->sequence_id = tw_dev->error_sequence_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) tw_dev->error_sequence_id++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) /* Check for embedded error string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) error_str = &(header->err_specific_desc[strlen(header->err_specific_desc)+1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) header->err_specific_desc[sizeof(header->err_specific_desc) - 1] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) event->parameter_len = strlen(header->err_specific_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) memcpy(event->parameter_data, header->err_specific_desc, event->parameter_len + (error_str[0] == '\0' ? 0 : (1 + strlen(error_str))));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) if (event->severity != TW_AEN_SEVERITY_DEBUG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) printk(KERN_WARNING "3w-9xxx:%s AEN: %s (0x%02X:0x%04X): %s:%s.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) host,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) twa_aen_severity_lookup(TW_SEV_OUT(header->status_block.severity__reserved)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) TW_MESSAGE_SOURCE_CONTROLLER_EVENT, aen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) error_str[0] == '\0' ? twa_string_lookup(twa_aen_table, aen) : error_str,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) header->err_specific_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) tw_dev->aen_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if ((tw_dev->error_index + 1) == TW_Q_LENGTH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) tw_dev->event_queue_wrapped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) tw_dev->error_index = (tw_dev->error_index + 1 ) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) } /* End twa_aen_queue_event() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) /* This function will read the aen queue from the isr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static int twa_aen_read_queue(TW_Device_Extension *tw_dev, int request_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) unsigned char cdb[TW_MAX_CDB_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) TW_SG_Entry sglist[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) memset(full_command_packet, 0, sizeof(TW_Command_Full));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) /* Initialize cdb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) memset(&cdb, 0, TW_MAX_CDB_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) cdb[0] = REQUEST_SENSE; /* opcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) cdb[4] = TW_ALLOCATION_LENGTH; /* allocation length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /* Initialize sglist */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) memset(&sglist, 0, sizeof(TW_SG_Entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) sglist[0].length = TW_SECTOR_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) sglist[0].address = tw_dev->generic_buffer_phys[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* Mark internal command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) tw_dev->srb[request_id] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /* Now post the command packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (twa_scsiop_execute_scsi(tw_dev, request_id, cdb, 1, sglist)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x4, "Post failed while reading AEN queue");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) } /* End twa_aen_read_queue() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* This function will look up an AEN severity string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static char *twa_aen_severity_lookup(unsigned char severity_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) char *retval = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if ((severity_code < (unsigned char) TW_AEN_SEVERITY_ERROR) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) (severity_code > (unsigned char) TW_AEN_SEVERITY_DEBUG))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) retval = twa_aen_severity_table[severity_code];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) } /* End twa_aen_severity_lookup() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /* This function will sync firmware time with the host time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static void twa_aen_sync_time(TW_Device_Extension *tw_dev, int request_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) u32 schedulertime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) TW_Command *command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) TW_Param_Apache *param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) time64_t local_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* Fill out the command packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) memset(full_command_packet, 0, sizeof(TW_Command_Full));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) command_packet = &full_command_packet->command.oldcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) command_packet->opcode__sgloffset = TW_OPSGL_IN(2, TW_OP_SET_PARAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) command_packet->request_id = request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) command_packet->byte8_offset.param.sgl[0].address = TW_CPU_TO_SGL(tw_dev->generic_buffer_phys[request_id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) command_packet->byte8_offset.param.sgl[0].length = cpu_to_le32(TW_SECTOR_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) command_packet->size = TW_COMMAND_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) command_packet->byte6_offset.parameter_count = cpu_to_le16(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /* Setup the param */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) param = (TW_Param_Apache *)tw_dev->generic_buffer_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) memset(param, 0, TW_SECTOR_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) param->table_id = cpu_to_le16(TW_TIMEKEEP_TABLE | 0x8000); /* Controller time keep table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) param->parameter_id = cpu_to_le16(0x3); /* SchedulerTime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) param->parameter_size_bytes = cpu_to_le16(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* Convert system time in UTC to local time seconds since last
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) Sunday 12:00AM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) local_time = (ktime_get_real_seconds() - (sys_tz.tz_minuteswest * 60));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) div_u64_rem(local_time - (3 * 86400), 604800, &schedulertime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) schedulertime = cpu_to_le32(schedulertime % 604800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) memcpy(param->data, &schedulertime, sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* Mark internal command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) tw_dev->srb[request_id] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /* Now post the command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) twa_post_command_packet(tw_dev, request_id, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) } /* End twa_aen_sync_time() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) /* This function will allocate memory and check if it is correctly aligned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static int twa_allocate_memory(TW_Device_Extension *tw_dev, int size, int which)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) dma_addr_t dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) unsigned long *cpu_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) cpu_addr = dma_alloc_coherent(&tw_dev->tw_pci_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) size * TW_Q_LENGTH, &dma_handle, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (!cpu_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x5, "Memory allocation failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if ((unsigned long)cpu_addr % (TW_ALIGNMENT_9000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x6, "Failed to allocate correctly aligned memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) dma_free_coherent(&tw_dev->tw_pci_dev->dev, size * TW_Q_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) cpu_addr, dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) memset(cpu_addr, 0, size*TW_Q_LENGTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) for (i = 0; i < TW_Q_LENGTH; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) switch(which) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) tw_dev->command_packet_phys[i] = dma_handle+(i*size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) tw_dev->command_packet_virt[i] = (TW_Command_Full *)((unsigned char *)cpu_addr + (i*size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) tw_dev->generic_buffer_phys[i] = dma_handle+(i*size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) tw_dev->generic_buffer_virt[i] = (unsigned long *)((unsigned char *)cpu_addr + (i*size));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) } /* End twa_allocate_memory() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /* This function will check the status register for unexpected bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static int twa_check_bits(u32 status_reg_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if ((status_reg_value & TW_STATUS_EXPECTED_BITS) != TW_STATUS_EXPECTED_BITS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if ((status_reg_value & TW_STATUS_UNEXPECTED_BITS) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) } /* End twa_check_bits() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* This function will check the srl and decide if we are compatible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) static int twa_check_srl(TW_Device_Extension *tw_dev, int *flashed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) unsigned short fw_on_ctlr_srl = 0, fw_on_ctlr_arch_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) unsigned short fw_on_ctlr_branch = 0, fw_on_ctlr_build = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) u32 init_connect_result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if (twa_initconnection(tw_dev, TW_INIT_MESSAGE_CREDITS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) TW_EXTENDED_INIT_CONNECT, TW_CURRENT_DRIVER_SRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) TW_9000_ARCH_ID, TW_CURRENT_DRIVER_BRANCH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) TW_CURRENT_DRIVER_BUILD, &fw_on_ctlr_srl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) &fw_on_ctlr_arch_id, &fw_on_ctlr_branch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) &fw_on_ctlr_build, &init_connect_result)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x7, "Initconnection failed while checking SRL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) tw_dev->tw_compat_info.working_srl = fw_on_ctlr_srl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) tw_dev->tw_compat_info.working_branch = fw_on_ctlr_branch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) tw_dev->tw_compat_info.working_build = fw_on_ctlr_build;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Try base mode compatibility */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) if (!(init_connect_result & TW_CTLR_FW_COMPATIBLE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (twa_initconnection(tw_dev, TW_INIT_MESSAGE_CREDITS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) TW_EXTENDED_INIT_CONNECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) TW_BASE_FW_SRL, TW_9000_ARCH_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) TW_BASE_FW_BRANCH, TW_BASE_FW_BUILD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) &fw_on_ctlr_srl, &fw_on_ctlr_arch_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) &fw_on_ctlr_branch, &fw_on_ctlr_build,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) &init_connect_result)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) TW_PRINTK(tw_dev->host, TW_DRIVER, 0xa, "Initconnection (base mode) failed while checking SRL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (!(init_connect_result & TW_CTLR_FW_COMPATIBLE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (TW_CURRENT_DRIVER_SRL > fw_on_ctlr_srl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x32, "Firmware and driver incompatibility: please upgrade firmware");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x33, "Firmware and driver incompatibility: please upgrade driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) tw_dev->tw_compat_info.working_srl = TW_BASE_FW_SRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) tw_dev->tw_compat_info.working_branch = TW_BASE_FW_BRANCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) tw_dev->tw_compat_info.working_build = TW_BASE_FW_BUILD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* Load rest of compatibility struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) strlcpy(tw_dev->tw_compat_info.driver_version, TW_DRIVER_VERSION,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) sizeof(tw_dev->tw_compat_info.driver_version));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) tw_dev->tw_compat_info.driver_srl_high = TW_CURRENT_DRIVER_SRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) tw_dev->tw_compat_info.driver_branch_high = TW_CURRENT_DRIVER_BRANCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) tw_dev->tw_compat_info.driver_build_high = TW_CURRENT_DRIVER_BUILD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) tw_dev->tw_compat_info.driver_srl_low = TW_BASE_FW_SRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) tw_dev->tw_compat_info.driver_branch_low = TW_BASE_FW_BRANCH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) tw_dev->tw_compat_info.driver_build_low = TW_BASE_FW_BUILD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) tw_dev->tw_compat_info.fw_on_ctlr_srl = fw_on_ctlr_srl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) tw_dev->tw_compat_info.fw_on_ctlr_branch = fw_on_ctlr_branch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) tw_dev->tw_compat_info.fw_on_ctlr_build = fw_on_ctlr_build;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) } /* End twa_check_srl() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) /* This function handles ioctl for the character device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static long twa_chrdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct inode *inode = file_inode(file);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) long timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) unsigned long *cpu_addr, data_buffer_length_adjusted = 0, flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) dma_addr_t dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) int request_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) unsigned int sequence_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) unsigned char event_index, start_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) TW_Ioctl_Driver_Command driver_command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) TW_Ioctl_Buf_Apache *tw_ioctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) TW_Lock *tw_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) TW_Compatibility_Info *tw_compat_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) TW_Event *event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) ktime_t current_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) TW_Device_Extension *tw_dev = twa_device_extension_list[iminor(inode)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) int retval = TW_IOCTL_ERROR_OS_EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) void __user *argp = (void __user *)arg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) mutex_lock(&twa_chrdev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) /* Only let one of these through at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (mutex_lock_interruptible(&tw_dev->ioctl_lock)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) retval = TW_IOCTL_ERROR_OS_EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) /* First copy down the driver command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) if (copy_from_user(&driver_command, argp, sizeof(TW_Ioctl_Driver_Command)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) goto out2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) /* Check data buffer size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) if (driver_command.buffer_length > TW_MAX_SECTORS * 2048) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) retval = TW_IOCTL_ERROR_OS_EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) goto out2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) /* Hardware can only do multiple of 512 byte transfers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) data_buffer_length_adjusted = (driver_command.buffer_length + 511) & ~511;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) /* Now allocate ioctl buf memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) cpu_addr = dma_alloc_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted+sizeof(TW_Ioctl_Buf_Apache) - 1, &dma_handle, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (!cpu_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) retval = TW_IOCTL_ERROR_OS_ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) goto out2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) tw_ioctl = (TW_Ioctl_Buf_Apache *)cpu_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) /* Now copy down the entire ioctl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) if (copy_from_user(tw_ioctl, argp, driver_command.buffer_length + sizeof(TW_Ioctl_Buf_Apache) - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) goto out3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) /* See which ioctl we are doing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) case TW_IOCTL_FIRMWARE_PASS_THROUGH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) spin_lock_irqsave(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) twa_get_request_id(tw_dev, &request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) /* Flag internal command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) tw_dev->srb[request_id] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /* Flag chrdev ioctl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) tw_dev->chrdev_request_id = request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) full_command_packet = &tw_ioctl->firmware_command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) /* Load request id and sglist for both command types */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) twa_load_sgl(tw_dev, full_command_packet, request_id, dma_handle, data_buffer_length_adjusted);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) memcpy(tw_dev->command_packet_virt[request_id], &(tw_ioctl->firmware_command), sizeof(TW_Command_Full));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) /* Now post the command packet to the controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) twa_post_command_packet(tw_dev, request_id, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) spin_unlock_irqrestore(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) timeout = TW_IOCTL_CHRDEV_TIMEOUT*HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) /* Now wait for command to complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) timeout = wait_event_timeout(tw_dev->ioctl_wqueue, tw_dev->chrdev_request_id == TW_IOCTL_CHRDEV_FREE, timeout);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) /* We timed out, and didn't get an interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) if (tw_dev->chrdev_request_id != TW_IOCTL_CHRDEV_FREE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) /* Now we need to reset the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) printk(KERN_WARNING "3w-9xxx: scsi%d: WARNING: (0x%02X:0x%04X): Character ioctl (0x%x) timed out, resetting card.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) tw_dev->host->host_no, TW_DRIVER, 0x37,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) retval = TW_IOCTL_ERROR_OS_EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) twa_reset_device_extension(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) goto out3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) /* Now copy in the command packet response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) memcpy(&(tw_ioctl->firmware_command), tw_dev->command_packet_virt[request_id], sizeof(TW_Command_Full));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) /* Now complete the io */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) spin_lock_irqsave(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) tw_dev->posted_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) tw_dev->state[request_id] = TW_S_COMPLETED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) twa_free_request_id(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) spin_unlock_irqrestore(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) case TW_IOCTL_GET_COMPATIBILITY_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) /* Copy compatibility struct into ioctl data buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) tw_compat_info = (TW_Compatibility_Info *)tw_ioctl->data_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) memcpy(tw_compat_info, &tw_dev->tw_compat_info, sizeof(TW_Compatibility_Info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) case TW_IOCTL_GET_LAST_EVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) if (tw_dev->event_queue_wrapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) if (tw_dev->aen_clobber) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_AEN_CLOBBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) tw_dev->aen_clobber = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) if (!tw_dev->error_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_NO_MORE_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) event_index = (tw_dev->error_index - 1 + TW_Q_LENGTH) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) memcpy(tw_ioctl->data_buffer, tw_dev->event_queue[event_index], sizeof(TW_Event));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) tw_dev->event_queue[event_index]->retrieved = TW_AEN_RETRIEVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) case TW_IOCTL_GET_FIRST_EVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (tw_dev->event_queue_wrapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) if (tw_dev->aen_clobber) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_AEN_CLOBBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) tw_dev->aen_clobber = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) event_index = tw_dev->error_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if (!tw_dev->error_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_NO_MORE_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) event_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) memcpy(tw_ioctl->data_buffer, tw_dev->event_queue[event_index], sizeof(TW_Event));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) tw_dev->event_queue[event_index]->retrieved = TW_AEN_RETRIEVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) case TW_IOCTL_GET_NEXT_EVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) event = (TW_Event *)tw_ioctl->data_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) sequence_id = event->sequence_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) if (tw_dev->event_queue_wrapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) if (tw_dev->aen_clobber) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_AEN_CLOBBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) tw_dev->aen_clobber = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) start_index = tw_dev->error_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) if (!tw_dev->error_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_NO_MORE_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) start_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) event_index = (start_index + sequence_id - tw_dev->event_queue[start_index]->sequence_id + 1) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (!(tw_dev->event_queue[event_index]->sequence_id > sequence_id)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (tw_ioctl->driver_command.status == TW_IOCTL_ERROR_STATUS_AEN_CLOBBER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) tw_dev->aen_clobber = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_NO_MORE_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) memcpy(tw_ioctl->data_buffer, tw_dev->event_queue[event_index], sizeof(TW_Event));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) tw_dev->event_queue[event_index]->retrieved = TW_AEN_RETRIEVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) case TW_IOCTL_GET_PREVIOUS_EVENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) event = (TW_Event *)tw_ioctl->data_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) sequence_id = event->sequence_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (tw_dev->event_queue_wrapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (tw_dev->aen_clobber) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_AEN_CLOBBER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) tw_dev->aen_clobber = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) start_index = tw_dev->error_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) if (!tw_dev->error_index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_NO_MORE_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) start_index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) event_index = (start_index + sequence_id - tw_dev->event_queue[start_index]->sequence_id - 1) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) if (!(tw_dev->event_queue[event_index]->sequence_id < sequence_id)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) if (tw_ioctl->driver_command.status == TW_IOCTL_ERROR_STATUS_AEN_CLOBBER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) tw_dev->aen_clobber = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_NO_MORE_EVENTS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) memcpy(tw_ioctl->data_buffer, tw_dev->event_queue[event_index], sizeof(TW_Event));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) tw_dev->event_queue[event_index]->retrieved = TW_AEN_RETRIEVED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) case TW_IOCTL_GET_LOCK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) tw_lock = (TW_Lock *)tw_ioctl->data_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) current_time = ktime_get();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if ((tw_lock->force_flag == 1) || (tw_dev->ioctl_sem_lock == 0) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) ktime_after(current_time, tw_dev->ioctl_time)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) tw_dev->ioctl_sem_lock = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) tw_dev->ioctl_time = ktime_add_ms(current_time, tw_lock->timeout_msec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) tw_lock->time_remaining_msec = tw_lock->timeout_msec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_LOCKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) tw_lock->time_remaining_msec = ktime_ms_delta(tw_dev->ioctl_time, current_time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) case TW_IOCTL_RELEASE_LOCK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) if (tw_dev->ioctl_sem_lock == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) tw_dev->ioctl_sem_lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) tw_ioctl->driver_command.status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) tw_ioctl->driver_command.status = TW_IOCTL_ERROR_STATUS_NOT_LOCKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) retval = TW_IOCTL_ERROR_OS_ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) goto out3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) /* Now copy the entire response to userspace */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) if (copy_to_user(argp, tw_ioctl, sizeof(TW_Ioctl_Buf_Apache) + driver_command.buffer_length - 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) out3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) /* Now free ioctl buf memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) dma_free_coherent(&tw_dev->tw_pci_dev->dev, data_buffer_length_adjusted+sizeof(TW_Ioctl_Buf_Apache) - 1, cpu_addr, dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) out2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) mutex_unlock(&tw_dev->ioctl_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) mutex_unlock(&twa_chrdev_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) } /* End twa_chrdev_ioctl() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) /* This function handles open for the character device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /* NOTE that this function will race with remove. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) static int twa_chrdev_open(struct inode *inode, struct file *file)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) unsigned int minor_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) int retval = TW_IOCTL_ERROR_OS_ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) if (!capable(CAP_SYS_ADMIN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) retval = -EACCES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) minor_number = iminor(inode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) if (minor_number >= twa_device_extension_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) } /* End twa_chrdev_open() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) /* This function will print readable messages from status register errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static int twa_decode_bits(TW_Device_Extension *tw_dev, u32 status_reg_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) /* Check for various error conditions and handle them appropriately */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) if (status_reg_value & TW_STATUS_PCI_PARITY_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) TW_PRINTK(tw_dev->host, TW_DRIVER, 0xc, "PCI Parity Error: clearing");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) writel(TW_CONTROL_CLEAR_PARITY_ERROR, TW_CONTROL_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) if (status_reg_value & TW_STATUS_PCI_ABORT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) TW_PRINTK(tw_dev->host, TW_DRIVER, 0xd, "PCI Abort: clearing");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) writel(TW_CONTROL_CLEAR_PCI_ABORT, TW_CONTROL_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) pci_write_config_word(tw_dev->tw_pci_dev, PCI_STATUS, TW_PCI_CLEAR_PCI_ABORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) if (status_reg_value & TW_STATUS_QUEUE_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) if (((tw_dev->tw_pci_dev->device != PCI_DEVICE_ID_3WARE_9650SE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) (tw_dev->tw_pci_dev->device != PCI_DEVICE_ID_3WARE_9690SA)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) (!test_bit(TW_IN_RESET, &tw_dev->flags)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) TW_PRINTK(tw_dev->host, TW_DRIVER, 0xe, "Controller Queue Error: clearing");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) writel(TW_CONTROL_CLEAR_QUEUE_ERROR, TW_CONTROL_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (status_reg_value & TW_STATUS_MICROCONTROLLER_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) if (tw_dev->reset_print == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x10, "Microcontroller Error: clearing");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) tw_dev->reset_print = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) } /* End twa_decode_bits() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) /* This function will empty the response queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) static int twa_empty_response_queue(TW_Device_Extension *tw_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) u32 status_reg_value, response_que_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) int count = 0, retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) while (((status_reg_value & TW_STATUS_RESPONSE_QUEUE_EMPTY) == 0) && (count < TW_MAX_RESPONSE_DRAIN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) response_que_value = readl(TW_RESPONSE_QUEUE_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) if (count == TW_MAX_RESPONSE_DRAIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) } /* End twa_empty_response_queue() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) /* This function will clear the pchip/response queue on 9550SX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) static int twa_empty_response_queue_large(TW_Device_Extension *tw_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) u32 response_que_value = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) unsigned long before;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) if (tw_dev->tw_pci_dev->device != PCI_DEVICE_ID_3WARE_9000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) before = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) while ((response_que_value & TW_9550SX_DRAIN_COMPLETED) != TW_9550SX_DRAIN_COMPLETED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) response_que_value = readl(TW_RESPONSE_QUEUE_REG_ADDR_LARGE(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) if (time_after(jiffies, before + HZ * 30))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) /* P-chip settle time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) msleep(500);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) } /* End twa_empty_response_queue_large() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) /* This function passes sense keys from firmware to scsi layer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static int twa_fill_sense(TW_Device_Extension *tw_dev, int request_id, int copy_sense, int print_host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) unsigned short error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) char *error_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) /* Check for embedded error string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) error_str = &(full_command_packet->header.err_specific_desc[strlen(full_command_packet->header.err_specific_desc) + 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) /* Don't print error for Logical unit not supported during rollcall */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) error = le16_to_cpu(full_command_packet->header.status_block.error);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) if ((error != TW_ERROR_LOGICAL_UNIT_NOT_SUPPORTED) && (error != TW_ERROR_UNIT_OFFLINE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) if (print_host)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) printk(KERN_WARNING "3w-9xxx: scsi%d: ERROR: (0x%02X:0x%04X): %s:%s.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) tw_dev->host->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) TW_MESSAGE_SOURCE_CONTROLLER_ERROR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) full_command_packet->header.status_block.error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) error_str[0] == '\0' ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) twa_string_lookup(twa_error_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) full_command_packet->header.status_block.error) : error_str,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) full_command_packet->header.err_specific_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) printk(KERN_WARNING "3w-9xxx: ERROR: (0x%02X:0x%04X): %s:%s.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) TW_MESSAGE_SOURCE_CONTROLLER_ERROR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) full_command_packet->header.status_block.error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) error_str[0] == '\0' ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) twa_string_lookup(twa_error_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) full_command_packet->header.status_block.error) : error_str,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) full_command_packet->header.err_specific_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) if (copy_sense) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) memcpy(tw_dev->srb[request_id]->sense_buffer, full_command_packet->header.sense_data, TW_SENSE_DATA_LENGTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) tw_dev->srb[request_id]->result = (full_command_packet->command.newcommand.status << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) retval = TW_ISR_DONT_RESULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) } /* End twa_fill_sense() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) /* This function will free up device extension resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) static void twa_free_device_extension(TW_Device_Extension *tw_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) if (tw_dev->command_packet_virt[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) dma_free_coherent(&tw_dev->tw_pci_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) sizeof(TW_Command_Full) * TW_Q_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) tw_dev->command_packet_virt[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) tw_dev->command_packet_phys[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) if (tw_dev->generic_buffer_virt[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) dma_free_coherent(&tw_dev->tw_pci_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) TW_SECTOR_SIZE * TW_Q_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) tw_dev->generic_buffer_virt[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) tw_dev->generic_buffer_phys[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) kfree(tw_dev->event_queue[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) } /* End twa_free_device_extension() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) /* This function will free a request id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) static void twa_free_request_id(TW_Device_Extension *tw_dev, int request_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) tw_dev->free_queue[tw_dev->free_tail] = request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) tw_dev->state[request_id] = TW_S_FINISHED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) tw_dev->free_tail = (tw_dev->free_tail + 1) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) } /* End twa_free_request_id() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) /* This function will get parameter table entries from the firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) static void *twa_get_param(TW_Device_Extension *tw_dev, int request_id, int table_id, int parameter_id, int parameter_size_bytes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) TW_Command *command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) TW_Param_Apache *param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) void *retval = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) /* Setup the command packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) memset(full_command_packet, 0, sizeof(TW_Command_Full));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) command_packet = &full_command_packet->command.oldcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) command_packet->opcode__sgloffset = TW_OPSGL_IN(2, TW_OP_GET_PARAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) command_packet->size = TW_COMMAND_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) command_packet->request_id = request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) command_packet->byte6_offset.block_count = cpu_to_le16(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) /* Now setup the param */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) param = (TW_Param_Apache *)tw_dev->generic_buffer_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) memset(param, 0, TW_SECTOR_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) param->table_id = cpu_to_le16(table_id | 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) param->parameter_id = cpu_to_le16(parameter_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) param->parameter_size_bytes = cpu_to_le16(parameter_size_bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) command_packet->byte8_offset.param.sgl[0].address = TW_CPU_TO_SGL(tw_dev->generic_buffer_phys[request_id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) command_packet->byte8_offset.param.sgl[0].length = cpu_to_le32(TW_SECTOR_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) /* Post the command packet to the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) twa_post_command_packet(tw_dev, request_id, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) /* Poll for completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) if (twa_poll_response(tw_dev, request_id, 30))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x13, "No valid response during get param")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) retval = (void *)&(param->data[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) tw_dev->posted_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) tw_dev->state[request_id] = TW_S_INITIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) } /* End twa_get_param() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) /* This function will assign an available request id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) static void twa_get_request_id(TW_Device_Extension *tw_dev, int *request_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) *request_id = tw_dev->free_queue[tw_dev->free_head];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) tw_dev->free_head = (tw_dev->free_head + 1) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) tw_dev->state[*request_id] = TW_S_STARTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) } /* End twa_get_request_id() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) /* This function will send an initconnection command to controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) static int twa_initconnection(TW_Device_Extension *tw_dev, int message_credits,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) u32 set_features, unsigned short current_fw_srl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) unsigned short current_fw_arch_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) unsigned short current_fw_branch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) unsigned short current_fw_build,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) unsigned short *fw_on_ctlr_srl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) unsigned short *fw_on_ctlr_arch_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) unsigned short *fw_on_ctlr_branch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) unsigned short *fw_on_ctlr_build,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) u32 *init_connect_result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) TW_Initconnect *tw_initconnect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) int request_id = 0, retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) /* Initialize InitConnection command packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) memset(full_command_packet, 0, sizeof(TW_Command_Full));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) full_command_packet->header.header_desc.size_header = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) tw_initconnect = (TW_Initconnect *)&full_command_packet->command.oldcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) tw_initconnect->opcode__reserved = TW_OPRES_IN(0, TW_OP_INIT_CONNECTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) tw_initconnect->request_id = request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) tw_initconnect->message_credits = cpu_to_le16(message_credits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) tw_initconnect->features = set_features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) /* Turn on 64-bit sgl support if we need to */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) tw_initconnect->features |= sizeof(dma_addr_t) > 4 ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) tw_initconnect->features = cpu_to_le32(tw_initconnect->features);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) if (set_features & TW_EXTENDED_INIT_CONNECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) tw_initconnect->size = TW_INIT_COMMAND_PACKET_SIZE_EXTENDED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) tw_initconnect->fw_srl = cpu_to_le16(current_fw_srl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) tw_initconnect->fw_arch_id = cpu_to_le16(current_fw_arch_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) tw_initconnect->fw_branch = cpu_to_le16(current_fw_branch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) tw_initconnect->fw_build = cpu_to_le16(current_fw_build);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) tw_initconnect->size = TW_INIT_COMMAND_PACKET_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) /* Send command packet to the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) twa_post_command_packet(tw_dev, request_id, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) /* Poll for completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) if (twa_poll_response(tw_dev, request_id, 30)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x15, "No valid response during init connection");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) if (set_features & TW_EXTENDED_INIT_CONNECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) *fw_on_ctlr_srl = le16_to_cpu(tw_initconnect->fw_srl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) *fw_on_ctlr_arch_id = le16_to_cpu(tw_initconnect->fw_arch_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) *fw_on_ctlr_branch = le16_to_cpu(tw_initconnect->fw_branch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) *fw_on_ctlr_build = le16_to_cpu(tw_initconnect->fw_build);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) *init_connect_result = le32_to_cpu(tw_initconnect->result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) tw_dev->posted_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) tw_dev->state[request_id] = TW_S_INITIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) } /* End twa_initconnection() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) /* This function will initialize the fields of a device extension */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) static int twa_initialize_device_extension(TW_Device_Extension *tw_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) int i, retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) /* Initialize command packet buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) if (twa_allocate_memory(tw_dev, sizeof(TW_Command_Full), 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x16, "Command packet memory allocation failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) /* Initialize generic buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) if (twa_allocate_memory(tw_dev, TW_SECTOR_SIZE, 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x17, "Generic memory allocation failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) /* Allocate event info space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) tw_dev->event_queue[0] = kcalloc(TW_Q_LENGTH, sizeof(TW_Event), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) if (!tw_dev->event_queue[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x18, "Event info memory allocation failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) for (i = 0; i < TW_Q_LENGTH; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) tw_dev->event_queue[i] = (TW_Event *)((unsigned char *)tw_dev->event_queue[0] + (i * sizeof(TW_Event)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) tw_dev->free_queue[i] = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) tw_dev->state[i] = TW_S_INITIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) tw_dev->pending_head = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) tw_dev->pending_tail = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) tw_dev->free_head = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) tw_dev->free_tail = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) tw_dev->error_sequence_id = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) tw_dev->chrdev_request_id = TW_IOCTL_CHRDEV_FREE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) mutex_init(&tw_dev->ioctl_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) init_waitqueue_head(&tw_dev->ioctl_wqueue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) } /* End twa_initialize_device_extension() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) /* This function is the interrupt service routine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) static irqreturn_t twa_interrupt(int irq, void *dev_instance)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) int request_id, error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) u32 status_reg_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) TW_Response_Queue response_que;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) TW_Device_Extension *tw_dev = (TW_Device_Extension *)dev_instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) int handled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) /* Get the per adapter lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) spin_lock(tw_dev->host->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) /* Read the registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) /* Check if this is our interrupt, otherwise bail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) if (!(status_reg_value & TW_STATUS_VALID_INTERRUPT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) goto twa_interrupt_bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) handled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) /* If we are resetting, bail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) if (test_bit(TW_IN_RESET, &tw_dev->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) goto twa_interrupt_bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) /* Check controller for errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) if (twa_check_bits(status_reg_value)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) if (twa_decode_bits(tw_dev, status_reg_value)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) TW_CLEAR_ALL_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) goto twa_interrupt_bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) /* Handle host interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) if (status_reg_value & TW_STATUS_HOST_INTERRUPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) TW_CLEAR_HOST_INTERRUPT(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) /* Handle attention interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) if (status_reg_value & TW_STATUS_ATTENTION_INTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) TW_CLEAR_ATTENTION_INTERRUPT(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) if (!(test_and_set_bit(TW_IN_ATTENTION_LOOP, &tw_dev->flags))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) twa_get_request_id(tw_dev, &request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) error = twa_aen_read_queue(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) if (error) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) tw_dev->state[request_id] = TW_S_COMPLETED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) twa_free_request_id(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) clear_bit(TW_IN_ATTENTION_LOOP, &tw_dev->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) /* Handle command interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) if (status_reg_value & TW_STATUS_COMMAND_INTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) TW_MASK_COMMAND_INTERRUPT(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) /* Drain as many pending commands as we can */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) while (tw_dev->pending_request_count > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) request_id = tw_dev->pending_queue[tw_dev->pending_head];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) if (tw_dev->state[request_id] != TW_S_PENDING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x19, "Found request id that wasn't pending");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) TW_CLEAR_ALL_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) goto twa_interrupt_bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) if (twa_post_command_packet(tw_dev, request_id, 1)==0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) tw_dev->pending_head = (tw_dev->pending_head + 1) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) tw_dev->pending_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) /* If we get here, we will continue re-posting on the next command interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) /* Handle response interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) if (status_reg_value & TW_STATUS_RESPONSE_INTERRUPT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) /* Drain the response queue from the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) while ((status_reg_value & TW_STATUS_RESPONSE_QUEUE_EMPTY) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) /* Complete the response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) response_que.value = readl(TW_RESPONSE_QUEUE_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) request_id = TW_RESID_OUT(response_que.response_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) /* Check for command packet errors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) if (full_command_packet->command.newcommand.status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) if (tw_dev->srb[request_id] != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) error = twa_fill_sense(tw_dev, request_id, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) /* Skip ioctl error prints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) if (request_id != tw_dev->chrdev_request_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) error = twa_fill_sense(tw_dev, request_id, 0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) /* Check for correct state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) if (tw_dev->state[request_id] != TW_S_POSTED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) if (tw_dev->srb[request_id] != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x1a, "Received a request id that wasn't posted");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) TW_CLEAR_ALL_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) goto twa_interrupt_bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) /* Check for internal command completion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) if (tw_dev->srb[request_id] == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) if (request_id != tw_dev->chrdev_request_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) if (twa_aen_complete(tw_dev, request_id))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x1b, "Error completing AEN during attention interrupt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) tw_dev->chrdev_request_id = TW_IOCTL_CHRDEV_FREE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) wake_up(&tw_dev->ioctl_wqueue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) struct scsi_cmnd *cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) cmd = tw_dev->srb[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) twa_scsiop_execute_scsi_complete(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) /* If no error command was a success */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) if (error == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) cmd->result = (DID_OK << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) /* If error, command failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) if (error == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) /* Ask for a host reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) cmd->result = (DID_OK << 16) | (CHECK_CONDITION << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) /* Report residual bytes for single sgl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) if ((scsi_sg_count(cmd) <= 1) && (full_command_packet->command.newcommand.status == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) if (full_command_packet->command.newcommand.sg_list[0].length < scsi_bufflen(tw_dev->srb[request_id]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) scsi_set_resid(cmd, scsi_bufflen(cmd) - full_command_packet->command.newcommand.sg_list[0].length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) /* Now complete the io */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) if (twa_command_mapped(cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) scsi_dma_unmap(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) tw_dev->state[request_id] = TW_S_COMPLETED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) twa_free_request_id(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) tw_dev->posted_request_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) /* Check for valid status after each drain */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) if (twa_check_bits(status_reg_value)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) if (twa_decode_bits(tw_dev, status_reg_value)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) TW_CLEAR_ALL_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) goto twa_interrupt_bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) twa_interrupt_bail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) spin_unlock(tw_dev->host->host_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) return IRQ_RETVAL(handled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) } /* End twa_interrupt() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) /* This function will load the request id and various sgls for ioctls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) static void twa_load_sgl(TW_Device_Extension *tw_dev, TW_Command_Full *full_command_packet, int request_id, dma_addr_t dma_handle, int length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) TW_Command *oldcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) TW_Command_Apache *newcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) TW_SG_Entry *sgl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) unsigned int pae = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if ((sizeof(long) < 8) && (sizeof(dma_addr_t) > 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) pae = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) if (TW_OP_OUT(full_command_packet->command.newcommand.opcode__reserved) == TW_OP_EXECUTE_SCSI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) newcommand = &full_command_packet->command.newcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) newcommand->request_id__lunl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->request_id__lunl), request_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) if (length) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) newcommand->sg_list[0].length = cpu_to_le32(length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) newcommand->sgl_entries__lunh =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->sgl_entries__lunh), length ? 1 : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) oldcommand = &full_command_packet->command.oldcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) oldcommand->request_id = request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) if (TW_SGL_OUT(oldcommand->opcode__sgloffset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) /* Load the sg list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) if (tw_dev->tw_pci_dev->device == PCI_DEVICE_ID_3WARE_9690SA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) sgl = (TW_SG_Entry *)((u32 *)oldcommand+oldcommand->size - (sizeof(TW_SG_Entry)/4) + pae);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) sgl = (TW_SG_Entry *)((u32 *)oldcommand+TW_SGL_OUT(oldcommand->opcode__sgloffset));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) sgl->address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) sgl->length = cpu_to_le32(length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) oldcommand->size += pae;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) } /* End twa_load_sgl() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) /* This function will poll for a response interrupt of a request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) static int twa_poll_response(TW_Device_Extension *tw_dev, int request_id, int seconds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) int retval = 1, found = 0, response_request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) TW_Response_Queue response_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) TW_Command_Full *full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) if (twa_poll_status_gone(tw_dev, TW_STATUS_RESPONSE_QUEUE_EMPTY, seconds) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) response_queue.value = readl(TW_RESPONSE_QUEUE_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) response_request_id = TW_RESID_OUT(response_queue.response_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) if (request_id != response_request_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x1e, "Found unexpected request id while polling for response");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) if (TW_OP_OUT(full_command_packet->command.newcommand.opcode__reserved) == TW_OP_EXECUTE_SCSI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) if (full_command_packet->command.newcommand.status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) /* bad response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) twa_fill_sense(tw_dev, request_id, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) found = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) if (full_command_packet->command.oldcommand.status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) /* bad response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) twa_fill_sense(tw_dev, request_id, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) found = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) if (found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) } /* End twa_poll_response() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) /* This function will poll the status register for a flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) static int twa_poll_status(TW_Device_Extension *tw_dev, u32 flag, int seconds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) u32 status_reg_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) unsigned long before;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) before = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) if (twa_check_bits(status_reg_value))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) twa_decode_bits(tw_dev, status_reg_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) while ((status_reg_value & flag) != flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) if (twa_check_bits(status_reg_value))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) twa_decode_bits(tw_dev, status_reg_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) if (time_after(jiffies, before + HZ * seconds))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) } /* End twa_poll_status() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) /* This function will poll the status register for disappearance of a flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) static int twa_poll_status_gone(TW_Device_Extension *tw_dev, u32 flag, int seconds)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) u32 status_reg_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) unsigned long before;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) before = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) if (twa_check_bits(status_reg_value))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) twa_decode_bits(tw_dev, status_reg_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) while ((status_reg_value & flag) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) if (twa_check_bits(status_reg_value))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) twa_decode_bits(tw_dev, status_reg_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) if (time_after(jiffies, before + HZ * seconds))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) } /* End twa_poll_status_gone() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) /* This function will attempt to post a command packet to the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) static int twa_post_command_packet(TW_Device_Extension *tw_dev, int request_id, char internal)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) u32 status_reg_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) dma_addr_t command_que_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) command_que_value = tw_dev->command_packet_phys[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) /* For 9650SE write low 4 bytes first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) if ((tw_dev->tw_pci_dev->device == PCI_DEVICE_ID_3WARE_9650SE) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) (tw_dev->tw_pci_dev->device == PCI_DEVICE_ID_3WARE_9690SA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) command_que_value += TW_COMMAND_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) writel((u32)command_que_value, TW_COMMAND_QUEUE_REG_ADDR_LARGE(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) status_reg_value = readl(TW_STATUS_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) if (twa_check_bits(status_reg_value))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) twa_decode_bits(tw_dev, status_reg_value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) if (((tw_dev->pending_request_count > 0) && (tw_dev->state[request_id] != TW_S_PENDING)) || (status_reg_value & TW_STATUS_COMMAND_QUEUE_FULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) /* Only pend internal driver commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) if (!internal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) retval = SCSI_MLQUEUE_HOST_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) /* Couldn't post the command packet, so we do it later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) if (tw_dev->state[request_id] != TW_S_PENDING) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) tw_dev->state[request_id] = TW_S_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) tw_dev->pending_request_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) if (tw_dev->pending_request_count > tw_dev->max_pending_request_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) tw_dev->max_pending_request_count = tw_dev->pending_request_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) tw_dev->pending_queue[tw_dev->pending_tail] = request_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) tw_dev->pending_tail = (tw_dev->pending_tail + 1) % TW_Q_LENGTH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) TW_UNMASK_COMMAND_INTERRUPT(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) if ((tw_dev->tw_pci_dev->device == PCI_DEVICE_ID_3WARE_9650SE) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) (tw_dev->tw_pci_dev->device == PCI_DEVICE_ID_3WARE_9690SA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) /* Now write upper 4 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) writel((u32)((u64)command_que_value >> 32), TW_COMMAND_QUEUE_REG_ADDR_LARGE(tw_dev) + 0x4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) if (sizeof(dma_addr_t) > 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) command_que_value += TW_COMMAND_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) writel((u32)command_que_value, TW_COMMAND_QUEUE_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) writel((u32)((u64)command_que_value >> 32), TW_COMMAND_QUEUE_REG_ADDR(tw_dev) + 0x4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) writel(TW_COMMAND_OFFSET + command_que_value, TW_COMMAND_QUEUE_REG_ADDR(tw_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) tw_dev->state[request_id] = TW_S_POSTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) tw_dev->posted_request_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) if (tw_dev->posted_request_count > tw_dev->max_posted_request_count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) tw_dev->max_posted_request_count = tw_dev->posted_request_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) } /* End twa_post_command_packet() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) /* This function will reset a device extension */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) static int twa_reset_device_extension(TW_Device_Extension *tw_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) unsigned long flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) set_bit(TW_IN_RESET, &tw_dev->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) TW_DISABLE_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) TW_MASK_COMMAND_INTERRUPT(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) spin_lock_irqsave(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) /* Abort all requests that are in progress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) for (i = 0; i < TW_Q_LENGTH; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) if ((tw_dev->state[i] != TW_S_FINISHED) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) (tw_dev->state[i] != TW_S_INITIAL) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) (tw_dev->state[i] != TW_S_COMPLETED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) if (tw_dev->srb[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) struct scsi_cmnd *cmd = tw_dev->srb[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) cmd->result = (DID_RESET << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) if (twa_command_mapped(cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) scsi_dma_unmap(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) cmd->scsi_done(cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) /* Reset queues and counts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) for (i = 0; i < TW_Q_LENGTH; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) tw_dev->free_queue[i] = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) tw_dev->state[i] = TW_S_INITIAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) tw_dev->free_head = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) tw_dev->free_tail = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) tw_dev->posted_request_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) tw_dev->pending_request_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) tw_dev->pending_head = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) tw_dev->pending_tail = TW_Q_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) tw_dev->reset_print = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) spin_unlock_irqrestore(tw_dev->host->host_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) if (twa_reset_sequence(tw_dev, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) TW_ENABLE_AND_CLEAR_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) clear_bit(TW_IN_RESET, &tw_dev->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) tw_dev->chrdev_request_id = TW_IOCTL_CHRDEV_FREE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) } /* End twa_reset_device_extension() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) /* This function will reset a controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) static int twa_reset_sequence(TW_Device_Extension *tw_dev, int soft_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) int tries = 0, retval = 1, flashed = 0, do_soft_reset = soft_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) while (tries < TW_MAX_RESET_TRIES) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) if (do_soft_reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) TW_SOFT_RESET(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) /* Clear pchip/response queue on 9550SX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) if (twa_empty_response_queue_large(tw_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x36, "Response queue (large) empty failed during reset sequence");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) do_soft_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) tries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) /* Make sure controller is in a good state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) if (twa_poll_status(tw_dev, TW_STATUS_MICROCONTROLLER_READY | (do_soft_reset == 1 ? TW_STATUS_ATTENTION_INTERRUPT : 0), 60)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x1f, "Microcontroller not ready during reset sequence");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) do_soft_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) tries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) /* Empty response queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) if (twa_empty_response_queue(tw_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x20, "Response queue empty failed during reset sequence");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) do_soft_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) tries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) flashed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) /* Check for compatibility/flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) if (twa_check_srl(tw_dev, &flashed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x21, "Compatibility check failed during reset sequence");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) do_soft_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) tries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) if (flashed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) tries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) /* Drain the AEN queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) if (twa_aen_drain_queue(tw_dev, soft_reset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x22, "AEN drain failed during reset sequence");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) do_soft_reset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) tries++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) /* If we got here, controller is in a good state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) } /* End twa_reset_sequence() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) /* This funciton returns unit geometry in cylinders/heads/sectors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) static int twa_scsi_biosparam(struct scsi_device *sdev, struct block_device *bdev, sector_t capacity, int geom[])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) int heads, sectors, cylinders;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) TW_Device_Extension *tw_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) tw_dev = (TW_Device_Extension *)sdev->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) if (capacity >= 0x200000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) heads = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) sectors = 63;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) cylinders = sector_div(capacity, heads * sectors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) heads = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) sectors = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) cylinders = sector_div(capacity, heads * sectors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) geom[0] = heads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) geom[1] = sectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) geom[2] = cylinders;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) } /* End twa_scsi_biosparam() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) /* This is the new scsi eh reset function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) static int twa_scsi_eh_reset(struct scsi_cmnd *SCpnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) TW_Device_Extension *tw_dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) int retval = FAILED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) tw_dev = (TW_Device_Extension *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) tw_dev->num_resets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) sdev_printk(KERN_WARNING, SCpnt->device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) "WARNING: (0x%02X:0x%04X): Command (0x%x) timed out, resetting card.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) TW_DRIVER, 0x2c, SCpnt->cmnd[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) /* Make sure we are not issuing an ioctl or resetting from ioctl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) mutex_lock(&tw_dev->ioctl_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) /* Now reset the card and some of the device extension data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) if (twa_reset_device_extension(tw_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x2b, "Controller reset failed during scsi host reset");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) retval = SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) mutex_unlock(&tw_dev->ioctl_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) } /* End twa_scsi_eh_reset() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) /* This is the main scsi queue function to handle scsi opcodes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) static int twa_scsi_queue_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) int request_id, retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) TW_Device_Extension *tw_dev = (TW_Device_Extension *)SCpnt->device->host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) /* If we are resetting due to timed out ioctl, report as busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) if (test_bit(TW_IN_RESET, &tw_dev->flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) retval = SCSI_MLQUEUE_HOST_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) /* Check if this FW supports luns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) if ((SCpnt->device->lun != 0) && (tw_dev->tw_compat_info.working_srl < TW_FW_SRL_LUNS_SUPPORTED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) SCpnt->result = (DID_BAD_TARGET << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) /* Save done function into scsi_cmnd struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) SCpnt->scsi_done = done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) /* Get a free request id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) twa_get_request_id(tw_dev, &request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) /* Save the scsi command for use by the ISR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) tw_dev->srb[request_id] = SCpnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) retval = twa_scsiop_execute_scsi(tw_dev, request_id, NULL, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) switch (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) case SCSI_MLQUEUE_HOST_BUSY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) if (twa_command_mapped(SCpnt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) scsi_dma_unmap(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) twa_free_request_id(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) SCpnt->result = (DID_ERROR << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) if (twa_command_mapped(SCpnt))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) scsi_dma_unmap(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) done(SCpnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) tw_dev->state[request_id] = TW_S_COMPLETED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) twa_free_request_id(tw_dev, request_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) } /* End twa_scsi_queue() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) static DEF_SCSI_QCMD(twa_scsi_queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) /* This function hands scsi cdb's to the firmware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) static int twa_scsiop_execute_scsi(TW_Device_Extension *tw_dev, int request_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) unsigned char *cdb, int use_sg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) TW_SG_Entry *sglistarg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) TW_Command_Full *full_command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) TW_Command_Apache *command_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) u32 num_sectors = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) int i, sg_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) struct scsi_cmnd *srb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) struct scatterlist *sglist = NULL, *sg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) int retval = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) if (tw_dev->srb[request_id]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) srb = tw_dev->srb[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) if (scsi_sglist(srb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) sglist = scsi_sglist(srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) /* Initialize command packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) full_command_packet = tw_dev->command_packet_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) full_command_packet->header.header_desc.size_header = 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) full_command_packet->header.status_block.error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) full_command_packet->header.status_block.severity__reserved = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) command_packet = &full_command_packet->command.newcommand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) command_packet->status = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) command_packet->opcode__reserved = TW_OPRES_IN(0, TW_OP_EXECUTE_SCSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) /* We forced 16 byte cdb use earlier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) if (!cdb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) memcpy(command_packet->cdb, srb->cmnd, TW_MAX_CDB_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) memcpy(command_packet->cdb, cdb, TW_MAX_CDB_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) if (srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) command_packet->unit = srb->device->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) command_packet->request_id__lunl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) cpu_to_le16(TW_REQ_LUN_IN(srb->device->lun, request_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) command_packet->request_id__lunl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) cpu_to_le16(TW_REQ_LUN_IN(0, request_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) command_packet->unit = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) command_packet->sgl_offset = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) if (!sglistarg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) /* Map sglist from scsi layer to cmd packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) if (scsi_sg_count(srb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) if (!twa_command_mapped(srb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) if (srb->sc_data_direction == DMA_TO_DEVICE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) srb->sc_data_direction == DMA_BIDIRECTIONAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) scsi_sg_copy_to_buffer(srb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) tw_dev->generic_buffer_virt[request_id],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) TW_SECTOR_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) command_packet->sg_list[0].address = TW_CPU_TO_SGL(tw_dev->generic_buffer_phys[request_id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) command_packet->sg_list[0].length = cpu_to_le32(TW_MIN_SGL_LENGTH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) sg_count = scsi_dma_map(srb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) if (sg_count < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) scsi_for_each_sg(srb, sg, sg_count, i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) command_packet->sg_list[i].address = TW_CPU_TO_SGL(sg_dma_address(sg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) command_packet->sg_list[i].length = cpu_to_le32(sg_dma_len(sg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) if (command_packet->sg_list[i].address & TW_CPU_TO_SGL(TW_ALIGNMENT_9000_SGL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x2e, "Found unaligned sgl address during execute scsi");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) command_packet->sgl_entries__lunh = cpu_to_le16(TW_REQ_LUN_IN((srb->device->lun >> 4), scsi_sg_count(tw_dev->srb[request_id])));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) /* Internal cdb post */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) for (i = 0; i < use_sg; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) command_packet->sg_list[i].address = TW_CPU_TO_SGL(sglistarg[i].address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) command_packet->sg_list[i].length = cpu_to_le32(sglistarg[i].length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) if (command_packet->sg_list[i].address & TW_CPU_TO_SGL(TW_ALIGNMENT_9000_SGL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x2f, "Found unaligned sgl address during internal post");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) command_packet->sgl_entries__lunh = cpu_to_le16(TW_REQ_LUN_IN(0, use_sg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) if (srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) if (srb->cmnd[0] == READ_6 || srb->cmnd[0] == WRITE_6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) num_sectors = (u32)srb->cmnd[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) if (srb->cmnd[0] == READ_10 || srb->cmnd[0] == WRITE_10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) num_sectors = (u32)srb->cmnd[8] | ((u32)srb->cmnd[7] << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) /* Update sector statistic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) tw_dev->sector_count = num_sectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) if (tw_dev->sector_count > tw_dev->max_sector_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) tw_dev->max_sector_count = tw_dev->sector_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) /* Update SG statistics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) if (srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) tw_dev->sgl_entries = scsi_sg_count(tw_dev->srb[request_id]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) if (tw_dev->sgl_entries > tw_dev->max_sgl_entries)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) tw_dev->max_sgl_entries = tw_dev->sgl_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) /* Now post the command to the board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) if (srb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) retval = twa_post_command_packet(tw_dev, request_id, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) twa_post_command_packet(tw_dev, request_id, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) } /* End twa_scsiop_execute_scsi() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) /* This function completes an execute scsi operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) static void twa_scsiop_execute_scsi_complete(TW_Device_Extension *tw_dev, int request_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) struct scsi_cmnd *cmd = tw_dev->srb[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) if (!twa_command_mapped(cmd) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) (cmd->sc_data_direction == DMA_FROM_DEVICE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) cmd->sc_data_direction == DMA_BIDIRECTIONAL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) if (scsi_sg_count(cmd) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) void *buf = tw_dev->generic_buffer_virt[request_id];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) scsi_sg_copy_from_buffer(cmd, buf, TW_SECTOR_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) } /* End twa_scsiop_execute_scsi_complete() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) /* This function tells the controller to shut down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) static void __twa_shutdown(TW_Device_Extension *tw_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) /* Disable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) TW_DISABLE_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) /* Free up the IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) free_irq(tw_dev->tw_pci_dev->irq, tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) printk(KERN_WARNING "3w-9xxx: Shutting down host %d.\n", tw_dev->host->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) /* Tell the card we are shutting down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) if (twa_initconnection(tw_dev, 1, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x31, "Connection shutdown failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) printk(KERN_WARNING "3w-9xxx: Shutdown complete.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) /* Clear all interrupts just before exit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) TW_CLEAR_ALL_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) } /* End __twa_shutdown() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) /* Wrapper for __twa_shutdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) static void twa_shutdown(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) struct Scsi_Host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) TW_Device_Extension *tw_dev = (TW_Device_Extension *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) __twa_shutdown(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) } /* End twa_shutdown() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) /* This function will look up a string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) static char *twa_string_lookup(twa_message_type *table, unsigned int code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) for (index = 0; ((code != table[index].code) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) (table[index].text != (char *)0)); index++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) return(table[index].text);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) } /* End twa_string_lookup() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) /* This function gets called when a disk is coming on-line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) static int twa_slave_configure(struct scsi_device *sdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) /* Force 60 second timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) blk_queue_rq_timeout(sdev->request_queue, 60 * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) } /* End twa_slave_configure() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) /* scsi_host_template initializer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) static struct scsi_host_template driver_template = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) .module = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) .name = "3ware 9000 Storage Controller",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) .queuecommand = twa_scsi_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) .eh_host_reset_handler = twa_scsi_eh_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) .bios_param = twa_scsi_biosparam,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) .change_queue_depth = scsi_change_queue_depth,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) .can_queue = TW_Q_LENGTH-2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) .slave_configure = twa_slave_configure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) .this_id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) .sg_tablesize = TW_APACHE_MAX_SGL_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) .max_sectors = TW_MAX_SECTORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) .cmd_per_lun = TW_MAX_CMDS_PER_LUN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) .shost_attrs = twa_host_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) .emulated = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) .no_write_same = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) /* This function will probe and initialize a card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) static int twa_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) struct Scsi_Host *host = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) TW_Device_Extension *tw_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) unsigned long mem_addr, mem_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) retval = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) TW_PRINTK(host, TW_DRIVER, 0x34, "Failed to enable pci device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) goto out_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) pci_try_set_mwi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) TW_PRINTK(host, TW_DRIVER, 0x23, "Failed to set dma mask");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) goto out_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) host = scsi_host_alloc(&driver_template, sizeof(TW_Device_Extension));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) if (!host) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) TW_PRINTK(host, TW_DRIVER, 0x24, "Failed to allocate memory for device extension");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) goto out_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) tw_dev = (TW_Device_Extension *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) /* Save values to device extension */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) tw_dev->host = host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) tw_dev->tw_pci_dev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) if (twa_initialize_device_extension(tw_dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x25, "Failed to initialize device extension");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) goto out_free_device_extension;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) /* Request IO regions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) retval = pci_request_regions(pdev, "3w-9xxx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x26, "Failed to get mem region");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) goto out_free_device_extension;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) if (pdev->device == PCI_DEVICE_ID_3WARE_9000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) mem_addr = pci_resource_start(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) mem_len = pci_resource_len(pdev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) mem_addr = pci_resource_start(pdev, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) mem_len = pci_resource_len(pdev, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) /* Save base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) tw_dev->base_addr = ioremap(mem_addr, mem_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) if (!tw_dev->base_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x35, "Failed to ioremap");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) goto out_release_mem_region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) /* Disable interrupts on the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) TW_DISABLE_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) /* Initialize the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) if (twa_reset_sequence(tw_dev, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) retval = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) goto out_iounmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) /* Set host specific parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) if ((pdev->device == PCI_DEVICE_ID_3WARE_9650SE) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) (pdev->device == PCI_DEVICE_ID_3WARE_9690SA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) host->max_id = TW_MAX_UNITS_9650SE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) host->max_id = TW_MAX_UNITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) host->max_cmd_len = TW_MAX_CDB_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) /* Channels aren't supported by adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) host->max_lun = TW_MAX_LUNS(tw_dev->tw_compat_info.working_srl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) host->max_channel = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) /* Register the card with the kernel SCSI layer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) retval = scsi_add_host(host, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x27, "scsi add host failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) goto out_iounmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) pci_set_drvdata(pdev, host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) printk(KERN_WARNING "3w-9xxx: scsi%d: Found a 3ware 9000 Storage Controller at 0x%lx, IRQ: %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) host->host_no, mem_addr, pdev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) printk(KERN_WARNING "3w-9xxx: scsi%d: Firmware %s, BIOS %s, Ports: %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) host->host_no,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) (char *)twa_get_param(tw_dev, 0, TW_VERSION_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) TW_PARAM_FWVER, TW_PARAM_FWVER_LENGTH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) (char *)twa_get_param(tw_dev, 1, TW_VERSION_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) TW_PARAM_BIOSVER, TW_PARAM_BIOSVER_LENGTH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) le32_to_cpu(*(int *)twa_get_param(tw_dev, 2, TW_INFORMATION_TABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) TW_PARAM_PORTCOUNT, TW_PARAM_PORTCOUNT_LENGTH)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) /* Try to enable MSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) if (use_msi && (pdev->device != PCI_DEVICE_ID_3WARE_9000) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) !pci_enable_msi(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) set_bit(TW_USING_MSI, &tw_dev->flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) /* Now setup the interrupt handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) retval = request_irq(pdev->irq, twa_interrupt, IRQF_SHARED, "3w-9xxx", tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x30, "Error requesting IRQ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) goto out_remove_host;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) twa_device_extension_list[twa_device_extension_count] = tw_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) twa_device_extension_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) /* Re-enable interrupts on the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) TW_ENABLE_AND_CLEAR_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) /* Finally, scan the host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) scsi_scan_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) if (twa_major == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) if ((twa_major = register_chrdev (0, "twa", &twa_fops)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) TW_PRINTK(host, TW_DRIVER, 0x29, "Failed to register character device");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) out_remove_host:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) if (test_bit(TW_USING_MSI, &tw_dev->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) pci_disable_msi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) scsi_remove_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) out_iounmap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) iounmap(tw_dev->base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) out_release_mem_region:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) out_free_device_extension:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) twa_free_device_extension(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) scsi_host_put(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) out_disable_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) } /* End twa_probe() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) /* This function is called to remove a device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) static void twa_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) struct Scsi_Host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) TW_Device_Extension *tw_dev = (TW_Device_Extension *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) scsi_remove_host(tw_dev->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) /* Unregister character device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) if (twa_major >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) unregister_chrdev(twa_major, "twa");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) twa_major = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) /* Shutdown the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) __twa_shutdown(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) /* Disable MSI if enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) if (test_bit(TW_USING_MSI, &tw_dev->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) pci_disable_msi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) /* Free IO remapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) iounmap(tw_dev->base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) /* Free up the mem region */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) pci_release_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) /* Free up device extension resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) twa_free_device_extension(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) scsi_host_put(tw_dev->host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) twa_device_extension_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) } /* End twa_remove() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) /* This function is called on PCI suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) static int twa_suspend(struct pci_dev *pdev, pm_message_t state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) struct Scsi_Host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) TW_Device_Extension *tw_dev = (TW_Device_Extension *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) printk(KERN_WARNING "3w-9xxx: Suspending host %d.\n", tw_dev->host->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) TW_DISABLE_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) free_irq(tw_dev->tw_pci_dev->irq, tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) if (test_bit(TW_USING_MSI, &tw_dev->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) pci_disable_msi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) /* Tell the card we are shutting down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) if (twa_initconnection(tw_dev, 1, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x38, "Connection shutdown failed during suspend");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) printk(KERN_WARNING "3w-9xxx: Suspend complete.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) TW_CLEAR_ALL_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) pci_save_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) pci_set_power_state(pdev, pci_choose_state(pdev, state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) } /* End twa_suspend() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) /* This function is called on PCI resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) static int twa_resume(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) struct Scsi_Host *host = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) TW_Device_Extension *tw_dev = (TW_Device_Extension *)host->hostdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) printk(KERN_WARNING "3w-9xxx: Resuming host %d.\n", tw_dev->host->host_no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) pci_set_power_state(pdev, PCI_D0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) pci_enable_wake(pdev, PCI_D0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) pci_restore_state(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) retval = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x39, "Enable device failed during resume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) pci_try_set_mwi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) TW_PRINTK(host, TW_DRIVER, 0x40, "Failed to set dma mask during resume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) goto out_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) /* Initialize the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) if (twa_reset_sequence(tw_dev, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) goto out_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) /* Now setup the interrupt handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) retval = request_irq(pdev->irq, twa_interrupt, IRQF_SHARED, "3w-9xxx", tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) TW_PRINTK(tw_dev->host, TW_DRIVER, 0x42, "Error requesting IRQ during resume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) goto out_disable_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) /* Now enable MSI if enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) if (test_bit(TW_USING_MSI, &tw_dev->flags))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) pci_enable_msi(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) /* Re-enable interrupts on the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) TW_ENABLE_AND_CLEAR_INTERRUPTS(tw_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) printk(KERN_WARNING "3w-9xxx: Resume complete.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) out_disable_device:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) scsi_remove_host(host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) } /* End twa_resume() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) /* PCI Devices supported by this driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) static struct pci_device_id twa_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9550SX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9650SE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) { PCI_VENDOR_ID_3WARE, PCI_DEVICE_ID_3WARE_9690SA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) MODULE_DEVICE_TABLE(pci, twa_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) /* pci_driver initializer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) static struct pci_driver twa_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) .name = "3w-9xxx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) .id_table = twa_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) .probe = twa_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) .remove = twa_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) .suspend = twa_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) .resume = twa_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) .shutdown = twa_shutdown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) /* This function is called on driver initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) static int __init twa_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) printk(KERN_WARNING "3ware 9000 Storage Controller device driver for Linux v%s.\n", TW_DRIVER_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) return pci_register_driver(&twa_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) } /* End twa_init() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) /* This function is called on driver exit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) static void __exit twa_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) pci_unregister_driver(&twa_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) } /* End twa_exit() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) module_init(twa_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) module_exit(twa_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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