^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* bbc_i2c.c: I2C low-level driver for BBC device on UltraSPARC-III
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2001, 2008 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/bbc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "bbc_i2c.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Convert this driver to use i2c bus layer someday... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define I2C_PCF_PIN 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define I2C_PCF_ESO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define I2C_PCF_ES1 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define I2C_PCF_ES2 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define I2C_PCF_ENI 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define I2C_PCF_STA 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define I2C_PCF_STO 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define I2C_PCF_ACK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define I2C_PCF_START (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_ENI | I2C_PCF_STA | I2C_PCF_ACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define I2C_PCF_STOP (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_STO | I2C_PCF_ACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define I2C_PCF_REPSTART ( I2C_PCF_ESO | I2C_PCF_STA | I2C_PCF_ACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define I2C_PCF_IDLE (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_ACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define I2C_PCF_INI 0x40 /* 1 if not initialized */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define I2C_PCF_STS 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define I2C_PCF_BER 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define I2C_PCF_AD0 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define I2C_PCF_LRB 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define I2C_PCF_AAS 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define I2C_PCF_LAB 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define I2C_PCF_BB 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* The BBC devices have two I2C controllers. The first I2C controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * connects mainly to configuration proms (NVRAM, cpu configuration,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * dimm types, etc.). Whereas the second I2C controller connects to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * environmental control devices such as fans and temperature sensors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * The second controller also connects to the smartcard reader, if present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static void set_device_claimage(struct bbc_i2c_bus *bp, struct platform_device *op, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) for (i = 0; i < NUM_CHILDREN; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (bp->devs[i].device == op) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) bp->devs[i].client_claimed = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define claim_device(BP,ECHILD) set_device_claimage(BP,ECHILD,1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define release_device(BP,ECHILD) set_device_claimage(BP,ECHILD,0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct platform_device *bbc_i2c_getdev(struct bbc_i2c_bus *bp, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct platform_device *op = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int curidx = 0, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) for (i = 0; i < NUM_CHILDREN; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (!(op = bp->devs[i].device))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (curidx == index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) op = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) curidx++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (curidx == index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct bbc_i2c_client *bbc_i2c_attach(struct bbc_i2c_bus *bp, struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct bbc_i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) const u32 *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) client = kzalloc(sizeof(*client), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) client->bp = bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) client->op = op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) reg = of_get_property(op->dev.of_node, "reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (!reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) kfree(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) client->bus = reg[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) client->address = reg[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) claim_device(bp, op);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) void bbc_i2c_detach(struct bbc_i2c_client *client)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct bbc_i2c_bus *bp = client->bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct platform_device *op = client->op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) release_device(bp, op);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) kfree(client);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int wait_for_pin(struct bbc_i2c_bus *bp, u8 *status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) DECLARE_WAITQUEUE(wait, current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) int limit = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) bp->waiting = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) add_wait_queue(&bp->wq, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) while (limit-- > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) val = wait_event_interruptible_timeout(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) bp->wq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) (((*status = readb(bp->i2c_control_regs + 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) & I2C_PCF_PIN) == 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) msecs_to_jiffies(250));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (val > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) remove_wait_queue(&bp->wq, &wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) bp->waiting = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int bbc_i2c_writeb(struct bbc_i2c_client *client, unsigned char val, int off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct bbc_i2c_bus *bp = client->bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int address = client->address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) int ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if (bp->i2c_bussel_reg != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) writeb(client->bus, bp->i2c_bussel_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) writeb(address, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) writeb(I2C_PCF_START, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (wait_for_pin(bp, &status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) writeb(off, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (wait_for_pin(bp, &status) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) (status & I2C_PCF_LRB) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) writeb(val, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (wait_for_pin(bp, &status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) writeb(I2C_PCF_STOP, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int bbc_i2c_readb(struct bbc_i2c_client *client, unsigned char *byte, int off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct bbc_i2c_bus *bp = client->bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) unsigned char address = client->address, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (bp->i2c_bussel_reg != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) writeb(client->bus, bp->i2c_bussel_reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) writeb(address, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) writeb(I2C_PCF_START, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (wait_for_pin(bp, &status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) writeb(off, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (wait_for_pin(bp, &status) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) (status & I2C_PCF_LRB) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) writeb(I2C_PCF_STOP, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) address |= 0x1; /* READ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) writeb(address, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) writeb(I2C_PCF_START, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (wait_for_pin(bp, &status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* Set PIN back to one so the device sends the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) (void) readb(bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (wait_for_pin(bp, &status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) writeb(I2C_PCF_ESO | I2C_PCF_ENI, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) *byte = readb(bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (wait_for_pin(bp, &status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) writeb(I2C_PCF_STOP, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) (void) readb(bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int bbc_i2c_write_buf(struct bbc_i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) char *buf, int len, int off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) while (len > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ret = bbc_i2c_writeb(client, *buf, off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) off++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int bbc_i2c_read_buf(struct bbc_i2c_client *client,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) char *buf, int len, int off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) while (len > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ret = bbc_i2c_readb(client, buf, off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) buf++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) off++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) EXPORT_SYMBOL(bbc_i2c_getdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) EXPORT_SYMBOL(bbc_i2c_attach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) EXPORT_SYMBOL(bbc_i2c_detach);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) EXPORT_SYMBOL(bbc_i2c_writeb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) EXPORT_SYMBOL(bbc_i2c_readb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) EXPORT_SYMBOL(bbc_i2c_write_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) EXPORT_SYMBOL(bbc_i2c_read_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static irqreturn_t bbc_i2c_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct bbc_i2c_bus *bp = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /* PIN going from set to clear is the only event which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * makes the i2c assert an interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (bp->waiting &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) !(readb(bp->i2c_control_regs + 0x0) & I2C_PCF_PIN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) wake_up_interruptible(&bp->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static void reset_one_i2c(struct bbc_i2c_bus *bp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) writeb(I2C_PCF_PIN, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) writeb(bp->own, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) writeb(I2C_PCF_PIN | I2C_PCF_ES1, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) writeb(bp->clock, bp->i2c_control_regs + 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) writeb(I2C_PCF_IDLE, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static struct bbc_i2c_bus * attach_one_i2c(struct platform_device *op, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct bbc_i2c_bus *bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct device_node *dp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) int entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) bp = kzalloc(sizeof(*bp), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (!bp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) INIT_LIST_HEAD(&bp->temps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) INIT_LIST_HEAD(&bp->fans);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) bp->i2c_control_regs = of_ioremap(&op->resource[0], 0, 0x2, "bbc_i2c_regs");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (!bp->i2c_control_regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (op->num_resources == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) bp->i2c_bussel_reg = of_ioremap(&op->resource[1], 0, 0x1, "bbc_i2c_bussel");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (!bp->i2c_bussel_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) bp->waiting = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) init_waitqueue_head(&bp->wq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (request_irq(op->archdata.irqs[0], bbc_i2c_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) IRQF_SHARED, "bbc_i2c", bp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) bp->index = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) bp->op = op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) spin_lock_init(&bp->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) entry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) for (dp = op->dev.of_node->child;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) dp && entry < 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) dp = dp->sibling, entry++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) struct platform_device *child_op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) child_op = of_find_device_by_node(dp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) bp->devs[entry].device = child_op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) bp->devs[entry].client_claimed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) writeb(I2C_PCF_PIN, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) bp->own = readb(bp->i2c_control_regs + 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) writeb(I2C_PCF_PIN | I2C_PCF_ES1, bp->i2c_control_regs + 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) bp->clock = readb(bp->i2c_control_regs + 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) printk(KERN_INFO "i2c-%d: Regs at %p, %d devices, own %02x, clock %02x.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) bp->index, bp->i2c_control_regs, entry, bp->own, bp->clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) reset_one_i2c(bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (bp->i2c_bussel_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) of_iounmap(&op->resource[1], bp->i2c_bussel_reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (bp->i2c_control_regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) of_iounmap(&op->resource[0], bp->i2c_control_regs, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) kfree(bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) extern int bbc_envctrl_init(struct bbc_i2c_bus *bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) extern void bbc_envctrl_cleanup(struct bbc_i2c_bus *bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) static int bbc_i2c_probe(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) struct bbc_i2c_bus *bp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) int err, index = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) bp = attach_one_i2c(op, index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (!bp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) err = bbc_envctrl_init(bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) free_irq(op->archdata.irqs[0], bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (bp->i2c_bussel_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) of_iounmap(&op->resource[0], bp->i2c_bussel_reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (bp->i2c_control_regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) of_iounmap(&op->resource[1], bp->i2c_control_regs, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) kfree(bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) dev_set_drvdata(&op->dev, bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static int bbc_i2c_remove(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) struct bbc_i2c_bus *bp = dev_get_drvdata(&op->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) bbc_envctrl_cleanup(bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) free_irq(op->archdata.irqs[0], bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (bp->i2c_bussel_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) of_iounmap(&op->resource[0], bp->i2c_bussel_reg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (bp->i2c_control_regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) of_iounmap(&op->resource[1], bp->i2c_control_regs, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) kfree(bp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) static const struct of_device_id bbc_i2c_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .name = "i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .compatible = "SUNW,bbc-i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) MODULE_DEVICE_TABLE(of, bbc_i2c_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) static struct platform_driver bbc_i2c_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .name = "bbc_i2c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .of_match_table = bbc_i2c_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .probe = bbc_i2c_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .remove = bbc_i2c_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) module_platform_driver(bbc_i2c_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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