^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ISM driver for s390.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright IBM Corp. 2018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define KMSG_COMPONENT "ism"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <net/smc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/debug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "ism.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MODULE_DESCRIPTION("ISM driver for s390");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PCI_DEVICE_ID_IBM_ISM 0x04ED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DRV_NAME "ism"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static const struct pci_device_id ism_device_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { PCI_VDEVICE(IBM, PCI_DEVICE_ID_IBM_ISM), 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) MODULE_DEVICE_TABLE(pci, ism_device_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static debug_info_t *ism_debug_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int ism_cmd(struct ism_dev *ism, void *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct ism_req_hdr *req = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct ism_resp_hdr *resp = cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) __ism_write_cmd(ism, req + 1, sizeof(*req), req->len - sizeof(*req));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) __ism_write_cmd(ism, req, 0, sizeof(*req));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) WRITE_ONCE(resp->ret, ISM_ERROR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) __ism_read_cmd(ism, resp, 0, sizeof(*resp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (resp->ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) debug_text_event(ism_debug_info, 0, "cmd failure");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) debug_event(ism_debug_info, 0, resp, sizeof(*resp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) __ism_read_cmd(ism, resp + 1, sizeof(*resp), resp->len - sizeof(*resp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return resp->ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int ism_cmd_simple(struct ism_dev *ism, u32 cmd_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) union ism_cmd_simple cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) cmd.request.hdr.cmd = cmd_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int query_info(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) union ism_qi cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) cmd.request.hdr.cmd = ISM_QUERY_INFO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (ism_cmd(ism, &cmd))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) debug_text_event(ism_debug_info, 3, "query info");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) debug_event(ism_debug_info, 3, &cmd.response, sizeof(cmd.response));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static int register_sba(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) union ism_reg_sba cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) dma_addr_t dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) struct ism_sba *sba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) sba = dma_alloc_coherent(&ism->pdev->dev, PAGE_SIZE, &dma_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (!sba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) cmd.request.hdr.cmd = ISM_REG_SBA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) cmd.request.sba = dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (ism_cmd(ism, &cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) dma_free_coherent(&ism->pdev->dev, PAGE_SIZE, sba, dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ism->sba = sba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) ism->sba_dma_addr = dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int register_ieq(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) union ism_reg_ieq cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) dma_addr_t dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct ism_eq *ieq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ieq = dma_alloc_coherent(&ism->pdev->dev, PAGE_SIZE, &dma_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (!ieq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) cmd.request.hdr.cmd = ISM_REG_IEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) cmd.request.ieq = dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) cmd.request.len = sizeof(*ieq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (ism_cmd(ism, &cmd)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) dma_free_coherent(&ism->pdev->dev, PAGE_SIZE, ieq, dma_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ism->ieq = ieq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ism->ieq_idx = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ism->ieq_dma_addr = dma_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int unregister_sba(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (!ism->sba)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ret = ism_cmd_simple(ism, ISM_UNREG_SBA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (ret && ret != ISM_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) dma_free_coherent(&ism->pdev->dev, PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ism->sba, ism->sba_dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ism->sba = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ism->sba_dma_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static int unregister_ieq(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (!ism->ieq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ret = ism_cmd_simple(ism, ISM_UNREG_IEQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (ret && ret != ISM_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) dma_free_coherent(&ism->pdev->dev, PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ism->ieq, ism->ieq_dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ism->ieq = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ism->ieq_dma_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int ism_read_local_gid(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) union ism_read_gid cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) cmd.request.hdr.cmd = ISM_READ_GID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) ret = ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) ism->smcd->local_gid = cmd.response.gid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static int ism_query_rgid(struct smcd_dev *smcd, u64 rgid, u32 vid_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) u32 vid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) struct ism_dev *ism = smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) union ism_query_rgid cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) cmd.request.hdr.cmd = ISM_QUERY_RGID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) cmd.request.rgid = rgid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) cmd.request.vlan_valid = vid_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) cmd.request.vlan_id = vid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static void ism_free_dmb(struct ism_dev *ism, struct smcd_dmb *dmb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) clear_bit(dmb->sba_idx, ism->sba_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) dma_free_coherent(&ism->pdev->dev, dmb->dmb_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) dmb->cpu_addr, dmb->dma_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int ism_alloc_dmb(struct ism_dev *ism, struct smcd_dmb *dmb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) unsigned long bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (PAGE_ALIGN(dmb->dmb_len) > dma_get_max_seg_size(&ism->pdev->dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (!dmb->sba_idx) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) bit = find_next_zero_bit(ism->sba_bitmap, ISM_NR_DMBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ISM_DMB_BIT_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (bit == ISM_NR_DMBS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return -ENOSPC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) dmb->sba_idx = bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (dmb->sba_idx < ISM_DMB_BIT_OFFSET ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) test_and_set_bit(dmb->sba_idx, ism->sba_bitmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) dmb->cpu_addr = dma_alloc_coherent(&ism->pdev->dev, dmb->dmb_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) &dmb->dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) GFP_KERNEL | __GFP_NOWARN | __GFP_NOMEMALLOC | __GFP_COMP | __GFP_NORETRY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (!dmb->cpu_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) clear_bit(dmb->sba_idx, ism->sba_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return dmb->cpu_addr ? 0 : -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static int ism_register_dmb(struct smcd_dev *smcd, struct smcd_dmb *dmb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct ism_dev *ism = smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) union ism_reg_dmb cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ret = ism_alloc_dmb(ism, dmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) cmd.request.hdr.cmd = ISM_REG_DMB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) cmd.request.dmb = dmb->dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) cmd.request.dmb_len = dmb->dmb_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) cmd.request.sba_idx = dmb->sba_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) cmd.request.vlan_valid = dmb->vlan_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) cmd.request.vlan_id = dmb->vlan_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) cmd.request.rgid = dmb->rgid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ret = ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ism_free_dmb(ism, dmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) dmb->dmb_tok = cmd.response.dmb_tok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static int ism_unregister_dmb(struct smcd_dev *smcd, struct smcd_dmb *dmb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct ism_dev *ism = smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) union ism_unreg_dmb cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) cmd.request.hdr.cmd = ISM_UNREG_DMB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) cmd.request.dmb_tok = dmb->dmb_tok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ret = ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) if (ret && ret != ISM_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ism_free_dmb(ism, dmb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static int ism_add_vlan_id(struct smcd_dev *smcd, u64 vlan_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct ism_dev *ism = smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) union ism_set_vlan_id cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) cmd.request.hdr.cmd = ISM_ADD_VLAN_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) cmd.request.vlan_id = vlan_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static int ism_del_vlan_id(struct smcd_dev *smcd, u64 vlan_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct ism_dev *ism = smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) union ism_set_vlan_id cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) cmd.request.hdr.cmd = ISM_DEL_VLAN_ID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) cmd.request.vlan_id = vlan_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static int ism_set_vlan_required(struct smcd_dev *smcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return ism_cmd_simple(smcd->priv, ISM_SET_VLAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static int ism_reset_vlan_required(struct smcd_dev *smcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) return ism_cmd_simple(smcd->priv, ISM_RESET_VLAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) static int ism_signal_ieq(struct smcd_dev *smcd, u64 rgid, u32 trigger_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u32 event_code, u64 info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) struct ism_dev *ism = smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) union ism_sig_ieq cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) memset(&cmd, 0, sizeof(cmd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) cmd.request.hdr.cmd = ISM_SIGNAL_IEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) cmd.request.hdr.len = sizeof(cmd.request);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) cmd.request.rgid = rgid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) cmd.request.trigger_irq = trigger_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) cmd.request.event_code = event_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) cmd.request.info = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return ism_cmd(ism, &cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) static unsigned int max_bytes(unsigned int start, unsigned int len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) unsigned int boundary)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) return min(boundary - (start & (boundary - 1)), len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static int ism_move(struct smcd_dev *smcd, u64 dmb_tok, unsigned int idx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) bool sf, unsigned int offset, void *data, unsigned int size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) struct ism_dev *ism = smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) unsigned int bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) u64 dmb_req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) while (size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) bytes = max_bytes(offset, size, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) dmb_req = ISM_CREATE_REQ(dmb_tok, idx, size == bytes ? sf : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ret = __ism_move(ism, dmb_req, data, bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) size -= bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) data += bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) offset += bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static struct ism_systemeid SYSTEM_EID = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .seid_string = "IBM-SYSZ-ISMSEID00000000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .serial_number = "0000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .type = "0000",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static void ism_create_system_eid(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct cpuid id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) u16 ident_tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) char tmp[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) get_cpu_id(&id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ident_tail = (u16)(id.ident & ISM_IDENT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) snprintf(tmp, 5, "%04X", ident_tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) memcpy(&SYSTEM_EID.serial_number, tmp, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) snprintf(tmp, 5, "%04X", id.machine);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) memcpy(&SYSTEM_EID.type, tmp, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) static void ism_get_system_eid(struct smcd_dev *smcd, u8 **eid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) *eid = &SYSTEM_EID.seid_string[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static u16 ism_get_chid(struct smcd_dev *smcd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct ism_dev *ismdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) ismdev = (struct ism_dev *)smcd->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (!ismdev || !ismdev->pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return to_zpci(ismdev->pdev)->pchid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static void ism_handle_event(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) struct smcd_event *entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) while ((ism->ieq_idx + 1) != READ_ONCE(ism->ieq->header.idx)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) if (++(ism->ieq_idx) == ARRAY_SIZE(ism->ieq->entry))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) ism->ieq_idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) entry = &ism->ieq->entry[ism->ieq_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) debug_event(ism_debug_info, 2, entry, sizeof(*entry));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) smcd_handle_event(ism->smcd, entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) static irqreturn_t ism_handle_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) struct ism_dev *ism = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) unsigned long bit, end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) unsigned long *bv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) bv = (void *) &ism->sba->dmb_bits[ISM_DMB_WORD_OFFSET];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) end = sizeof(ism->sba->dmb_bits) * BITS_PER_BYTE - ISM_DMB_BIT_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) spin_lock(&ism->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) ism->sba->s = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) for (bit = 0;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) bit = find_next_bit_inv(bv, end, bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (bit >= end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) clear_bit_inv(bit, bv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) ism->sba->dmbe_mask[bit + ISM_DMB_BIT_OFFSET] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) smcd_handle_irq(ism->smcd, bit + ISM_DMB_BIT_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (ism->sba->e) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) ism->sba->e = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) ism_handle_event(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) spin_unlock(&ism->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static const struct smcd_ops ism_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .query_remote_gid = ism_query_rgid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .register_dmb = ism_register_dmb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .unregister_dmb = ism_unregister_dmb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .add_vlan_id = ism_add_vlan_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .del_vlan_id = ism_del_vlan_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .set_vlan_required = ism_set_vlan_required,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) .reset_vlan_required = ism_reset_vlan_required,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .signal_event = ism_signal_ieq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) .move_data = ism_move,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .get_system_eid = ism_get_system_eid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .get_chid = ism_get_chid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int ism_dev_init(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct pci_dev *pdev = ism->pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) ret = request_irq(pci_irq_vector(pdev, 0), ism_handle_irq, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) pci_name(pdev), ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) goto free_vectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) ret = register_sba(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) goto free_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ret = register_ieq(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) goto unreg_sba;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) ret = ism_read_local_gid(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) goto unreg_ieq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (!ism_add_vlan_id(ism->smcd, ISM_RESERVED_VLANID))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) /* hardware is V2 capable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ism_create_system_eid();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) ret = smcd_register_dev(ism->smcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) goto unreg_ieq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) query_info(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) unreg_ieq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) unregister_ieq(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) unreg_sba:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) unregister_sba(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) free_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) free_irq(pci_irq_vector(pdev, 0), ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) free_vectors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) pci_free_irq_vectors(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static int ism_probe(struct pci_dev *pdev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) struct ism_dev *ism;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) ism = kzalloc(sizeof(*ism), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (!ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) spin_lock_init(&ism->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) dev_set_drvdata(&pdev->dev, ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) ism->pdev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) ret = pci_enable_device_mem(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ret = pci_request_mem_regions(pdev, DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) goto err_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) goto err_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) dma_set_seg_boundary(&pdev->dev, SZ_1M - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) dma_set_max_seg_size(&pdev->dev, SZ_1M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) pci_set_master(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ism->smcd = smcd_alloc_dev(&pdev->dev, dev_name(&pdev->dev), &ism_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ISM_NR_DMBS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (!ism->smcd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) goto err_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) ism->smcd->priv = ism;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) ret = ism_dev_init(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) err_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) smcd_free_dev(ism->smcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) err_resource:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) pci_release_mem_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) err_disable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) kfree(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) dev_set_drvdata(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static void ism_dev_exit(struct ism_dev *ism)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) struct pci_dev *pdev = ism->pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) smcd_unregister_dev(ism->smcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (SYSTEM_EID.serial_number[0] != '0' ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) SYSTEM_EID.type[0] != '0')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) ism_del_vlan_id(ism->smcd, ISM_RESERVED_VLANID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) unregister_ieq(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) unregister_sba(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) free_irq(pci_irq_vector(pdev, 0), ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) pci_free_irq_vectors(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static void ism_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) struct ism_dev *ism = dev_get_drvdata(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) ism_dev_exit(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) smcd_free_dev(ism->smcd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) pci_release_mem_regions(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) dev_set_drvdata(&pdev->dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) kfree(ism);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static struct pci_driver ism_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .id_table = ism_device_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .probe = ism_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .remove = ism_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) static int __init ism_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) ism_debug_info = debug_register("ism", 2, 1, 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (!ism_debug_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) debug_register_view(ism_debug_info, &debug_hex_ascii_view);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ret = pci_register_driver(&ism_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) debug_unregister(ism_debug_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static void __exit ism_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) pci_unregister_driver(&ism_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) debug_unregister(ism_debug_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) module_init(ism_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) module_exit(ism_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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