^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright IBM Corp. 2001, 2007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Authors: Fritz Elfert (felfert@millenux.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Peter Tiedemann (ptiedem@de.ibm.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * MPC additions :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Belinda Thompson (belindat@us.ibm.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Andy Richter (richtera@us.ibm.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _CTCM_FSMS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _CTCM_FSMS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/ip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/if_arp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/tcp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/ctype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <net/dst.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/ccwdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/ccwgroup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/idals.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "fsm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include "ctcm_main.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Definitions for the channel statemachine(s) for ctc and ctcmpc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * To allow better kerntyping, prefix-less definitions for channel states
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * and channel events have been replaced :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * ch_event... -> ctc_ch_event...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * CH_EVENT... -> CTC_EVENT...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * ch_state... -> ctc_ch_state...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * CH_STATE... -> CTC_STATE...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * Events of the channel statemachine(s) for ctc and ctcmpc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) enum ctc_ch_events {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * Events, representing return code of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * I/O operations (ccw_device_start, ccw_device_halt et al.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) CTC_EVENT_IO_SUCCESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) CTC_EVENT_IO_EBUSY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) CTC_EVENT_IO_ENODEV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) CTC_EVENT_IO_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) CTC_EVENT_ATTNBUSY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) CTC_EVENT_ATTN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) CTC_EVENT_BUSY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Events, representing unit-check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) CTC_EVENT_UC_RCRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) CTC_EVENT_UC_RSRESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) CTC_EVENT_UC_TXTIMEOUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) CTC_EVENT_UC_TXPARITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) CTC_EVENT_UC_HWFAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) CTC_EVENT_UC_RXPARITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) CTC_EVENT_UC_ZERO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) CTC_EVENT_UC_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * Events, representing subchannel-check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) CTC_EVENT_SC_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Events, representing machine checks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) CTC_EVENT_MC_FAIL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) CTC_EVENT_MC_GOOD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * Event, representing normal IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) CTC_EVENT_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) CTC_EVENT_FINSTAT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Event, representing timer expiry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) CTC_EVENT_TIMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * Events, representing commands from upper levels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) CTC_EVENT_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) CTC_EVENT_STOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) CTC_NR_EVENTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * additional MPC events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) CTC_EVENT_RSWEEP_TIMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * MUST be always the last element!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) CTC_MPC_NR_EVENTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * States of the channel statemachine(s) for ctc and ctcmpc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) enum ctc_ch_states {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * Channel not assigned to any device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * initial state, direction invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) CTC_STATE_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * Channel assigned but not operating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) CTC_STATE_STOPPED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) CTC_STATE_STARTWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) CTC_STATE_STARTRETRY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) CTC_STATE_SETUPWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) CTC_STATE_RXINIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) CTC_STATE_TXINIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) CTC_STATE_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) CTC_STATE_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) CTC_STATE_RXIDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) CTC_STATE_TXIDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) CTC_STATE_RXERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) CTC_STATE_TXERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) CTC_STATE_TERM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) CTC_STATE_DTERM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) CTC_STATE_NOTOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) CTC_NR_STATES, /* MUST be the last element of non-expanded states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * additional MPC states
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) CH_XID0_PENDING = CTC_NR_STATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) CH_XID0_INPROGRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) CH_XID7_PENDING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) CH_XID7_PENDING1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) CH_XID7_PENDING2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) CH_XID7_PENDING3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) CH_XID7_PENDING4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) extern const char *ctc_ch_event_names[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) extern const char *ctc_ch_state_names[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) void ctcm_purge_skb_queue(struct sk_buff_head *q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * ----- non-static actions for ctcm channel statemachine -----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * ----- FSM (state/event/action) of the ctcm channel statemachine -----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) extern const fsm_node ch_fsm[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) extern int ch_fsm_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * ----- non-static actions for ctcmpc channel statemachine ----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* shared :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) extern const fsm_node ctcmpc_ch_fsm[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) extern int mpc_ch_fsm_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * Definitions for the device interface statemachine for ctc and mpc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * States of the device interface statemachine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) enum dev_states {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) DEV_STATE_STOPPED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) DEV_STATE_STARTWAIT_RXTX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) DEV_STATE_STARTWAIT_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) DEV_STATE_STARTWAIT_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) DEV_STATE_STOPWAIT_RXTX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) DEV_STATE_STOPWAIT_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) DEV_STATE_STOPWAIT_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) DEV_STATE_RUNNING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * MUST be always the last element!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) CTCM_NR_DEV_STATES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) extern const char *dev_state_names[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * Events of the device interface statemachine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * ctcm and ctcmpc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) enum dev_events {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) DEV_EVENT_START,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) DEV_EVENT_STOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) DEV_EVENT_RXUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) DEV_EVENT_TXUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) DEV_EVENT_RXDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) DEV_EVENT_TXDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) DEV_EVENT_RESTART,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * MUST be always the last element!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) CTCM_NR_DEV_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) extern const char *dev_event_names[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * Actions for the device interface statemachine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * ctc and ctcmpc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void dev_action_start(fsm_instance * fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static void dev_action_stop(fsm_instance * fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static void dev_action_restart(fsm_instance *fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static void dev_action_chup(fsm_instance * fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * The (state/event/action) fsm table of the device interface statemachine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * ctcm and ctcmpc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) extern const fsm_node dev_fsm[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) extern int dev_fsm_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * Definitions for the MPC Group statemachine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * MPC Group Station FSM States
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) State Name When In This State
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ====================== =======================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) MPCG_STATE_RESET Initial State When Driver Loaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) We receive and send NOTHING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) MPCG_STATE_INOP INOP Received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) Group level non-recoverable error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) MPCG_STATE_READY XID exchanges for at least 1 write and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 1 read channel have completed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) Group is ready for data transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) States from ctc_mpc_alloc_channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ==============================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) MPCG_STATE_XID2INITW Awaiting XID2(0) Initiation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ATTN from other side will start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) XID negotiations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) Y-side protocol only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) MPCG_STATE_XID2INITX XID2(0) negotiations are in progress.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) At least 1, but not all, XID2(0)'s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) have been received from partner.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) MPCG_STATE_XID7INITW XID2(0) complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) No XID2(7)'s have yet been received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) XID2(7) negotiations pending.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) MPCG_STATE_XID7INITX XID2(7) negotiations in progress.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) At least 1, but not all, XID2(7)'s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) have been received from partner.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) MPCG_STATE_XID7INITF XID2(7) negotiations complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) Transitioning to READY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) MPCG_STATE_READY Ready for Data Transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) States from ctc_mpc_establish_connectivity call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ==============================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) MPCG_STATE_XID0IOWAIT Initiating XID2(0) negotiations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) X-side protocol only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ATTN-BUSY from other side will convert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) this to Y-side protocol and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ctc_mpc_alloc_channel flow will begin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) MPCG_STATE_XID0IOWAIX XID2(0) negotiations are in progress.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) At least 1, but not all, XID2(0)'s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) have been received from partner.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) MPCG_STATE_XID7INITI XID2(0) complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) No XID2(7)'s have yet been received.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) XID2(7) negotiations pending.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) MPCG_STATE_XID7INITZ XID2(7) negotiations in progress.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) At least 1, but not all, XID2(7)'s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) have been received from partner.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) MPCG_STATE_XID7INITF XID2(7) negotiations complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) Transitioning to READY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) MPCG_STATE_READY Ready for Data Transfer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) enum mpcg_events {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MPCG_EVENT_INOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) MPCG_EVENT_DISCONC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) MPCG_EVENT_XID0DO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) MPCG_EVENT_XID2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) MPCG_EVENT_XID2DONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) MPCG_EVENT_XID7DONE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) MPCG_EVENT_TIMER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) MPCG_EVENT_DOIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) MPCG_NR_EVENTS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) enum mpcg_states {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MPCG_STATE_RESET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) MPCG_STATE_INOP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) MPCG_STATE_XID2INITW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) MPCG_STATE_XID2INITX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) MPCG_STATE_XID7INITW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MPCG_STATE_XID7INITX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) MPCG_STATE_XID0IOWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) MPCG_STATE_XID0IOWAIX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) MPCG_STATE_XID7INITI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MPCG_STATE_XID7INITZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) MPCG_STATE_XID7INITF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MPCG_STATE_FLOWC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) MPCG_STATE_READY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) MPCG_NR_STATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* --- This is the END my friend --- */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags