^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright IBM Corp. 2000, 2009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Jan Glauber <jang@linux.vnet.ibm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef _CIO_QDIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define _CIO_QDIO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/schid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/debug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "chsc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define QDIO_BUSY_BIT_PATIENCE (100 << 12) /* 100 microseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define QDIO_BUSY_BIT_RETRY_DELAY 10 /* 10 milliseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define QDIO_BUSY_BIT_RETRIES 1000 /* = 10s retry time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) enum qdio_irq_states {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) QDIO_IRQ_STATE_INACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) QDIO_IRQ_STATE_ESTABLISHED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) QDIO_IRQ_STATE_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) QDIO_IRQ_STATE_STOPPED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) QDIO_IRQ_STATE_CLEANUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) QDIO_IRQ_STATE_ERR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) NR_QDIO_IRQ_STATES,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* used as intparm in do_IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define QDIO_DOING_ESTABLISH 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define QDIO_DOING_ACTIVATE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define QDIO_DOING_CLEANUP 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define SLSB_STATE_NOT_INIT 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define SLSB_STATE_EMPTY 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define SLSB_STATE_PRIMED 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define SLSB_STATE_PENDING 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define SLSB_STATE_HALTED 0xe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SLSB_STATE_ERROR 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SLSB_TYPE_INPUT 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SLSB_TYPE_OUTPUT 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define SLSB_OWNER_PROG 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define SLSB_OWNER_CU 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define SLSB_P_INPUT_NOT_INIT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT) /* 0x80 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define SLSB_P_INPUT_ACK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x81 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define SLSB_CU_INPUT_EMPTY \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) (SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY) /* 0x41 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define SLSB_P_INPUT_PRIMED \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED) /* 0x82 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define SLSB_P_INPUT_HALTED \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED) /* 0x8e */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define SLSB_P_INPUT_ERROR \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) (SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR) /* 0x8f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define SLSB_P_OUTPUT_NOT_INIT \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define SLSB_P_OUTPUT_EMPTY \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY) /* 0xa1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define SLSB_P_OUTPUT_PENDING \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING) /* 0xa3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define SLSB_CU_OUTPUT_PRIMED \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) (SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED) /* 0x62 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define SLSB_P_OUTPUT_HALTED \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED) /* 0xae */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define SLSB_P_OUTPUT_ERROR \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) (SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR) /* 0xaf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define SLSB_ERROR_DURING_LOOKUP 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* additional CIWs returned by extended Sense-ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define CIW_TYPE_EQUEUE 0x3 /* establish QDIO queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define CIW_TYPE_AQUEUE 0x4 /* activate QDIO queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* flags for st qdio sch data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define CHSC_FLAG_QDIO_CAPABILITY 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define CHSC_FLAG_VALIDITY 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* SIGA flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define QDIO_SIGA_WRITE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define QDIO_SIGA_READ 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define QDIO_SIGA_SYNC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define QDIO_SIGA_WRITEM 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define QDIO_SIGA_WRITEQ 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define QDIO_SIGA_QEBSM_FLAG 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static inline int do_sqbs(u64 token, unsigned char state, int queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int *start, int *count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) register unsigned long _ccq asm ("0") = *count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) register unsigned long _token asm ("1") = token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) " .insn rsy,0xeb000000008A,%1,0,0(%2)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) : "+d" (_ccq), "+d" (_queuestart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) : "d" ((unsigned long)state), "d" (_token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) : "memory", "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) *count = _ccq & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) *start = _queuestart & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return (_ccq >> 32) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static inline int do_eqbs(u64 token, unsigned char *state, int queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int *start, int *count, int ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) register unsigned long _ccq asm ("0") = *count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) register unsigned long _token asm ("1") = token;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned long _state = (unsigned long)ack << 63;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) " .insn rrf,0xB99c0000,%1,%2,0,0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) : "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) : "d" (_token)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) : "memory", "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *count = _ccq & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) *start = _queuestart & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) *state = _state & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return (_ccq >> 32) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct qdio_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct siga_flag {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) u8 input:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 output:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) u8 sync:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u8 sync_after_ai:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) u8 sync_out_after_pci:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) u8:3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct qdio_dev_perf_stat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned int adapter_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned int qdio_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned int pci_request_int;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned int tasklet_inbound;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned int tasklet_inbound_resched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) unsigned int tasklet_inbound_resched2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned int tasklet_outbound;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) unsigned int siga_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) unsigned int siga_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned int siga_sync;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned int inbound_call;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) unsigned int inbound_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) unsigned int stop_polling;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) unsigned int inbound_queue_full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) unsigned int outbound_call;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) unsigned int outbound_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned int outbound_queue_full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) unsigned int fast_requeue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned int target_full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned int eqbs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned int eqbs_partial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) unsigned int sqbs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) unsigned int sqbs_partial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) unsigned int int_discarded;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) } ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct qdio_queue_perf_stat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unsigned int nr_sbals[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) unsigned int nr_sbal_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) unsigned int nr_sbal_nop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) unsigned int nr_sbal_total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) enum qdio_irq_poll_states {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) QDIO_IRQ_DISABLED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct qdio_input_q {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* Batch of SBALs that we processed while polling the queue: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned int batch_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned int batch_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct qdio_output_q {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* PCIs are enabled for the queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int pci_out_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* cq: use asynchronous output buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) int use_cq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* cq: aobs used for particual SBAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) struct qaob **aobs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* cq: sbal state related to asynchronous operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct qdio_outbuf_state *sbal_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* timer to check for more outbound work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct timer_list timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * Note on cache alignment: grouped slsb and write mostly data at the beginning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * sbal[] is read-only and starts on a new cacheline followed by read mostly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct qdio_q {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct slsb slsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct qdio_input_q in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct qdio_output_q out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * inbound: next buffer the program should check for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * outbound: next buffer to check if adapter processed it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) int first_to_check;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* number of buffers in use by the adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) atomic_t nr_buf_used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* error condition during a data transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) unsigned int qdio_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* last scan of the queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u64 timestamp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) struct tasklet_struct tasklet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct qdio_queue_perf_stat q_stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* queue number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) int nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /* bitmask of queue number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* input or output queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int is_input_q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* upper-layer program handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) qdio_handler_t (*handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct qdio_irq *irq_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct sl *sl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * A page is allocated under this pointer and used for slib and sl.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct slib *slib;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) } __attribute__ ((aligned(256)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct qdio_irq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct qib qib;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) u32 *dsci; /* address of device state change indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct ccw_device *cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct list_head entry; /* list of thinint devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct dentry *debugfs_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) unsigned long int_parm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) struct subchannel_id schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) unsigned long sch_token; /* QEBSM facility */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) enum qdio_irq_states state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct siga_flag siga_flag; /* siga sync information from qdioac */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) int nr_input_qs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) int nr_output_qs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct ccw1 ccw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct ciw equeue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct ciw aqueue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct qdio_ssqd_desc ssqd_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) unsigned int scan_threshold; /* used SBALs before tasklet schedule */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) int perf_stat_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct qdr *qdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) unsigned long chsc_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) unsigned int max_input_qs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) unsigned int max_output_qs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) void (*irq_poll)(struct ccw_device *cdev, unsigned long data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) unsigned long poll_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) debug_info_t *debug_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct mutex setup_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct qdio_dev_perf_stat perf_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* helper functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define queue_type(q) q->irq_ptr->qib.qfmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define SCH_NO(q) (q->irq_ptr->schid.sch_no)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define is_thinint_irq(irq) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) (irq->qib.qfmt == QDIO_IQDIO_QFMT || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) css_general_characteristics.aif_osa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define qperf(__qdev, __attr) ((__qdev)->perf_stat.(__attr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define QDIO_PERF_STAT_INC(__irq, __attr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct qdio_irq *qdev = __irq; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (qdev->perf_stat_enabled) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) (qdev->perf_stat.__attr)++; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define qperf_inc(__q, __attr) QDIO_PERF_STAT_INC((__q)->irq_ptr, __attr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static inline void account_sbals_error(struct qdio_q *q, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) q->q_stats.nr_sbal_error += count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) q->q_stats.nr_sbal_total += count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* the highest iqdio queue is used for multicast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static inline int multicast_outbound(struct qdio_q *q)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return (q->irq_ptr->nr_output_qs > 1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) (q->nr == q->irq_ptr->nr_output_qs - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) #define pci_out_supported(irq) ((irq)->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define is_qebsm(q) (q->irq_ptr->sch_token != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define need_siga_in(q) (q->irq_ptr->siga_flag.input)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) #define need_siga_out(q) (q->irq_ptr->siga_flag.output)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define need_siga_sync(q) (unlikely(q->irq_ptr->siga_flag.sync))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define need_siga_sync_after_ai(q) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) (unlikely(q->irq_ptr->siga_flag.sync_after_ai))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define need_siga_sync_out_after_pci(q) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) (unlikely(q->irq_ptr->siga_flag.sync_out_after_pci))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) #define for_each_input_queue(irq_ptr, q, i) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) for (i = 0; i < irq_ptr->nr_input_qs && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ({ q = irq_ptr->input_qs[i]; 1; }); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define for_each_output_queue(irq_ptr, q, i) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) for (i = 0; i < irq_ptr->nr_output_qs && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) ({ q = irq_ptr->output_qs[i]; 1; }); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define add_buf(bufnr, inc) QDIO_BUFNR((bufnr) + (inc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define next_buf(bufnr) add_buf(bufnr, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define sub_buf(bufnr, dec) QDIO_BUFNR((bufnr) - (dec))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #define prev_buf(bufnr) sub_buf(bufnr, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define queue_irqs_enabled(q) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define queue_irqs_disabled(q) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) (test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) extern u64 last_ai_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* prototypes for thin interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) int qdio_establish_thinint(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) void tiqdio_add_device(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) void tiqdio_remove_device(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) void tiqdio_inbound_processing(unsigned long q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) int qdio_thinint_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) void qdio_thinint_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) int test_nonshared_ind(struct qdio_irq *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* prototypes for setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) void qdio_inbound_processing(unsigned long data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) void qdio_outbound_processing(unsigned long data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) void qdio_outbound_timer(struct timer_list *t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct irb *irb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) int nr_output_qs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct subchannel_id *schid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) struct qdio_ssqd_desc *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int qdio_setup_irq(struct qdio_irq *irq_ptr, struct qdio_initialize *init_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) void qdio_shutdown_irq(struct qdio_irq *irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) void qdio_print_subchannel_info(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) void qdio_free_queues(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) void qdio_free_async_data(struct qdio_irq *irq_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int qdio_setup_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) void qdio_setup_exit(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) int qdio_enable_async_operation(struct qdio_output_q *q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) void qdio_disable_async_operation(struct qdio_output_q *q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) struct qaob *qdio_allocate_aob(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) unsigned char *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #endif /* _CIO_QDIO_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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