^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Channel subsystem I/O instructions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/chpid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/schid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/crw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "ioasm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "orb.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "cio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static inline int __stsch(struct subchannel_id schid, struct schib *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) register struct subchannel_id reg1 asm ("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) int ccode = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) " stsch 0(%3)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) "0: ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) " srl %0,28\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) "1:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) EX_TABLE(0b, 1b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) : "+d" (ccode), "=m" (*addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) : "d" (reg1), "a" (addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int stsch(struct subchannel_id schid, struct schib *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) ccode = __stsch(schid, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) trace_s390_cio_stsch(schid, addr, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) EXPORT_SYMBOL(stsch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static inline int __msch(struct subchannel_id schid, struct schib *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) register struct subchannel_id reg1 asm ("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int ccode = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) " msch 0(%2)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "0: ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) " srl %0,28\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) "1:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) EX_TABLE(0b, 1b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) : "+d" (ccode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) : "d" (reg1), "a" (addr), "m" (*addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int msch(struct subchannel_id schid, struct schib *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ccode = __msch(schid, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) trace_s390_cio_msch(schid, addr, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static inline int __tsch(struct subchannel_id schid, struct irb *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) register struct subchannel_id reg1 asm ("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) " tsch 0(%3)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) " ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) " srl %0,28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) : "=d" (ccode), "=m" (*addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) : "d" (reg1), "a" (addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int tsch(struct subchannel_id schid, struct irb *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ccode = __tsch(schid, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) trace_s390_cio_tsch(schid, addr, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static inline int __ssch(struct subchannel_id schid, union orb *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) register struct subchannel_id reg1 asm("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int ccode = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) " ssch 0(%2)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) "0: ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) " srl %0,28\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) "1:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) EX_TABLE(0b, 1b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) : "+d" (ccode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) : "d" (reg1), "a" (addr), "m" (*addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) : "cc", "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int ssch(struct subchannel_id schid, union orb *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ccode = __ssch(schid, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) trace_s390_cio_ssch(schid, addr, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) EXPORT_SYMBOL(ssch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) static inline int __csch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) register struct subchannel_id reg1 asm("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) " csch\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) " ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) " srl %0,28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) : "=d" (ccode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) : "d" (reg1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) int csch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ccode = __csch(schid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) trace_s390_cio_csch(schid, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) EXPORT_SYMBOL(csch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) int tpi(struct tpi_info *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) " tpi 0(%2)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) " ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) " srl %0,28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) : "=d" (ccode), "=m" (*addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) : "a" (addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) trace_s390_cio_tpi(addr, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int chsc(void *chsc_area)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) typedef struct { char _[4096]; } addr_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int cc = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) " .insn rre,0xb25f0000,%2,0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) "0: ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) " srl %0,28\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) "1:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) EX_TABLE(0b, 1b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) : "+d" (cc), "=m" (*(addr_type *) chsc_area)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) : "d" (chsc_area), "m" (*(addr_type *) chsc_area)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) trace_s390_cio_chsc(chsc_area, cc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) return cc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) EXPORT_SYMBOL(chsc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static inline int __rsch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) register struct subchannel_id reg1 asm("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) " rsch\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) " ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) " srl %0,28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) : "=d" (ccode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) : "d" (reg1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) : "cc", "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int rsch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) ccode = __rsch(schid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) trace_s390_cio_rsch(schid, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static inline int __hsch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) register struct subchannel_id reg1 asm("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) " hsch\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) " ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) " srl %0,28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) : "=d" (ccode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) : "d" (reg1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int hsch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) ccode = __hsch(schid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) trace_s390_cio_hsch(schid, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) EXPORT_SYMBOL(hsch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static inline int __xsch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) register struct subchannel_id reg1 asm("1") = schid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) " xsch\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) " ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) " srl %0,28"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) : "=d" (ccode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) : "d" (reg1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) int xsch(struct subchannel_id schid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ccode = __xsch(schid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) trace_s390_cio_xsch(schid, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) int stcrw(struct crw *crw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) asm volatile(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) " stcrw 0(%2)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) " ipm %0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) " srl %0,28\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) : "=d" (ccode), "=m" (*crw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) : "a" (crw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) : "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) trace_s390_cio_stcrw(crw, ccode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return ccode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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