^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2012, NVIDIA Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Laxman Dewangan <ldewangan@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is free software; you can redistribute it and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * modify it under the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * published by the Free Software Foundation version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * whether express or implied; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 02111-1307, USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mfd/tps6586x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define RTC_CTRL 0xc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define POR_RESET_N BIT(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OSC_SRC_SEL BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define RTC_ENABLE BIT(5) /* enables alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define RTC_BUF_ENABLE BIT(4) /* 32 KHz buffer enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PRE_BYPASS BIT(3) /* 0=1KHz or 1=32KHz updates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define CL_SEL_MASK (BIT(2)|BIT(1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define CL_SEL_POS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define RTC_ALARM1_HI 0xc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define RTC_COUNT4 0xc6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define RTC_COUNT4_DUMMYREAD 0xc5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*only 14-bits width in second*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ALM1_VALID_RANGE_IN_SEC 0x3FFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define TPS6586X_RTC_CL_SEL_1_5PF 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define TPS6586X_RTC_CL_SEL_6_5PF 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define TPS6586X_RTC_CL_SEL_7_5PF 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define TPS6586X_RTC_CL_SEL_12_5PF 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct tps6586x_rtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct rtc_device *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) bool irq_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static inline struct device *to_tps6586x_dev(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return dev->parent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct device *tps_dev = to_tps6586x_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned long long ticks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) time64_t seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u8 buff[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) dev_err(dev, "read counter failed with err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) for (i = 1; i < sizeof(buff); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ticks <<= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ticks |= buff[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) seconds = ticks >> 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) rtc_time64_to_tm(seconds, tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct device *tps_dev = to_tps6586x_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned long long ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) time64_t seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) u8 buff[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) seconds = rtc_tm_to_time64(tm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ticks = (unsigned long long)seconds << 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) buff[0] = (ticks >> 32) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) buff[1] = (ticks >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) buff[2] = (ticks >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) buff[3] = (ticks >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) buff[4] = ticks & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* Disable RTC before changing time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) dev_err(dev, "failed to clear RTC_ENABLE\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) dev_err(dev, "failed to program new time\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Enable RTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) dev_err(dev, "failed to set RTC_ENABLE\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned int enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (enabled && !rtc->irq_en) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) enable_irq(rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) rtc->irq_en = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) } else if (!enabled && rtc->irq_en) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) disable_irq(rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) rtc->irq_en = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) struct device *tps_dev = to_tps6586x_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) time64_t seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) unsigned long ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) unsigned long rtc_current_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) unsigned long long rticks = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) u8 buff[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) u8 rbuff[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) seconds = rtc_tm_to_time64(&alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) dev_err(dev, "can't set alarm irq, err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) sizeof(rbuff), rbuff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) dev_err(dev, "read counter failed with err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) for (i = 1; i < sizeof(rbuff); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) rticks <<= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) rticks |= rbuff[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) rtc_current_time = rticks >> 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) seconds = rtc_current_time - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ticks = (unsigned long long)seconds << 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) buff[0] = (ticks >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) buff[1] = (ticks >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) buff[2] = ticks & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) dev_err(dev, "programming alarm failed with err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct device *tps_dev = to_tps6586x_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) unsigned long ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) time64_t seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) u8 buff[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) seconds = ticks >> 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) rtc_time64_to_tm(seconds, &alrm->time);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static const struct rtc_class_ops tps6586x_rtc_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .read_time = tps6586x_rtc_read_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .set_time = tps6586x_rtc_set_time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .set_alarm = tps6586x_rtc_set_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .read_alarm = tps6586x_rtc_read_alarm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct tps6586x_rtc *rtc = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static int tps6586x_rtc_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct tps6586x_rtc *rtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (!rtc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rtc->dev = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) rtc->irq = platform_get_irq(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* 1 kHz tick mode, enable tick counting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ret = tps6586x_update(tps_dev, RTC_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) RTC_ENABLE | OSC_SRC_SEL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) dev_err(&pdev->dev, "unable to start counter\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) device_init_wakeup(&pdev->dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) platform_set_drvdata(pdev, rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (IS_ERR(rtc->rtc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ret = PTR_ERR(rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) goto fail_rtc_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) rtc->rtc->ops = &tps6586x_rtc_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) rtc->rtc->range_max = (1ULL << 30) - 1; /* 30-bit seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) rtc->rtc->start_secs = mktime64(2009, 1, 1, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) rtc->rtc->set_start_time = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) irq_set_status_flags(rtc->irq, IRQ_NOAUTOEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) tps6586x_rtc_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) IRQF_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) dev_name(&pdev->dev), rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) rtc->irq, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) goto fail_rtc_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret = rtc_register_device(rtc->rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) goto fail_rtc_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) fail_rtc_register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) tps6586x_update(tps_dev, RTC_CTRL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static int tps6586x_rtc_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) tps6586x_update(tps_dev, RTC_CTRL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static int tps6586x_rtc_suspend(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) enable_irq_wake(rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static int tps6586x_rtc_resume(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (device_may_wakeup(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) disable_irq_wake(rtc->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) tps6586x_rtc_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static struct platform_driver tps6586x_rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .name = "tps6586x-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .pm = &tps6586x_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .probe = tps6586x_rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .remove = tps6586x_rtc_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) module_platform_driver(tps6586x_rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) MODULE_ALIAS("platform:tps6586x-rtc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MODULE_DESCRIPTION("TI TPS6586x RTC driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) MODULE_LICENSE("GPL v2");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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